2011-12-14 18:30:09 +08:00
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2011-12-14 Iain Sandoe <iains@gcc.gnu.org>
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* config/obj-macho.c: Add some more top-level comments.
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(collect_16char_name): New.
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(obj_mach_o_section): Amend to allow syntax compatible with
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existing system tools. Use section translation data when available.
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(obj_mach_o_segT_from_bfd_name): New.
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(known_sections): Update.
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(obj_mach_o_known_section): Use obj_mach_o_segT_from_bfd_name.
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(objc_sections): New.
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(obj_mach_o_objc_section): New.
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(debug_sections): New.
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(obj_mach_o_debug_section): New.
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(tgt_sections): New.
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(obj_mach_o_opt_tgt_section): New.
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(obj_mach_o_base_section): New.
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(obj_mach_o_common_parse): Update to create BSS on demand and to handle
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lcomm optional alignment param.
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(obj_mach_o_comm): Update parameter name.
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(obj_mach_o_placeholder): New.
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(mach_o_pseudo_table): Update for GCC section directives.
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* config/obj-macho.h (_OBJ_MACH_O_H): New.
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(USE_ALIGN_PTWO): Define.
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(S_SET_ALIGN) Define.
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2011-12-13 20:56:33 +08:00
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2011-12-13 Andrew Burgess <aburgess@broadcom.com>
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* doc/internals.texi (TC_FORCE_RELOCATION_SUB_SAME): Update
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to match code.
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bfd:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* archures.c (bfd_mach_mips_octeon2): New macro
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsocteon2): New enum value.
(arch_info_struct): Add bfd_mach_mips_octeon2.
* elfxx-mips.c (_bfd_elf_mips_mach): Support E_MIPS_MACH_OCTEON2.
(mips_set_isa_flags): Add bfd_mach_mips_octeon2.
(mips_mach_extensions): Add bfd_mach_mips_octeon2.
gas:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
(mips_cpu_info_table): Add Octeon2.
* doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
gas/testsuite:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* gas/mips/mips.exp: Add Octeon2 for an architecture.
Run octeon2 test.
* gas/mips/octeon2.d: New file.
* gas/mips/octeon2.s: New file.
include/opcode:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEON2.
(INSN_OCTEON2): New macro.
(CPU_OCTEON2): New macro.
(OPCODE_IS_MEMBER): Add Octeon2.
opcodes:
2011-12-08 Andrew Pinski <apinski@cavium.com>
Adam Nemet <anemet@caviumnetworks.com>
* mips-dis.c (mips_arch_choices): Add Octeon2.
For "octeon+", just include OcteonP for the insn.
* mips-opc.c (IOCT): Include Octeon2.
(IOCTP): Include Octeon2.
(IOCT2): New macro.
(mips_builtin_opcodes): Add "laa", "laad", "lac", "lacd", "lad",
"ladd", "lai", "laid", "las", "lasd", "law", "lawd".
Move "lbux", "ldx", "lhx", "lwx", and "lwux" up to where the standard
loads are, and add IOCT2 to them.
Add "lbx" and "lhux".
Add "qmac.00", "qmac.01", "qmac.02", "qmac.03", "qmacs.00",
"qmacs.01", "qmacs.01", "qmacs.02" and "qmacs.03".
Add "zcb" and "zcbt".
2011-12-09 04:47:27 +08:00
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2011-12-08 Andrew Pinski <apinski@cavium.com>
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Adam Nemet <anemet@caviumnetworks.com>
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* tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
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(mips_cpu_info_table): Add Octeon2.
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* doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
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2011-12-08 00:58:35 +08:00
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2011-12-07 Sameera Deshpande <sameera.deshpande@arm.com>
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* config/tc-arm.c (do_t_ldstd): Warn for unpredictable cases.
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2011-12-08 00:46:35 +08:00
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2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* config/tc-arm.c (ARM_IT_MAX_OPERANDS): New define.
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(arm_it): Use ARM_IT_MAX_OPERANDS.
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(neon_select_shape): Ensure we have matched all operands.
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2011-12-08 00:44:55 +08:00
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2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* config/tc-arm.c (parse_neon_mov): Update which_operand
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correctly.
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2011-12-05 23:43:53 +08:00
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2011-12-05 Richard Earnshaw <rearnsha@arm.com>
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* tc-arm.c (aeabi_set_public_attributes): Correctly set
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Tag_ARM_ISA_use and Tag_Thumb_ISA_use.
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2011-12-05 22:51:54 +08:00
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2011-11-30 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* config/tc-arm.c (arm_cpu_option_table): Add name_len field.
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(arm_arch_option_table): Likewise.
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(arm_option_extension_value_table): Likewise.
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(ARM_CPU_OPT): New define.
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(ARM_ARCH_OPT): Likewise.
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(ARM_EXT_OPT): Likewise.
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(arm_cpus): Use ARM_CPU_OPT to initialize.
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(arm_archs): Use ARM_ARCH_OPT to initialize.
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(arm_extensions): Use ARM_EXT_OPT to initialize.
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(arm_parse_extension): Ensure option string matching matches
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the whole string.
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(arm_parse_cpu): Likewise.
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(arm_parse_arch): Likewise.
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2011-11-30 04:28:55 +08:00
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2011-11-29 Andrew Pinski <apinski@cavium.com>
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* config/tc-mips.c (CPU_IS_OCTEON): New macro function.
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(CPU_HAS_SEQ): Change to use CPU_IS_OCTEON.
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(NO_ISA_COP): Likewise.
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(macro) <ld_st>: Add support when off0 is true.
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Add support for M_SAA_AB, M_SAA_OB, M_SAAD_OB and M_SAAD_AB.
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(mips_cpu_info_table): Add octeon+.
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* doc/c-mips.texi: Document octeon+ as an acceptable value for -march=.
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2011-11-25 23:17:36 +08:00
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2011-11-25 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* config/tc-arm.c (do_t_mov_cmp): Allow MOV lowreg, lowreg when no CPU
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is specified.
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2011-11-23 19:32:42 +08:00
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2011-11-23 Tristan Gingold <gingold@adacore.com>
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* config/tc-alpha.c (s_alpha_prologue): Requires empty line.
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2011-11-23 19:27:51 +08:00
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2011-11-23 Tristan Gingold <gingold@adacore.com>
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* config/tc-alpha.c (s_alpha_frame): Emit a warning if bad value
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of RA.
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(s_alpha_pdesc): Adjust comment.
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2011-11-23 18:50:53 +08:00
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2011-11-23 Thomas Klein <th.r.klein@web.de>
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* config/tc-arm.c (do_t_mov_cmp): Prevent emitting code for MOV
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with two low register at arch v4t or v5t when assember using
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unified syntax.
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2011-11-22 01:10:31 +08:00
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2011-11-21 DJ Delorie <dj@redhat.com>
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* config/rl78-defs.h (rl78_error): Add "const".
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* config/rl78-parse.y (rl78_error): Likewise.
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2011-11-21 21:19:33 +08:00
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2011-11-21 Andreas Tobler <andreast@fgznet.ch>
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* config/tc-ppc.c (ppc_target_format): Add format for powerpc*-freebsd.
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2011-11-17 12:24:56 +08:00
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2011-11-16 David S. Miller <davem@davemloft.net>
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* config/tc-sparc.c (md_apply_fix): Handle BFD_RELOC_8.
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2011-11-16 20:34:34 +08:00
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2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
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* config/tc-mips.c (macro): Fix unsupported opcode message
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capitalization.
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(mips_ip, mips16_ip): Likewise.
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2011-11-16 20:29:56 +08:00
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2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
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* config/tc-mips.c (ISA_SUPPORTS_MCU_ASE): Also set if microMIPS
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mode.
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2011-11-16 20:27:06 +08:00
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2011-11-16 Maciej W. Rozycki <macro@codesourcery.com>
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* config/tc-mips.c (macro_build_jalr): Reverse a negative
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conditional.
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(mips_ip): Likewise.
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2011-11-16 20:21:35 +08:00
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2011-11-16 Catherine Moore <clm@codesourcery.com>
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Maciej W. Rozycki <macro@codesourcery.com>
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* config/tc-mips.c (mips_cpu_info_table): Add "m14ke" and
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"m14kec".
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* doc/c-mips.texi (MIPS architecture options): Add "m14ke" and
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"m14kec" to the list of -march options.
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2011-11-15 21:08:17 +08:00
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2011-11-15 Maciej W. Rozycki <macro@codesourcery.com>
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* write.c (dump_section_relocs): Don't convert PC-relative relocs
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that have an in-place addend narrower than the addresses used.
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2011-11-14 21:43:23 +08:00
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2011-11-14 Maciej W. Rozycki <macro@codesourcery.com>
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* config/tc-mips.c (can_swap_branch_p): Exclude microMIPS
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variant frags too.
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2011-11-08 00:20:48 +08:00
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2011-11-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* config/tc-arm.c (arm_cpus): Add cortex-a7 entry.
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* doc/c-arm.texi (ARM Options): Add cortex-a7 to list of accepted
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CPUs.
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2011-11-05 00:04:13 +08:00
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2011-11-04 DJ Delorie <dj@redhat.com>
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* doc/c-rl78.texi (RL78-Float): Remove unused menu entry.
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2011-11-03 04:40:22 +08:00
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2011-11-02 DJ Delorie <dj@redhat.com>
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* config/tc-rl78.c (tc_gen_reloc): Remove unused variable.
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2011-11-02 19:13:59 +08:00
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2011-11-02 Nick Clifton <nickc@redhat.com>
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* config/tc-arm.c (md_begin): Remove ARM_PLT32 reloc associated
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with the (PLT) instruction suffix when operating in eabi mode.
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* doc/c-arm.texi (ARM_Relocations): Extend description of (PLT)
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suffix.
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2011-11-02 11:09:11 +08:00
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2011-11-01 DJ Delorie <dj@redhat.com>
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* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
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(TARGET_CPU_HFILES): Add rc-rl78.h.
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(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
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(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
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* Makefile.in: Regenerate.
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* configure.in: Add rl78 case.
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* configure: Regenerate.
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* configure.tgt: Add rl78 case.
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* config/rl78-defs.h: New file.
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* config/rl78-parse.y: New file.
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* config/tc-rl78.c: New file.
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* config/tc-rl78.h: New file.
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* NEWS: Add Renesas RL78.
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* doc/Makefile.am (c-rl78.texi): New.
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* doc/Makefile.in: Likewise.
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* doc/all.texi: Enable it.
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* doc/as.texi: Add it.
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* doc/c-rl78.texi: New file.
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2011-10-28 22:37:30 +08:00
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2011-10-28 Walter Lee <walt@tilera.com>
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* NEWS: Fix TILEPro capitalization.
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2011-10-28 22:43:54 +08:00
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* config/tc-tilegx.c (emit_tilegx_instruction) Handle
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relocations of aliases.
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* config/tc-tilepro.c: (emit_tilepro_instruction) Likewise.
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2011-10-28 22:37:30 +08:00
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2011-10-28 21:02:15 +08:00
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2011-10-28 Nick Clifton <nickc@redhat.com>
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* po/ja.po: New Japanese translation.
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* configure.in (ALL_LINGUAS): Add ja.
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* configure: Regenerate.
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2011-10-26 20:14:17 +08:00
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2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
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* doc/as.texinfo [EPIPHANY]: Include c-epiphany.texi to avoid
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duplication.
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2011-10-26 04:36:22 +08:00
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2011-10-25 Mike Frysinger <vapier@gentoo.org>
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* config/rx-defs.h (rx_error): Add const to first arg.
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* config/rx-parse.y (rx_error): Likewise.
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2011-10-25 21:35:00 +08:00
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2011-10-25 Nick Clifton <nickc@redhat.com>
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* config/tc-ns32k.c (md_begin): Rename local variable 'stat' to
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'status'.
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|
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 19:18:16 +08:00
|
|
|
|
2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
|
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|
|
|
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|
|
|
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|
|
* NEWS: Mention addition of Adapteva Epiphany support.
|
|
|
|
|
|
* config/tc-epiphany.c: New file.
|
|
|
|
|
|
* config/tc-epiphany.h: New file.
|
|
|
|
|
|
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
|
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|
|
|
|
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
|
|
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|
|
* configure.in: Also set using_cgen for epiphany.
|
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|
|
* configure.tgt: Handle epiphany.
|
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|
|
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
|
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* doc/all.texi: Set EPIPHANY.
|
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|
* doc/as.texinfo: Add EPIPHANY-specific text.
|
|
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|
|
|
* doc/c-epiphany.texi: New file.
|
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|
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* po/gas.pot: Regenerate.
|
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* Makefile.in: Regenerate.
|
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* configure: Regenerate.
|
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* doc/Makefile.in: Regenerate.
|
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* po/POTFILES.in: Regenerate.
|
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2011-10-24 22:25:01 +08:00
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|
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2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
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* config/tc-mips.c (move_register): Fix formatting.
|
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2011-10-24 22:17:10 +08:00
|
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|
|
2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
|
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* config/tc-mips.c (can_swap_branch_p): Remove empty line.
|
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(start_noreorder): Likewise.
|
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|
2011-10-24 22:08:23 +08:00
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|
2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
|
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|
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* config/tc-mips.c (s_option): Fix formatting.
|
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(mips_elf_final_processing): Likewise.
|
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|
2011-10-24 22:04:42 +08:00
|
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|
|
2011-10-24 Maciej W. Rozycki <macro@codesourcery.com>
|
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* config/tc-mips.c (validate_micromips_insn): Fix formatting.
|
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2011-10-24 10:49:24 +08:00
|
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|
2011-10-24 David Binderman <dcb314@hotmail.com>
|
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* config/tc-mn10200.c (md_convert_frag): Add missing break.
|
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2011-10-21 21:24:26 +08:00
|
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|
2011-10-21 Tristan Gingold <gingold@adacore.com>
|
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|
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* config/tc-alpha.c (load_expression): Use symbol_mark_used accessor.
|
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(s_alpha_comm): Use symbol_set_frag accessor.
|
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|
2011-10-20 07:09:11 +08:00
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|
2011-10-20 Alan Modra <amodra@gmail.com>
|
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|
|
* config/tc-mips.c (micromips_add_label): Avoid gcc warning.
|
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|
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(md_convert_frag): Likewise.
|
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|
2011-10-18 22:41:55 +08:00
|
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|
2011-10-18 Jie Zhang <jie@codesourcery.com>
|
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|
|
Julian Brown <julian@codesourcery.com>
|
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|
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* config/tc-arm.c (parse_shifter_operand): Fix handling of explicit
|
|
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|
|
rotation.
|
|
|
|
|
|
(encode_arm_shifter_operand): Likewise.
|
|
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|
2011-10-13 16:15:17 +08:00
|
|
|
|
2011-10-13 James Greenhalgh <james.greenhalgh@arm.com>
|
|
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|
|
|
|
|
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|
|
* config/tc-arm.c (check_ldr_r15_aligned): New.
|
|
|
|
|
|
(do_ldst): Warn in upredictable cases.
|
|
|
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|
|
(do_t_ldst): Likewise.
|
|
|
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|
|
(insns): Update accordingly.
|
|
|
|
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|
|
2011-10-13 05:07:07 +08:00
|
|
|
|
2011-10-13 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* as.c (main): Define .gasversion. rather than __GAS_VERSION__.
|
|
|
|
|
|
* frags.h (bss_address_frag): Delete
|
|
|
|
|
|
(predefined_address_frag): New.
|
|
|
|
|
|
* frags.c (frag_init): Init predefined_address_frag. Delete ref
|
2011-10-20 07:09:11 +08:00
|
|
|
|
to bss_address_frag.
|
2011-10-13 05:07:07 +08:00
|
|
|
|
* symbols.c (S_CAN_BE_REDEFINED): New function.
|
|
|
|
|
|
* symbols.h (S_CAN_BE_REDEFINED): Declare.
|
|
|
|
|
|
* read.c (assign_symbol): Use S_CAN_BE_REDEFINED.
|
|
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|
|
|
|
2011-10-12 10:57:07 +08:00
|
|
|
|
2011-10-12 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
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|
|
|
* symbols.c (local_symbol_make): Make global.
|
|
|
|
|
|
* symbols.h (local_symbol_make): Declare.
|
|
|
|
|
|
* as.c (main): Define __GAS_VERSION__.
|
|
|
|
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|
|
2011-10-11 00:12:24 +08:00
|
|
|
|
2011-10-10 Nick Clifton <nickc@redhat.com>
|
|
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|
|
|
|
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|
|
* po/es.po: Updated Spanish translation.
|
|
|
|
|
|
* po/fi.po: Updated Finnish translation.
|
|
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|
|
* po/fr.po: Updated French translation.
|
|
|
|
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|
|
2011-10-05 22:13:31 +08:00
|
|
|
|
2011-10-05 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
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|
|
* config/rx-defs.h (rx_pid_register): New.
|
|
|
|
|
|
(rx_gp_register): New.
|
|
|
|
|
|
* config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg.
|
|
|
|
|
|
(displacement): Add PID support.
|
|
|
|
|
|
* config/tc-rx.c (rx_pid_mode): New.
|
|
|
|
|
|
(rx_num_int_regs): New.
|
|
|
|
|
|
(rx_pid_register): New.
|
|
|
|
|
|
(rx_gp_register): New.
|
|
|
|
|
|
(options): Add -mpid and -mint-register= options.
|
|
|
|
|
|
(md_longopts): Likewise.
|
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
|
(md_show_usage): Likewise.
|
|
|
|
|
|
(rx_pid_symbol): New.
|
|
|
|
|
|
(rx_pidreg_symbol): New.
|
|
|
|
|
|
(rx_gpreg_symbol): New.
|
|
|
|
|
|
(md_begin): Support PID.
|
|
|
|
|
|
(rx_validate_fix_sub): Support PID.
|
|
|
|
|
|
(tc_gen_reloc): Support PID.
|
|
|
|
|
|
* doc/c-rx.texi: Document PID support.
|
|
|
|
|
|
|
2011-09-28 02:57:22 +08:00
|
|
|
|
2011-09-27 Kai Tietz <ktietz@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-coff.c (obj_coff_section): Add 'e' as specifier
|
|
|
|
|
|
for marking section SEC_EXCLUDE.
|
|
|
|
|
|
|
2011-09-22 16:11:16 +08:00
|
|
|
|
2011-09-22 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Add marker for 2.22.
|
|
|
|
|
|
|
2011-09-22 08:03:30 +08:00
|
|
|
|
2011-09-21 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (hwcap_allowed): New.
|
|
|
|
|
|
(struct sparc_arch): New field 'hwcap_allowed' containing a bitmask
|
|
|
|
|
|
of F_FOO flags which are enabled by the particular arch setting.
|
|
|
|
|
|
Add new options that provide explicit access to new instructions.
|
|
|
|
|
|
(md_parse_option): Only bump max_architecture if the requested one
|
|
|
|
|
|
is larger, or this is the first explicit request.
|
|
|
|
|
|
(get_hwcap_name): New function.
|
|
|
|
|
|
(sparc_ip): Validate that hwcaps used by an instruction have actually
|
|
|
|
|
|
been enabled.
|
|
|
|
|
|
* doc/c-sparc.texi: Document new sparc options.
|
|
|
|
|
|
|
Annotate sparc objects with cpu hardware capabilities used.
bfd/
* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): New.
* elfxx-sparc.h: Declare it.
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Call it.
* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.
binutils/
* readelf.c (display_sparc_hwcaps): New.
(display_sparc_gnu_attribute): New.
(process_sparc_specific): New.
(process_arch_specific): When EM_SPARC, EM_SPARC32PLUS,
or EM_SPARCV9 invoke process_sparc_specific.
gas/
* config/tc-sparc.c (hwcap_seen): New bitmask, defined when
not TE_SOLARIS.
(sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
sparc_opcode->flags of instruction into hwcap_seen.
(sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
hwcap_seen is non-zero and not TE_SOLARIS.
gas/testsuite/
* gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic.
* gas/sparc/hpcvis3.d: Likewise.
include/elf/
* sparc.h (Tag_GNU_Sparc_HWCAPS): New object attribute.
(ELF_SPARC_HWCAP_*): New HWCAPS bitmask values.
include/opcode/
* sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int.
(F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits.
opcodes/
* sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag
bits. Fix "fchksm16" mnemonic.
2011-09-22 04:49:16 +08:00
|
|
|
|
2011-09-21 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (hwcap_seen): New bitmask, defined when
|
|
|
|
|
|
not TE_SOLARIS.
|
|
|
|
|
|
(sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
|
|
|
|
|
|
sparc_opcode->flags of instruction into hwcap_seen.
|
|
|
|
|
|
(sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
|
|
|
|
|
|
hwcap_seen is non-zero and not TE_SOLARIS.
|
|
|
|
|
|
|
2011-09-19 16:24:23 +08:00
|
|
|
|
2011-09-19 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-alpha.c (insert_operand): Call as_bad_value_out_of_range
|
|
|
|
|
|
instead of as_warn_out_of_range.
|
|
|
|
|
|
|
2011-09-09 00:56:10 +08:00
|
|
|
|
2011-09-08 Mark Fortescue <mark@mtfhpc.demon.co.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (sparc_ip): Handle 'i' + r<0..31>
|
|
|
|
|
|
in addition to 'i' + [goli]<0..7>.
|
|
|
|
|
|
|
2011-09-09 00:07:11 +08:00
|
|
|
|
2011-09-08 Joern Rennecke <joern.rennecke@embecosm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* cgen.c (gas_cgen_pcrel_r_type): New function.
|
|
|
|
|
|
(gas_cgen_tc_gen_reloc): Check for GAS_CGEN_PCREL_R_TYPE.
|
|
|
|
|
|
* cgen.h (gas_cgen_pcrel_r_type): Declare.
|
|
|
|
|
|
|
2011-09-08 20:18:28 +08:00
|
|
|
|
2011-09-08 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/13167
|
|
|
|
|
|
* dwarf2dbg.c (dwarf2_flush_pending_lines): Use symbol_temp_new_now.
|
|
|
|
|
|
|
2011-09-06 03:19:01 +08:00
|
|
|
|
2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/13024
|
|
|
|
|
|
* dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
|
|
|
|
|
|
(dwarf2_gen_line_info_1): Delete.
|
|
|
|
|
|
(dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
|
|
|
|
|
|
(dwarf2_gen_line_info, dwarf2_emit_label): Use them.
|
|
|
|
|
|
(dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
|
|
|
|
|
|
(dwarf2_directive_loc): Push previous .locs instead of generating
|
|
|
|
|
|
them immediately.
|
|
|
|
|
|
|
2011-08-26 23:15:52 +08:00
|
|
|
|
2011-08-26 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/es.po: Updated Spanish translation.
|
|
|
|
|
|
|
2011-08-26 21:37:28 +08:00
|
|
|
|
2011-08-26 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-alpha.c (s_alpha_linkage): Simplify. Add comments.
|
|
|
|
|
|
|
|
|
|
|
|
2011-08-26 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-alpha.c (add_to_link_pool): Improve comment.
|
|
|
|
|
|
(s_alpha_fp_save): Fix indentation.
|
|
|
|
|
|
|
2011-08-19 22:48:40 +08:00
|
|
|
|
2011-08-19 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo: Include c-xstormy16.texi.
|
|
|
|
|
|
|
2011-08-18 22:10:35 +08:00
|
|
|
|
2011-08-18 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (resolve_reloc_expr_symbols): Convert local symbols
|
|
|
|
|
|
on relocs to section+offset.
|
|
|
|
|
|
(get_frag_for_reloc): New function.
|
|
|
|
|
|
(write_relocs): Merge sort fixup relocs with those from .reloc
|
|
|
|
|
|
directives.
|
|
|
|
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|
|
2011-08-11 06:55:57 +08:00
|
|
|
|
2011-08-10 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (can_swap_branch_p): Update the comment on
|
|
|
|
|
|
MIPS16 fixups.
|
|
|
|
|
|
|
2011-08-09 23:25:32 +08:00
|
|
|
|
2011-08-09 Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
Daniel Jacobowitz <dan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_cpu_info_table): Add "m14k" and
|
|
|
|
|
|
"m14kc".
|
|
|
|
|
|
* doc/c-mips.texi (MIPS architecture options): Add "m14k" and
|
|
|
|
|
|
"m14kc" to the list of -march options.
|
|
|
|
|
|
|
gas/
* config/tc-mips.c (mips_set_options): Add ase_mcu.
(mips_opts): Initialise ase_mcu to -1.
(ISA_SUPPORTS_MCU_ASE): New macro.
(MIPS_CPU_ASE_MCU): Likewise.
(is_opcode_valid): Handle MCU.
(macro_build, macro): Likewise.
(validate_mips_insn, validate_micromips_insn): Likewise.
(mips_ip): Likewise.
(options): Add OPTION_MCU and OPTION_NO_MCU.
(md_longopts): Add mmcu and mno-mcu.
(md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
(mips_after_parse_args): Handle MCU.
(s_mipsset): Likewise.
(md_show_usage): Handle MCU options.
* doc/as.texinfo: Document -mmcu and -mno-mcu options.
* doc/c-mips.texi: Likewise, and document ".set mcu" and
".set nomcu" directives.
gas/testsuite/
* gas/mips/micromips@mcu.d: New test.
* gas/mips/mcu.d: Likewise.
* gas/mips/mcu.s: New test source.
* gas/mips/mips.exp: Run the new tests.
include/opcode/
* mips.h (OP_MASK_3BITPOS, OP_SH_3BITPOS): New macros.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Redefine.
(INSN_ASE_MASK): Add the MCU bit.
(INSN_MCU): New macro.
(M_ACLR_AB, M_ACLR_OB, M_ASET_AB, M_ASET_OB): New enum values.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): New macros.
opcodes/
* mips-dis.c (mips_arch_choices): Enable MCU for "mips32r2"
and "mips64r2".
(print_insn_args, print_insn_micromips): Handle MCU.
* micromips-opc.c (MC): New macro.
(micromips_opcodes): Add "aclr", "aset" and "iret".
* mips-opc.c (MC): New macro.
(mips_builtin_opcodes): Add "aclr", "aset" and "iret".
2011-08-09 23:20:03 +08:00
|
|
|
|
2011-08-09 Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_set_options): Add ase_mcu.
|
|
|
|
|
|
(mips_opts): Initialise ase_mcu to -1.
|
|
|
|
|
|
(ISA_SUPPORTS_MCU_ASE): New macro.
|
|
|
|
|
|
(MIPS_CPU_ASE_MCU): Likewise.
|
|
|
|
|
|
(is_opcode_valid): Handle MCU.
|
|
|
|
|
|
(macro_build, macro): Likewise.
|
|
|
|
|
|
(validate_mips_insn, validate_micromips_insn): Likewise.
|
|
|
|
|
|
(mips_ip): Likewise.
|
|
|
|
|
|
(options): Add OPTION_MCU and OPTION_NO_MCU.
|
|
|
|
|
|
(md_longopts): Add mmcu and mno-mcu.
|
|
|
|
|
|
(md_parse_option): Handle OPTION_MCU and OPTION_NO_MCU.
|
|
|
|
|
|
(mips_after_parse_args): Handle MCU.
|
|
|
|
|
|
(s_mipsset): Likewise.
|
|
|
|
|
|
(md_show_usage): Handle MCU options.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo: Document -mmcu and -mno-mcu options.
|
|
|
|
|
|
* doc/c-mips.texi: Likewise, and document ".set mcu" and
|
|
|
|
|
|
".set nomcu" directives.
|
|
|
|
|
|
|
include/opcode/
* mips.h (INSN_WRITE_GPR_S, INSN2_WRITE_GPR_MB): New macros.
(INSN2_READ_GPR_MC, INSN2_READ_GPR_ME): Likewise.
(INSN2_WRITE_GPR_MF, INSN2_READ_GPR_MG): Likewise.
(INSN2_READ_GPR_MJ, INSN2_WRITE_GPR_MJ): Likewise.
(INSN2_READ_GPR_MP, INSN2_WRITE_GPR_MP): Likewise.
(INSN2_READ_GPR_MQ, INSN2_WRITE_GPR_MHI): Likewise.
(INSN2_READ_GPR_MMN): Likewise.
(INSN2_READ_FPR_D): Change the bit used.
(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_MF): Likewise.
(INSN2_MOD_SP, INSN2_READ_GPR_31, INSN2_READ_GP): Likewise.
(INSN2_READ_PC, INSN2_UNCOND_BRANCH): Likewise.
(INSN2_COND_BRANCH): Likewise.
(INSN2_WRITE_GPR_S, INSN2_MOD_GPR_MB): Remove macros.
(INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG): Likewise.
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP, INSN2_MOD_GPR_MQ): Likewise.
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM): Likewise.
(INSN2_MOD_GPR_MN): Likewise.
gas/
* config/tc-mips.c (gpr_mod_mask): Remove INSN2_MOD_GPR_MB,
INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG,
INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MM,
INSN2_MOD_GPR_MN, INSN2_MOD_GPR_MP and INSN2_MOD_GPR_MQ opcode
register use checks.
(gpr_read_mask): Add INSN2_READ_GPR_MC, INSN2_READ_GPR_ME
INSN2_READ_GPR_MG, INSN2_READ_GPR_MJ, INSN2_READ_GPR_MMN,
INSN2_READ_GPR_MP and INSN2_READ_GPR_MQ opcode register use
checks.
(gpr_write_mask): Replace INSN2_WRITE_GPR_S opcode register
use flag with INSN_WRITE_GPR_S. Add INSN2_WRITE_GPR_MB,
INSN2_WRITE_GPR_MHI, INSN2_WRITE_GPR_MJ and INSN2_WRITE_GPR_MP
opcode register use checks.
(can_swap_branch_p): Enable microMIPS branch swapping.
(append_insn): Likewise.
gas/testsuite/
* gas/mips/micromips.d: Update according to changes to enable
microMIPS branch swapping.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips@jal-svr4pic.d: Likewise.
* gas/mips/micromips@loc-swap.d: Likewise.
* gas/mips/micromips@loc-swap-dis.d: Likewise.
opcodes/
* micromips-opc.c (MOD_mb, MOD_mc, MOD_md): Remove macros.
(MOD_me, MOD_mf, MOD_mg, MOD_mhi, MOD_mj, MOD_ml): Likewise.
(MOD_mm, MOD_mn, MOD_mp, MOD_mq, MOD_sp): Likewise.
(WR_mb, RD_mc, RD_md, WR_md, RD_me, RD_mf, WR_mf): New macros.
(RD_mg, WR_mhi, RD_mj, WR_mj, RD_ml, RD_mmn): Likewise.
(RD_mp, WR_mp, RD_mq, RD_sp, WR_sp): Likewise.
(WR_s): Update macro.
(micromips_opcodes): Update register use flags of: "addiu",
"addiupc", "addiur1sp", "addiur2", "addius5", "addiusp", "addu",
"and", "andi", "beq", "beqz", "bne", "bnez", "di", "ei", "j",
"jalr", "jalrs", "jr", "jraddiusp", "jrc", "lbu", "lhu", "li",
"lui", "lw", "lwm", "mfhi", "mflo", "move", "movep", "not",
"nor", "or", "ori", "sb", "sh", "sll", "srl", "subu", "sw",
"swm" and "xor" instructions.
2011-08-09 22:25:29 +08:00
|
|
|
|
2011-08-09 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (gpr_mod_mask): Remove INSN2_MOD_GPR_MB,
|
|
|
|
|
|
INSN2_MOD_GPR_MC, INSN2_MOD_GPR_ME, INSN2_MOD_GPR_MG,
|
|
|
|
|
|
INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MM,
|
|
|
|
|
|
INSN2_MOD_GPR_MN, INSN2_MOD_GPR_MP and INSN2_MOD_GPR_MQ opcode
|
|
|
|
|
|
register use checks.
|
|
|
|
|
|
(gpr_read_mask): Add INSN2_READ_GPR_MC, INSN2_READ_GPR_ME
|
|
|
|
|
|
INSN2_READ_GPR_MG, INSN2_READ_GPR_MJ, INSN2_READ_GPR_MMN,
|
|
|
|
|
|
INSN2_READ_GPR_MP and INSN2_READ_GPR_MQ opcode register use
|
|
|
|
|
|
checks.
|
|
|
|
|
|
(gpr_write_mask): Replace INSN2_WRITE_GPR_S opcode register
|
|
|
|
|
|
use flag with INSN_WRITE_GPR_S. Add INSN2_WRITE_GPR_MB,
|
|
|
|
|
|
INSN2_WRITE_GPR_MHI, INSN2_WRITE_GPR_MJ and INSN2_WRITE_GPR_MP
|
|
|
|
|
|
opcode register use checks.
|
|
|
|
|
|
(can_swap_branch_p): Enable microMIPS branch swapping.
|
|
|
|
|
|
(append_insn): Likewise.
|
|
|
|
|
|
|
2011-08-09 21:39:39 +08:00
|
|
|
|
2011-08-09 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Remove forced 16-bit
|
|
|
|
|
|
branch size information.
|
|
|
|
|
|
(RELAX_MICROMIPS_U16BIT): Remove macro.
|
|
|
|
|
|
(RELAX_MICROMIPS_UNCOND): Adjust accordingly.
|
|
|
|
|
|
(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_RELAX32): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_TOOFAR16): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_TOOFAR32): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
|
|
|
|
|
|
(append_insn): Always check forced_insn_length for microMIPS
|
|
|
|
|
|
relaxation. Adjust code for the removal of
|
|
|
|
|
|
RELAX_MICROMIPS_U16BIT.
|
|
|
|
|
|
(mips_ip) <'D', 'E'>: If forced_insn_length, then emit the
|
|
|
|
|
|
relocation straight away.
|
|
|
|
|
|
(relaxed_micromips_16bit_branch_length): Adjust code for the
|
|
|
|
|
|
removal of RELAX_MICROMIPS_U16BIT.
|
|
|
|
|
|
|
2011-08-08 20:20:01 +08:00
|
|
|
|
2011-08-08 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_section): New function.
|
|
|
|
|
|
(struct known_section): New type.
|
|
|
|
|
|
(known_sections): Declare.
|
|
|
|
|
|
(obj_mach_o_known_section): New function.
|
|
|
|
|
|
(obj_mach_o_common_parse): Ditto.
|
|
|
|
|
|
(obj_mach_o_comm): Ditto.
|
|
|
|
|
|
(obj_mach_o_subsections_via_symbols): Ditto.
|
|
|
|
|
|
(mach_o_pseudo_table): Add new pseudos.
|
|
|
|
|
|
|
2011-08-08 00:32:20 +08:00
|
|
|
|
2011-08-06 Richard Henderson <rth@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dw2gencfi.c (all_fde_data): Export.
|
|
|
|
|
|
* dw2gencfi.h (all_fde_data): Declare.
|
|
|
|
|
|
* config/tc-alpha.c (alpha_elf_md_end): Don't convert legacy unwind
|
|
|
|
|
|
info to cfi unwind info if the user already has supplied some.
|
|
|
|
|
|
|
2011-08-06 18:25:01 +08:00
|
|
|
|
2011-08-06 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (emit_nop): Delete.
|
|
|
|
|
|
(get_delay_slot_nop): New function.
|
|
|
|
|
|
(nops_for_insn_or_target): Use it.
|
|
|
|
|
|
(append_insn): Likewise. When avoiding hazards, call add_fixed_insn
|
|
|
|
|
|
and insert_into_history directly.
|
|
|
|
|
|
|
2011-08-06 18:02:03 +08:00
|
|
|
|
2011-08-06 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (delayed_branch_p, compact_branch_p)
|
|
|
|
|
|
(uncond_branch_p, branch_likely_p): New functions.
|
|
|
|
|
|
(insns_between, nops_for_insn_or_target, append_insn)
|
|
|
|
|
|
(macro_start): Use them.
|
|
|
|
|
|
(get_append_method): Likewise. Remove redundant test.
|
|
|
|
|
|
|
2011-08-06 00:52:50 +08:00
|
|
|
|
2011-08-05 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-sparc.c (v9a_asr_table): Add "cps".
|
|
|
|
|
|
(sparc_ip): Handle '4', '5' and '(' format codes.
|
|
|
|
|
|
|
2011-08-05 04:53:58 +08:00
|
|
|
|
2011-08-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/13056
|
|
|
|
|
|
* output-file.c (output_file_close): Call bfd_cache_close_all
|
|
|
|
|
|
on error.
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (write_object_file): Revert the last change.
|
|
|
|
|
|
|
2011-08-04 18:24:00 +08:00
|
|
|
|
2011-08-04 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (write_object_file): Call set_symtab even if we had
|
|
|
|
|
|
errors.
|
|
|
|
|
|
|
2011-08-04 15:44:44 +08:00
|
|
|
|
2011-08-04 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-elf.c (obj_elf_section): Do not free name.
|
|
|
|
|
|
|
2011-08-03 19:35:56 +08:00
|
|
|
|
2011-08-03 James Greenhalgh <james.greenhalgh@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_t_strexbh): New.
|
|
|
|
|
|
(insns): Update accordingly.
|
|
|
|
|
|
|
2011-08-02 07:04:23 +08:00
|
|
|
|
2011-08-01 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR ld/13048
|
|
|
|
|
|
* config/tc-i386.c (handle_quad): Removed.
|
|
|
|
|
|
(md_pseudo_table): Remove "quad".
|
|
|
|
|
|
(tc_gen_reloc): Don't check BFD_RELOC_64 for disallow_64bit_reloc.
|
|
|
|
|
|
(x86_dwarf2_addr_size): New.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.h (x86_dwarf2_addr_size): New.
|
|
|
|
|
|
(DWARF2_ADDR_SIZE): Likewise.
|
|
|
|
|
|
|
2011-08-01 19:27:14 +08:00
|
|
|
|
2011-08-01 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR ld/12974
|
|
|
|
|
|
* config/tc-arm.c (literal_pool): Add locs field.
|
|
|
|
|
|
(add_to_lit_pool): Initialise the locs entry for the new literal.
|
|
|
|
|
|
(s_ltorg): Generate a DWARF2 line number entry for each emitted
|
|
|
|
|
|
literal pool entry.
|
|
|
|
|
|
|
2011-08-01 17:05:40 +08:00
|
|
|
|
2011-08-01 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (write_relocs): Fix -Wshadow in DEBUG3 and DEBUG4.
|
|
|
|
|
|
|
2011-08-01 16:05:49 +08:00
|
|
|
|
2011-08-01 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* frags.c (frag_grow): Simplify the code.
|
|
|
|
|
|
|
2011-07-30 14:28:22 +08:00
|
|
|
|
2011-07-30 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (nops_for_vr4130): Revert previous commit.
|
|
|
|
|
|
|
2011-07-30 06:46:29 +08:00
|
|
|
|
2011-07-29 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c: Adjust comments throughout.
|
|
|
|
|
|
(reglist_lookup): Reshape code.
|
|
|
|
|
|
(jmp_reloc_p, jalr_reloc_p): Reformat.
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(got16_reloc_p, hi16_reloc_p, lo16_reloc_p): Handle microMIPS
|
|
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relocations.
|
|
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(gpr_mod_mask): Remove unused variable.
|
|
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(gpr_read_mask, gpr_write_mask): Reshape code.
|
|
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(fpr_read_mask, fpr_write_mask): Likewise.
|
|
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|
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(nops_for_vr4130): Ensure non-microMIPS mode.
|
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(can_swap_branch_p): Correct pinfo2 reference. Reshape code.
|
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(append_insn): Skip Loongson 2F workaround in MIPS16 mode. Use
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the outermost operator of a compound relocation to determines
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the relocated field. Fix formatting.
|
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(md_convert_frag): Reshape code.
|
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2011-07-29 15:34:14 +08:00
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2011-07-29 Tristan Gingold <gingold@adacore.com>
|
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* frags.c (frag_var_init): New function.
|
|
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|
(frag_var): Call frag_var_init to initialize.
|
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(frag_variant): Ditto.
|
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2011-07-29 00:35:48 +08:00
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2011-07-27 Nathan Sidwell <nathan@codesourcery.com>
|
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* dwarf2dbg.c (out_debug_line): Ignore non-normal segments, with a
|
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warning.
|
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* doc/as.texinfo (Offset): Document .offset directive.
|
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2011-07-27 14:54:12 +08:00
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2011-07-27 Tristan Gingold <gingold@adacore.com>
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* frags.c (frag_grow): Revert previous patch.
|
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2011-07-26 22:09:36 +08:00
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2011-07-26 Kazuhiro Inaoka <kazuhiro.inaoka.ud@renesas.com>
|
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* config/tc-rx.c (md_convert_frag): Fix encoding of beq.a
|
|
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|
synthetic instruction.
|
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2011-07-25 21:34:40 +08:00
|
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2011-07-25 Tristan Gingold <gingold@adacore.com>
|
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* frags.c (frag_grow): Simplify the code.
|
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|
bfd/
2011-02-25 Chao-ying Fu <fu@mips.com>
Ilie Garbacea <ilie@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* archures.c (bfd_mach_mips_micromips): New macro.
* cpu-mips.c (I_micromips): New enum value.
(arch_info_struct): Add bfd_mach_mips_micromips.
* elfxx-mips.h (_bfd_mips_elf_is_target_special_symbol): New
prototype.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(gprel16_reloc_p): Handle microMIPS ASE.
(literal_reloc_p): New function.
* elf32-mips.c (elf_micromips_howto_table_rel): New variable.
(_bfd_mips_elf32_gprel16_reloc): Handle microMIPS ASE.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(mips_elf_gprel32_reloc): Update comment.
(micromips_reloc_map): New variable.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(mips_elf32_rtype_to_howto): Likewise.
(mips_info_to_howto_rel): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
(bfd_elf32_bfd_relax_section): Likewise.
* elf64-mips.c (micromips_elf64_howto_table_rel): New variable.
(micromips_elf64_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf64_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf64_bfd_reloc_name_lookup): Likewise.
(mips_elf64_rtype_to_howto): Likewise.
(bfd_elf64_bfd_is_target_special_symbol): Define.
* elfn32-mips.c (elf_micromips_howto_table_rel): New variable.
(elf_micromips_howto_table_rela): Likewise.
(mips16_gprel_reloc): Update for _bfd_mips_elf_reloc_unshuffle
and _bfd_mips_elf_reloc_shuffle changes.
(micromips_reloc_map): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Handle microMIPS ASE.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(mips_elf_n32_rtype_to_howto): Likewise.
(bfd_elf32_bfd_is_target_special_symbol): Define.
* elfxx-mips.c (LA25_LUI_MICROMIPS_1): New macro.
(LA25_LUI_MICROMIPS_2): Likewise.
(LA25_J_MICROMIPS_1, LA25_J_MICROMIPS_2): Likewise.
(LA25_ADDIU_MICROMIPS_1, LA25_ADDIU_MICROMIPS_2): Likewise.
(TLS_RELOC_P): Handle microMIPS ASE.
(mips_elf_create_stub_symbol): Adjust value of stub symbol if
target is a microMIPS function.
(micromips_reloc_p): New function.
(micromips_reloc_shuffle_p): Likewise.
(got16_reloc_p, call16_reloc_p): Handle microMIPS ASE.
(got_disp_reloc_p, got_page_reloc_p): New functions.
(got_ofst_reloc_p): Likewise.
(got_hi16_reloc_p, got_lo16_reloc_p): Likewise.
(call_hi16_reloc_p, call_lo16_reloc_p): Likewise.
(hi16_reloc_p, lo16_reloc_p, jal_reloc_p): Handle microMIPS ASE.
(micromips_branch_reloc_p): New function.
(tls_gd_reloc_p, tls_ldm_reloc_p): Likewise.
(tls_gottprel_reloc_p): Likewise.
(_bfd_mips16_elf_reloc_unshuffle): Rename to...
(_bfd_mips_elf_reloc_unshuffle): ... this. Handle microMIPS
ASE.
(_bfd_mips16_elf_reloc_shuffle): Rename to...
(_bfd_mips_elf_reloc_shuffle): ... this. Handle microMIPS ASE.
(_bfd_mips_elf_lo16_reloc): Handle microMIPS ASE.
(mips_tls_got_index, mips_elf_got_page): Likewise.
(mips_elf_create_local_got_entry): Likewise.
(mips_elf_relocation_needs_la25_stub): Likewise.
(mips_elf_calculate_relocation): Likewise.
(mips_elf_perform_relocation): Likewise.
(_bfd_mips_elf_symbol_processing): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_link_output_symbol_hook): Likewise.
(mips_elf_add_lo16_rel_addend): Likewise.
(_bfd_mips_elf_check_relocs): Likewise.
(mips_elf_adjust_addend): Likewise.
(_bfd_mips_elf_relocate_section): Likewise.
(mips_elf_create_la25_stub): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
(_bfd_mips_elf_gc_sweep_hook): Likewise.
(_bfd_mips_elf_is_target_special_symbol): New function.
(mips_elf_relax_delete_bytes): Likewise.
(opcode_descriptor): New structure.
(RA): New macro.
(OP32_SREG, OP32_TREG, OP16_VALID_REG): Likewise.
(b_insns_32, bc_insn_32, bz_insn_32, bzal_insn_32): New variables.
(beq_insn_32): Likewise.
(b_insn_16, bz_insn_16): New variables.
(BZC32_REG_FIELD): New macro.
(bz_rs_insns_32, bz_rt_insns_32): New variables.
(bzc_insns_32, bz_insns_16):Likewise.
(BZ16_REG, BZ16_REG_FIELD): New macros.
(jal_insn_32_bd16, jal_insn_32_bd32): New variables.
(jal_x_insn_32_bd32): Likewise.
(j_insn_32, jalr_insn_32): Likewise.
(ds_insns_32_bd16, ds_insns_32_bd32): Likewise.
(jalr_insn_16_bd16, jalr_insn_16_bd32, jr_insn_16): Likewise.
(JR16_REG): New macro.
(ds_insns_16_bd16): New variable.
(lui_insn): Likewise.
(addiu_insn, addiupc_insn): Likewise.
(ADDIUPC_REG_FIELD): New macro.
(MOVE32_RD, MOVE32_RS): Likewise.
(MOVE16_RD_FIELD, MOVE16_RS_FIELD): Likewise.
(move_insns_32, move_insns_16): New variables.
(nop_insn_32, nop_insn_16): Likewise.
(MATCH): New macro.
(find_match): New function.
(check_br16_dslot, check_br32_dslot): Likewise.
(check_br16, check_br32): Likewise.
(IS_BITSIZE): New macro.
(check_4byte_branch): New function.
(_bfd_mips_elf_relax_section): Likewise.
(_bfd_mips_elf_merge_private_bfd_data): Disallow linking MIPS16
and microMIPS modules together.
(_bfd_mips_elf_print_private_bfd_data): Handle microMIPS ASE.
* reloc.c (BFD_RELOC_MICROMIPS_7_PCREL_S1): New relocation.
(BFD_RELOC_MICROMIPS_10_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_16_PCREL_S1): Likewise.
(BFD_RELOC_MICROMIPS_GPREL16): Likewise.
(BFD_RELOC_MICROMIPS_JMP, BFD_RELOC_MICROMIPS_HI16): Likewise.
(BFD_RELOC_MICROMIPS_HI16_S): Likewise.
(BFD_RELOC_MICROMIPS_LO16): Likewise.
(BFD_RELOC_MICROMIPS_LITERAL): Likewise.
(BFD_RELOC_MICROMIPS_GOT16): Likewise.
(BFD_RELOC_MICROMIPS_CALL16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_HI16): Likewise.
(BFD_RELOC_MICROMIPS_GOT_LO16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_CALL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_SUB): Likewise.
(BFD_RELOC_MICROMIPS_GOT_PAGE): Likewise.
(BFD_RELOC_MICROMIPS_GOT_OFST): Likewise.
(BFD_RELOC_MICROMIPS_GOT_DISP): Likewise.
(BFD_RELOC_MICROMIPS_HIGHEST): Likewise.
(BFD_RELOC_MICROMIPS_HIGHER): Likewise.
(BFD_RELOC_MICROMIPS_SCN_DISP): Likewise.
(BFD_RELOC_MICROMIPS_JALR): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GD): Likewise.
(BFD_RELOC_MICROMIPS_TLS_LDM): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_GOTTPREL): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_HI16): Likewise.
(BFD_RELOC_MICROMIPS_TLS_TPREL_LO16): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
binutils/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* readelf.c (get_machine_flags): Handle microMIPS ASE.
(get_mips_symbol_other): Likewise.
gas/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.h (mips_segment_info): Add one bit for
microMIPS.
(TC_LABEL_IS_LOCAL): New macro.
(mips_label_is_local): New prototype.
* config/tc-mips.c (S0, S7): New macros.
(emit_branch_likely_macro): New variable.
(mips_set_options): Add micromips.
(mips_opts): Initialise micromips to -1.
(file_ase_micromips): New variable.
(CPU_HAS_MICROMIPS): New macro.
(hilo_interlocks): Set for microMIPS too.
(gpr_interlocks): Likewise.
(cop_interlocks): Likewise.
(cop_mem_interlocks): Likewise.
(HAVE_CODE_COMPRESSION): New macro.
(micromips_op_hash): New variable.
(micromips_nop16_insn, micromips_nop32_insn): New variables.
(NOP_INSN): Handle microMIPS ASE.
(mips32_to_micromips_reg_b_map): New macro.
(mips32_to_micromips_reg_c_map): Likewise.
(mips32_to_micromips_reg_d_map): Likewise.
(mips32_to_micromips_reg_e_map): Likewise.
(mips32_to_micromips_reg_f_map): Likewise.
(mips32_to_micromips_reg_g_map): Likewise.
(mips32_to_micromips_reg_l_map): Likewise.
(mips32_to_micromips_reg_n_map): Likewise.
(mips32_to_micromips_reg_h_map): New variable.
(mips32_to_micromips_reg_m_map): Likewise.
(mips32_to_micromips_reg_q_map): Likewise.
(micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_to_32_reg_b_map): New macro.
(micromips_to_32_reg_c_map): Likewise.
(micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map): Likewise.
(micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map): Likewise.
(micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_n_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): New macros.
(RELAX_DELAY_SLOT_16BIT): New macro.
(RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
(RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
(RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
(RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
(RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
(RELAX_MICROMIPS_TOOFAR32): Likewise.
(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
(INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
(mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
fsize and insns.
(mips_mark_labels): New function.
(mips16_small, mips16_ext): Remove variables, replacing with...
(forced_insn_size): ... this.
(append_insn, mips16_ip): Update accordingly.
(micromips_insn_length): New function.
(insn_length): Return the length of microMIPS instructions.
(mips_record_mips16_mode): Rename to...
(mips_record_compressed_mode): ... this. Handle microMIPS ASE.
(install_insn): Handle microMIPS ASE.
(reglist_lookup): New function.
(is_size_valid, is_delay_slot_valid): Likewise.
(md_begin): Handle microMIPS ASE.
(md_assemble): Likewise. Update for append_insn interface change.
(micromips_reloc_p): New function.
(got16_reloc_p): Handle microMIPS ASE.
(hi16_reloc_p): Likewise.
(lo16_reloc_p): Likewise.
(jmp_reloc_p): New function.
(jalr_reloc_p): Likewise.
(matching_lo_reloc): Handle microMIPS ASE.
(insn_uses_reg, reg_needs_delay): Likewise.
(mips_move_labels): Likewise.
(mips16_mark_labels): Rename to...
(mips_compressed_mark_labels): ... this. Handle microMIPS ASE.
(gpr_mod_mask): New function.
(gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, nops_for_insn): Likewise.
(fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
(MICROMIPS_LABEL_CHAR): New macro.
(micromips_target_label, micromips_target_name): New variables.
(micromips_label_name, micromips_label_expr): New functions.
(micromips_label_inc, micromips_add_label): Likewise.
(mips_label_is_local): Likewise.
(micromips_map_reloc): Likewise.
(can_swap_branch_p): Handle microMIPS ASE.
(append_insn): Add expansionp argument. Handle microMIPS ASE.
(start_noreorder, end_noreorder): Handle microMIPS ASE.
(macro_start, macro_warning, macro_end): Likewise.
(brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
(mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
(BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
(MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
(macro_build): Handle microMIPS ASE. Update for append_insn
interface change.
(mips16_macro_build): Update for append_insn interface change.
(macro_build_jalr): Handle microMIPS ASE.
(macro_build_lui): Likewise. Simplify.
(load_register): Handle microMIPS ASE.
(load_address): Likewise.
(move_register): Likewise.
(macro_build_branch_likely): New function.
(macro_build_branch_ccl): Likewise.
(macro_build_branch_rs): Likewise.
(macro_build_branch_rsrt): Likewise.
(macro): Handle microMIPS ASE.
(validate_micromips_insn): New function.
(expr_const_in_range): Likewise.
(mips_ip): Handle microMIPS ASE.
(options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
(md_longopts): Add mmicromips and mno-micromips.
(md_parse_option): Handle OPTION_MICROMIPS and
OPTION_NO_MICROMIPS.
(mips_after_parse_args): Handle microMIPS ASE.
(md_pcrel_from): Handle microMIPS relocations.
(mips_force_relocation): Likewise.
(md_apply_fix): Likewise.
(mips_align): Handle microMIPS ASE.
(s_mipsset): Likewise.
(s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
(s_dtprel_internal): Likewise.
(s_gpword, s_gpdword): Likewise.
(s_insn): Handle microMIPS ASE.
(s_mips_stab): Likewise.
(relaxed_micromips_32bit_branch_length): New function.
(relaxed_micromips_16bit_branch_length): New function.
(md_estimate_size_before_relax): Handle microMIPS ASE.
(mips_fix_adjustable): Likewise.
(tc_gen_reloc): Handle microMIPS relocations.
(mips_relax_frag): Handle microMIPS ASE.
(md_convert_frag): Likewise.
(mips_frob_file_after_relocs): Likewise.
(mips_elf_final_processing): Likewise.
(mips_nop_opcode): Likewise.
(mips_handle_align): Likewise.
(md_show_usage): Handle microMIPS options.
* symbols.c (TC_LABEL_IS_LOCAL): New macro.
(S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.
* doc/as.texinfo (Target MIPS options): Add -mmicromips and
-mno-micromips.
(-mmicromips, -mno-micromips): New options.
* doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
(MIPS ISA): Document .set micromips and .set nomicromips.
(MIPS insn): Update for microMIPS support.
gas/testsuite/
2011-02-25 Maciej W. Rozycki <macro@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/micromips.d: New test.
* gas/mips/micromips-branch-delay.d: Likewise.
* gas/mips/micromips-branch-relax.d: Likewise.
* gas/mips/micromips-branch-relax-pic.d: Likewise.
* gas/mips/micromips-size-1.d: Likewise.
* gas/mips/micromips-trap.d: Likewise.
* gas/mips/micromips.l: New stderr output.
* gas/mips/micromips-branch-delay.l: Likewise.
* gas/mips/micromips-branch-relax.l: Likewise.
* gas/mips/micromips-branch-relax-pic.l: Likewise.
* gas/mips/micromips-size-0.l: New list test.
* gas/mips/micromips-size-1.l: New stderr output.
* gas/mips/micromips.s: New test source.
* gas/mips/micromips-branch-delay.s: Likewise.
* gas/mips/micromips-branch-relax.s: Likewise.
* gas/mips/micromips-size-0.s: Likewise.
* gas/mips/micromips-size-1.s: Likewise.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/dli.s: Use .p2align.
* gas/mips/elf_ase_micromips.d: New test.
* gas/mips/elf_ase_micromips-2.d: Likewise.
* gas/mips/micromips@abs.d: Likewise.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/micromips@alnv_ps-swap.d: Likewise.
* gas/mips/micromips@and.d: Likewise.
* gas/mips/micromips@beq.d: Likewise.
* gas/mips/micromips@bge.d: Likewise.
* gas/mips/micromips@bgeu.d: Likewise.
* gas/mips/micromips@blt.d: Likewise.
* gas/mips/micromips@bltu.d: Likewise.
* gas/mips/micromips@branch-likely.d: Likewise.
* gas/mips/micromips@branch-misc-1.d: Likewise.
* gas/mips/micromips@branch-misc-2-64.d: Likewise.
* gas/mips/micromips@branch-misc-2.d: Likewise.
* gas/mips/micromips@branch-misc-2pic-64.d: Likewise.
* gas/mips/micromips@branch-misc-2pic.d: Likewise.
* gas/mips/micromips@branch-misc-4-64.d: Likewise.
* gas/mips/micromips@branch-misc-4.d: Likewise.
* gas/mips/micromips@branch-self.d: Likewise.
* gas/mips/micromips@cache.d: Likewise.
* gas/mips/micromips@daddi.d: Likewise.
* gas/mips/micromips@dli.d: Likewise.
* gas/mips/micromips@elf-jal.d: Likewise.
* gas/mips/micromips@elf-rel2.d: Likewise.
* gas/mips/micromips@elfel-rel2.d: Likewise.
* gas/mips/micromips@elf-rel4.d: Likewise.
* gas/mips/micromips@jal-svr4pic.d: Likewise.
* gas/mips/micromips@jal-svr4pic-noreorder.d: Likewise.
* gas/mips/micromips@lb-svr4pic-ilocks.d: Likewise.
* gas/mips/micromips@li.d: Likewise.
* gas/mips/micromips@loc-swap-dis.d: Likewise.
* gas/mips/micromips@loc-swap.d: Likewise.
* gas/mips/micromips@mips1-fp.d: Likewise.
* gas/mips/micromips@mips32-cp2.d: Likewise.
* gas/mips/micromips@mips32-imm.d: Likewise.
* gas/mips/micromips@mips32-sf32.d: Likewise.
* gas/mips/micromips@mips32.d: Likewise.
* gas/mips/micromips@mips32r2-cp2.d: Likewise.
* gas/mips/micromips@mips32r2-fp32.d: Likewise.
* gas/mips/micromips@mips32r2-sync.d: Likewise.
* gas/mips/micromips@mips32r2.d: Likewise.
* gas/mips/micromips@mips4-branch-likely.d: Likewise.
* gas/mips/micromips@mips4-fp.d: Likewise.
* gas/mips/micromips@mips4.d: Likewise.
* gas/mips/micromips@mips5.d: Likewise.
* gas/mips/micromips@mips64-cp2.d: Likewise.
* gas/mips/micromips@mips64.d: Likewise.
* gas/mips/micromips@mips64r2.d: Likewise.
* gas/mips/micromips@pref.d: Likewise.
* gas/mips/micromips@relax-at.d: Likewise.
* gas/mips/micromips@relax.d: Likewise.
* gas/mips/micromips@rol-hw.d: Likewise.
* gas/mips/micromips@uld2-eb.d: Likewise.
* gas/mips/micromips@uld2-el.d: Likewise.
* gas/mips/micromips@ulh2-eb.d: Likewise.
* gas/mips/micromips@ulh2-el.d: Likewise.
* gas/mips/micromips@ulw2-eb-ilocks.d: Likewise.
* gas/mips/micromips@ulw2-el-ilocks.d: Likewise.
* gas/mips/cache.d: Likewise.
* gas/mips/daddi.d: Likewise.
* gas/mips/mips32-imm.d: Likewise.
* gas/mips/pref.d: Likewise.
* gas/mips/elf-rel27.d: Handle microMIPS ASE.
* gas/mips/l_d.d: Likewise.
* gas/mips/l_d-n32.d: Likewise.
* gas/mips/l_d-n64.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/ld-n32.d: Likewise.
* gas/mips/ld-n64.d: Likewise.
* gas/mips/s_d.d: Likewise.
* gas/mips/s_d-n32.d: Likewise.
* gas/mips/s_d-n64.d: Likewise.
* gas/mips/sd.d: Likewise.
* gas/mips/sd-n32.d: Likewise.
* gas/mips/sd-n64.d: Likewise.
* gas/mips/mips32.d: Update immediates.
* gas/mips/micromips@mips32-cp2.s: New test source.
* gas/mips/micromips@mips32-imm.s: Likewise.
* gas/mips/micromips@mips32r2-cp2.s: Likewise.
* gas/mips/micromips@mips64-cp2.s: Likewise.
* gas/mips/cache.s: Likewise.
* gas/mips/daddi.s: Likewise.
* gas/mips/mips32-imm.s: Likewise.
* gas/mips/elf-rel4.s: Handle microMIPS ASE.
* gas/mips/lb-pic.s: Likewise.
* gas/mips/ld.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips.exp: Add the micromips arch. Exclude mips16e
from micromips. Run mips32-imm.
* gas/mips/jal-mask-11.d: New test.
* gas/mips/jal-mask-12.d: Likewise.
* gas/mips/micromips@jal-mask-11.d: Likewise.
* gas/mips/jal-mask-1.s: Source for the new tests.
* gas/mips/jal-mask-21.d: New test.
* gas/mips/jal-mask-22.d: Likewise.
* gas/mips/micromips@jal-mask-12.d: Likewise.
* gas/mips/jal-mask-2.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
* gas/mips/mips16-e.d: Add --special-syms to `objdump'.
* gas/mips/tmips16-e.d: Likewise.
* gas/mips/mipsel16-e.d: Likewise.
* gas/mips/tmipsel16-e.d: Likewise.
* gas/mips/and.s: Adjust padding.
* gas/mips/beq.s: Likewise.
* gas/mips/bge.s: Likewise.
* gas/mips/bgeu.s: Likewise.
* gas/mips/blt.s: Likewise.
* gas/mips/bltu.s: Likewise.
* gas/mips/branch-misc-2.s: Likewise.
* gas/mips/jal.s: Likewise.
* gas/mips/li.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/mips4-fp.s: Likewise.
* gas/mips/relax.s: Likewise.
* gas/mips/and.d: Update accordingly.
* gas/mips/elf-jal.d: Likewise.
* gas/mips/jal.d: Likewise.
* gas/mips/li.d: Likewise.
* gas/mips/relax-at.d: Likewise.
* gas/mips/relax.d: Likewise.
include/elf/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (R_MICROMIPS_min): New relocations.
(R_MICROMIPS_26_S1): Likewise.
(R_MICROMIPS_HI16, R_MICROMIPS_LO16): Likewise.
(R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL): Likewise.
(R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1): Likewise.
(R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1): Likewise.
(R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP): Likewise.
(R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST): Likewise.
(R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16): Likewise.
(R_MICROMIPS_SUB, R_MICROMIPS_HIGHER): Likewise.
(R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16): Likewise.
(R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP): Likewise.
(R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16): Likewise.
(R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM): Likewise.
(R_MICROMIPS_TLS_DTPREL_HI, R_MICROMIPS_TLS_DTPREL_LO): Likewise.
(R_MICROMIPS_TLS_GOTTPREL): Likewise.
(R_MICROMIPS_TLS_TPREL_HI16): Likewise.
(R_MICROMIPS_TLS_TPREL_LO16): Likewise.
(R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S2): Likewise.
(R_MICROMIPS_max): Likewise.
(EF_MIPS_ARCH_ASE_MICROMIPS): New macro.
(STO_MIPS_ISA, STO_MIPS_FLAGS): Likewise.
(ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT): Likewise.
(STO_MICROMIPS): Likewise.
(ELF_ST_IS_MICROMIPS, ELF_ST_SET_MICROMIPS): Likewise.
(ELF_ST_IS_COMPRESSED): Likewise.
(STO_MIPS_PLT, STO_MIPS_PIC): Rework.
(ELF_ST_IS_MIPS_PIC, ELF_ST_SET_MIPS_PIC): Likewise.
(STO_MIPS16, ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): Likewise.
include/opcode/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* mips.h (OP_MASK_EXTLSB, OP_SH_EXTLSB): New macros.
(OP_MASK_STYPE, OP_SH_STYPE): Likewise.
(OP_MASK_CODE10, OP_SH_CODE10): Likewise.
(OP_MASK_TRAP, OP_SH_TRAP): Likewise.
(OP_MASK_OFFSET12, OP_SH_OFFSET12): Likewise.
(OP_MASK_OFFSET10, OP_SH_OFFSET10): Likewise.
(OP_MASK_RS3, OP_SH_RS3): Likewise.
(OP_MASK_MB, OP_SH_MB, OP_MASK_MC, OP_SH_MC): Likewise.
(OP_MASK_MD, OP_SH_MD, OP_MASK_ME, OP_SH_ME): Likewise.
(OP_MASK_MF, OP_SH_MF, OP_MASK_MG, OP_SH_MG): Likewise.
(OP_MASK_MJ, OP_SH_MJ, OP_MASK_ML, OP_SH_ML): Likewise.
(OP_MASK_MP, OP_SH_MP, OP_MASK_MQ, OP_SH_MQ): Likewise.
(OP_MASK_IMMA, OP_SH_IMMA, OP_MASK_IMMB, OP_SH_IMMB): Likewise.
(OP_MASK_IMMC, OP_SH_IMMC, OP_MASK_IMMF, OP_SH_IMMF): Likewise.
(OP_MASK_IMMG, OP_SH_IMMG, OP_MASK_IMMH, OP_SH_IMMH): Likewise.
(OP_MASK_IMMI, OP_SH_IMMI, OP_MASK_IMMJ, OP_SH_IMMJ): Likewise.
(OP_MASK_IMML, OP_SH_IMML, OP_MASK_IMMM, OP_SH_IMMM): Likewise.
(OP_MASK_IMMN, OP_SH_IMMN, OP_MASK_IMMO, OP_SH_IMMO): Likewise.
(OP_MASK_IMMP, OP_SH_IMMP, OP_MASK_IMMQ, OP_SH_IMMQ): Likewise.
(OP_MASK_IMMU, OP_SH_IMMU, OP_MASK_IMMW, OP_SH_IMMW): Likewise.
(OP_MASK_IMMX, OP_SH_IMMX, OP_MASK_IMMY, OP_SH_IMMY): Likewise.
(INSN_WRITE_GPR_S): New macro.
(INSN2_BRANCH_DELAY_16BIT, INSN2_BRANCH_DELAY_32BIT): Likewise.
(INSN2_READ_FPR_D): Likewise.
(INSN2_MOD_GPR_MB, INSN2_MOD_GPR_MC): Likewise.
(INSN2_MOD_GPR_MD, INSN2_MOD_GPR_ME): Likewise.
(INSN2_MOD_GPR_MF, INSN2_MOD_GPR_MG): Likewise.
(INSN2_MOD_GPR_MJ, INSN2_MOD_GPR_MP): Likewise.
(INSN2_MOD_GPR_MQ, INSN2_MOD_SP): Likewise.
(INSN2_READ_GPR_31, INSN2_READ_GP, INSN2_READ_PC): Likewise.
(INSN2_UNCOND_BRANCH, INSN2_COND_BRANCH): Likewise.
(INSN2_MOD_GPR_MHI, INSN2_MOD_GPR_MM, INSN2_MOD_GPR_MN): Likewise.
(CPU_MICROMIPS): New macro.
(M_BC1FL, M_BC1TL, M_BC2FL, M_BC2TL): New enum values.
(M_BEQL, M_BGEZ, M_BGEZL, M_BGEZALL, M_BGTZ, M_BGTZL): Likewise.
(M_BLEZ, M_BLEZL, M_BLTZ, M_BLTZL, M_BLTZALL, M_BNEL): Likewise.
(M_CACHE_OB, M_JALS_1, M_JALS_2, M_JALS_A): Likewise.
(M_LDC2_OB, M_LDL_OB, M_LDM_AB, M_LDM_OB): Likewise.
(M_LDP_AB, M_LDP_OB, M_LDR_OB, M_LL_OB, M_LLD_OB): Likewise.
(M_LWC2_OB, M_LWL_OB, M_LWM_AB, M_LWM_OB): Likewise.
(M_LWP_AB, M_LWP_OB, M_LWR_OB): Likewise.
(M_LWU_OB, M_PREF_OB, M_SC_OB, M_SCD_OB): Likewise.
(M_SDC2_OB, M_SDL_OB, M_SDM_AB, M_SDM_OB): Likewise.
(M_SDP_AB, M_SDP_OB, M_SDR_OB): Likewise.
(M_SWC2_OB, M_SWL_OB, M_SWM_AB, M_SWM_OB): Likewise.
(M_SWP_AB, M_SWP_OB, M_SWR_OB): Likewise.
(MICROMIPSOP_MASK_MAJOR, MICROMIPSOP_SH_MAJOR): New macros.
(MICROMIPSOP_MASK_IMMEDIATE, MICROMIPSOP_SH_IMMEDIATE): Likewise.
(MICROMIPSOP_MASK_DELTA, MICROMIPSOP_SH_DELTA): Likewise.
(MICROMIPSOP_MASK_CODE10, MICROMIPSOP_SH_CODE10): Likewise.
(MICROMIPSOP_MASK_TRAP, MICROMIPSOP_SH_TRAP): Likewise.
(MICROMIPSOP_MASK_SHAMT, MICROMIPSOP_SH_SHAMT): Likewise.
(MICROMIPSOP_MASK_TARGET, MICROMIPSOP_SH_TARGET): Likewise.
(MICROMIPSOP_MASK_EXTLSB, MICROMIPSOP_SH_EXTLSB): Likewise.
(MICROMIPSOP_MASK_EXTMSBD, MICROMIPSOP_SH_EXTMSBD): Likewise.
(MICROMIPSOP_MASK_INSMSB, MICROMIPSOP_SH_INSMSB): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_SEL, MICROMIPSOP_SH_SEL): Likewise.
(MICROMIPSOP_MASK_OFFSET12, MICROMIPSOP_SH_OFFSET12): Likewise.
(MICROMIPSOP_MASK_3BITPOS, MICROMIPSOP_SH_3BITPOS): Likewise.
(MICROMIPSOP_MASK_STYPE, MICROMIPSOP_SH_STYPE): Likewise.
(MICROMIPSOP_MASK_OFFSET10, MICROMIPSOP_SH_OFFSET10): Likewise.
(MICROMIPSOP_MASK_RS, MICROMIPSOP_SH_RS): Likewise.
(MICROMIPSOP_MASK_RT, MICROMIPSOP_SH_RT): Likewise.
(MICROMIPSOP_MASK_RD, MICROMIPSOP_SH_RD): Likewise.
(MICROMIPSOP_MASK_FS, MICROMIPSOP_SH_FS): Likewise.
(MICROMIPSOP_MASK_FT, MICROMIPSOP_SH_FT): Likewise.
(MICROMIPSOP_MASK_FD, MICROMIPSOP_SH_FD): Likewise.
(MICROMIPSOP_MASK_FR, MICROMIPSOP_SH_FR): Likewise.
(MICROMIPSOP_MASK_RS3, MICROMIPSOP_SH_RS3): Likewise.
(MICROMIPSOP_MASK_PREFX, MICROMIPSOP_SH_PREFX): Likewise.
(MICROMIPSOP_MASK_BCC, MICROMIPSOP_SH_BCC): Likewise.
(MICROMIPSOP_MASK_CCC, MICROMIPSOP_SH_CCC): Likewise.
(MICROMIPSOP_MASK_COPZ, MICROMIPSOP_SH_COPZ): Likewise.
(MICROMIPSOP_MASK_MB, MICROMIPSOP_SH_MB): Likewise.
(MICROMIPSOP_MASK_MC, MICROMIPSOP_SH_MC): Likewise.
(MICROMIPSOP_MASK_MD, MICROMIPSOP_SH_MD): Likewise.
(MICROMIPSOP_MASK_ME, MICROMIPSOP_SH_ME): Likewise.
(MICROMIPSOP_MASK_MF, MICROMIPSOP_SH_MF): Likewise.
(MICROMIPSOP_MASK_MG, MICROMIPSOP_SH_MG): Likewise.
(MICROMIPSOP_MASK_MH, MICROMIPSOP_SH_MH): Likewise.
(MICROMIPSOP_MASK_MI, MICROMIPSOP_SH_MI): Likewise.
(MICROMIPSOP_MASK_MJ, MICROMIPSOP_SH_MJ): Likewise.
(MICROMIPSOP_MASK_ML, MICROMIPSOP_SH_ML): Likewise.
(MICROMIPSOP_MASK_MM, MICROMIPSOP_SH_MM): Likewise.
(MICROMIPSOP_MASK_MN, MICROMIPSOP_SH_MN): Likewise.
(MICROMIPSOP_MASK_MP, MICROMIPSOP_SH_MP): Likewise.
(MICROMIPSOP_MASK_MQ, MICROMIPSOP_SH_MQ): Likewise.
(MICROMIPSOP_MASK_IMMA, MICROMIPSOP_SH_IMMA): Likewise.
(MICROMIPSOP_MASK_IMMB, MICROMIPSOP_SH_IMMB): Likewise.
(MICROMIPSOP_MASK_IMMC, MICROMIPSOP_SH_IMMC): Likewise.
(MICROMIPSOP_MASK_IMMD, MICROMIPSOP_SH_IMMD): Likewise.
(MICROMIPSOP_MASK_IMME, MICROMIPSOP_SH_IMME): Likewise.
(MICROMIPSOP_MASK_IMMF, MICROMIPSOP_SH_IMMF): Likewise.
(MICROMIPSOP_MASK_IMMG, MICROMIPSOP_SH_IMMG): Likewise.
(MICROMIPSOP_MASK_IMMH, MICROMIPSOP_SH_IMMH): Likewise.
(MICROMIPSOP_MASK_IMMI, MICROMIPSOP_SH_IMMI): Likewise.
(MICROMIPSOP_MASK_IMMJ, MICROMIPSOP_SH_IMMJ): Likewise.
(MICROMIPSOP_MASK_IMML, MICROMIPSOP_SH_IMML): Likewise.
(MICROMIPSOP_MASK_IMMM, MICROMIPSOP_SH_IMMM): Likewise.
(MICROMIPSOP_MASK_IMMN, MICROMIPSOP_SH_IMMN): Likewise.
(MICROMIPSOP_MASK_IMMO, MICROMIPSOP_SH_IMMO): Likewise.
(MICROMIPSOP_MASK_IMMP, MICROMIPSOP_SH_IMMP): Likewise.
(MICROMIPSOP_MASK_IMMQ, MICROMIPSOP_SH_IMMQ): Likewise.
(MICROMIPSOP_MASK_IMMU, MICROMIPSOP_SH_IMMU): Likewise.
(MICROMIPSOP_MASK_IMMW, MICROMIPSOP_SH_IMMW): Likewise.
(MICROMIPSOP_MASK_IMMX, MICROMIPSOP_SH_IMMX): Likewise.
(MICROMIPSOP_MASK_IMMY, MICROMIPSOP_SH_IMMY): Likewise.
(MICROMIPSOP_MASK_CODE, MICROMIPSOP_SH_CODE): Likewise.
(MICROMIPSOP_MASK_CODE2, MICROMIPSOP_SH_CODE2): Likewise.
(MICROMIPSOP_MASK_CACHE, MICROMIPSOP_SH_CACHE): Likewise.
(MICROMIPSOP_MASK_CODE20, MICROMIPSOP_SH_CODE20): Likewise.
(MICROMIPSOP_MASK_PERFREG, MICROMIPSOP_SH_PERFREG): Likewise.
(MICROMIPSOP_MASK_CODE19, MICROMIPSOP_SH_CODE19): Likewise.
(MICROMIPSOP_MASK_ALN, MICROMIPSOP_SH_ALN): Likewise.
(MICROMIPSOP_MASK_VECBYTE, MICROMIPSOP_SH_VECBYTE): Likewise.
(MICROMIPSOP_MASK_VECALIGN, MICROMIPSOP_SH_VECALIGN): Likewise.
(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Likewise.
(MICROMIPSOP_MASK_DSPACC_S, MICROMIPSOP_SH_DSPACC_S): Likewise.
(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
(MICROMIPSOP_MASK_DSPSFT_7, MICROMIPSOP_SH_DSPSFT_7): Likewise.
(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
(MICROMIPSOP_MASK_RDDSP, MICROMIPSOP_SH_RDDSP): Likewise.
(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
(MICROMIPSOP_MASK_MT_U, MICROMIPSOP_SH_MT_U): Likewise.
(MICROMIPSOP_MASK_MT_H, MICROMIPSOP_SH_MT_H): Likewise.
(MICROMIPSOP_MASK_MTACC_T, MICROMIPSOP_SH_MTACC_T): Likewise.
(MICROMIPSOP_MASK_MTACC_D, MICROMIPSOP_SH_MTACC_D): Likewise.
(MICROMIPSOP_MASK_BBITIND, MICROMIPSOP_SH_BBITIND): Likewise.
(MICROMIPSOP_MASK_CINSPOS, MICROMIPSOP_SH_CINSPOS): Likewise.
(MICROMIPSOP_MASK_CINSLM1, MICROMIPSOP_SH_CINSLM1): Likewise.
(MICROMIPSOP_MASK_SEQI, MICROMIPSOP_SH_SEQI): Likewise.
(micromips_opcodes): New declaration.
(bfd_micromips_num_opcodes): Likewise.
ld/testsuite/
2011-02-25 Catherine Moore <clm@codesourcery.com>
Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* lib/ld-lib.exp (run_dump_test): Support distinct assembler
flags for the same source named multiple times.
* ld-mips-elf/jalx-1.s: New test source.
* ld-mips-elf/jalx-1.d: New test output.
* ld-mips-elf/jalx-1.ld: New test linker script.
* ld-mips-elf/jalx-2-main.s: New test source.
* ld-mips-elf/jalx-2-ex.s: Likewise.
* ld-mips-elf/jalx-2-printf.s: Likewise.
* ld-mips-elf/jalx-2.dd: New test output.
* ld-mips-elf/jalx-2.ld: New test linker script.
* ld-mips-elf/mips16-and-micromips.d: New test.
* ld-mips-elf/mips-elf.exp: Run the new tests
opcodes/
2011-02-25 Chao-ying Fu <fu@mips.com>
Maciej W. Rozycki <macro@codesourcery.com>
* micromips-opc.c: New file.
* mips-dis.c (micromips_to_32_reg_b_map): New array.
(micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise.
(micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise.
(micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise.
(micromips_to_32_reg_q_map): Likewise.
(micromips_imm_b_map, micromips_imm_c_map): Likewise.
(micromips_ase): New variable.
(is_micromips): New function.
(set_default_mips_dis_options): Handle microMIPS ASE.
(print_insn_micromips): New function.
(is_compressed_mode_p): Likewise.
(_print_insn_mips): Handle microMIPS instructions.
* Makefile.am (CFILES): Add micromips-opc.c.
* configure.in (bfd_mips_arch): Add micromips-opc.lo.
* Makefile.in: Regenerate.
* configure: Regenerate.
* mips-dis.c (micromips_to_32_reg_h_map): New variable.
(micromips_to_32_reg_i_map): Likewise.
(micromips_to_32_reg_m_map): Likewise.
(micromips_to_32_reg_n_map): New macro.
2011-07-24 22:20:15 +08:00
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2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
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Chao-ying Fu <fu@mips.com>
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Richard Sandiford <rdsandiford@googlemail.com>
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* config/tc-mips.h (mips_segment_info): Add one bit for
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microMIPS.
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(TC_LABEL_IS_LOCAL): New macro.
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(mips_label_is_local): New prototype.
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* config/tc-mips.c (S0, S7): New macros.
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(emit_branch_likely_macro): New variable.
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(mips_set_options): Add micromips.
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(mips_opts): Initialise micromips to -1.
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(file_ase_micromips): New variable.
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(CPU_HAS_MICROMIPS): New macro.
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(hilo_interlocks): Set for microMIPS too.
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(gpr_interlocks): Likewise.
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(cop_interlocks): Likewise.
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(cop_mem_interlocks): Likewise.
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(HAVE_CODE_COMPRESSION): New macro.
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(micromips_op_hash): New variable.
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(micromips_nop16_insn, micromips_nop32_insn): New variables.
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(NOP_INSN): Handle microMIPS ASE.
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(mips32_to_micromips_reg_b_map): New macro.
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(mips32_to_micromips_reg_c_map): Likewise.
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(mips32_to_micromips_reg_d_map): Likewise.
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(mips32_to_micromips_reg_e_map): Likewise.
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(mips32_to_micromips_reg_f_map): Likewise.
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(mips32_to_micromips_reg_g_map): Likewise.
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(mips32_to_micromips_reg_l_map): Likewise.
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|
|
(mips32_to_micromips_reg_n_map): Likewise.
|
|
|
|
|
|
(mips32_to_micromips_reg_h_map): New variable.
|
|
|
|
|
|
(mips32_to_micromips_reg_m_map): Likewise.
|
|
|
|
|
|
(mips32_to_micromips_reg_q_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_h_map): New variable.
|
|
|
|
|
|
(micromips_to_32_reg_i_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_m_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_q_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_b_map): New macro.
|
|
|
|
|
|
(micromips_to_32_reg_c_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_d_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_e_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_f_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_g_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_l_map): Likewise.
|
|
|
|
|
|
(micromips_to_32_reg_n_map): Likewise.
|
|
|
|
|
|
(micromips_imm_b_map, micromips_imm_c_map): New macros.
|
|
|
|
|
|
(RELAX_DELAY_SLOT_16BIT): New macro.
|
|
|
|
|
|
(RELAX_DELAY_SLOT_SIZE_FIRST): Likewise.
|
|
|
|
|
|
(RELAX_DELAY_SLOT_SIZE_SECOND): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_ENCODE, RELAX_MICROMIPS_P): New macros.
|
|
|
|
|
|
(RELAX_MICROMIPS_TYPE, RELAX_MICROMIPS_AT): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_U16BIT, RELAX_MICROMIPS_UNCOND): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_COMPACT, RELAX_MICROMIPS_LINK): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_MARK_TOOFAR16): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_CLEAR_TOOFAR16): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_TOOFAR32): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_MARK_TOOFAR32): Likewise.
|
|
|
|
|
|
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Likewise.
|
|
|
|
|
|
(INSERT_OPERAND, EXTRACT_OPERAND): Handle microMIPS ASE.
|
|
|
|
|
|
(mips_macro_warning): Add delay_slot_16bit_p, delay_slot_32bit_p,
|
|
|
|
|
|
fsize and insns.
|
|
|
|
|
|
(mips_mark_labels): New function.
|
|
|
|
|
|
(mips16_small, mips16_ext): Remove variables, replacing with...
|
|
|
|
|
|
(forced_insn_size): ... this.
|
|
|
|
|
|
(append_insn, mips16_ip): Update accordingly.
|
|
|
|
|
|
(micromips_insn_length): New function.
|
|
|
|
|
|
(insn_length): Return the length of microMIPS instructions.
|
|
|
|
|
|
(mips_record_mips16_mode): Rename to...
|
|
|
|
|
|
(mips_record_compressed_mode): ... this. Handle microMIPS ASE.
|
|
|
|
|
|
(install_insn): Handle microMIPS ASE.
|
|
|
|
|
|
(reglist_lookup): New function.
|
|
|
|
|
|
(is_size_valid, is_delay_slot_valid): Likewise.
|
|
|
|
|
|
(md_begin): Handle microMIPS ASE.
|
|
|
|
|
|
(md_assemble): Likewise. Update for append_insn interface change.
|
|
|
|
|
|
(micromips_reloc_p): New function.
|
|
|
|
|
|
(got16_reloc_p): Handle microMIPS ASE.
|
|
|
|
|
|
(hi16_reloc_p): Likewise.
|
|
|
|
|
|
(lo16_reloc_p): Likewise.
|
|
|
|
|
|
(jmp_reloc_p): New function.
|
|
|
|
|
|
(jalr_reloc_p): Likewise.
|
|
|
|
|
|
(matching_lo_reloc): Handle microMIPS ASE.
|
|
|
|
|
|
(insn_uses_reg, reg_needs_delay): Likewise.
|
|
|
|
|
|
(mips_move_labels): Likewise.
|
|
|
|
|
|
(mips16_mark_labels): Rename to...
|
|
|
|
|
|
(mips_compressed_mark_labels): ... this. Handle microMIPS ASE.
|
|
|
|
|
|
(gpr_mod_mask): New function.
|
|
|
|
|
|
(gpr_read_mask, gpr_write_mask): Handle microMIPS ASE.
|
|
|
|
|
|
(fpr_read_mask, fpr_write_mask): Likewise.
|
|
|
|
|
|
(insns_between, nops_for_vr4130, nops_for_insn): Likewise.
|
|
|
|
|
|
(fix_loongson2f_nop, fix_loongson2f_jump): Likewise.
|
|
|
|
|
|
(MICROMIPS_LABEL_CHAR): New macro.
|
|
|
|
|
|
(micromips_target_label, micromips_target_name): New variables.
|
|
|
|
|
|
(micromips_label_name, micromips_label_expr): New functions.
|
|
|
|
|
|
(micromips_label_inc, micromips_add_label): Likewise.
|
|
|
|
|
|
(mips_label_is_local): Likewise.
|
|
|
|
|
|
(micromips_map_reloc): Likewise.
|
|
|
|
|
|
(can_swap_branch_p): Handle microMIPS ASE.
|
|
|
|
|
|
(append_insn): Add expansionp argument. Handle microMIPS ASE.
|
|
|
|
|
|
(start_noreorder, end_noreorder): Handle microMIPS ASE.
|
|
|
|
|
|
(macro_start, macro_warning, macro_end): Likewise.
|
|
|
|
|
|
(brk_fmt, cop12_fmt, jalr_fmt, lui_fmt): New variables.
|
|
|
|
|
|
(mem12_fmt, mfhl_fmt, shft_fmt, trap_fmt): Likewise.
|
|
|
|
|
|
(BRK_FMT, COP12_FMT, JALR_FMT, LUI_FMT): New macros.
|
|
|
|
|
|
(MEM12_FMT, MFHL_FMT, SHFT_FMT, TRAP_FMT): Likewise.
|
|
|
|
|
|
(macro_build): Handle microMIPS ASE. Update for append_insn
|
|
|
|
|
|
interface change.
|
|
|
|
|
|
(mips16_macro_build): Update for append_insn interface change.
|
|
|
|
|
|
(macro_build_jalr): Handle microMIPS ASE.
|
|
|
|
|
|
(macro_build_lui): Likewise. Simplify.
|
|
|
|
|
|
(load_register): Handle microMIPS ASE.
|
|
|
|
|
|
(load_address): Likewise.
|
|
|
|
|
|
(move_register): Likewise.
|
|
|
|
|
|
(macro_build_branch_likely): New function.
|
|
|
|
|
|
(macro_build_branch_ccl): Likewise.
|
|
|
|
|
|
(macro_build_branch_rs): Likewise.
|
|
|
|
|
|
(macro_build_branch_rsrt): Likewise.
|
|
|
|
|
|
(macro): Handle microMIPS ASE.
|
|
|
|
|
|
(validate_micromips_insn): New function.
|
|
|
|
|
|
(expr_const_in_range): Likewise.
|
|
|
|
|
|
(mips_ip): Handle microMIPS ASE.
|
|
|
|
|
|
(options): Add OPTION_MICROMIPS and OPTION_NO_MICROMIPS.
|
|
|
|
|
|
(md_longopts): Add mmicromips and mno-micromips.
|
|
|
|
|
|
(md_parse_option): Handle OPTION_MICROMIPS and
|
|
|
|
|
|
OPTION_NO_MICROMIPS.
|
|
|
|
|
|
(mips_after_parse_args): Handle microMIPS ASE.
|
|
|
|
|
|
(md_pcrel_from): Handle microMIPS relocations.
|
|
|
|
|
|
(mips_force_relocation): Likewise.
|
|
|
|
|
|
(md_apply_fix): Likewise.
|
|
|
|
|
|
(mips_align): Handle microMIPS ASE.
|
|
|
|
|
|
(s_mipsset): Likewise.
|
|
|
|
|
|
(s_cpload, s_cpsetup, s_cpreturn): Use relocation wrappers.
|
|
|
|
|
|
(s_dtprel_internal): Likewise.
|
|
|
|
|
|
(s_gpword, s_gpdword): Likewise.
|
|
|
|
|
|
(s_insn): Handle microMIPS ASE.
|
|
|
|
|
|
(s_mips_stab): Likewise.
|
|
|
|
|
|
(relaxed_micromips_32bit_branch_length): New function.
|
|
|
|
|
|
(relaxed_micromips_16bit_branch_length): New function.
|
|
|
|
|
|
(md_estimate_size_before_relax): Handle microMIPS ASE.
|
|
|
|
|
|
(mips_fix_adjustable): Likewise.
|
|
|
|
|
|
(tc_gen_reloc): Handle microMIPS relocations.
|
|
|
|
|
|
(mips_relax_frag): Handle microMIPS ASE.
|
|
|
|
|
|
(md_convert_frag): Likewise.
|
|
|
|
|
|
(mips_frob_file_after_relocs): Likewise.
|
|
|
|
|
|
(mips_elf_final_processing): Likewise.
|
|
|
|
|
|
(mips_nop_opcode): Likewise.
|
|
|
|
|
|
(mips_handle_align): Likewise.
|
|
|
|
|
|
(md_show_usage): Handle microMIPS options.
|
|
|
|
|
|
* symbols.c (TC_LABEL_IS_LOCAL): New macro.
|
|
|
|
|
|
(S_IS_LOCAL): Add a TC_LABEL_IS_LOCAL check.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (Target MIPS options): Add -mmicromips and
|
|
|
|
|
|
-mno-micromips.
|
|
|
|
|
|
(-mmicromips, -mno-micromips): New options.
|
|
|
|
|
|
* doc/c-mips.texi (-mmicromips, -mno-micromips): New options.
|
|
|
|
|
|
(MIPS ISA): Document .set micromips and .set nomicromips.
|
|
|
|
|
|
(MIPS insn): Update for microMIPS support.
|
|
|
|
|
|
|
2011-07-24 22:05:28 +08:00
|
|
|
|
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_ip): Make a copy of the instruction's
|
|
|
|
|
|
mnemonic and use it for further processing.
|
|
|
|
|
|
|
2011-07-24 22:04:51 +08:00
|
|
|
|
2011-07-24 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (can_swap_branch_p): Adjust for the rename of
|
|
|
|
|
|
INSN_TRAP to INSN_NO_DELAY_SLOT. Remove the check for INSN_SYNC
|
|
|
|
|
|
as well as explicit checks for ERET and DERET when scheduling
|
|
|
|
|
|
branch delay slots.
|
|
|
|
|
|
|
2011-07-23 04:22:38 +08:00
|
|
|
|
2011-07-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add k1om.
|
|
|
|
|
|
(i386_align_code): Handle PROCESSOR_K1OM.
|
|
|
|
|
|
(check_cpu_arch_compatible): Check EM_K1OM.
|
|
|
|
|
|
(i386_arch): Handle Intel K1OM.
|
|
|
|
|
|
(i386_mach): Return bfd_mach_k1om for Intel K1OM.
|
|
|
|
|
|
(i386_target_format): Return ELF_TARGET_K1OM_FORMAT for Intel
|
|
|
|
|
|
K1OM.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.h (ELF_TARGET_K1OM_FORMAT): New.
|
|
|
|
|
|
(processor_type): Add PROCESSOR_K1OM.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Document k1om.
|
|
|
|
|
|
|
2011-07-18 21:32:31 +08:00
|
|
|
|
2011-07-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Fix a typo.
|
|
|
|
|
|
|
2011-07-07 02:01:51 +08:00
|
|
|
|
2011-07-06 Aurelien Jarno <aurelien@aurel32.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (append_insn): delete prev_pinfo2 and pinfo2.
|
|
|
|
|
|
|
2011-07-05 04:22:52 +08:00
|
|
|
|
2011-07-04 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (gpr_read_mask, gpr_write_mask): Fix handling
|
|
|
|
|
|
of register 0.
|
|
|
|
|
|
|
2011-07-05 03:27:28 +08:00
|
|
|
|
2011-07-04 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (append_insn): Make sure DWARF-2 location
|
|
|
|
|
|
information is properly adjusted for branches that get swapped.
|
|
|
|
|
|
|
2011-07-03 21:37:09 +08:00
|
|
|
|
2011-07-03 Samuel Thibault <samuel.thibault@gnu.org>
|
|
|
|
|
|
Thomas Schwinge <thomas@schwinge.name>
|
|
|
|
|
|
|
2011-07-03 21:45:32 +08:00
|
|
|
|
PR binutils/12913
|
2011-07-03 21:37:09 +08:00
|
|
|
|
* config/obj-elf.c (obj_elf_type): Use ELFOSABI_GNU name instead of
|
|
|
|
|
|
ELFOSABI_LINUX alias.
|
|
|
|
|
|
* config/tc-ia64.c: Likewise.
|
|
|
|
|
|
|
2011-06-30 21:42:46 +08:00
|
|
|
|
2011-06-30 Paul Carroll <pcarroll@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_t_add_sub): Only allow LSL shifts of less
|
|
|
|
|
|
than 4 in Thumb mode.
|
|
|
|
|
|
|
2011-06-30 20:52:58 +08:00
|
|
|
|
2011-06-30 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12848
|
|
|
|
|
|
* config/tc-arm.c (BAD_RANGE): New error message define.
|
|
|
|
|
|
(md_apply_fix): Use it.
|
|
|
|
|
|
Fix range check for thumb branch instructions.
|
|
|
|
|
|
|
2011-06-30 05:05:29 +08:00
|
|
|
|
2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (append_method): New enum.
|
|
|
|
|
|
(can_swap_branch_p, get_append_method): New functions.
|
|
|
|
|
|
(append_insn): Use get_append_method to decide how the instruction
|
|
|
|
|
|
should be added.
|
|
|
|
|
|
|
2011-06-30 04:48:10 +08:00
|
|
|
|
2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (append_insn): Remove bogus goto.
|
|
|
|
|
|
|
2011-06-30 04:46:10 +08:00
|
|
|
|
2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (append_insn): Always clear the history after an
|
|
|
|
|
|
unconditional branch.
|
|
|
|
|
|
|
2011-06-30 04:42:48 +08:00
|
|
|
|
2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (find_altered_mips16_opcode): New function.
|
|
|
|
|
|
(append_insn): Use it.
|
|
|
|
|
|
|
gas/
* config/tc-mips.c (insn_uses_reg): Delete.
(gpr_read_mask, gpr_write_mask): New functions.
(fpr_read_mask, fpr_write_mask): Likewise.
(insns_between, nops_for_vr4130, append_insn): Use them.
gas/testsuite/
* gas/mips/mips16-e.d, gas/mips/mips16-f.d,
gas/mips/mipsel16-e.d, gas/mips/mipsel16-f.d,
gas/mips/tmips16-e.d, gas/mips/tmips16-f.d,
gas/mips/tmipsel16-e.d, gas/mips/tmipsel16-f.d: Fix GPR mask.
* gas/mips/reginfo-1.s, gas/mips/reginfo-1a.d,
gas/mips/reginfo-1b.d: New tests.
* gas/mips/mips.exp: Run them.
2011-06-30 04:39:00 +08:00
|
|
|
|
2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (insn_uses_reg): Delete.
|
|
|
|
|
|
(gpr_read_mask, gpr_write_mask): New functions.
|
|
|
|
|
|
(fpr_read_mask, fpr_write_mask): Likewise.
|
|
|
|
|
|
(insns_between, nops_for_vr4130, append_insn): Use them.
|
|
|
|
|
|
|
2011-06-30 04:35:05 +08:00
|
|
|
|
2011-06-29 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_mips_end): Call mips_emit_delays.
|
|
|
|
|
|
|
2011-06-30 00:29:38 +08:00
|
|
|
|
2011-06-29 Dave Martin <dave.martin@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12931
|
|
|
|
|
|
* config/tc-arm.c (mapping_state): When changing to ARM or THUMB
|
|
|
|
|
|
state set the minimum required alignment of the section.
|
|
|
|
|
|
|
2011-06-29 19:12:25 +08:00
|
|
|
|
2011-06-29 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_mach): Convert to ISO-C.
|
|
|
|
|
|
(md_begin, pe_directive_secrel, md_estimate_size_before_relax): Ditto.
|
|
|
|
|
|
(md_convert_frag, md_apply_fix, md_undefined_symbol): Ditto.
|
|
|
|
|
|
(md_section_align, tc_gen_reloc): Ditto.
|
|
|
|
|
|
|
2011-06-28 21:33:33 +08:00
|
|
|
|
2011-06-28 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-alpha.c (s_alpha_pdesc): Fix indentation. Do not
|
|
|
|
|
|
generate dummy fix.
|
|
|
|
|
|
|
2011-06-28 17:23:53 +08:00
|
|
|
|
2011-06-28 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-alpha.c (load_expression): Use alloca instead of xmalloc.
|
|
|
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|
|
(emit_jsrjmp): Ditto.
|
|
|
|
|
|
(tc_gen_reloc): Ditto.
|
|
|
|
|
|
|
2011-06-28 15:40:16 +08:00
|
|
|
|
2011-06-28 Tristan Gingold <gingold@adacore.com>
|
|
|
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|
|
|
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|
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|
|
* config/tc-alpha.c (alpha_evax_proc_hash): Remove.
|
|
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|
|
|
(alpha_evax_proc_data): New variable.
|
|
|
|
|
|
(s_alpha_ent): Prevent nested function. Remove has_insert call.
|
|
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|
|
|
(s_alpha_pdesc): Do not call demand_empty_rest_of_line in case of
|
|
|
|
|
|
error. Do not search in the hash table. Check if match with .ent.
|
|
|
|
|
|
(s_alpha_name): Remove unused variable.
|
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|
|
|
(md_begin): Remove initialization of alpha_evax_proc_hash.
|
|
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|
|
2011-06-27 22:08:15 +08:00
|
|
|
|
2011-06-27 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-alpha.c (add_to_link_pool): Remove basesym parameter.
|
|
|
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|
|
Locally declare basesym. Add comments. Do not set literal_pool_size.
|
|
|
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|
|
(load_expression): Adjust call to add_to_link_pool.
|
|
|
|
|
|
(s_alpha_pdesc): Define pdesc symbol using dot.
|
|
|
|
|
|
Do not set literal_pool_size.
|
|
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|
|
(s_alpha_end): Use NULL instead of 0.
|
|
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|
|
2011-06-27 18:03:42 +08:00
|
|
|
|
2011-06-27 Tristan Gingold <gingold@adacore.com>
|
|
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|
|
|
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|
|
|
* config/obj-evax.c (evax_frob_file_before_adjust): Add comments.
|
|
|
|
|
|
Fix style.
|
|
|
|
|
|
* config/obj-evax.h (struct alpha_linkage_fixups): Remove seg
|
|
|
|
|
|
field. Add comments.
|
|
|
|
|
|
(obj_symbol_type, object_headers, OBJ_SYMFIELD_TYPE): Remove
|
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|
|
2011-06-26 16:32:50 +08:00
|
|
|
|
2011-06-26 Richard Sandiford <rdsandiford@googlemail.com>
|
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|
|
|
|
|
|
|
|
|
* config/tc-mips.c (fix_24k_record_store_info): If the previous
|
|
|
|
|
|
instruction was a store, and the next instructions are unknown,
|
|
|
|
|
|
assume the worst.
|
|
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|
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|
|
2011-06-25 18:11:46 +08:00
|
|
|
|
2011-06-25 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12915
|
|
|
|
|
|
* config/tc-mips.c (nops_for_vr4130, nops_for_24k, nops_for_insn)
|
|
|
|
|
|
(nops_for_sequence, nops_for_insn_or_target): Add ignore parameters.
|
|
|
|
|
|
(mips_emit_delays, start_noreorder): Update accordingly.
|
|
|
|
|
|
(append_insn): Likewise. Revert original fix for this PR
|
|
|
|
|
|
and use the ignore parameter instead.
|
|
|
|
|
|
|
2011-06-24 23:44:41 +08:00
|
|
|
|
2011-06-24 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/11625
|
|
|
|
|
|
* config/obj-evax.c (evax_frob_symbol): Use as_bad instead of abort.
|
|
|
|
|
|
|
2011-06-24 23:16:03 +08:00
|
|
|
|
2011-06-24 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-alpha.c (add_to_link_pool): Remove useless offset
|
|
|
|
|
|
variable. Fix style.
|
|
|
|
|
|
|
2011-06-24 04:21:38 +08:00
|
|
|
|
2011-06-23 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12915
|
|
|
|
|
|
* config/tc-mips.c (append_insn): Only consider hazards between the
|
|
|
|
|
|
pre-noreorder block and ip.
|
|
|
|
|
|
|
2011-06-21 23:34:27 +08:00
|
|
|
|
2011-06-21 Sameera Deshpande <sameera.deshpande@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (vfp_conv): Add check on range of immediate operand
|
|
|
|
|
|
in vcvt instruction between floating-point and fixed-point.
|
|
|
|
|
|
(operand_parse_code): Add "OP_oI32z".
|
|
|
|
|
|
(parse_operands): OP_oI32z case added.
|
|
|
|
|
|
|
2011-06-20 21:23:22 +08:00
|
|
|
|
2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Revert x32 change.
|
|
|
|
|
|
|
2011-06-20 18:27:56 +08:00
|
|
|
|
2011-06-20 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/Makefile.am: (CPU_DOCS): Add c-xstormy16.texi.
|
|
|
|
|
|
* doc/Makefile.in: Regenerate.
|
|
|
|
|
|
* doc/all.texi: Set XSTORMY16.
|
|
|
|
|
|
* doc/c-xstormy16.texi: New file.
|
|
|
|
|
|
|
2011-06-20 05:22:16 +08:00
|
|
|
|
2011-06-19 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Support x32.
|
|
|
|
|
|
|
2011-06-15 17:12:09 +08:00
|
|
|
|
2011-06-15 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention addition of TILEPRO and TIKE-Gx support.
|
|
|
|
|
|
|
2011-06-14 17:03:52 +08:00
|
|
|
|
2011-06-14 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within.
|
|
|
|
|
|
(tc_new_dot_label): Define.
|
|
|
|
|
|
(ppc_new_dot_label): Declare.
|
|
|
|
|
|
* config/tc-ppc.c (ppc_frob_label): Set within target field.
|
|
|
|
|
|
(ppc_fix_adjustable): Use this field to adjust the reloc.
|
|
|
|
|
|
(ppc_new_dot_label): New function.
|
|
|
|
|
|
|
2011-06-14 13:11:15 +08:00
|
|
|
|
2011-06-14 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo.
(ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c.
(BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo,
and elfxx-tilegx.lo.
(BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and
elfxx-tilegx.c.
(BFD64_BACKENDS): Add elf64-tilegx.lo.
(BFD64_BACKENDS_CFILES): Add elf64-tilegx.c.
* Makefile.in: Regenerate.
* arctures.c (bfd_architecture): Define bfd_arch_tilepro,
bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx.
(bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch.
(bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch.
bfd-in2.h: Regenerate.
* config.bfd: Handle tilegx-*-* and tilepro-*-*.
* configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* configure: Regenerate.
* elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and
TILEPRO_ELF_DATA.
* libbfd.h: Regenerate.
* reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT,
RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0,
IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1,
IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI,
IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL,
IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL,
IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL,
IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO,
IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI,
IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0,
MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1,
IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO,
IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI,
IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE,
IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO,
IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA,
IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST,
HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1,
JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1,
DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0,
SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0,
IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2,
IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST,
IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST,
IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL,
IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL,
IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL,
IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL,
IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL,
IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL,
IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT,
IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT,
IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT,
IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT,
IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT,
IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD,
IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD,
IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD,
IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD,
IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD,
IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD,
IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE,
IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE,
IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE,
IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE,
IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE,
IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE,
IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64,
TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32}
* targets.c (bfd_elf32_tilegx_vec): Declare.
(bfd_elf32_tilepro_vec): Declare.
(bfd_elf64_tilegx_vec): Declare.
(bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec,
and bfd_elf64_tilegx_vec.
* cpu-tilegx.c: New file.
* cpu-tilepro.c: New file.
* elf32-tilepro.h: New file.
* elf32-tilepro.c: New file.
* elf32-tilegx.c: New file.
* elf32-tilegx.h: New file.
* elf64-tilegx.c: New file.
* elf64-tilegx.h: New file.
* elfxx-tilegx.c: New file.
* elfxx-tilegx.h: New file.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
* gas/tilepro/t_constants.s: New file.
* gas/tilepro/t_constants.d: Likewise.
* gas/tilepro/t_insns.s: Likewise.
* gas/tilepro/tilepro.exp: Likewise.
* gas/tilepro/t_insns.d: Likewise.
* gas/tilegx/tilegx.exp: Likewise.
* gas/tilegx/t_insns.d: Likewise.
* gas/tilegx/t_insns.s: Likewise.
* dis-asm.h (print_insn_tilegx): Declare.
(print_insn_tilepro): Likewise.
* tilegx.h: New file.
* tilepro.h: New file.
* common.h: Add EM_TILEGX.
* tilegx.h: New file.
* tilepro.h: New file.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and
eelf32tilepro.c.
(ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c.
(eelf32tilegx.c): New target.
(eelf32tilepro.c): Likewise.
(eelf64tilegx.c): Likewise.
* Makefile.in: Regenerate.
* configure.tgt: Handle tilegx-*-* and tilepro-*-*.
* emulparams/elf32tilegx.sh: New file.
* emulparams/elf64tilegx.sh: New file.
* emulparams/elf32tilepro.sh: New file.
* ld-elf/eh5.d: Don't run on tile*.
* ld-srec/srec.exp: xfail on tile*.
* ld-tilegx/external.s: New file.
* ld-tilegx/reloc.d: New file.
* ld-tilegx/reloc.s: New file.
* ld-tilegx/tilegx.exp: New file.
* ld-tilepro/external.s: New file.
* ld-tilepro/reloc.d: New file.
* ld-tilepro/reloc.s: New file.
* ld-tilepro/tilepro.exp: New file.
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c,
tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c.
* Makefile.in: Regenerate.
* configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro.
* po/POTFILES.in: Regenerate.
* tilegx-dis.c: New file.
* tilegx-opc.c: New file.
* tilepro-dis.c: New file.
* tilepro-opc.c: New file.
2011-06-13 23:18:54 +08:00
|
|
|
|
2011-06-13 Walter Lee <walt@tilera.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
|
|
|
|
|
|
config/tc-tilepro.c.
|
|
|
|
|
|
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
|
|
|
|
|
|
config/tc-tilepro.h.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure.tgt (tilepro-*-*): New.
|
|
|
|
|
|
(tilegx-*-*): Likewise.
|
|
|
|
|
|
* config/tc-tilegx.c: New file.
|
|
|
|
|
|
* config/tc-tilegx.h: Likewise.
|
|
|
|
|
|
* config/tc-tilepro.h: Likewise.
|
|
|
|
|
|
* config/tc-tilepro.c: Likewise.
|
|
|
|
|
|
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
|
|
|
|
|
|
c-tilepro.texi.
|
|
|
|
|
|
* doc/Makefile.in: Regenerate.
|
|
|
|
|
|
* doc/all.texi (TILEGX): Define.
|
|
|
|
|
|
(TILEPRO): Define.
|
|
|
|
|
|
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
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c-tilegx.texi and c-tilepro.texi.
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* doc/c-tilegx.texi: New.
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* doc/c-tilepro.texi: New.
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2011-06-13 17:57:35 +08:00
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2011-06-13 Nick Clifton <nickc@redhat.com>
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PR gas/12854
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* config/tc-arm.c (do_shift): Do not allow shift operations at the
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end of a register based shift insn.
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(do_t_shift): Likewise.
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2011-06-13 17:45:28 +08:00
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2011-06-13 Nick Clifton <nickc@redhat.com>
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* config/tc-score.c (s3_my_get_expression): Delete unused local
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variable 'seg'.
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(s3_do_ldst_insn): Delete unused local variable 'strbak'.
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(s3_do16_ldst_insn): Delete unused local variable 'temp'.
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(s3_do_macro_bcmp): Zero inst_expand array.
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(s3_do_macro_bcmpz): Likewise.
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(s3_s_score_end): Delete unused local variable 'dot'.
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(s3_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
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* config/tc-score7.c (s7_my_get_expression): Delete unused local
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variable 'seg'.
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(s7_do_ldst_insn): Delete unused local variable 'strbak'.
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(s7_b32_relax_to_b16): Delete unused local variables 'r_old' and
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'r_new'.
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(s7_s_score_end): Delete unused local variable 'dot'.
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(s7_relax_frag): Delete unused local variable 'relax_size'.
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(s7_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
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Support AVX Programming Reference (June, 2011).
gas/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* config/tc-i386.c (i386_error): Add invalid_vsib_address and
unsupported_vector_index_register.
(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
(check_VecOperands): New.
(match_template): Call check_VecOperands. Handle
invalid_vsib_address and unsupported_vector_index_register.
(build_modrm_byte): Support VecSIB. Check register-only source
operand when two source operands are swapped.
(i386_index_check): Allow Xmm/Ymm index registers.
* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
and invpcid./invpcid.
gas/testsuite/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/arch-10-1.l: Updated.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Add LZCNT to comments.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10-lzcnt.d: New.
* gas/i386/avx-gather-intel.d: Likewise.
* gas/i386/avx-gather.d: Likewise.
* gas/i386/avx-gather.s: Likewise.
* gas/i386/avx2-intel.d: Likewise.
* gas/i386/avx2.d: Likewise.
* gas/i386/avx2.s: Likewise
* gas/i386/avx256int-intel.d: Likewise.
* gas/i386/avx256int.d: Likewise.
* gas/i386/avx256int.s: Likewise.
* gas/i386/bmi2-intel.d: Likewise.
* gas/i386/bmi2.d: Likewise.
* gas/i386/bmi2.s: Likewise.
* gas/i386/inval-invpcid.l:Likewise.
* gas/i386/inval-invpcid.s: Likewise.
* gas/i386/invpcid-intel.d: Likewise.
* gas/i386/invpcid.d: Likewise.
* gas/i386/invpcid.s: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
* gas/i386/x86-64-avx-gather.d: Likewise.
* gas/i386/x86-64-avx-gather.s: Likewise.
* gas/i386/x86-64-avx2-intel.d: Likewise.
* gas/i386/x86-64-avx2.d: Likewise.
* gas/i386/x86-64-avx2.s: Likewise.
* gas/i386/x86-64-avx256int-intel.d: Likewise.
* gas/i386/x86-64-avx256int.d: Likewise.
* gas/i386/x86-64-avx256int.s: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/x86-64-inval-invpcid.l: Likewise.
* gas/i386/x86-64-inval-invpcid.s: Likewise.
* gas/i386/x86-64-invpcid-intel.d: Likewise.
* gas/i386/x86-64-invpcid.d: Likewise.
* gas/i386/x86-64-invpcid.s: Likewise.
opcodes/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (XMGatherQ): New.
* i386-dis.c (EXxmm_mb): New.
(EXxmm_mb): Likewise.
(EXxmm_mw): Likewise.
(EXxmm_md): Likewise.
(EXxmm_mq): Likewise.
(EXxmmdw): Likewise.
(EXxmmqd): Likewise.
(VexGatherQ): Likewise.
(MVexVSIBDWpX): Likewise.
(MVexVSIBQWpX): Likewise.
(xmm_mb_mode): Likewise.
(xmm_mw_mode): Likewise.
(xmm_md_mode): Likewise.
(xmm_mq_mode): Likewise.
(xmmdw_mode): Likewise.
(xmmqd_mode): Likewise.
(ymmxmm_mode): Likewise.
(vex_vsib_d_w_dq_mode): Likewise.
(vex_vsib_q_w_dq_mode): Likewise.
(MOD_VEX_0F385A_PREFIX_2): Likewise.
(MOD_VEX_0F388C_PREFIX_2): Likewise.
(MOD_VEX_0F388E_PREFIX_2): Likewise.
(PREFIX_0F3882): Likewise.
(PREFIX_VEX_0F3816): Likewise.
(PREFIX_VEX_0F3836): Likewise.
(PREFIX_VEX_0F3845): Likewise.
(PREFIX_VEX_0F3846): Likewise.
(PREFIX_VEX_0F3847): Likewise.
(PREFIX_VEX_0F3858): Likewise.
(PREFIX_VEX_0F3859): Likewise.
(PREFIX_VEX_0F385A): Likewise.
(PREFIX_VEX_0F3878): Likewise.
(PREFIX_VEX_0F3879): Likewise.
(PREFIX_VEX_0F388C): Likewise.
(PREFIX_VEX_0F388E): Likewise.
(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
(PREFIX_VEX_0F38F5): Likewise.
(PREFIX_VEX_0F38F6): Likewise.
(PREFIX_VEX_0F3A00): Likewise.
(PREFIX_VEX_0F3A01): Likewise.
(PREFIX_VEX_0F3A02): Likewise.
(PREFIX_VEX_0F3A38): Likewise.
(PREFIX_VEX_0F3A39): Likewise.
(PREFIX_VEX_0F3A46): Likewise.
(PREFIX_VEX_0F3AF0): Likewise.
(VEX_LEN_0F3816_P_2): Likewise.
(VEX_LEN_0F3819_P_2): Likewise.
(VEX_LEN_0F3836_P_2): Likewise.
(VEX_LEN_0F385A_P_2_M_0): Likewise.
(VEX_LEN_0F38F5_P_0): Likewise.
(VEX_LEN_0F38F5_P_1): Likewise.
(VEX_LEN_0F38F5_P_3): Likewise.
(VEX_LEN_0F38F6_P_3): Likewise.
(VEX_LEN_0F38F7_P_1): Likewise.
(VEX_LEN_0F38F7_P_2): Likewise.
(VEX_LEN_0F38F7_P_3): Likewise.
(VEX_LEN_0F3A00_P_2): Likewise.
(VEX_LEN_0F3A01_P_2): Likewise.
(VEX_LEN_0F3A38_P_2): Likewise.
(VEX_LEN_0F3A39_P_2): Likewise.
(VEX_LEN_0F3A46_P_2): Likewise.
(VEX_LEN_0F3AF0_P_3): Likewise.
(VEX_W_0F3816_P_2): Likewise.
(VEX_W_0F3818_P_2): Likewise.
(VEX_W_0F3819_P_2): Likewise.
(VEX_W_0F3836_P_2): Likewise.
(VEX_W_0F3846_P_2): Likewise.
(VEX_W_0F3858_P_2): Likewise.
(VEX_W_0F3859_P_2): Likewise.
(VEX_W_0F385A_P_2_M_0): Likewise.
(VEX_W_0F3878_P_2): Likewise.
(VEX_W_0F3879_P_2): Likewise.
(VEX_W_0F3A00_P_2): Likewise.
(VEX_W_0F3A01_P_2): Likewise.
(VEX_W_0F3A02_P_2): Likewise.
(VEX_W_0F3A38_P_2): Likewise.
(VEX_W_0F3A39_P_2): Likewise.
(VEX_W_0F3A46_P_2): Likewise.
(MOD_VEX_0F3818_PREFIX_2): Removed.
(MOD_VEX_0F3819_PREFIX_2): Likewise.
(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
(VEX_LEN_0F3A0E_P_2): Likewise.
(VEX_LEN_0F3A0F_P_2): Likewise.
(VEX_LEN_0F3A42_P_2): Likewise.
(VEX_LEN_0F3A4C_P_2): Likewise.
(VEX_W_0F3818_P_2_M_0): Likewise.
(VEX_W_0F3819_P_2_M_0): Likewise.
(prefix_table): Updated.
(three_byte_table): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(putop): Handle "LW".
(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
(OP_EX): Likewise.
(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
vex_vsib_q_w_dq_mode.
(OP_XMM): Handle vex_vsib_q_w_dq_mode.
(OP_VEX): Likewise.
* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
(opcode_modifiers): Add VecSIB.
* i386-opc.h (CpuAVX2): New.
(CpuBMI2): Likewise.
(CpuLZCNT): Likewise.
(CpuINVPCID): Likewise.
(VecSIB128): Likewise.
(VecSIB256): Likewise.
(VecSIB): Likewise.
(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
(i386_opcode_modifier): Add vecsib.
* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-06-11 05:27:40 +08:00
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2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
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AVX Programming Reference (June, 2011)
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* config/tc-i386.c (i386_error): Add invalid_vsib_address and
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unsupported_vector_index_register.
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(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
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(check_VecOperands): New.
|
2011-06-13 17:45:28 +08:00
|
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|
|
(match_template): Call check_VecOperands. Handle
|
Support AVX Programming Reference (June, 2011).
gas/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* config/tc-i386.c (i386_error): Add invalid_vsib_address and
unsupported_vector_index_register.
(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
(check_VecOperands): New.
(match_template): Call check_VecOperands. Handle
invalid_vsib_address and unsupported_vector_index_register.
(build_modrm_byte): Support VecSIB. Check register-only source
operand when two source operands are swapped.
(i386_index_check): Allow Xmm/Ymm index registers.
* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
and invpcid./invpcid.
gas/testsuite/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* gas/i386/arch-10-1.l: Updated.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Add LZCNT to comments.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/arch-10-lzcnt.d: New.
* gas/i386/avx-gather-intel.d: Likewise.
* gas/i386/avx-gather.d: Likewise.
* gas/i386/avx-gather.s: Likewise.
* gas/i386/avx2-intel.d: Likewise.
* gas/i386/avx2.d: Likewise.
* gas/i386/avx2.s: Likewise
* gas/i386/avx256int-intel.d: Likewise.
* gas/i386/avx256int.d: Likewise.
* gas/i386/avx256int.s: Likewise.
* gas/i386/bmi2-intel.d: Likewise.
* gas/i386/bmi2.d: Likewise.
* gas/i386/bmi2.s: Likewise.
* gas/i386/inval-invpcid.l:Likewise.
* gas/i386/inval-invpcid.s: Likewise.
* gas/i386/invpcid-intel.d: Likewise.
* gas/i386/invpcid.d: Likewise.
* gas/i386/invpcid.s: Likewise.
* gas/i386/x86-64-arch-2-lzcnt.d: Likewise.
* gas/i386/x86-64-avx-gather-intel.d: Likewise.
* gas/i386/x86-64-avx-gather.d: Likewise.
* gas/i386/x86-64-avx-gather.s: Likewise.
* gas/i386/x86-64-avx2-intel.d: Likewise.
* gas/i386/x86-64-avx2.d: Likewise.
* gas/i386/x86-64-avx2.s: Likewise.
* gas/i386/x86-64-avx256int-intel.d: Likewise.
* gas/i386/x86-64-avx256int.d: Likewise.
* gas/i386/x86-64-avx256int.s: Likewise.
* gas/i386/x86-64-bmi2-intel.d: Likewise.
* gas/i386/x86-64-bmi2.d: Likewise.
* gas/i386/x86-64-bmi2.s: Likewise.
* gas/i386/x86-64-inval-invpcid.l: Likewise.
* gas/i386/x86-64-inval-invpcid.s: Likewise.
* gas/i386/x86-64-invpcid-intel.d: Likewise.
* gas/i386/x86-64-invpcid.d: Likewise.
* gas/i386/x86-64-invpcid.s: Likewise.
opcodes/
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* i386-dis.c (XMGatherQ): New.
* i386-dis.c (EXxmm_mb): New.
(EXxmm_mb): Likewise.
(EXxmm_mw): Likewise.
(EXxmm_md): Likewise.
(EXxmm_mq): Likewise.
(EXxmmdw): Likewise.
(EXxmmqd): Likewise.
(VexGatherQ): Likewise.
(MVexVSIBDWpX): Likewise.
(MVexVSIBQWpX): Likewise.
(xmm_mb_mode): Likewise.
(xmm_mw_mode): Likewise.
(xmm_md_mode): Likewise.
(xmm_mq_mode): Likewise.
(xmmdw_mode): Likewise.
(xmmqd_mode): Likewise.
(ymmxmm_mode): Likewise.
(vex_vsib_d_w_dq_mode): Likewise.
(vex_vsib_q_w_dq_mode): Likewise.
(MOD_VEX_0F385A_PREFIX_2): Likewise.
(MOD_VEX_0F388C_PREFIX_2): Likewise.
(MOD_VEX_0F388E_PREFIX_2): Likewise.
(PREFIX_0F3882): Likewise.
(PREFIX_VEX_0F3816): Likewise.
(PREFIX_VEX_0F3836): Likewise.
(PREFIX_VEX_0F3845): Likewise.
(PREFIX_VEX_0F3846): Likewise.
(PREFIX_VEX_0F3847): Likewise.
(PREFIX_VEX_0F3858): Likewise.
(PREFIX_VEX_0F3859): Likewise.
(PREFIX_VEX_0F385A): Likewise.
(PREFIX_VEX_0F3878): Likewise.
(PREFIX_VEX_0F3879): Likewise.
(PREFIX_VEX_0F388C): Likewise.
(PREFIX_VEX_0F388E): Likewise.
(PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise.
(PREFIX_VEX_0F38F5): Likewise.
(PREFIX_VEX_0F38F6): Likewise.
(PREFIX_VEX_0F3A00): Likewise.
(PREFIX_VEX_0F3A01): Likewise.
(PREFIX_VEX_0F3A02): Likewise.
(PREFIX_VEX_0F3A38): Likewise.
(PREFIX_VEX_0F3A39): Likewise.
(PREFIX_VEX_0F3A46): Likewise.
(PREFIX_VEX_0F3AF0): Likewise.
(VEX_LEN_0F3816_P_2): Likewise.
(VEX_LEN_0F3819_P_2): Likewise.
(VEX_LEN_0F3836_P_2): Likewise.
(VEX_LEN_0F385A_P_2_M_0): Likewise.
(VEX_LEN_0F38F5_P_0): Likewise.
(VEX_LEN_0F38F5_P_1): Likewise.
(VEX_LEN_0F38F5_P_3): Likewise.
(VEX_LEN_0F38F6_P_3): Likewise.
(VEX_LEN_0F38F7_P_1): Likewise.
(VEX_LEN_0F38F7_P_2): Likewise.
(VEX_LEN_0F38F7_P_3): Likewise.
(VEX_LEN_0F3A00_P_2): Likewise.
(VEX_LEN_0F3A01_P_2): Likewise.
(VEX_LEN_0F3A38_P_2): Likewise.
(VEX_LEN_0F3A39_P_2): Likewise.
(VEX_LEN_0F3A46_P_2): Likewise.
(VEX_LEN_0F3AF0_P_3): Likewise.
(VEX_W_0F3816_P_2): Likewise.
(VEX_W_0F3818_P_2): Likewise.
(VEX_W_0F3819_P_2): Likewise.
(VEX_W_0F3836_P_2): Likewise.
(VEX_W_0F3846_P_2): Likewise.
(VEX_W_0F3858_P_2): Likewise.
(VEX_W_0F3859_P_2): Likewise.
(VEX_W_0F385A_P_2_M_0): Likewise.
(VEX_W_0F3878_P_2): Likewise.
(VEX_W_0F3879_P_2): Likewise.
(VEX_W_0F3A00_P_2): Likewise.
(VEX_W_0F3A01_P_2): Likewise.
(VEX_W_0F3A02_P_2): Likewise.
(VEX_W_0F3A38_P_2): Likewise.
(VEX_W_0F3A39_P_2): Likewise.
(VEX_W_0F3A46_P_2): Likewise.
(MOD_VEX_0F3818_PREFIX_2): Removed.
(MOD_VEX_0F3819_PREFIX_2): Likewise.
(VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise.
(VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise.
(VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise.
(VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise.
(VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise.
(VEX_LEN_0F3A0E_P_2): Likewise.
(VEX_LEN_0F3A0F_P_2): Likewise.
(VEX_LEN_0F3A42_P_2): Likewise.
(VEX_LEN_0F3A4C_P_2): Likewise.
(VEX_W_0F3818_P_2_M_0): Likewise.
(VEX_W_0F3819_P_2_M_0): Likewise.
(prefix_table): Updated.
(three_byte_table): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(vex_w_table): Likewise.
(mod_table): Likewise.
(putop): Handle "LW".
(intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode,
xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode,
vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode.
(OP_EX): Likewise.
(OP_E_memory): Handle vex_vsib_d_w_dq_mode and
vex_vsib_q_w_dq_mode.
(OP_XMM): Handle vex_vsib_q_w_dq_mode.
(OP_VEX): Likewise.
* i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS
and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS,
CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS.
(cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID.
(opcode_modifiers): Add VecSIB.
* i386-opc.h (CpuAVX2): New.
(CpuBMI2): Likewise.
(CpuLZCNT): Likewise.
(CpuINVPCID): Likewise.
(VecSIB128): Likewise.
(VecSIB256): Likewise.
(VecSIB): Likewise.
(i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid.
(i386_opcode_modifier): Add vecsib.
* i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-06-11 05:27:40 +08:00
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invalid_vsib_address and unsupported_vector_index_register.
|
|
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|
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|
(build_modrm_byte): Support VecSIB. Check register-only source
|
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operand when two source operands are swapped.
|
|
|
|
|
|
(i386_index_check): Allow Xmm/Ymm index registers.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
|
|
|
|
|
|
and invpcid./invpcid.
|
|
|
|
|
|
|
2011-06-09 23:43:52 +08:00
|
|
|
|
2011-06-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12861
|
|
|
|
|
|
* config/tc-cr16.c (tc_gen_reloc): Remove unused local variable
|
|
|
|
|
|
code.
|
|
|
|
|
|
(check_cinv_options): Remove unused local variables. Make
|
|
|
|
|
|
function void.
|
|
|
|
|
|
(md_assemble): Remove unused local variable.
|
|
|
|
|
|
|
2011-06-09 17:59:34 +08:00
|
|
|
|
2011-06-09 James Greenhalgh <james.greenhalgh@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_ldrd): Warn in unpredictable cases.
|
|
|
|
|
|
|
2011-06-03 22:44:04 +08:00
|
|
|
|
2011-06-03 Arnaud Patard <arnaud.patard@rtp-net.org>
|
2011-06-03 22:42:47 +08:00
|
|
|
|
|
|
|
|
|
|
PR gas/12698
|
|
|
|
|
|
* config/tc-arm.c (parse_psr): Set m_profile to false when
|
|
|
|
|
|
assembling for any architecture.
|
|
|
|
|
|
|
2011-06-02 23:32:10 +08:00
|
|
|
|
2011-06-02 Jie Zhang jie@codesourcery.com
|
|
|
|
|
|
Nathan Sidwell nathan@codesourcery.com
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (parse_address_main): Handle -0 offsets.
|
|
|
|
|
|
(encode_arm_addr_mode_2): Set default sign of zero here ...
|
|
|
|
|
|
(encode_arm_addr_mode_3): ... and here.
|
|
|
|
|
|
(encode_arm_cp_address): ... and here.
|
|
|
|
|
|
(md_apply_fix): Use default sign of zero here.
|
|
|
|
|
|
|
2011-06-02 21:43:24 +08:00
|
|
|
|
2011-06-02 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* as.c: Fix spelling typo.
|
|
|
|
|
|
* read.c: Likewise.
|
|
|
|
|
|
* config/tc-ppc.c: Likewise.
|
|
|
|
|
|
* po/gas.pit: Regenerate.
|
|
|
|
|
|
|
2011-05-31 22:12:55 +08:00
|
|
|
|
2011-05-31 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_cpus): Add Cortex-R5.
|
|
|
|
|
|
(arm_extensions): Allow idiv on ARMv7-R.
|
|
|
|
|
|
* doc/c-arm.text: Update idiv extension restrictions.
|
|
|
|
|
|
|
2011-05-31 22:10:07 +08:00
|
|
|
|
2011-05-31 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_force_relocation): Resolve all pc-relative
|
|
|
|
|
|
loads.
|
|
|
|
|
|
|
2011-05-31 22:04:13 +08:00
|
|
|
|
2011-05-31 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_t_branch): Avoid relaxing branches to constant
|
|
|
|
|
|
addresses.
|
|
|
|
|
|
|
2011-05-31 21:40:04 +08:00
|
|
|
|
2011-05-31 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (fix_new_arm): Create an absolute symbol for
|
|
|
|
|
|
pc-relative fixes to constants.
|
|
|
|
|
|
* config/tc-arm.h (TC_FORCE_RELOCATATION_ABS): Define.
|
2011-06-02 21:43:24 +08:00
|
|
|
|
|
2011-05-27 20:56:06 +08:00
|
|
|
|
2011-05-27 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (md_begin): Remove unused variable dup_insn.
|
|
|
|
|
|
|
2011-05-25 00:13:31 +08:00
|
|
|
|
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (md_gather_operands): Fix check for floating
|
|
|
|
|
|
register pair operands.
|
|
|
|
|
|
|
2011-05-24 21:33:57 +08:00
|
|
|
|
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (md_gather_operands): Emit an error for odd
|
|
|
|
|
|
numbered registers used as register pair operand.
|
|
|
|
|
|
|
2011-05-23 17:29:00 +08:00
|
|
|
|
2011-05-23 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-v850.h (TC_FX_SIZE_SLACK): Define.
|
|
|
|
|
|
|
2011-05-20 18:10:00 +08:00
|
|
|
|
2011-05-20 Bernd Schmidt <bernds@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-tic6x.c (tic6x_operators): Add "pcr_offset".
|
|
|
|
|
|
(tic6x_parse_name): Handle it.
|
|
|
|
|
|
(tic6x_fix_new_exp): Handle O_pcr_offset.
|
|
|
|
|
|
(tic6x_fix_adjustable): Return 0 for the new relocs.
|
|
|
|
|
|
(md_apply_fix): Handle them.
|
|
|
|
|
|
(tc_gen_reloc): Likewise.
|
|
|
|
|
|
* config/tc-tic6x.h (tic6x_fix_info): Add a fix_subsy member.
|
|
|
|
|
|
|
2011-05-18 21:52:44 +08:00
|
|
|
|
2011-05-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12754
|
|
|
|
|
|
* config/tc-tic30.c (ordinal_names): Allow translation of the
|
|
|
|
|
|
ordinal names.
|
|
|
|
|
|
|
2011-05-18 17:41:15 +08:00
|
|
|
|
2011-05-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (s_unreq): Reword warning message to make it
|
|
|
|
|
|
easier to translate.
|
|
|
|
|
|
* config/tc-ia64.c (md_show_usage): Add note for translators.
|
|
|
|
|
|
* configure.in (ALL_LINGUAS): Add "fi".
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2011-05-18 15:58:36 +08:00
|
|
|
|
2011-05-18 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.h (ppc_tc_sy): Reorder fields.
|
|
|
|
|
|
Put size into an union with dw.
|
|
|
|
|
|
(OBJ_COPY_SYMBOL_ATTRIBUTES): Adjust.
|
|
|
|
|
|
(ppc_xcoff_end): Declare.
|
|
|
|
|
|
(md_end): Define.
|
|
|
|
|
|
* config/tc-ppc.c: Add includes for xcoff.
|
|
|
|
|
|
(ppc_dwsect): New function.
|
|
|
|
|
|
(md_pseudo_table): Add dwsect.
|
|
|
|
|
|
(struct dw_subsection): New.
|
|
|
|
|
|
(dw_sections): New.
|
|
|
|
|
|
(ppc_change_debug_section): New function.
|
|
|
|
|
|
(ppc_xcoff_end): Ditto.
|
|
|
|
|
|
(ppc_function): Adjust for ppc_tc_sy.
|
|
|
|
|
|
(ppc_symbol_new_hook): Ditto.
|
|
|
|
|
|
(ppc_frob_symbol): Ditto.
|
|
|
|
|
|
(ppc_frob_section): Do not set vma for debug sections.
|
|
|
|
|
|
(ppc_fix_adjustable): Return true for debug sections.
|
|
|
|
|
|
* config/obj-coff.c: Add includes for xcoff.
|
|
|
|
|
|
(coff_frob_section): Handle dwarf section.
|
|
|
|
|
|
|
2011-05-18 00:15:59 +08:00
|
|
|
|
2011-05-17 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
2011-05-18 00:38:29 +08:00
|
|
|
|
* po/fi.po: New Finnish translation.
|
|
|
|
|
|
* po/fr.po: Updated French translation.
|
|
|
|
|
|
|
2011-05-18 00:15:59 +08:00
|
|
|
|
* config/tc-m32r.c (md_show_usage): Fix typos in descriptions.
|
|
|
|
|
|
* config/tc-mt.c (md_assemble): Fix typos in warning messages.
|
|
|
|
|
|
* cond.c (s_else): Fix typos in error messages.
|
|
|
|
|
|
* config/tc-pj.c (md_assemble): Fix typo in error message.
|
|
|
|
|
|
|
2011-05-16 11:28:47 +08:00
|
|
|
|
2011-05-16 Hans-Peter Nilsson <hp@axis.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-cris.c (md_parse_option) <OPTION_PIC>: Error if not
|
|
|
|
|
|
emitting ELF object.
|
|
|
|
|
|
(md_show_usage): Only mention --pic if the assembler can generate
|
|
|
|
|
|
ELF objects.
|
|
|
|
|
|
* doc/c-cris.texi (CRIS-Opt): Mention that generating ELF is a
|
|
|
|
|
|
prerequisite for --pic being a valid option.
|
|
|
|
|
|
|
2011-05-13 07:50:23 +08:00
|
|
|
|
2011-05-13 Frederic Marchal <fmarchal@perso.be>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12755
|
|
|
|
|
|
* config/tc-v850.c (parse_register_list): Correct error string.
|
|
|
|
|
|
|
2011-05-13 06:29:06 +08:00
|
|
|
|
2011-05-12 Quentin Neill <quentin.neill@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Rename PROCESSOR_BDVER1 to PROCESSOR_BD.
|
|
|
|
|
|
(i386_align_code): Ditto
|
|
|
|
|
|
|
2011-05-12 20:41:45 +08:00
|
|
|
|
2011-05-12 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12715
|
|
|
|
|
|
* config/tc-arm.c (parse_big_immediate): Fix parsing of 64-bit
|
|
|
|
|
|
immediates on 32-bit hosts.
|
|
|
|
|
|
|
2011-05-11 06:02:27 +08:00
|
|
|
|
2011-05-10 Quentin Neill <quentin.neill@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add bdver2 and rename
|
|
|
|
|
|
PROCESSOR_BDVER1 to PROCESSOR_BDVER.
|
|
|
|
|
|
(i386_align_code): Rename PROCESSOR_BDVER1.
|
|
|
|
|
|
(processor_type): Ditto.
|
|
|
|
|
|
* doc/c-i386.texi: Add bdver2.
|
|
|
|
|
|
|
2011-05-10 10:36:41 +08:00
|
|
|
|
2011-05-10 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dw2gencfi.c (tc_cfi_endproc): Avoid "set but not used" error.
|
|
|
|
|
|
|
2011-05-09 Paul Brook <paul@codesourcery.com>
bfd/
* elf32-tic6x.c (is_tic6x_elf_unwind_section_name,
elf32_tic6x_fake_sections): New functions.
(elf_backend_fake_sections): Define.
gas/
* config/tc-tic6x.c (streq): Define.
(tic6x_get_unwind): New.
(s_tic6x_cantunwind, s_tic6x_handlerdata, s_tic6x_endp,
s_tic6x_personalityindex, s_tic6x_personality): New functions.
(md_pseudo_table): Add "endp", "handlerdata", "personalityindex",
"personality" and "cantunwind".
(tic6x_regname_to_dw2regnum, tic6x_frame_initial_instructions,
tic6x_start_unwind_section, tic6x_unwind_frame_regs,
tic6x_pop_rts_offset_little, tic6x_pop_rts_offset_big,
tic6x_unwind_reg_from_dwarf, tic6x_flush_unwind_word,
tic6x_unwind_byte, tic6x_unwind_2byte, tic6x_unwind_uleb,
tic6x_cfi_startproc, output_exidx_entry, tic6x_output_unwinding,
tic6x_cfi_endproc): New.
* config/tc-tic6x.h (TIC6X_NUM_UNWIND_REGS): Define.
(tic6x_unwind_info): New.
(tic6x_segment_info_type): Add marked_pr_dependency, unwind and
text_unwind.
(TARGET_USE_CFIPOP, tc_regname_to_dw2regnum,
tc_cfi_frame_initial_instructions, DWARF2_DEFAULT_RETURN_COLUMN,
DWARF2_CIE_DATA_ALIGNMENT, tc_cfi_startproc, tc_cfi_endproc,
tc_cfi_section_name): Define.
* doc/c-tic6x.texi: Document new unwinding directives.
* dw2gencfi.c (tc_cfi_startproc, tc_cfi_endproc): Add default
definitions.
(cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column,
CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr):
Move to dw2gencfi.h.
(CFI_EMIT_target): Define.
(dot_cfi_sections): Check tc_cfi_section_name.
(dot_cfi_startproc): Use tc_cfi_startproc.
(dot_cfi_endproc): Use tc_cfi_endproc.
* dw2gencfi.h (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset,
CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame,
CFI_val_encoded_addr): Move to here from dw2gencfi.c.
gas/testsuite:
* gas/tic6x/unwind-1.d: New test.
* gas/tic6x/unwind-1.s: New test.
* gas/tic6x/unwind-2.d: New test.
* gas/tic6x/unwind-2.s: New test.
* gas/tic6x/unwind-3.d: New test.
* gas/tic6x/unwind-3.s: New test.
* gas/tic6x/unwind-bad-1.d: New test.
* gas/tic6x/unwind-bad-1.s: New test.
* gas/tic6x/unwind-bad-1.l: New test.
* gas/tic6x/unwind-bad-2.d: New test.
* gas/tic6x/unwind-bad-2.s: New test.
* gas/tic6x/unwind-bad-2.l: New test.
include/
* elf/tic6x.h (ELF_STRING_C6000_unwind,
ELF_STRING_C6000_unwind_info, ELF_STRING_C6000_unwind_once,
ELF_STRING_C6000_unwind_info_once): Define.
2011-05-09 21:17:58 +08:00
|
|
|
|
2011-05-09 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-tic6x.c (streq): Define.
|
|
|
|
|
|
(tic6x_get_unwind): New.
|
|
|
|
|
|
(s_tic6x_cantunwind, s_tic6x_handlerdata, s_tic6x_endp,
|
|
|
|
|
|
s_tic6x_personalityindex, s_tic6x_personality): New functions.
|
|
|
|
|
|
(md_pseudo_table): Add "endp", "handlerdata", "personalityindex",
|
|
|
|
|
|
"personality" and "cantunwind".
|
|
|
|
|
|
(tic6x_regname_to_dw2regnum, tic6x_frame_initial_instructions,
|
|
|
|
|
|
tic6x_start_unwind_section, tic6x_unwind_frame_regs,
|
|
|
|
|
|
tic6x_pop_rts_offset_little, tic6x_pop_rts_offset_big,
|
|
|
|
|
|
tic6x_unwind_reg_from_dwarf, tic6x_flush_unwind_word,
|
|
|
|
|
|
tic6x_unwind_byte, tic6x_unwind_2byte, tic6x_unwind_uleb,
|
|
|
|
|
|
tic6x_cfi_startproc, output_exidx_entry, tic6x_output_unwinding,
|
|
|
|
|
|
tic6x_cfi_endproc): New.
|
|
|
|
|
|
* config/tc-tic6x.h (TIC6X_NUM_UNWIND_REGS): Define.
|
|
|
|
|
|
(tic6x_unwind_info): New.
|
|
|
|
|
|
(tic6x_segment_info_type): Add marked_pr_dependency, unwind and
|
|
|
|
|
|
text_unwind.
|
|
|
|
|
|
(TARGET_USE_CFIPOP, tc_regname_to_dw2regnum,
|
|
|
|
|
|
tc_cfi_frame_initial_instructions, DWARF2_DEFAULT_RETURN_COLUMN,
|
|
|
|
|
|
DWARF2_CIE_DATA_ALIGNMENT, tc_cfi_startproc, tc_cfi_endproc,
|
|
|
|
|
|
tc_cfi_section_name): Define.
|
|
|
|
|
|
* doc/c-tic6x.texi: Document new unwinding directives.
|
|
|
|
|
|
* dw2gencfi.c (tc_cfi_startproc, tc_cfi_endproc): Add default
|
|
|
|
|
|
definitions.
|
|
|
|
|
|
(cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column,
|
|
|
|
|
|
CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr):
|
|
|
|
|
|
Move to dw2gencfi.h.
|
|
|
|
|
|
(CFI_EMIT_target): Define.
|
|
|
|
|
|
(dot_cfi_sections): Check tc_cfi_section_name.
|
|
|
|
|
|
(dot_cfi_startproc): Use tc_cfi_startproc.
|
|
|
|
|
|
(dot_cfi_endproc): Use tc_cfi_endproc.
|
|
|
|
|
|
* dw2gencfi.h (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset,
|
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CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame,
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CFI_val_encoded_addr): Move to here from dw2gencfi.c.
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2011-05-07 13:37:54 +08:00
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2011-05-07 Alan Modra <amodra@gmail.com>
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* dw2gencfi.c (CUR_SEG, SET_CUR_SEG, HANDLED, SET_HANDLED): Define.
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Use throughout in place of #if SUPPORT_FRAME_LINKONCE.
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(struct fde_entry): Rename cseg to cur_seg.
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(cfi_change_reg_numbers): Remove ATTRIBUTE_UNUSED.
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(get_cfi_seg): Likewise. Use if (SUPPORT_FRAME_LINKONCE) rather
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that #if SUPPORT_FRAME_LINKONCE.
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(cfi_finish): Likewise.
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2011-05-06 22:48:56 +08:00
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2011-05-06 Tristan Gingold <gingold@adacore.com>
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* read.c (s_comm_internal): Remove code for OBJ_VMS.
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(s_data): Ditto.
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(s_text): Ditto.
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* write.c (write_object_file): Ditto.
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* symbols.c (define_sym_at_dot): Ditto.
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(colon): Ditto.
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2011-05-05 21:11:36 +08:00
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2011-05-05 Alan Modra <amodra@gmail.com>
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* dw2gencfi.c (SUPPORT_FRAME_LINKONCE): Define. Use throughout
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file to conditionally compile code added 2011-04-26.
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(cfi_change_reg_numbers): Add ATTRIBUTE_UNUSED on params only used
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when SUPPORT_FRAME_LINKONCE.
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(get_cfi_seg): Likewise. Reintroduce old code for when not
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SUPPORT_FRAME_LINKONCE.
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(cfi_finish): Move get_cfi_seg calls out of loop when not
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SUPPORT_FRAME_LINKONCE. Avoid unused var warning.
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2011-05-03 19:17:22 +08:00
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2011-05-03 Paul Brook <paul@codesourcery.com>
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* config/tc-tic6x.c (s_ehtype): New function.
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(md_pseudo_table): Add "ehtype".
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(tic6x_fix_adjustable, md_apply_fix): BFD_RELOC_C6000_EHTYPE.
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* doc/c-tic6x.texi: Document .ehtype directive.
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2011-04-26 23:28:08 +08:00
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2011-04-26 Kai Tietz <ktietz@redhat.com>
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* dw2gencfi.c (dwcfi_seg_list): New struct.
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(dwcfi_hash): New static hash variable.
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(get_debugseg_name): New.
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(alloc_debugseg_item): New.
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(make_debug_seg): New.
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(dwcfi_hash_insert): New.
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(dwcfi_hash_find): New.
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(dwcfi_hash_find_or_make): New.
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(cfi_insn_data): New member cur_seg.
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(cie_entry): Likewise.
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(fde_entry): New cseg and handled members.
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(alloc_fde_entry): Initialize cseg member.
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(alloc_cfi_insn_data): Initialize cur_seg member.
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(dot_cfi_sections): Compare for beginning of
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section names via strncmp.
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(get_cfi_seg): New.
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(cfi_finish): Treat link-once sections.
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(is_now_linkonce_segment): New local helper.
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(output_cie): Ignore cie entries not member of current
|
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segment.
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(output_fde): Likewise.
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(select_cie_for_fde): Likewise.
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(cfi_change_reg_numbers): Add new argument for current segment
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|
and ignore insn elements, if not part of current segment.
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* ehopt.c (get_cie_info): Use strncmp for
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section name matching.
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(heck_eh_frame): Likewise.
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2011-04-21 00:45:35 +08:00
|
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|
2011-04-20 Catherine Moore <clm@codesourcery.com>
|
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|
David Ung <davidu@mips.com>
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* config/mips.c (mips_cl_insn): Add new field complete_p.
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(create_insn): Initialize complete_p to zero.
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(BASE_REG_EQ): New.
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(fix_24k_align_to): New.
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(fix_24k_store_info): Declare.
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(fix_24k_sort): New.
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(fix_24k_record_store_info): New.
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(nops_for_24k): New.
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(nops_for_insn): Call nops_for_24k.
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(append_insn): Move O_constant expression handling.
|
2011-04-26 23:28:08 +08:00
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2011-04-20 20:52:16 +08:00
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|
2011-04-20 Alan Modra <amodra@gmail.com>
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* hash.c (set_gas_hash_table_size): Use bfd_hash_set_default_size.
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|
(hash_new_sized): New function, split out from..
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|
(hash_new): ..here.
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2011-04-19 15:44:12 +08:00
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|
2011-04-19 Nick Clifton <nickc@redhat.com>
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* config/tc-arm.c (v7m_psrs): Revert previous delta.
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2011-04-19 15:27:32 +08:00
|
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|
2011-04-18 Julian Brown <julian@codesourcery.com>
|
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Nick Clifton <nickc@redhat.com>
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* config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to
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detect M-profile targets.
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(do_t_swi): Exclude v7 and higher variants from arm_ext_os test.
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(v7m_psrs): Fix typo: basepri_max should be basepri_mask.
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2011-04-14 19:11:33 +08:00
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2011-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
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* config/tc-s390.c (s390_machine): New prototype.
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(md_pseudo_table): New pseudo-op .machine.
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(s390_opcode_hash): Initialize to NULL.
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(s390_parse_cpu): New function.
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(md_parse_option): Use s390_parse_cpu.
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(s390_setup_opcodes): New function.
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(md_begin): Use s390_setup_opcodes.
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(s390_machine): New hook handling the new .machine pseudo.
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* doc/c-s390.texi: Document the new pseudo op .machine.
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2011-04-12 21:57:50 +08:00
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2011-04-12 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (i386_mach): Start error message with lower
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case.
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(md_begin): Likewise.
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(md_parse_option): Likewise.
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(i386_target_format): Likewise.
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(check_byte_reg): Likewise.
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(check_long_reg): Likewise.
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(check_qword_reg): Likewise.
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(check_word_reg): Likewise.
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2011-04-12 19:47:38 +08:00
|
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|
2011-04-12 Nick Clifton <nickc@redhat.com>
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|
PR gas/12532
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* config/tc-arm.c (relax_branch): Do not relax branches to
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|
preemptable global symbols.
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|
2011-04-12 02:49:06 +08:00
|
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|
2011-04-11 Julian Brown <julian@codesourcery.com>
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* config/tc-arm.c (parse_psr): Add LHS argument. Improve support
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for *APSR bitmasks.
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(operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR.
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Remove OP_RVC_PSR.
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(parse_operands): Likewise.
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(do_mrs): Tweak error message for constraint.
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(do_t_mrs): Update constraints for changes to APSR support.
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(do_t_msr): Likewise. Don't set PSR_f flag here.
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|
(psrs): Remove "g", "nzcvq", "nzcvqg".
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(insns): Tweak entries for msr and mrs instructions.
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|
2011-04-12 02:45:12 +08:00
|
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|
|
2011-04-11 Kai Tietz <ktietz@redhat.com>
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* config/tc-i386.c (x86_cons): Initialize adjust with zero.
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2011-04-11 16:20:25 +08:00
|
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|
2011-04-11 Nick Clifton <nickc@redhat.com>
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|
2011-04-11 16:27:48 +08:00
|
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|
* config/tc-i386.c (x86_cons): Define even for non-ELF targets.
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|
* config/tc-i386.h (x86_cons): Always prototype.
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|
2011-04-11 16:20:25 +08:00
|
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|
* config/tc-cr16.c (getprocregp_image): Fix type of 'r' parameter
|
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|
|
in order to avoid a compile time warning.
|
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|
|
(getprocreg_image): Likewise.
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|
2011-04-11 12:52:01 +08:00
|
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|
2011-04-11 Alan Modra <amodra@gmail.com>
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|
* config/tc-cr16.c (getprocreg_image): Correct range check.
|
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|
|
(getprocregp_image): Likewise.
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|
|
bfd:
* config.bfd (thumb-*-oabi): Don't handle in list of obsolete
targets.
(strongarm*, thumb*, xscale*): Remove architectures.
(strongarm-*-kaos*, thumb-*-coff, thumb-*-elf, thumb-epoc-pe*,
thumb-*-pe*, strongarm-*-elf, strongarm-*-coff, xscale-*-elf,
xscale-*-coff): Remove targets.
binutils:
* configure.in (thumb-*-pe*): Remove.
* configure: Regenerate.
binutils/testsuite:
* binutils-all/objcopy.exp (*arm*-*-coff): Change to arm*-*-coff.
(xscale-*-coff, thumb*-*-coff, thumb*-*-pe): Don't handle.
gas:
* configure.tgt (strongarm*be, strongarm*b, strongarm*,
xscale*be|xscale*b, xscale*): Remove architectures.
(thumb-*-coff, thumb-*-rtems*, thumb-*-elf, thumb-epoc-pe,
thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets.
gas/testsuite:
* gas/all/gas.exp (*arm*-*-coff): Change to arm*-*-coff.
(thumb*-*-coff, thumb*-*-pe*): Don;t handle.
* gas/arm/arm.exp (*arm*-*-*): Change to arm*-*-*.
(*xscale*-*-*): Don't handle.
* gas/cfi/cfi.exp (xscale*-*): Don't handle.
* gas/elf/elf.exp (*arm*-*-*): Change to arm*-*-*.
(xscale*-*-*): Don't handle.
ld:
* configure.tgt (thumb-*-linux-* | thumb-*-uclinux*,
strongarm-*-coff, strongarm-*-elf, strongarm-*-kaos*,
thumb-*-coff, thumb-*-elf, thumb-epoc-pe, thumb-*-pe,
xscale-*-coff, xscale-*-elf): Remove targets.
ld/testsuite:
* ld-selective/selective.exp (xscale-*-*): Don't handle.
* ld-srec/srec.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't
handle.
(*arm*-*-*): Change to arm*-*-*.
(strongarm*-*-coff, xscale*-*-coff, thumb-*-coff*, thumb-*-pe*,
thumb-*-elf*, strongarm*-*-*, thumb-*-*): Remove xfails.
* ld-undefined/undefined.exp (thumb*-*-pe*, thumb*-*-pe*): Remove
commented-out xfails.
(thumb-elf): Remove reference in comment.
* lib/ld-lib.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't
handle.
2011-04-07 01:09:56 +08:00
|
|
|
|
2011-04-06 Joseph Myers <joseph@codesourcery.com>
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|
|
* configure.tgt (strongarm*be, strongarm*b, strongarm*,
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|
|
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|
|
xscale*be|xscale*b, xscale*): Remove architectures.
|
|
|
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|
|
(thumb-*-coff, thumb-*-rtems*, thumb-*-elf, thumb-epoc-pe,
|
|
|
|
|
|
thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets.
|
|
|
|
|
|
|
2011-04-01 16:56:21 +08:00
|
|
|
|
2011-04-01 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
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|
|
* config/tc-ia64.c (md_apply_fix): Add a cast to avoid a warning.
|
|
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|
|
include/elf/
* tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE,
R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs.
(SHN_TIC6X_SCOMMON): Define.
bfd/
* elf32-tic6x.h (struct elf32_tic6x_params): New.
(elf32_tic6x_setup): Declare.
* elf32-tic6x.c: Include <limits.h>.
(ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define.
(struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry):
New structures.
(elf32_tic6x_link_hash_table, is_tic6x_elf): New macros.
(tic6x_elf_scom_section, tic6x_elf_scom_symbol,
tic6x_elf_scom_symbol_ptr): New static variables.
(elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel,
elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE,
R_C6000_PCR_H16 and R_C6000_PCR_L16.
(elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create,
elf32_tic6x_link_hash_table_free, elf32_tic6x_setup,
elf32_tic6x_using_dsbt, elf32_tic6x_install_rela,
elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc,
elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook,
elf32_tic6x_adjust_dynamic_symbol): New static functions.
(elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches
to weak symbols as required by the ABI.
Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file
as needed when generating DSBT output.
(elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook,
elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section,
elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections,
elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers,
elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val,
elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym):
New static functions.
(ELF_MAXPAGESIZE): Define to 0x1000.
(bfd_elf32_bfd_copy_private_bfd_data,
bfd_elf32_bfd_link_hash_table_create,
bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount,
elf_backend_want_got_plt, elf_backend_want_dynbss,
elf_backend_plt_readonly, elf_backend_got_header_size,
elf_backend_gc_sweep_hook, elf_backend_modify_program_headers,
elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol,
elf_backend_check_relocs, elf_backend_add_symbol_hook,
elf_backend_symbol_processing, elf_backend_link_output_symbol_hook,
elf_backend_section_from_bfd_section,
elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections,
elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections,
elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define.
* bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE,
BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add.
* bfd/bfd-in2.h: Regenerate.
* bfd/libbfd.h: Regenerate.
* config.bfd: Accept tic6x-*-* instead of tic6x-*-elf.
gas/
* config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New
static variables.
(md_begin): Initialize them.
(s_tic6x_scomm): New static function.
(md_pseudo_table): Add "scomm".
(tc_gen_reloc): Really undo all adjustments made by
bfd_install_relocation.
* doc/c-tic6x.texi: Document the .scomm directive.
gas/testsuite/
* gas/tic6x/scomm-directive-1.s: New test.
* gas/tic6x/scomm-directive-1.d: New test.
* gas/tic6x/scomm-directive-2.s: New test.
* gas/tic6x/scomm-directive-2.d: New test.
* gas/tic6x/scomm-directive-3.s: New test.
* gas/tic6x/scomm-directive-3.d: New test.
* gas/tic6x/scomm-directive-4.s: New test.
* gas/tic6x/scomm-directive-4.d: New test.
* gas/tic6x/scomm-directive-5.s: New test.
* gas/tic6x/scomm-directive-5.d: New test.
* gas/tic6x/scomm-directive-6.s: New test.
* gas/tic6x/scomm-directive-6.d: New test.
* gas/tic6x/scomm-directive-7.s: New test.
* gas/tic6x/scomm-directive-7.d: New test.
* gas/tic6x/scomm-directive-8.s: New test.
* gas/tic6x/scomm-directive-8.d: New test.
ld/
* emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE,
GENERATE_SHLIB_SCRIPT): New defines.
(TEXT_START_ADDR): Define differently depending on target.
(.got): Redefine to include "*(.dsbt)".
(SDATA_START_SYMBOLS): Remove, replace with
(OTHER_GOT_SYMBOLS): New.
(OTHER_BSS_SECTIONS): Define only for ELF targets.
* emultempl/tic6xdsbt.em: New file.
* gen-doc.texi: Set C6X.
* ld.texinfo: Likewise.
(Options specific to C6X uClinux targets): New section.
binutils/
* readelf.c (get_symbol_index_type): Handle SCOM for TIC6X.
(dump_relocations): Likewise.
binutils/testsuite/
* lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*.
ld/testsuite/
* ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*.
* ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining
pagesize to 1.
* ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable
linking tests.
* ld-tic6x/dsbt.ld: New linker script.
* ld-tic6x/dsbt-be.ld: New linker script.
* ld-tic6x/dsbt-overflow.ld: New linker script.
* ld-tic6x/dsbt-inrange.ld: New linker script.
* ld-tic6x/shlib-1.s: New test.
* ld-tic6x/shlib-2.s: New test.
* ld-tic6x/shlib-app-1r.s: New test.
* ld-tic6x/shlib-app-1.s: New test.
* ld-tic6x/shlib-1.sd: New test.
* ld-tic6x/shlib-1.dd: New test.
* ld-tic6x/shlib-app-1.rd: New test.
* ld-tic6x/shlib-app-1rb.rd: New test.
* ld-tic6x/shlib-app-1.sd: New test.
* ld-tic6x/static-app-1rb.od: New test.
* ld-tic6x/shlib-app-1.dd: New test.
* ld-tic6x/shlib-app-1rb.sd: New test.
* ld-tic6x/static-app-1b.od: New test.
* ld-tic6x/static-app-1r.od: New test.
* ld-tic6x/shlib-1rb.rd: New test.
* ld-tic6x/shlib-app-1rb.dd: New test.
* ld-tic6x/shlib-1rb.sd: New test.
* ld-tic6x/shlib-1rb.dd: New test.
* ld-tic6x/shlib-app-1b.od: New test.
* ld-tic6x/tic6x.exp: New test.
* ld-tic6x/static-app-1rb.rd: New test.
* ld-tic6x/shlib-app-1r.od: New test.
* ld-tic6x/static-app-1.od: New test.
* ld-tic6x/static-app-1b.rd: New test.
* ld-tic6x/static-app-1r.rd: New test.
* ld-tic6x/static-app-1rb.sd: New test.
* ld-tic6x/static-app-1b.sd: New test.
* ld-tic6x/static-app-1rb.dd: New test.
* ld-tic6x/static-app-1r.sd: New test.
* ld-tic6x/static-app-1b.dd: New test.
* ld-tic6x/shlib-1b.rd: New test.
* ld-tic6x/static-app-1r.dd: New test.
* ld-tic6x/shlib-app-1b.rd: New test.
* ld-tic6x/shlib-1r.rd: New test.
* ld-tic6x/shlib-app-1r.rd: New test.
* ld-tic6x/shlib-1b.sd: New test.
* ld-tic6x/static-app-1.rd: New test.
* ld-tic6x/shlib-app-1b.sd: New test.
* ld-tic6x/shlib-1r.sd: New test.
* ld-tic6x/shlib-1b.dd: New test.
* ld-tic6x/shlib-app-1r.sd: New test.
* ld-tic6x/shlib-app-1b.dd: New test.
* ld-tic6x/shlib-1r.dd: New test.
* ld-tic6x/static-app-1.sd: New test.
* ld-tic6x/shlib-app-1r.dd: New test.
* ld-tic6x/static-app-1.dd: New test.
* ld-tic6x/shlib-noindex.rd: New test.
* ld-tic6x/shlib-noindex.dd: New test.
* ld-tic6x/shlib-noindex.sd: New test.
* ld-tic6x/got-reloc-local-1.s: New test.
* ld-tic6x/got-reloc-local-2.s: New test.
* ld-tic6x/got-reloc-local-r.d: New test.
* ld-tic6x/got-reloc-global.s: New test.
* ld-tic6x/got-reloc-global-addend-1.d: New test.
* ld-tic6x/got-reloc-global-addend-1.s: New test.
* ld-tic6x/got-reloc-global-addend-2.d: New test.
* ld-tic6x/got-reloc-inrange.d: New test.
* ld-tic6x/got-reloc-overflow.d: New test.
* ld-tic6x/got-reloc-global-addend-2.s: New test.
* ld-tic6x/dsbt-index-error.d: New test.
* ld-tic6x/dsbt-index.d: New test.
* ld-tic6x/dsbt-index.s: New test.
* ld-tic6x/shlib-app-1.od: New test.
* ld-tic6x/shlib-app-1rb.od: New test.
* ld-tic6x/shlib-1.rd: New test.
* ld-tic6x/weak.d: New test.
* ld-tic6x/weak-be.d: New test.
* ld-tic6x/weak.s: New test.
* ld-tic6x/weak-data.d: New test.
* ld-tic6x/common.d: New test.
* ld-tic6x/common.ld: New test.
* ld-tic6x/common.s: New test.
2011-03-31 16:58:28 +08:00
|
|
|
|
2011-03-31 Bernd Schmidt <bernds@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New
|
|
|
|
|
|
static variables.
|
|
|
|
|
|
(md_begin): Initialize them.
|
|
|
|
|
|
(s_tic6x_scomm): New static function.
|
|
|
|
|
|
(md_pseudo_table): Add "scomm".
|
|
|
|
|
|
(tc_gen_reloc): Really undo all adjustments made by
|
|
|
|
|
|
bfd_install_relocation.
|
|
|
|
|
|
* doc/c-tic6x.texi: Document the .scomm directive.
|
|
|
|
|
|
|
2011-03-31 16:02:41 +08:00
|
|
|
|
2011-03-31 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dwarf2dbg.c (DWARF2_VERSION): Define.
|
|
|
|
|
|
(out_debug_line): Use it.
|
|
|
|
|
|
(out_debug_aranges): Ditto.
|
|
|
|
|
|
(out_debug_info): Ditto.
|
|
|
|
|
|
* config/tc-ia64.h (DWARF2_VERSION): Override it.
|
|
|
|
|
|
|
2011-03-30 23:06:51 +08:00
|
|
|
|
2011-03-30 Michael Snyder <msnyder@vmware.com>
|
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|
|
|
|
|
|
|
|
|
* obj-elf.c (obj_elf_section): Free malloced name.
|
2011-03-30 23:10:37 +08:00
|
|
|
|
* macro.c (get_any_string): Free malloced br_buf.
|
|
|
|
|
|
(do_formals): Free 'formal'.
|
2011-03-30 23:06:51 +08:00
|
|
|
|
|
2011-03-30 20:43:35 +08:00
|
|
|
|
2011-03-30 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (ppc_frob_symbol): Convert stsym symbols value
|
|
|
|
|
|
to offset only if within is set.
|
|
|
|
|
|
(ppc_stabx): Reformat. For stsym stabs, add a check and set
|
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|
|
within only for symbols.
|
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|
|
2011-03-30 02:16:16 +08:00
|
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|
|
2011-03-29 Richard Henderson <rth@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 12610
|
|
|
|
|
|
* config/tc-alpha.c (s_alpha_align): Don't auto-align a previous
|
|
|
|
|
|
label; zap alpha_insn_label.
|
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|
|
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|
|
2011-03-29 20:40:51 +08:00
|
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|
|
2011-03-29 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (handle_quad): Properly handle multiple
|
|
|
|
|
|
operands.
|
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|
|
2011-03-29 13:54:41 +08:00
|
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|
|
2011-03-29 Mike Frysinger <vapier@gentoo.org>
|
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|
|
|
|
|
|
|
|
|
|
* config/bfin-parse.y (BYTEUNPACK): Return yyerror when dest
|
|
|
|
|
|
reg $2 is the same as dest reg $4.
|
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|
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|
|
2011-03-29 13:51:22 +08:00
|
|
|
|
2011-03-29 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/bfin-parse.y (BYTEOP16M): Return yyerror when dest
|
|
|
|
|
|
reg $2 is the same as dest reg $4.
|
|
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|
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|
|
2011-03-29 13:44:56 +08:00
|
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|
|
2011-03-29 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/bfin-parse.y (BYTEOP16P): Return yyerror when dest
|
|
|
|
|
|
reg $2 is the same as dest reg $4.
|
|
|
|
|
|
|
2011-03-29 09:25:13 +08:00
|
|
|
|
2011-03-28 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/bfin-parse.y (16bit acc add): Return yyerror when dest
|
|
|
|
|
|
reg $1 is the same as dest reg $7.
|
|
|
|
|
|
|
2011-03-29 06:47:59 +08:00
|
|
|
|
2011-03-28 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (handle_quad): New.
|
|
|
|
|
|
(md_pseudo_table): Add "quad".
|
|
|
|
|
|
|
2011-03-28 19:18:27 +08:00
|
|
|
|
2011-03-26 John Marino <binutils@marino.st>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Fix support for *-*-dragonfly*.
|
|
|
|
|
|
* config/tc-i386.c: define SVR4_COMMENT_CHARS for dragonfly.
|
|
|
|
|
|
* config/te-dragonfly.h: New file.
|
|
|
|
|
|
|
2011-03-25 01:03:03 +08:00
|
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|
|
2011-03-24 Eric B. Weddington <eric.weddington@atmel.com>
|
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|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add new devices: atmega325pa,
|
|
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|
|
|
atmega3250pa, atmega3290pa, atmega16hvbrevb, atmega32hvbrevb,
|
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|
|
at90pwm161.
|
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|
|
* doc/c-avr.texi: Document new device names.
|
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|
2011-03-24 14:17:47 +08:00
|
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|
|
2011-03-24 Mike Frysinger <vapier@gentoo.org>
|
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|
|
* config/bfin-parse.y (dual 32bit add/sub): Return yyerror when dest
|
|
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|
|
reg $1 is the same as dest reg $7.
|
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|
(quad 16bit add/sub): Return yyerror when dest reg $1 is the same as
|
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|
|
dest reg $7.
|
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|
2011-03-24 12:25:25 +08:00
|
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|
|
2011-03-24 Mike Frysinger <vapier@gentoo.org>
|
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|
|
* config/bfin-parse.y (check_macfuncs): Clarify error message when
|
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|
|
P is mismatched. Check destination regno are off by one when P is
|
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|
|
|
set, or are equal when P is not set.
|
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|
2011-03-24 12:20:10 +08:00
|
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|
|
2011-03-23 Mike Frysinger <vapier@gentoo.org>
|
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|
|
* config/bfin-parse.y (SEARCH): Return yyerror when dest reg $2 is
|
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|
|
the same as dest reg $4.
|
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|
(BITMUX): Return yyerror when dest reg $3 is the same as dest reg $5.
|
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|
2011-03-23 23:02:06 +08:00
|
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|
|
2011-03-23 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (mcu_types): Add new xmega devices: atxmega64a1u,
|
|
|
|
|
|
atxmega128a1u, atxmega16x1, atxmega32x1, atxmega128b1, atxmega256a3bu.
|
|
|
|
|
|
* doc/c-avr.texi: Document new device names.
|
|
|
|
|
|
|
2011-03-23 02:10:48 +08:00
|
|
|
|
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
|
|
|
|
|
|
(AVR_INSN): Change definition to match.
|
|
|
|
|
|
(avr_opcodes): Likewise, change to match.
|
|
|
|
|
|
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
|
|
|
|
|
|
(md_show_usage): Add XMEGA architecture names.
|
|
|
|
|
|
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
|
|
|
|
|
|
Add support for SPM Z+ instruction.
|
|
|
|
|
|
* doc/c-avr.texi: Add documentation for XMEGA architectures and
|
|
|
|
|
|
devices.
|
|
|
|
|
|
|
2011-03-22 04:25:56 +08:00
|
|
|
|
2011-03-21 Eric B. Weddington <eric.weddington@atmel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-avr.c (md_show_usage): Add "Assembler" text to output.
|
|
|
|
|
|
|
2011-03-18 19:21:33 +08:00
|
|
|
|
2011-03-18 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-elf.c (elf_frob_symbol): Report S_SET_SIZE symbol
|
|
|
|
|
|
on .size expression errors rather than symbols in the size expression.
|
|
|
|
|
|
|
2011-03-18 19:16:28 +08:00
|
|
|
|
2011-03-18 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* input-scrub.c (line_numberT): Delete.
|
|
|
|
|
|
(input_scrub_close): Reset line counters.
|
|
|
|
|
|
* messages.c (as_show_where): Don't print invalid line number.
|
|
|
|
|
|
(as_warn_internal, as_bad_internal): Likewise.
|
|
|
|
|
|
|
2011-03-18 18:46:52 +08:00
|
|
|
|
2011-03-18 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* read.c (read_a_source_file): Remove md_after_pass_hook.
|
|
|
|
|
|
Move "quit" label before set of dot_symbol.
|
|
|
|
|
|
* config/tc-d10v.h (md_after_pass_hook): Don't define.
|
|
|
|
|
|
* config/tc-d30v.h (md_after_pass_hook): Likewise.
|
|
|
|
|
|
* config/tc-m32r.h (md_after_pass_hook): Likewise.
|
|
|
|
|
|
(md_cleanup): Define to call m32r_fill_insn.
|
|
|
|
|
|
|
2011-03-18 17:54:58 +08:00
|
|
|
|
2011-03-18 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (md_parse_option): Add -march=all option which
|
|
|
|
|
|
switches to the highest available CPU.
|
|
|
|
|
|
|
2011-03-17 18:59:29 +08:00
|
|
|
|
2011-03-17 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 12569
|
|
|
|
|
|
* expr.c (operand): Correct passing of "mode" to expr.
|
|
|
|
|
|
* read.c (do_org): Allow expr_section.
|
|
|
|
|
|
(get_known_segmented_expression): Don't assert anything about the
|
|
|
|
|
|
segment.
|
|
|
|
|
|
|
2011-03-16 20:58:26 +08:00
|
|
|
|
2011-03-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* as.c (show_usage): Add --size-check=.
|
|
|
|
|
|
(parse_args): Add and handle OPTION_SIZE_CHECK.
|
|
|
|
|
|
|
|
|
|
|
|
* as.h (flag_size_check): New.
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-elf.c (elf_frob_symbol): Use as_bad to report
|
|
|
|
|
|
bad .size directive only for --size-check=error.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo: Document --size-check=.
|
|
|
|
|
|
|
2011-03-15 08:17:00 +08:00
|
|
|
|
2011-03-14 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-bfin.c (bfin_cpus[]): Add 0.4 for
|
|
|
|
|
|
bf542/bf544/bf547/bf548/bf549.
|
|
|
|
|
|
|
include/elf/
* arm.h (R_ARM_IRELATIVE): New relocation.
bfd/
* reloc.c (BFD_RELOC_ARM_IRELATIVE): New relocation.
* bfd-in2.h: Regenerate.
* elf32-arm.c (elf32_arm_howto_table_2): Rename existing definition
to elf32_arm_howto_table_3 and replace with a single R_ARM_IRELATIVE
entry.
(elf32_arm_howto_from_type): Update accordingly.
(elf32_arm_reloc_map): Map BFD_RELOC_ARM_IRELATIVE to R_ARM_IRELATIVE.
(elf32_arm_reloc_name_lookup): Handle elf32_arm_howto_table_3.
(arm_plt_info): New structure, split out from elf32_arm_link_hash_entry
with an extra noncall_refcount field.
(arm_local_iplt_info): New structure.
(elf_arm_obj_tdata): Add local_iplt.
(elf32_arm_local_iplt): New accessor macro.
(elf32_arm_link_hash_entry): Replace plt_thumb_refcount,
plt_maybe_thumb_refcount and plt_got_offset with an arm_plt_info.
Change tls_type to a bitfield and add is_iplt.
(elf32_arm_link_hash_newfunc): Update accordingly.
(elf32_arm_allocate_local_sym_info): New function.
(elf32_arm_create_local_iplt): Likewise.
(elf32_arm_get_plt_info): Likewise.
(elf32_arm_plt_needs_thumb_stub_p): Likewise.
(elf32_arm_get_local_dynreloc_list): Likewise.
(create_ifunc_sections): Likewise.
(elf32_arm_copy_indirect_symbol): Update after the changes to
elf32_arm_link_hash_entry. Assert the is_iplt has not yet been set.
(arm_type_of_stub): Add an st_type argument. Use elf32_arm_get_plt_info
to get PLT information. Assert that all STT_GNU_IFUNC references
are turned into PLT references.
(arm_build_one_stub): Pass the symbol type to
elf32_arm_final_link_relocate.
(elf32_arm_size_stubs): Pass the symbol type to arm_type_of_stub.
(elf32_arm_allocate_irelocs): New function.
(elf32_arm_add_dynreloc): In static objects, use .rel.iplt for
all R_ARM_IRELATIVE.
(elf32_arm_allocate_plt_entry): New function.
(elf32_arm_populate_plt_entry): Likewise.
(elf32_arm_final_link_relocate): Add an st_type parameter.
Set srelgot to null for static objects. Use separate variables
to record which st_value and st_type should be used when generating
a dynamic relocation. Use elf32_arm_get_plt_info to find the
symbol's PLT information, setting has_iplt_entry, splt,
plt_offset and gotplt_offset accordingly. Check whether
STT_GNU_IFUNC symbols should resolve to an .iplt entry, and change
the relocation target accordingly. Broaden assert to include
.iplts. Don't set sreloc for static relocations. Assert that
we only generate dynamic R_ARM_RELATIVE relocations for R_ARM_ABS32
and R_ARM_ABS32_NOI. Generate R_ARM_IRELATIVE relocations instead
of R_ARM_RELATIVE relocations if the target is an STT_GNU_IFUNC
symbol. Pass the symbol type to arm_type_of_stub. Conditionally
resolve GOT references to the .igot.plt entry.
(elf32_arm_relocate_section): Update the call to
elf32_arm_final_link_relocate.
(elf32_arm_gc_sweep_hook): Use elf32_arm_get_plt_info to get PLT
information. Treat R_ARM_REL32 and R_ARM_REL32_NOI as call
relocations in shared libraries and relocatable executables.
Count non-call PLT references. Use elf32_arm_get_local_dynreloc_list
to get the list of dynamic relocations for a local symbol.
(elf32_arm_check_relocs): Always create ifunc sections. Set isym
at the same time as setting h. Use elf32_arm_allocate_local_sym_info
to allocate local symbol information. Treat R_ARM_REL32 and
R_ARM_REL32_NOI as call relocations in shared libraries and
relocatable executables. Record PLT information for local
STT_GNU_IFUNC functions as well as global functions. Count
non-call PLT references. Use elf32_arm_get_local_dynreloc_list
to get the list of dynamic relocations for a local symbol.
(elf32_arm_adjust_dynamic_symbol): Handle STT_GNU_IFUNC symbols.
Don't remove STT_GNU_IFUNC PLTs unless all references have been
removed. Update after the changes to elf32_arm_link_hash_entry.
(allocate_dynrelocs_for_symbol): Decide whether STT_GNU_IFUNC PLT
entries should live in .plt or .iplt. Check whether the .igot.plt
and .got entries can be combined. Use elf32_arm_allocate_plt_entry
to allocate .plt and .(i)got.plt entries. Detect which .got
entries will need R_ARM_IRELATIVE relocations and use
elf32_arm_allocate_irelocs to allocate them. Likewise other
non-.got dynamic relocations.
(elf32_arm_size_dynamic_sections): Allocate .iplt, .igot.plt
and dynamic relocations for local STT_GNU_IFUNC symbols.
Check whether the .igot.plt and .got entries can be combined.
Detect which .got entries will need R_ARM_IRELATIVE relocations
and use elf32_arm_allocate_irelocs to allocate them. Use stashed
section pointers intead of strcmp checks. Handle iplt and igotplt.
(elf32_arm_finish_dynamic_symbol): Use elf32_arm_populate_plt_entry
to fill in .plt, .got.plt and .rel(a).plt entries. Point
STT_GNU_IFUNC symbols at an .iplt entry if non-call relocations
resolve to it.
(elf32_arm_output_plt_map_1): New function, split out from
elf32_arm_output_plt_map. Handle .iplt entries. Use
elf32_arm_plt_needs_thumb_stub_p.
(elf32_arm_output_plt_map): Call it.
(elf32_arm_output_arch_local_syms): Add mapping symbols for
local .iplt entries.
(elf32_arm_swap_symbol_in): Handle Thumb STT_GNU_IFUNC symbols.
(elf32_arm_swap_symbol_out): Likewise.
(elf32_arm_add_symbol_hook): New function.
(elf_backend_add_symbol_hook): Define for all targets.
opcodes/
* arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
gas/
* config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to
determine whether a relocation is needed.
(md_apply_fix, arm_apply_sym_value): Likewise.
ld/testsuite/
* ld-arm/ifunc-1.s, ld-arm/ifunc-1.dd, ld-arm/ifunc-1.gd,
ld-arm/ifunc-1.rd, ld-arm/ifunc-2.s, ld-arm/ifunc-2.dd,
ld-arm/ifunc-2.gd, ld-arm/ifunc-2.rd, ld-arm/ifunc-3.s,
ld-arm/ifunc-3.dd, ld-arm/ifunc-3.gd, ld-arm/ifunc-3.rd,
ld-arm/ifunc-4.s, ld-arm/ifunc-4.dd, ld-arm/ifunc-4.gd,
ld-arm/ifunc-4.rd, ld-arm/ifunc-5.s, ld-arm/ifunc-5.dd,
ld-arm/ifunc-5.gd, ld-arm/ifunc-5.rd, ld-arm/ifunc-6.s,
ld-arm/ifunc-6.dd, ld-arm/ifunc-6.gd, ld-arm/ifunc-6.rd,
ld-arm/ifunc-7.s, ld-arm/ifunc-7.dd, ld-arm/ifunc-7.gd,
ld-arm/ifunc-7.rd, ld-arm/ifunc-8.s, ld-arm/ifunc-8.dd,
ld-arm/ifunc-8.gd, ld-arm/ifunc-8.rd, ld-arm/ifunc-9.s,
ld-arm/ifunc-9.dd, ld-arm/ifunc-9.gd, ld-arm/ifunc-9.rd,
ld-arm/ifunc-10.s, ld-arm/ifunc-10.dd, ld-arm/ifunc-10.gd,
ld-arm/ifunc-10.rd, ld-arm/ifunc-11.s, ld-arm/ifunc-11.dd,
ld-arm/ifunc-11.gd, ld-arm/ifunc-11.rd, ld-arm/ifunc-12.s,
ld-arm/ifunc-12.dd, ld-arm/ifunc-12.gd, ld-arm/ifunc-12.rd,
ld-arm/ifunc-13.s, ld-arm/ifunc-13.dd, ld-arm/ifunc-13.gd,
ld-arm/ifunc-13.rd, ld-arm/ifunc-14.s, ld-arm/ifunc-14.dd,
ld-arm/ifunc-14.gd, ld-arm/ifunc-14.rd, ld-arm/ifunc-15.s,
ld-arm/ifunc-15.dd, ld-arm/ifunc-15.gd, ld-arm/ifunc-15.rd,
ld-arm/ifunc-16.s, ld-arm/ifunc-16.dd, ld-arm/ifunc-16.gd,
ld-arm/ifunc-16.rd, ld-arm/ifunc-dynamic.ld,
ld-arm/ifunc-static.ld: New tests.
* ld-arm/farcall-group.d, ld-arm/farcall-group-size2.d,
ld-arm/farcall-mixed-lib-v4t.d, ld-arm/farcall-mixed-lib.d: Update
for new stub hashes.
* ld-arm/arm-elf.exp: Run them.
2011-03-15 00:04:16 +08:00
|
|
|
|
2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to
|
|
|
|
|
|
determine whether a relocation is needed.
|
|
|
|
|
|
(md_apply_fix, arm_apply_sym_value): Likewise.
|
|
|
|
|
|
|
2011-03-14 23:55:04 +08:00
|
|
|
|
2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_adjust_symtab): Set the branch type
|
|
|
|
|
|
for Thumb symbols.
|
|
|
|
|
|
|
2011-03-11 22:18:24 +08:00
|
|
|
|
2011-03-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* remap.c (remap_debug_filename): Always allocate a buffer for the
|
|
|
|
|
|
returned pointer.
|
|
|
|
|
|
* stabs.c (stabs_generate_asm_file): Free the pointer returned by
|
|
|
|
|
|
remap_debug_filename.
|
|
|
|
|
|
|
2011-03-11 02:26:28 +08:00
|
|
|
|
2011-03-10 Michael Snyder <msnyder@vmware.com>
|
|
|
|
|
|
|
|
|
|
|
|
Revert the following change:
|
|
|
|
|
|
* dwarf2dbg.c (out_file_list): Free malloced 'dir'.
|
|
|
|
|
|
(out_debug_info): Free malloced 'dirname' and 'comp_dir'.
|
|
|
|
|
|
|
2011-03-10 18:06:05 +08:00
|
|
|
|
2011-03-10 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS,
|
|
|
|
|
|
TARGET_SYMBOL_FIELDS): Don't define.
|
|
|
|
|
|
* gas/config/tc-arc.c (arc_common): Use correct symbol "local" field.
|
|
|
|
|
|
|
2011-03-10 08:52:09 +08:00
|
|
|
|
2011-03-09 Michael Snyder <msnyder@vmware.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dwarf2dbg.c (out_file_list): Free malloced 'dir'.
|
|
|
|
|
|
(out_debug_info): Free malloced 'dirname' and 'comp_dir'.
|
2011-03-11 02:26:28 +08:00
|
|
|
|
(emit_fixed_inc_line_addr): Assign instead of conditional in
|
|
|
|
|
|
assert.
|
2011-03-10 08:52:09 +08:00
|
|
|
|
|
2011-03-06 22:05:25 +08:00
|
|
|
|
2011-03-05 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-elf.c (elf_frob_symbol): Mention symbol name in
|
|
|
|
|
|
non-constant .size expression.
|
|
|
|
|
|
|
2011-03-03 01:23:09 +08:00
|
|
|
|
2011-03-02 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* ecoff.c: Incldue filenames.h
|
|
|
|
|
|
|
2011-03-01 02:32:52 +08:00
|
|
|
|
2011-02-28 Kai Tietz <kai.tietz@onevision.com>
|
|
|
|
|
|
|
|
|
|
|
|
* depend.c (register_dependency): Use filename_(n)cmp.
|
|
|
|
|
|
* dwarf2dbg.c (get_filenum): Likewise.
|
|
|
|
|
|
* ecoff.c (add_file): Likewise.
|
|
|
|
|
|
(ecoff_generate_asm_lineno): Likewise.
|
|
|
|
|
|
* input-scrub.c (new_logical_line_flags): Likewise.
|
|
|
|
|
|
* listing.c (file_info): Likewise.
|
|
|
|
|
|
(listing_newline): Likewise.
|
|
|
|
|
|
* remap.c (remap_debug_filename): Likewise.
|
|
|
|
|
|
* stabs.c (generate_asm_file): Likewise.
|
|
|
|
|
|
(stabs_generate_asm_lineno): Likewise.
|
|
|
|
|
|
|
2011-03-01 00:26:46 +08:00
|
|
|
|
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (append_insn): Disable branch relaxation for
|
|
|
|
|
|
DSP instructions.
|
|
|
|
|
|
|
2011-03-01 00:06:51 +08:00
|
|
|
|
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (macro): Handle M_PREF_AB.
|
|
|
|
|
|
|
2011-02-28 23:52:26 +08:00
|
|
|
|
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary
|
|
|
|
|
|
register to use.
|
|
|
|
|
|
(RELAX_BRANCH_UNCOND): Adjust accordingly.
|
|
|
|
|
|
(RELAX_BRANCH_LIKELY): Likewise.
|
|
|
|
|
|
(RELAX_BRANCH_LINK): Likewise.
|
|
|
|
|
|
(RELAX_BRANCH_TOOFAR): Likewise.
|
|
|
|
|
|
(RELAX_BRANCH_AT): New macro.
|
|
|
|
|
|
(append_insn): Encode the temporary register to use in standard
|
|
|
|
|
|
MIPS branch relaxation.
|
|
|
|
|
|
(relaxed_branch_length): Update according to changes to
|
|
|
|
|
|
RELAX_BRANCH_ENCODE.
|
|
|
|
|
|
(md_convert_frag): Use the encoded register as the temporary.
|
|
|
|
|
|
|
2011-02-28 23:44:53 +08:00
|
|
|
|
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_fix_adjustable): On REL targets also
|
|
|
|
|
|
reject PC-relative relocations.
|
|
|
|
|
|
|
2011-02-28 23:33:25 +08:00
|
|
|
|
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (md_convert_frag): Correct message
|
|
|
|
|
|
capitalization.
|
|
|
|
|
|
|
2011-02-28 12:45:59 +08:00
|
|
|
|
2011-02-28 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* symbols.c (report_op_error): Remove unnecessary forward declaration.
|
|
|
|
|
|
Add "op" parameter. Report operator and operand segments in error
|
|
|
|
|
|
message, not operand symbols.
|
|
|
|
|
|
(resolve_symbol_value): Always set segment for equated symbols, not
|
|
|
|
|
|
just when finalizing. Adjust report_op_error calls.
|
|
|
|
|
|
|
2011-02-26 03:19:45 +08:00
|
|
|
|
2011-02-25 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
2011-02-26 03:20:58 +08:00
|
|
|
|
* config/tc-i386.c (reloc): Don't sign-check 4-byte relocations
|
|
|
|
|
|
if 64bit relocations aren't allowed.
|
2011-02-26 03:19:45 +08:00
|
|
|
|
|
2011-02-25 21:45:54 +08:00
|
|
|
|
2011-02-25 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12519
|
|
|
|
|
|
* config/obj-elf.c (elf_frob_symbol): Properly handle size expression.
|
|
|
|
|
|
|
2011-02-22 07:27:02 +08:00
|
|
|
|
2011-02-21 Maciej W. Rozycki <macro@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_ip) <'o'>: Remove duplicate
|
|
|
|
|
|
initialization of offset_reloc.
|
|
|
|
|
|
|
2011-02-16 02:01:07 +08:00
|
|
|
|
2011-02-15 Richard Henderson <rth@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* dw2gencfi.c (dot_cfi_dummy): New.
|
|
|
|
|
|
(cfi_pseudo_table) [!TARGET_USE_CFIPOP]: New.
|
|
|
|
|
|
* read.c (pobegin): Unconditionally call cfi_pop_insert.
|
|
|
|
|
|
|
2011-02-14 05:00:14 +08:00
|
|
|
|
2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
|
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2011-02-14 02:53:16 +08:00
|
|
|
|
2011-02-13 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/bfin-lex.l (BYTEOP2M): Remove tokenization.
|
|
|
|
|
|
* config/bfin-parse.y (BYTEOP2M): Delete token.
|
|
|
|
|
|
(asm_1): Remove BYTEOP2M insn matching.
|
|
|
|
|
|
|
2011-02-13 03:36:31 +08:00
|
|
|
|
2011-02-12 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/bfin-defs.h: Include opcode/bfin.h.
|
|
|
|
|
|
(M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH, M_IU): Delete.
|
|
|
|
|
|
|
2011-02-12 03:05:30 +08:00
|
|
|
|
2011-02-11 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-bfin.texi (Instruction Delimiting): Fix occur typo.
|
|
|
|
|
|
(Modify Registers): Fix subtracted typo.
|
|
|
|
|
|
(.byte2): Extend and swap descriptions with .byte4.
|
|
|
|
|
|
(.byte4): Extend and swap descriptions with .byte2.
|
|
|
|
|
|
(.db, .dw, .dd): Document behavior.
|
|
|
|
|
|
|
2011-02-12 03:04:33 +08:00
|
|
|
|
2011-02-11 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/bfin-parse.y (TESTSET): Reject REG_SP and REG_FP.
|
|
|
|
|
|
|
2011-02-11 06:50:09 +08:00
|
|
|
|
2011-02-11 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-ppc.texi (PowerPC-Opts <-nops>): Clarify.
|
|
|
|
|
|
|
2011-02-10 20:29:23 +08:00
|
|
|
|
2011-02-10 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (Overview): Add missing markup around Blackfin
|
|
|
|
|
|
and PowerPC options.
|
|
|
|
|
|
|
2011-02-10 19:59:12 +08:00
|
|
|
|
2011-02-10 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (md_show_usage): Remove -l and -b. Add -K PIC.
|
|
|
|
|
|
* doc/as.texinfo: Refer to and include c-ppc.texi for PowerPC options.
|
|
|
|
|
|
(Overview <Target PowerPC options>): Add a number of missing options.
|
|
|
|
|
|
* doc/c-ppc.texi: Likewise. Add markup for use in manpage generation.
|
|
|
|
|
|
|
2011-02-09 04:21:26 +08:00
|
|
|
|
2011-02-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/6957
|
|
|
|
|
|
* config/tc-i386.c (i386_align_code): Use f32_patt when tuning
|
|
|
|
|
|
for i686.
|
|
|
|
|
|
|
2011-02-09 02:12:25 +08:00
|
|
|
|
2011-02-08 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (set_cpu_arch): Also update cpu_arch_isa_flags
|
|
|
|
|
|
for ISA extensions.
|
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
|
|
2011-02-04 07:20:26 +08:00
|
|
|
|
2011-02-04 Bernd Schmidt <bernds@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texinfo (Target TIC6X options): Don't mention "-matomic".
|
|
|
|
|
|
* doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic".
|
|
|
|
|
|
(TIC6X Options): Don't mention "-matomic".
|
|
|
|
|
|
* config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete.
|
|
|
|
|
|
(md_longopts): Remove corresponding entries.
|
|
|
|
|
|
(md_parse_option): Don't handle them.
|
|
|
|
|
|
(md_show_usage): Don't document them.
|
|
|
|
|
|
(tic6x_atomic): Delete variable.
|
|
|
|
|
|
(tic6x_update_features): Always copy tic6x_arch_enable to
|
|
|
|
|
|
tic6x_features.
|
|
|
|
|
|
(tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC.
|
|
|
|
|
|
(s_tic6x_atomic, s_tic6x_noatomic): Remove functions.
|
|
|
|
|
|
(md_pseudo_table): Remove ".atomic" and ".noatomic".
|
|
|
|
|
|
|
2011-02-01 00:43:15 +08:00
|
|
|
|
2011-01-31 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (write_contents): Include output file name and bfd error
|
|
|
|
|
|
value when reporting the inability to write to the output file.
|
|
|
|
|
|
* config/tc-rx.c (rx_handle_align): Do not insert NOPs into align
|
|
|
|
|
|
frag that has a non-zero fill value.
|
|
|
|
|
|
|
2011-01-28 06:38:32 +08:00
|
|
|
|
2011-01-27 DJ Delorie <dj@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-rx.c (md_convert_frag): If we can't compute the target
|
|
|
|
|
|
address, zero out the values stored in the object file to make
|
|
|
|
|
|
objdump's output consistent.
|
|
|
|
|
|
|
2011-01-26 18:16:12 +08:00
|
|
|
|
2011-01-26 Kai Tietz <kai.tietz@onevision.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_begin): Set for x64 windows COFF target
|
|
|
|
|
|
x86_dwarf2_return_column to 32.
|
|
|
|
|
|
|
2011-01-20 20:49:05 +08:00
|
|
|
|
2011-01-20 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12384
|
|
|
|
|
|
* config/tc-h8300.c (constant_fits_width_p): Use correct type for
|
|
|
|
|
|
comparison.
|
|
|
|
|
|
|
2011-01-19 08:24:23 +08:00
|
|
|
|
2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (compress_debug): Return if section size is smaller
|
|
|
|
|
|
than 32 bytes.
|
|
|
|
|
|
|
2011-01-19 02:55:59 +08:00
|
|
|
|
2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12409
|
|
|
|
|
|
* write.c (compress_debug): Return if section size is 0.
|
|
|
|
|
|
|
2011-01-18 22:10:44 +08:00
|
|
|
|
2011-01-18 Mingfeng Wu <mingfeng@faraday-tech.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (arm_cpus): Add Faraday ARMv5TE compatible
|
|
|
|
|
|
cores: fa606te, fa616te, fmp626. Modify the VFP of fa626te.
|
|
|
|
|
|
* doc/c-arm.texi (ARM Options): Add -mcpu={fa606te, fa616te,
|
|
|
|
|
|
fmp626} options.
|
|
|
|
|
|
|
2011-01-18 21:37:39 +08:00
|
|
|
|
2011-01-18 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/12390
|
|
|
|
|
|
* doc/all.texi: Add NS32K
|
|
|
|
|
|
* doc/as.texinfo: Remove target specific details of which
|
|
|
|
|
|
characters act as comment initiators and statement separators into
|
|
|
|
|
|
individual target specific files.
|
|
|
|
|
|
* doc/c-alpha.texi (Alpha-Chars): Document special behaviour of
|
|
|
|
|
|
the hash character at the start of a line.
|
|
|
|
|
|
* doc/c-arm.texi (ARM-Chars): Likewise.
|
|
|
|
|
|
* doc/c-avr.texi (AVR-Chars): Likewise.
|
|
|
|
|
|
* doc/c-d10v.texi (D10V-Chars): Likewise.
|
|
|
|
|
|
* doc/c-d30v.texi (D30V-Chars): Likewise.
|
|
|
|
|
|
* doc/c-mmix.texi (MMIX-Chars): Likewise.
|
|
|
|
|
|
* doc/c-s390.texi (s390 characters): Likewise.
|
|
|
|
|
|
* doc/c-sh.texi (SH-Chars): Likewise.
|
|
|
|
|
|
* doc/c-sh64.texi (SH64-Chars): Likewise.
|
|
|
|
|
|
* doc/c-sparc.texi (SPARC-Chars): Likewise.
|
|
|
|
|
|
* doc/c-tic6x.texi (TIC6X Syntax): Likewise.
|
|
|
|
|
|
* doc/c-xtensa.texi (Xtensa Syntax): Likewise.
|
|
|
|
|
|
* doc/c-z80.texi (Z80-Chars): Likewise.
|
|
|
|
|
|
* doc/c-z8k.texi (Z8000-Chars): Likewise.
|
|
|
|
|
|
* doc/c-pdp11.texi (PDP11-Syntax): Document line separator character.
|
|
|
|
|
|
* doc/c-arc.texi (ARC-Chars): Fill in this subsection.
|
|
|
|
|
|
* doc/c-bfin.texi (Blackfin Syntax): Document line comment and
|
|
|
|
|
|
line separator characters.
|
|
|
|
|
|
* doc/c-cr16.texi (CR16 Syntax): Likewise.
|
|
|
|
|
|
* doc/c-i386.texi (i386-Chars): Likewise.
|
|
|
|
|
|
* doc/c-i860.texi (i860-Chars): Likewise.
|
|
|
|
|
|
* doc/c-i960.texi (i960-Chars): Likewise.
|
|
|
|
|
|
* doc/c-ip2k.texi (IP2K-Chars): Likewise.
|
|
|
|
|
|
* doc/c-lm32.texi (LM32-Chars): likewise.
|
|
|
|
|
|
* doc/c-m32c.texi (M32C-Chars): Likewise.
|
|
|
|
|
|
* doc/c-m68hc11.texi (M68HC11-syntax): Likewise.
|
|
|
|
|
|
* doc/c-m68k.texi (M68K-Chars): Likewise.
|
|
|
|
|
|
* doc/c-microblaze.texi (MicroBlaze-Chars): Likewise.
|
|
|
|
|
|
* doc/c-msp430.texi (MSP430-Chars): Likewise.
|
|
|
|
|
|
* doc/c-mt.texi (MT-Chars): Likewise.
|
|
|
|
|
|
* doc/c-ns32k.texi (NS32K-Chars): Likewise.
|
|
|
|
|
|
* doc/c-pj.texi (PJ-Chars): Likewise.
|
|
|
|
|
|
* doc/c-ppc.texi (PowerPC-Chars): Likewise.
|
|
|
|
|
|
* doc/c-rx.texi (RX-Chars): Likewise.
|
|
|
|
|
|
* doc/c-score.texi (SCORE-Chars): Likewise.
|
|
|
|
|
|
* doc/c-tic54x.texi (TIC54X-Chars): Likewise.
|
|
|
|
|
|
* doc/c-v850.texi (V850-Chars): Likewise.
|
|
|
|
|
|
* doc/c-vax.texi (VAX-Chars): Likewise.
|
|
|
|
|
|
* doc/c-xc16x.texi (xc16x-Chars): Likewise.
|
|
|
|
|
|
|
Add support for TBM instructions.
gas/
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.
* doc/c-i386.texi (i386-TBM): New section.
opcodes/
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* i386-dis.c (REG_XOP_TBM_01): New.
(REG_XOP_TBM_02): New.
(reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
(xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
entries, and add bextr instruction.
* i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
(cpu_flags): Add CpuTBM.
* i386-opc.h (CpuTBM) New.
(i386_cpu_flags): Add bit cputbm.
* i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
blcs, blsfill, blsic, t1mskc, and tzmsk.
* i386-init.h: Regenerated.
* i386-tbl.h: Regenerated
gas/testsuite
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* gas/i386/tbm.s: New.
* gas/i386/tbm.d: New.
* gas/i386/tbm-intel.d: New.
* gas/i386/x86-64-tbm.s: New.
* gas/i386/x86-64-tbm.d: New.
* gas/i386/x86-64-tbm-intel.d: New.
* gas/i386/arch-10.d: Add tbm flag and TBM instruction pattern.
* gas/i386/arch-10.s: Add a TBM instruction.
* gas/i386/arch-10-1.l: Add TBM instruction pattern.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
2011-01-18 02:40:36 +08:00
|
|
|
|
2011-01-17 Quentin Neill <quentin.neill@amd.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-i386.texi (i386-TBM): New section.
|
|
|
|
|
|
|
2011-01-17 01:06:12 +08:00
|
|
|
|
2011-01-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (disallow_64bit_disp): Renamed to ...
|
|
|
|
|
|
(disallow_64bit_reloc): This.
|
|
|
|
|
|
(md_assemble): Don't check movabs for x32 mode here.
|
|
|
|
|
|
(i386_target_format): Updated.
|
|
|
|
|
|
(tc_gen_reloc): Check if 64bit relocations are allowed.
|
|
|
|
|
|
|
2011-01-15 23:48:02 +08:00
|
|
|
|
2011-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (disallow_64bit_disp): New.
|
|
|
|
|
|
(x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with
|
|
|
|
|
|
X86_64_ABI/X86_64_X32_ABI.
|
|
|
|
|
|
(md_assemble): Don't allow movabs with relocation in x32 mode.
|
|
|
|
|
|
(i386_target_format): Updated.
|
|
|
|
|
|
|
2011-01-15 07:07:11 +08:00
|
|
|
|
2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (OPTION_N32): Renamed to ...
|
|
|
|
|
|
(OPTION_X32): This.
|
|
|
|
|
|
(md_longopts): Replace n32 with x32.
|
|
|
|
|
|
(md_parse_option): Updated.
|
|
|
|
|
|
(md_show_usage): Likewise.
|
|
|
|
|
|
|
2011-01-16 01:25:30 +08:00
|
|
|
|
* doc/c-i386.texi: Replace --n32 with --x32.
|
2011-01-15 07:07:11 +08:00
|
|
|
|
|
2011-01-11 15:22:09 +08:00
|
|
|
|
2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (mips_ip): Update error messages. Take an
|
|
|
|
|
|
unadjusted offset for "+c" argument.
|
|
|
|
|
|
|
2011-01-10 18:10:06 +08:00
|
|
|
|
2011-01-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (x86_elf_abi): Only define for targets that use
|
|
|
|
|
|
it.
|
|
|
|
|
|
|
2011-01-10 17:50:02 +08:00
|
|
|
|
2011-01-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (s_arm_tls_desceq): Move code into ELF-only
|
|
|
|
|
|
part of the file.
|
|
|
|
|
|
|
bfd/
* reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL,
BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ,
BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New
relocations.
* libbfd.h: Rebuilt.
* bfd-in2.h: Rebuilt.
* elf32-arm.c (elf32_arm_howto_table_1): Add new relocations.
(elf32_arm_reloc_map): Likewise.
(tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates.
(elf32_arm_stub_long_branch_any_tls_pic,
elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates.
(DEF_STUBS): Add new stubs.
(struct_elf_arm_obj_data): Add local_tlsdesc_gotent field.
(elf32_arm_local_tlsdesc_gotent): New.
(GOT_TLS_GDESC): New mask.
(GOT_TLS_GD_ANY): Define.
(struct elf32_arm_link_hash_entry): Add tlsdesc_got field.
(elf32_arm_compute_jump_table_size): New.
(struct elf32_arm_link_hash_table): Add next_tls_desc_index,
num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline,
sgotplt_jump_table_size fields.
(elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field.
(elf32_arm_link_hash_table_create): Initialize new fields.
(arm_type_of_stub): Check TLS desc relocs too.
(elf32_arm_stub_name): TLS desc relocs can be shared.
(elf32_arm_tls_transition): Determine relaxation.
(arm_stub_required_alignment): Add tls stubs.
(elf32_arm_size_stubs): Likewise.
(elf32_arm_tls_relax): Perform TLS relaxing.
(elf32_arm_final_link_relocate): Process TLS DESC relocations.
(IS_ARM_TLS_GNU_RELOC): New.
(IS_ARM_TLS_RELOC): Use it.
(elf32_arm_relocate_section): Perform TLS relaxing.
(elf32_arm_check_relocs): Anticipate TLS relaxing, process tls
desc relocations.
(allocate_dynrelocs): Allocate tls desc relcoations.
(elf32_arm_output_arch_local_syms): Emit tls trampoline mapping
symbols.
(elf32_arm_size_dynamic_sections): Allocate tls trampolines and
got slots.
(elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE
symbol.
(elf32_arm_finish_dynamic_symbol): Adjust.
(arm_put_trampoline): New.
(elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls
trampolines.
(elf_backend_always_size_sections): Define.
include/elf/
* arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL,
R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New
relocations.
gas/
* doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and
.tlsdescseq directive.
* config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc
following a symbol.
(s_arm_tls_descseq): New directive.
(md_pseudo_table): Add it.
(encode_branch): Allow TLS_CALL relocs too.
(do_t_blx, do_t_branch23): Use encode_branch.
(reloc_names): Add tlsdesc and tlscall.
(md_apply_fix): Process tls desc relocations.
(tc_gen_reloc): Likewise.
(arm_fix_adjustable): Likewise.
gas/testsuite/
* gas/arm/tls.s: Add tlsdesc tests.
* gas/arm/tls.d: Adjust.
ld/testsuite/
* ld-arm/arm-elf.exp: Added tests for new TLS handling
relocations.
* ld-arm/tls-descrelax-be32.d: New.
* ld-arm/tls-descrelax-be32.s: New.
* ld-arm/tls-descrelax-be8.d: New.
* ld-arm/tls-descrelax-be8.s: New.
* ld-arm/tls-descrelax-v7.d: New.
* ld-arm/tls-descrelax-v7.s: New.
* ld-arm/tls-descrelax.d: New.
* ld-arm/tls-descrelax.s: New.
* ld-arm/tls-descseq.d: New.
* ld-arm/tls-descseq.r: New.
* ld-arm/tls-descseq.s: New.
* ld-arm/tls-gdesc-got.d: New.
* ld-arm/tls-gdesc-got.s: New.
* ld-arm/tls-gdesc-nlazy.g: New.
* ld-arm/tls-gdesc-nlazy.s: New.
* ld-arm/tls-gdesc.d: New.
* ld-arm/tls-gdesc.r: New.
* ld-arm/tls-gdesc.s: New.
* ld-arm/tls-gdierelax.d: New.
* ld-arm/tls-gdierelax.s: New.
* ld-arm/tls-gdierelax2.d: New.
* ld-arm/tls-gdierelax2.s: New.
* ld-arm/tls-gdlerelax.d: New.
* ld-arm/tls-gdlerelax.s: New.
* ld-arm/tls-lib-loc.d: New.
* ld-arm/tls-lib-loc.r: New.
* ld-arm/tls-lib-loc.s: New.
* ld-arm/tls-longplt-lib.d: New.
* ld-arm/tls-longplt-lib.s: New.
* ld-arm/tls-longplt.d: New.
* ld-arm/tls-longplt.s: New.
* ld-arm/tls-mixed.r: New.
* ld-arm/tls-mixed.s: New.
* ld-arm/tls-thumb1.d: New.
* ld-arm/tls-thumb1.s: New.
* ld-arm/arm-elf.exp: New.
2011-01-10 16:40:19 +08:00
|
|
|
|
2011-01-10 Nathan Sidwell <nathan@codesourcery.com>
|
|
|
|
|
|
Glauber de Oliveira Costa <glommer@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and
|
|
|
|
|
|
.tlsdescseq directive.
|
|
|
|
|
|
* config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc
|
|
|
|
|
|
following a symbol.
|
|
|
|
|
|
(s_arm_tls_descseq): New directive.
|
|
|
|
|
|
(md_pseudo_table): Add it.
|
|
|
|
|
|
(encode_branch): Allow TLS_CALL relocs too.
|
|
|
|
|
|
(do_t_blx, do_t_branch23): Use encode_branch.
|
|
|
|
|
|
(reloc_names): Add tlsdesc and tlscall.
|
|
|
|
|
|
(md_apply_fix): Process tls desc relocations.
|
|
|
|
|
|
(tc_gen_reloc): Likewise.
|
|
|
|
|
|
(arm_fix_adjustable): Likewise.
|
|
|
|
|
|
|
2011-01-08 01:44:30 +08:00
|
|
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2011-01-07 Quentin Neill <quentin.neill@amd.com>
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* config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.
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* doc/c-i386.texi (i386-BMI): New section.
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2011-01-07 00:41:35 +08:00
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2011-01-06 Paul Koning <ni1d@arrl.net>
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* config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative
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references to absolute addresses.
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2011-01-06 06:04:09 +08:00
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2011-01-05 DJ Delorie <dj@redhat.com>
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* config/tc-rx.c (tc_gen_reloc): Emit an RX_OP_NEG expression
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instead of an RH_NEG32 one.
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2011-01-06 05:35:08 +08:00
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2011-01-05 Jonathan Wakely <jwakely.gcc@gmail.com>
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* doc/c-i386.texi: Clarify --n32.
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2011-01-05 08:16:57 +08:00
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2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (build_modrm_byte): Allow encoding 32/64bit
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integer registers in VEX.vvvv. Check register-only source
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operand when two source operands are swapped. Properly update
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destination when two source operands are swapped.
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2011-01-02 04:55:48 +08:00
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2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
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* gas.c (parse_args): Update copyright to 2011.
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2011-01-02 00:44:48 +08:00
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For older changes see ChangeLog-2010
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2002-01-07 20:12:47 +08:00
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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