binutils-gdb/bfd/ChangeLog

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2021-01-09 Nick Clifton <nickc@redhat.com>
* version.m4: Change to 2.36.50.
* configure: Regenerate.
* po/bfd.pot: Regenerate.
2021-01-09 Nick Clifton <nickc@redhat.com>
* 2.36 release branch crated.
2021-01-08 H.J. Lu <hongjiu.lu@intel.com>
* elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): Also set
LAM_U57 when setting LAM_U48.
2021-01-08 H.J. Lu <hongjiu.lu@intel.com>
PR ld/26256
PR ld/27160
* elflink.c (elf_fixup_link_order): Verify that fixing up
SHF_LINK_ORDER doesn't increase the output section size.
2021-01-09 Alan Modra <amodra@gmail.com>
* configure: Regenerate.
2021-01-07 Samuel Thibault <samuel.thibault@gnu.org>
* configure: Regenerate.
ELF: Don't generate unused section symbols For ELF targets, section symbols are required only for relocations. With -ffunction-sections -fdata-sections, there can be many unused section symbols. Sizes of libstdc++.a on Linux/x86-64 in GCC 11 are With unused section symbols : 39411698 bytes Without unused section symbols: 39227002 bytes The unused section symbols in libstdc++.a occupy more than 180 KB. Add BSF_SECTION_SYM_USED to indicate if a section symbol should be included in the symbol table. The BSF_SECTION_SYM_USED should be set if the section symbol is used for relocation or the section symbol is always included in the symbol table. Add keep_unused_section_symbols to bfd_target to indicate if unused section symbols should be kept. If TARGET_KEEP_UNUSED_SECTION_SYMBOLS is defined as FALSE, unused ection symbols will be removed. Tested on Linux/x86. Other ELF backends need to: 1. Define TARGET_KEEP_UNUSED_SECTION_SYMBOLS to FALSE. 2. Mark used section symbols in assembler backend. 3. Remove unused section symbols from expected assembler and linker outputs. bfd/ PR 27109 * aix386-core.c (core_aix386_vec): Initialize keep_unused_section_symbol to TARGET_KEEP_UNUSED_SECTION_SYMBOLS. * aout-target.h (MY (vec)): Likewise. * binary.c (binary_vec): Likewise. * cisco-core.c (core_cisco_be_vec): Likewise. (core_cisco_le_vec): Likewise. * coff-alpha.c (alpha_ecoff_le_vec): Likewise. * coff-i386.c (TARGET_SYM): Likewise. (TARGET_SYM_BIG): Likewise. * coff-ia64.c (TARGET_SYM): Likewise. * coff-mips.c (mips_ecoff_le_vec): Likewise. (mips_ecoff_be_vec): Likewise. (mips_ecoff_bele_vec): Likewise. * coff-rs6000.c (rs6000_xcoff_vec): Likewise. (powerpc_xcoff_vec): Likewise. * coff-sh.c (sh_coff_small_vec): Likewise. (sh_coff_small_le_vec): Likewise. * coff-tic30.c (tic30_coff_vec): Likewise. * coff-tic54x.c (tic54x_coff0_vec): Likewise. (tic54x_coff0_beh_vec): Likewise. (tic54x_coff1_vec): Likewise. (tic54x_coff1_beh_vec): Likewise. (tic54x_coff2_vec): Likewise. (tic54x_coff2_beh_vec): Likewise. * coff-x86_64.c (TARGET_SYM): Likewise. (TARGET_SYM_BIG): Likewise. * coff64-rs6000.c (rs6000_xcoff64_vec): Likewise. (rs6000_xcoff64_aix_vec): Likewise. * coffcode.h (CREATE_BIG_COFF_TARGET_VEC): Likewise. (CREATE_BIGHDR_COFF_TARGET_VEC): Likewise. (CREATE_LITTLE_COFF_TARGET_VEC): Likewise. * elfxx-target.h (TARGET_BIG_SYM): Likewise. (TARGET_LITTLE_SYM): Likewise. * hppabsd-core.c (core_hppabsd_vec): Likewise. * hpux-core.c (core_hpux_vec): Likewise. * i386msdos.c (i386_msdos_vec): Likewise. * ihex.c (ihex_vec): Likewise. * irix-core.c (core_irix_vec): Likewise. * mach-o-target.c (TARGET_NAME): Likewise. * mmo.c (mmix_mmo_vec): Likewise. * netbsd-core.c (core_netbsd_vec): Likewise. * osf-core.c (core_osf_vec): Likewise. * pdp11.c (MY (vec)): Likewise. * pef.c (pef_vec): Likewise. (pef_xlib_vec): Likewise. * plugin.c (plugin_vec): Likewise. * ppcboot.c (powerpc_boot_vec): Likewise. * ptrace-core.c (core_ptrace_vec): Likewise. * sco5-core.c (core_sco5_vec): Likewise. * som.c (hppa_som_vec): Likewise. * srec.c (srec_vec): Likewise. (symbolsrec_vec): Likewise. * tekhex.c (tekhex_vec): Likewise. * trad-core.c (core_trad_vec): Likewise. * verilog.c (verilog_vec): Likewise. * vms-alpha.c (alpha_vms_vec): Likewise. * vms-lib.c (alpha_vms_lib_txt_vec): Likewise. * wasm-module.c (wasm_vec): Likewise. * xsym.c (sym_vec): Likewise. * elf.c (ignore_section_sym): Return TRUE if BSF_SECTION_SYM_USED isn't set. (elf_map_symbols): Don't include ignored section symbols. * elfcode.h (elf_slurp_symbol_table): Also set BSF_SECTION_SYM_USED on STT_SECTION symbols. * elflink.c (bfd_elf_final_link): Generated section symbols only when emitting relocations or reqired. * elfxx-x86.h (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): New. * syms.c (BSF_SECTION_SYM_USED): New. * targets.c (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): New. (bfd_target): Add keep_unused_section_symbols. (bfd_keep_unused_section_symbols): New. * bfd-in2.h: Regenerated. binutils/ PR 27109 * objcopy.c (copy_object): Handle section symbols for non-relocatable inputs. * testsuite/binutils-all/readelf.exp (readelf_test): Check is_elf_unused_section_symbols. * testsuite/binutils-all/readelf.s-64: Updated. * testsuite/binutils-all/readelf.ss: Likewise. * testsuite/binutils-all/readelf.ss-64: Likewise. * testsuite/binutils-all/readelf.s-64-unused: New file. * testsuite/binutils-all/readelf.ss-64-unused: Likewise. * testsuite/binutils-all/readelf.ss-unused: Likewise. * testsuite/lib/binutils-common.exp (is_elf_unused_section_symbols): New proc. gas/ChangeLog: PR 27109 * read.c (s_reloc): Call symbol_mark_used_in_reloc on the section symbol. * subsegs.c (subseg_set_rest): Set BSF_SECTION_SYM_USED if needed. * write.c (adjust_reloc_syms): Call symbol_mark_used_in_reloc on the section symbol. (set_symtab): Don't generate unused section symbols. (maybe_generate_build_notes): Call symbol_mark_used_in_reloc on the section symbol. * config/obj-elf.c (elf_adjust_symtab): Call symbol_mark_used_in_reloc on the group signature symbol. * testsuite/gas/cfi/cfi-label.d: Remove unused section symbols from expected output. * testsuite/gas/elf/elf.exp (run_elf_list_test): Check is_elf_unused_section_symbols. * testsuite/gas/elf/section2.e: Updated. * testsuite/gas/elf/section2.e-unused: New file. * testsuite/gas/elf/symver.d: Remove unused section symbols. * testsuite/gas/i386/ilp32/elf/symver.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-size-1.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-size-3.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-size-5.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-unwind.d: Likewise. * testsuite/gas/i386/size-1.d: Likewise. * testsuite/gas/i386/size-3.d: Likewise. * testsuite/gas/i386/svr4.d: Likewise. * testsuite/gas/i386/x86-64-size-1.d: Likewise. * testsuite/gas/i386/x86-64-size-3.d: Likewise. * testsuite/gas/i386/x86-64-size-5.d: Likewise. * testsuite/gas/i386/x86-64-unwind.d: Likewise. ld/ PR 27109 * testsuite/ld-elf/export-class.sd: Adjust the expected output. * testsuite/ld-elf/loadaddr3b.d: Likewise. * testsuite/ld-i386/ibt-plt-1.d: Likewise. * testsuite/ld-i386/ibt-plt-2a.d: Likewise. * testsuite/ld-i386/ibt-plt-2c.d: Likewise. * testsuite/ld-i386/ibt-plt-3a.d: Likewise. * testsuite/ld-i386/ibt-plt-3c.d: Likewise. * testsuite/ld-i386/pr19636-1d.d: Likewise. * testsuite/ld-i386/pr19636-1l.d: Likewise. * testsuite/ld-i386/pr19636-2c.d: Likewise. * testsuite/ld-ifunc/ifunc-2-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-i386-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-local-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-2-x86-64-now.d: Likewise. * testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise. * testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise. * testsuite/ld-ifunc/pr17154-i386-now.d: Likewise. * testsuite/ld-ifunc/pr17154-i386.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64-now.d: Likewise. * testsuite/ld-ifunc/pr17154-x86-64.d: Likewise. * testsuite/ld-x86-64/bnd-branch-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2-now.d: Likewise. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1-now.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-1.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-2c.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3a.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c-x32.d: Likewise. * testsuite/ld-x86-64/ibt-plt-3c.d: Likewise. * testsuite/ld-x86-64/pr19609-4e.d: Likewise. * testsuite/ld-x86-64/pr19609-6a.d: Likewise. * testsuite/ld-x86-64/pr19609-6b.d: Likewise. * testsuite/ld-x86-64/pr19609-7b.d: Likewise. * testsuite/ld-x86-64/pr19609-7d.d: Likewise. * testsuite/ld-x86-64/pr19636-2l.d: Likewise. * testsuite/ld-x86-64/pr20253-1d.d: Likewise. * testsuite/ld-x86-64/pr20253-1h.d: Likewise. * testsuite/ld-x86-64/pr21038b-now.d: Likewise. * testsuite/ld-x86-64/pr21038b.d: Likewise. * testsuite/ld-x86-64/pr21038c-now.d: Likewise. * testsuite/ld-x86-64/pr21038c.d: Likewise. * testsuite/ld-x86-64/pr23854.d: Likewise. * testsuite/ld-x86-64/pr25416-3.d: Likewise. * testsuite/ld-x86-64/pr25416-4.d: Likewise. * testsuite/ld-i386/plt-pic.pd: Likewise. * testsuite/ld-i386/plt-pic2.dd: Likewise. * testsuite/ld-i386/plt.pd: Likewise. * testsuite/ld-i386/plt2.dd: Likewise. * testsuite/ld-i386/tlsbin.rd: Likewise. * testsuite/ld-i386/tlsbin2.rd: Likewise. * testsuite/ld-i386/tlsbindesc.rd: Likewise. * testsuite/ld-i386/tlsdesc.rd: Likewise. * testsuite/ld-i386/tlsgdesc.rd: Likewise. * testsuite/ld-i386/tlsnopic.rd: Likewise. * testsuite/ld-i386/tlspic.rd: Likewise. * testsuite/ld-i386/tlspic2.rd: Likewise. * testsuite/ld-x86-64/mpx3.dd: Likewise. * testsuite/ld-x86-64/mpx3n.dd: Likewise. * testsuite/ld-x86-64/mpx4.dd: Likewise. * testsuite/ld-x86-64/mpx4n.dd: Likewise. * testsuite/ld-x86-64/pe-x86-64-1.od: Likewise. * testsuite/ld-x86-64/pe-x86-64-2.od: Likewise. * testsuite/ld-x86-64/pe-x86-64-3.od: Likewise. * testsuite/ld-x86-64/pe-x86-64-4.od: Likewise. * testsuite/ld-x86-64/plt.pd: Likewise. * testsuite/ld-x86-64/plt2.dd: Likewise. * testsuite/ld-x86-64/tlsbin.rd: Likewise. * testsuite/ld-x86-64/tlsbin2.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. * testsuite/ld-x86-64/tlsdesc.rd: Likewise. * testsuite/ld-x86-64/tlsgdesc.rd: Likewise. * testsuite/ld-x86-64/tlspic.rd: Likewise. * testsuite/ld-x86-64/tlspic2.rd: Likewise. * testsuite/ld-elf/sec64k.exp: Check is_elf_unused_section_symbols.
2021-01-07 22:42:00 +08:00
2021-01-07 H.J. Lu <hongjiu.lu@intel.com>
PR 27109
* aix386-core.c (core_aix386_vec): Initialize
keep_unused_section_symbol to TARGET_KEEP_UNUSED_SECTION_SYMBOLS.
* aout-target.h (MY (vec)): Likewise.
* binary.c (binary_vec): Likewise.
* cisco-core.c (core_cisco_be_vec): Likewise.
(core_cisco_le_vec): Likewise.
* coff-alpha.c (alpha_ecoff_le_vec): Likewise.
* coff-i386.c (TARGET_SYM): Likewise.
(TARGET_SYM_BIG): Likewise.
* coff-ia64.c (TARGET_SYM): Likewise.
* coff-mips.c (mips_ecoff_le_vec): Likewise.
(mips_ecoff_be_vec): Likewise.
(mips_ecoff_bele_vec): Likewise.
* coff-rs6000.c (rs6000_xcoff_vec): Likewise.
(powerpc_xcoff_vec): Likewise.
* coff-sh.c (sh_coff_small_vec): Likewise.
(sh_coff_small_le_vec): Likewise.
* coff-tic30.c (tic30_coff_vec): Likewise.
* coff-tic54x.c (tic54x_coff0_vec): Likewise.
(tic54x_coff0_beh_vec): Likewise.
(tic54x_coff1_vec): Likewise.
(tic54x_coff1_beh_vec): Likewise.
(tic54x_coff2_vec): Likewise.
(tic54x_coff2_beh_vec): Likewise.
* coff-x86_64.c (TARGET_SYM): Likewise.
(TARGET_SYM_BIG): Likewise.
* coff64-rs6000.c (rs6000_xcoff64_vec): Likewise.
(rs6000_xcoff64_aix_vec): Likewise.
* coffcode.h (CREATE_BIG_COFF_TARGET_VEC): Likewise.
(CREATE_BIGHDR_COFF_TARGET_VEC): Likewise.
(CREATE_LITTLE_COFF_TARGET_VEC): Likewise.
* elfxx-target.h (TARGET_BIG_SYM): Likewise.
(TARGET_LITTLE_SYM): Likewise.
* hppabsd-core.c (core_hppabsd_vec): Likewise.
* hpux-core.c (core_hpux_vec): Likewise.
* i386msdos.c (i386_msdos_vec): Likewise.
* ihex.c (ihex_vec): Likewise.
* irix-core.c (core_irix_vec): Likewise.
* mach-o-target.c (TARGET_NAME): Likewise.
* mmo.c (mmix_mmo_vec): Likewise.
* netbsd-core.c (core_netbsd_vec): Likewise.
* osf-core.c (core_osf_vec): Likewise.
* pdp11.c (MY (vec)): Likewise.
* pef.c (pef_vec): Likewise.
(pef_xlib_vec): Likewise.
* plugin.c (plugin_vec): Likewise.
* ppcboot.c (powerpc_boot_vec): Likewise.
* ptrace-core.c (core_ptrace_vec): Likewise.
* sco5-core.c (core_sco5_vec): Likewise.
* som.c (hppa_som_vec): Likewise.
* srec.c (srec_vec): Likewise.
(symbolsrec_vec): Likewise.
* tekhex.c (tekhex_vec): Likewise.
* trad-core.c (core_trad_vec): Likewise.
* verilog.c (verilog_vec): Likewise.
* vms-alpha.c (alpha_vms_vec): Likewise.
* vms-lib.c (alpha_vms_lib_txt_vec): Likewise.
* wasm-module.c (wasm_vec): Likewise.
* xsym.c (sym_vec): Likewise.
* elf.c (ignore_section_sym): Return TRUE if BSF_SECTION_SYM_USED
isn't set.
(elf_map_symbols): Don't include ignored section symbols.
* elfcode.h (elf_slurp_symbol_table): Also set
BSF_SECTION_SYM_USED on STT_SECTION symbols.
* elflink.c (bfd_elf_final_link): Generated section symbols only
when emitting relocations or reqired.
* elfxx-x86.h (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): New.
* syms.c (BSF_SECTION_SYM_USED): New.
* targets.c (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): New.
(bfd_target): Add keep_unused_section_symbols.
(bfd_keep_unused_section_symbols): New.
* bfd-in2.h: Regenerated.
2021-01-07 Nick Clifton <nickc@redhat.com>
PR 25713
* bfdio.c (_bfd_real_fopen): For Win32 convert relative paths to
absolute paths and check to see if they are longer than MAX_PATH.
2021-01-07 Philipp Tomsich <prt@gnu.org>
* elfxx-riscv.c (riscv_std_z_ext_strtab): Added zihintpause.
RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instructions (v0.93). In fact rev8/orc.b/zext.h are the aliases of grevi/gorci/pack[w], so we should update them to INSN_ALIAS when we have supported their true instruction in the future. Though we still use the [MATCH|MAKS]_[GREVI|GORCI|PACK|PACKW] to encode them. Besides, the orc.b has the same encoding both in rv32 and rv64, so we just keep one of them in the opcode table. This patch is implemented according to the following link, https://github.com/riscv/riscv-bitmanip/pull/101 2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com> Jim Wilson <jimw@sifive.com> Andrew Waterman <andrew@sifive.com> Maxim Blinov <maxim.blinov@embecosm.com> Kito Cheng <kito.cheng@sifive.com> Nelson Chu <nelson.chu@sifive.com> bfd/ * elfxx-riscv.c (riscv_std_z_ext_strtab): Added zba, zbb and zbc. gas/ * config/tc-riscv.c (riscv_multi_subset_supports): Handle INSN_CLASS_ZB*. (riscv_get_default_ext_version): Do not check the default_isa_spec when the version defined in the riscv_opcodes table is ISA_SPEC_CLASS_DRAFT. * testsuite/gas/riscv/bitmanip-insns-32.d: New testcase. * testsuite/gas/riscv/bitmanip-insns-64.d: Likewise. * testsuite/gas/riscv/bitmanip-insns.s: Likewise. include/ * opcode/riscv-opc.h: Added MASK/MATCH/DECLARE_INSN for ZBA/ZBB/ZBC. * opcode/riscv.h (riscv_insn_class): Added INSN_CLASS_ZB*. (enum riscv_isa_spec_class): Added ISA_SPEC_CLASS_DRAFT for the frozen extensions. opcodes/ * riscv-opc.c (riscv_opcodes): Add ZBA/ZBB/ZBC instructions. (MASK_RVB_IMM): Used for rev8 and orc.b encoding.
2020-12-15 23:11:03 +08:00
2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com>
Jim Wilson <jimw@sifive.com>
Andrew Waterman <andrew@sifive.com>
Maxim Blinov <maxim.blinov@embecosm.com>
Kito Cheng <kito.cheng@sifive.com>
Nelson Chu <nelson.chu@sifive.com>
* elfxx-riscv.c (riscv_std_z_ext_strtab): Added zba, zbb and zbc.
2021-01-06 H.J. Lu <hongjiu.lu@intel.com>
* elf32-bfin.c (bfin_check_relocs): Check bfd_link_hash_indirect.
(bfinfdpic_check_relocs): Likewise.
2021-01-06 Alan Modra <amodra@gmail.com>
* elf32-score.c (s3_bfd_score_info_to_howto): Report an error
on unknown r_type.
* elf32-score7.c (s7_bfd_score_info_to_howto): Likewise.
sparc-sun-solaris2 and sparc64-sun-solaris2 config A bunch of ld tests fail on these targets due to the test specifying -melf32_sparc or -melf64_sparc, which according to ld/configure.tgt are valid. However, config.bfd lacks the corresponding bfd target resulting in an error. Fix that by adding target_selvecs. bfd/ * config.bfd (sparc-*-solaris2*): Add sparc_elf32_vec. (sparc64-*-solaris2*): Add sparc_elf64_vec and sparc_elf32_vec. ld/ * testsuite/ld-sparc/sparc.exp (sparc64tests): Set text-segment base for some tests. * testsuite/ld-sparc/gotop32.dd: Match solaris output. * testsuite/ld-sparc/gotop32.sd: Likewise. * testsuite/ld-sparc/gotop32.td: Likewise. * testsuite/ld-sparc/gotop64.dd: Likewise. * testsuite/ld-sparc/gotop64.sd: Likewise. * testsuite/ld-sparc/gotop64.td: Likewise. * testsuite/ld-sparc/tlsg32.sd: Likewise. * testsuite/ld-sparc/tlsg64.sd: Likewise. * testsuite/ld-sparc/tlspie32.dd: Likewise. * testsuite/ld-sparc/tlspie64.dd: Likewise. * testsuite/ld-sparc/tlssunbin32.dd: Likewise. * testsuite/ld-sparc/tlssunbin32.sd: Likewise. * testsuite/ld-sparc/tlssunbin32.td: Likewise. * testsuite/ld-sparc/tlssunbin64.dd: Likewise. * testsuite/ld-sparc/tlssunbin64.sd: Likewise. * testsuite/ld-sparc/tlssunbin64.td: Likewise. * testsuite/ld-sparc/tlssunnopic32.dd: Likewise. * testsuite/ld-sparc/tlssunnopic32.sd: Likewise. * testsuite/ld-sparc/tlssunnopic64.dd: Likewise. * testsuite/ld-sparc/tlssunnopic64.sd: Likewise. * testsuite/ld-sparc/tlssunpic32.dd: Likewise. * testsuite/ld-sparc/tlssunpic32.sd: Likewise. * testsuite/ld-sparc/tlssunpic32.td: Likewise. * testsuite/ld-sparc/tlssunpic64.dd: Likewise. * testsuite/ld-sparc/tlssunpic64.sd: Likewise. * testsuite/ld-sparc/tlssunpic64.td: Likewise. * testsuite/ld-sparc/wdispcall.dd: Likewise.
2021-01-06 09:31:10 +08:00
2021-01-06 Alan Modra <amodra@gmail.com>
* config.bfd (sparc-*-solaris2*): Add sparc_elf32_vec.
(sparc64-*-solaris2*): Add sparc_elf64_vec and
sparc_elf32_vec.
RISC-V: Implement support for big endian targets. RISC-V instruction/code is always little endian, but data might be big-endian. Therefore, we can not use the original bfd_get/bfd_put to get/put the code for big endian targets. Add new riscv_get_insn and riscv_put_insn to always get/put code as little endian can resolve the problem. Just remember to update them once we have supported the 48-bit/128-bit instructions in the future patches. bfd/ * config.bfd: Added targets riscv64be*-*-*, riscv32be*-*-* and riscvbe*-*-*. Also added riscv_elf[32|64]_be_vec. * configure.ac: Handle riscv_elf[32|64]_be_vec. * configure: Regenerate. * elfnn-riscv.c: Include <limits.h> and define CHAR_BIT for riscv_is_insn_reloc. (riscv_get_insn): RISC-V instructions are always little endian, but bfd_get may be used for big-endian, so add new riscv_get_insn to handle the insturctions. (riscv_put_insn): Likewsie. (riscv_is_insn_reloc): Check if we are relocaing an instruction. (perform_relocation): Call riscv_is_insn_reloc to decide if we should use riscv_[get|put]_insn or bfd_[get|put]. (riscv_zero_pcrel_hi_reloc): Use riscv_[get|put]_insn, bfd_[get|put]l32 or bfd_[get|put]l16 for code. (riscv_elf_relocate_section): Likewise. (riscv_elf_finish_dynamic_symbol): Likewise. (riscv_elf_finish_dynamic_sections): Likewise. (_bfd_riscv_relax_call): Likewise. (_bfd_riscv_relax_lui): Likewise. (_bfd_riscv_relax_align): Likewise. (_bfd_riscv_relax_pc): Likewise. (riscv_elf_object_p): Handled for big endian. (TARGET_BIG_SYM, TARGET_BIG_NAME): Defined. * targets.c: Add riscv_elf[32|64]_be_vec. (_bfd_target_vector): Likewise. gas/ * config/tc-riscv.c (riscv_target_format): Add elf64-bigriscv and elf32-bigriscv. (install_insn): Always write instructions as little endian. (riscv_make_nops): Likewise. (md_convert_frag_branch): Likewise. (md_number_to_chars): Write data in target endianness. (options, md_longopts): Add -mbig-endian and -mlittle-endian options. (md_parse_option): Handle the endian options. * config/tc-riscv.h: Only define TARGET_BYTES_BIG_ENDIAN if not already defined. * configure.tgt: Added riscv64be*, riscv32be*, riscvbe*. ld/ * configure.tgt: Added riscvbe-*-*, riscv32be*-*-*, riscv64be*-*-*, riscv32be*-*-linux*, and riscv64be*-*-linux*. * Makefile.am: Added eelf32briscv.c, eelf32briscv_ilp32f.c and eelf32briscv_ilp32.c. * Makefile.in: Regenerate. * emulparams/elf32briscv.sh: Added. * emulparams/elf32briscv_ilp32.sh: Likewise. * emulparams/elf32briscv_ilp32f.sh: Likewise. * emulparams/elf64briscv.sh: Likewise. * emulparams/elf64briscv_lp64.sh: Likewise. * emulparams/elf64briscv_lp64f.sh: Likewise.
2021-01-06 05:50:32 +08:00
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
* config.bfd: Added targets riscv64be*-*-*, riscv32be*-*-* and
riscvbe*-*-*. Also added riscv_elf[32|64]_be_vec.
* configure.ac: Handle riscv_elf[32|64]_be_vec.
* configure: Regenerate.
* elfnn-riscv.c: Include <limits.h> and define CHAR_BIT for
riscv_is_insn_reloc.
(riscv_get_insn): RISC-V instructions are always little endian, but
bfd_get may be used for big-endian, so add new riscv_get_insn to handle
the insturctions.
(riscv_put_insn): Likewsie.
(riscv_is_insn_reloc): Check if we are relocaing an instruction.
(perform_relocation): Call riscv_is_insn_reloc to decide if we should
use riscv_[get|put]_insn or bfd_[get|put].
(riscv_zero_pcrel_hi_reloc): Use riscv_[get|put]_insn, bfd_[get|put]l32
or bfd_[get|put]l16 for code.
(riscv_elf_relocate_section): Likewise.
(riscv_elf_finish_dynamic_symbol): Likewise.
(riscv_elf_finish_dynamic_sections): Likewise.
(_bfd_riscv_relax_call): Likewise.
(_bfd_riscv_relax_lui): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_pc): Likewise.
(riscv_elf_object_p): Handled for big endian.
(TARGET_BIG_SYM, TARGET_BIG_NAME): Defined.
* targets.c: Add riscv_elf[32|64]_be_vec.
(_bfd_target_vector): Likewise.
2021-01-05 Alan Modra <amodra@gmail.com>
* elflink.c (bfd_elf_link_record_dynamic_symbol): Handle no_export
for relocatable executable.
2021-01-05 Alan Modra <amodra@gmail.com>
* vms-alpha.c (_bfd_vms_slurp_egsd): Read flags after size check.
2021-01-05 Nelson Chu <nelson.chu@sifive.com>
* elfnn-riscv.c (allocate_dynrelocs): When we are generating pde,
make sure gp symbol is output as a dynamic symbol.
elf: Allow mixed ordered/unordered inputs for non-relocatable link For non-relocatable link with SHF_LINK_ORDER inputs, allow mixed indirect and data inputs with ordered and unordered inputs: 1. Add pattern to bfd_section for the matching section name pattern in linker script and update BFD_FAKE_SECTION. 2. Sort the consecutive bfd_indirect_link_order sections with the same pattern to allow linker script to overdide input section order. 3. Place unordered sections before ordered sections. 4. Change the offsets of the indirect input sections only. bfd/ PR ld/26256 * elflink.c (compare_link_order): Place unordered sections before ordered sections. (elf_fixup_link_order): Add a link info argument. Allow mixed ordered and unordered input sections for non-relocatable link. Sort the consecutive bfd_indirect_link_order sections with the same pattern. Change the offsets of the bfd_indirect_link_order sections only. (bfd_elf_final_link): Pass info to elf_fixup_link_order. * section.c (bfd_section): Add pattern. (BFD_FAKE_SECTION): Initialize pattern to NULL. * bfd-in2.h: Regenerated. gas/ PR ld/26256 * config/obj-elf.c (obj_elf_change_section): Also filter out SHF_LINK_ORDER. ld/ PR ld/26256 * ldlang.c (gc_section_callback): Set pattern. * testsuite/ld-elf/pr26256-1.s: New file. * testsuite/ld-elf/pr26256-1.t: Likewise. * testsuite/ld-elf/pr26256-1a.d: Likewise. * testsuite/ld-elf/pr26256-1b.d: Likewise. * testsuite/ld-elf/pr26256-2.s: Likewise. * testsuite/ld-elf/pr26256-2.t: Likewise. * testsuite/ld-elf/pr26256-2a.d: Likewise. * testsuite/ld-elf/pr26256-2b-alt.d: Likewise. * testsuite/ld-elf/pr26256-2b.d: Likewise. * testsuite/ld-elf/pr26256-3.s: Likewise. * testsuite/ld-elf/pr26256-3a.d: Likewise. * testsuite/ld-elf/pr26256-3a.t: Likewise. * testsuite/ld-elf/pr26256-3b.d: Likewise. * testsuite/ld-elf/pr26256-3b.t: Likewise.
2021-01-05 04:37:49 +08:00
2021-01-04 H.J. Lu <hongjiu.lu@intel.com>
PR ld/26256
* elflink.c (compare_link_order): Place unordered sections before
ordered sections.
(elf_fixup_link_order): Add a link info argument. Allow mixed
ordered and unordered input sections for non-relocatable link.
Sort the consecutive bfd_indirect_link_order sections with the
same pattern. Change the offsets of the bfd_indirect_link_order
sections only.
(bfd_elf_final_link): Pass info to elf_fixup_link_order.
* section.c (bfd_section): Add pattern.
(BFD_FAKE_SECTION): Initialize pattern to NULL.
* bfd-in2.h: Regenerated.
2021-01-04 Alexander Fedotov <alfedotov@gmail.com>
* elf32-arm.c (elf32_arm_print_private_bfd_data): Prefix hex value
of private flags with 0x.
* elfnn-aarch64.c (elfNN_aarch64_print_private_bfd_data): Likewise.
PR26822, How to prevent a STT_FILE with absolute path in the linked image bfd/ PR 26822 * elflink.c (elf_link_input_bfd): Use the file base name in linker generated STT_FILE symbols. ld/ PR 26822 * testsuite/ld-arm/non-contiguous-arm2.d: Adjust STT_FILE symbol match. * testsuite/ld-arm/non-contiguous-arm3.d: Likewise. * testsuite/ld-arm/non-contiguous-arm5.d: Likewise. * testsuite/ld-arm/non-contiguous-arm6.d: Likewise. * testsuite/ld-i386/tlsbin.rd: Likewise. * testsuite/ld-i386/tlsbin2.rd: Likewise. * testsuite/ld-i386/tlsbindesc.rd: Likewise. * testsuite/ld-i386/tlsdesc.rd: Likewise. * testsuite/ld-i386/tlsnopic.rd: Likewise. * testsuite/ld-i386/tlspic.rd: Likewise. * testsuite/ld-i386/tlspic2.rd: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-n64.d: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-n64t.d: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-o32.d: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-o32t.d: Likewise. * testsuite/ld-plugin/pr17973.d: Likewise. * testsuite/ld-tic6x/shlib-1.rd: Likewise. * testsuite/ld-tic6x/shlib-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-noindex.rd: Likewise. * testsuite/ld-tic6x/static-app-1.rd: Likewise. * testsuite/ld-tic6x/static-app-1b.rd: Likewise. * testsuite/ld-tic6x/static-app-1r.rd: Likewise. * testsuite/ld-tic6x/static-app-1rb.rd: Likewise. * testsuite/ld-x86-64/tlsbin.rd: Likewise. * testsuite/ld-x86-64/tlsbin2.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. * testsuite/ld-x86-64/tlsdesc.rd: Likewise. * testsuite/ld-x86-64/tlspic.rd: Likewise. * testsuite/ld-x86-64/tlspic2.rd: Likewise. * testsuite/ld-xtensa/tlsbin.rd: Likewise. * testsuite/ld-xtensa/tlspic.rd: Likewise.
2021-01-04 14:43:51 +08:00
2021-01-04 Alan Modra <amodra@gmail.com>
PR 26822
* elflink.c (elf_link_input_bfd): Use the file base name in
linker generated STT_FILE symbols.
2021-01-04 Nelson Chu <nelson.chu@sifive.com>
* elfxx-riscv.c (riscv_compare_subsets): Removed static.
* elfxx-riscv.h: Add declaration.
* elfnn-riscv.c (riscv_merge_multi_letter_ext): Use
riscv_compare_subsets to check the orders.
(riscv_skip_prefix): Removed.
(riscv_prefix_cmp): Removed.
2021-01-04 Alan Modra <amodra@gmail.com>
PR 26741
* elfxx-riscv.c (riscv_parse_prefixed_ext): Free subset after
calculating subset version length.
2021-01-01 Nicolas Boulenguez <nicolas@debian.org>
* xcofflink.c: Correct spelling in comments.
2021-01-01 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
2021-01-01 06:47:13 +08:00
For older changes see ChangeLog-2020
2021-01-01 06:47:13 +08:00
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