1999-04-16 09:35:26 +08:00
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#ifndef I960_SIM_H
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#define I960_SIM_H
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/* gdb register numbers */
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/* Copied from gdb/config/i960/tc-i960.h. */
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#define PCW_REGNUM 32 /* process control word */
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#define ACW_REGNUM 33 /* arithmetic control word */
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#define TCW_REGNUM 34 /* trace control word */
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#define IP_REGNUM 35 /* instruction pointer */
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#define FP0_REGNUM 36 /* First floating point register */
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/* Some registers have more than one name */
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#define PC_REGNUM IP_REGNUM /* GDB refers to ip as the Program Counter */
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1999-04-27 02:34:20 +08:00
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SI a_i960_h_gr_get (SIM_CPU *, UINT);
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void a_i960_h_gr_set (SIM_CPU *, UINT, SI);
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IADDR a_i960_h_pc_get (SIM_CPU *);
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void a_i960_h_pc_set (SIM_CPU *, IADDR);
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1999-04-16 09:35:26 +08:00
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#define GETTWI GETTSI
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#define SETTWI SETTSI
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/* Exception, Interrupt, and Trap addresses */
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/* ??? Hack for traps.c. */
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#define EIT_TRAP_BASE_ADDR 0x40
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/* Special purpose traps. */
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/* ??? Hack for traps.c. */
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#define TRAP_SYSCALL 0
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#define TRAP_BREAKPOINT 1
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/* Cache Purge Control (only exists on early versions of chips) */
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/* ??? Hack for devices.c. */
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#define MSPR_ADDR 0xfffffff7
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#define MSPR_PURGE 1
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/* Cache Control Register */
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/* ??? Hack for devices.c. */
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#define MCCR_ADDR 0xffffffff
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#define MCCR_CP 0x80
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/* Start address and length of all device support. */
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/* ??? Hack for sim-if.c. */
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#define I960_DEVICE_ADDR 0xff000000
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#define I960_DEVICE_LEN 0x00ffffff
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/* sim_core_attach device argument. */
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/* ??? Hack for sim-if.c. */
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extern device i960_devices;
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/* FIXME: Temporary, until device support ready. */
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/* ??? Hack for devices.c. */
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struct _device { int foo; };
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#endif I960_SIM_H
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