mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-27 04:52:05 +08:00
265 lines
8.3 KiB
ArmAsm
265 lines
8.3 KiB
ArmAsm
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# mach: bfin
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#include "test.h"
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.include "testutils.inc"
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start
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dmm32 ASTAT, (0x3ce00800 | _VS | _AV1S | _AV0S | _AQ | _AZ);
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imm32 R2, 0x00000000;
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imm32 R4, 0x00000000;
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imm32 R7, 0x00000000;
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R2 = ASHIFT R7 BY R4.L (S);
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checkreg ASTAT, (0x3ce00800 | _VS | _AV1S | _AV0S | _AQ | _AZ);
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checkreg R2, 0x00000000;
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checkreg R4, 0x00000000;
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checkreg R7, 0x00000000;
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dmm32 ASTAT, (0x7c104680 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AC0_COPY | _AZ);
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imm32 R7, 0x00000000;
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R7 = R7 << 0xe (S);
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checkreg R7, 0x00000000;
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checkreg ASTAT, (0x7c104680 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AC0_COPY | _AZ);
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dmm32 ASTAT, (0x10d08690 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _CC | _AC0_COPY | _AN);
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imm32 R2, 0x0000ffff;
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imm32 R5, 0x00000000;
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R2 = R5 << 0x1a (S);
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checkreg R2, 0x00000000;
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checkreg ASTAT, (0x10d08690 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _CC | _AC0_COPY | _AZ);
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dmm32 ASTAT, (0x30f08e90 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _CC | _AC0_COPY | _AN);
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imm32 R6, 0x00000000;
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R6 = ASHIFT R6 BY R6.L (S);
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checkreg ASTAT, (0x30f08e90 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _CC | _AC0_COPY | _AZ);
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checkreg R6, 0x00000000;
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dmm32 ASTAT, (0x4060c800 | _VS | _AV0S | _AC1 | _CC | _AZ);
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imm32 R5, 0x00000000;
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imm32 R7, 0x00000000;
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R5 = R7 << 0x15 (S);
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checkreg ASTAT, (0x4060c800 | _VS | _AV0S | _AC1 | _CC | _AZ);
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checkreg R5, 0x00000000;
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checkreg R7, 0x00000000;
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dmm32 ASTAT, (0x78604a10 | _VS | _AN);
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imm32 R1, 0x00000000;
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imm32 R4, 0xe1a88000;
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R4 = R1 << 0xb (S);
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checkreg R4, 0x00000000;
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checkreg ASTAT, (0x78604a10 | _VS | _AZ);
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dmm32 ASTAT, (0x64304800 | _VS | _AV1S | _AV0S | _AC0_COPY);
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imm32 R2, 0x00000000;
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imm32 R7, 0x00000000;
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R7 = R2 << 0xa (S);
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checkreg ASTAT, (0x64304800 | _VS | _AV1S | _AV0S | _AC0_COPY | _AZ);
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checkreg R2, 0x00000000;
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checkreg R7, 0x00000000;
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dmm32 ASTAT, (0x68f0c280 | _VS | _AC1 | _AC0_COPY | _AN);
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imm32 R2, 0x00000000;
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imm32 R5, 0x0000f74a;
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R5 = R2 << 0x10 (S);
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checkreg R5, 0x00000000;
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checkreg ASTAT, (0x68f0c280 | _VS | _AC1 | _AC0_COPY | _AZ);
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dmm32 ASTAT, (0x54200c80 | _VS | _AV1S | _AV0S | _AQ);
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imm32 R1, 0x00000000;
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imm32 R2, 0x00000000;
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R2 = R1 << 0xa (S);
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checkreg ASTAT, (0x54200c80 | _VS | _AV1S | _AV0S | _AQ | _AZ);
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checkreg R1, 0x00000000;
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checkreg R2, 0x00000000;
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dmm32 ASTAT, (0x20300a80 | _VS | _AV1S | _CC | _AZ);
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imm32 R2, 0x00000000;
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imm32 R7, 0x00000000;
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R7 = R2 << 0x8 (S);
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checkreg ASTAT, (0x20300a80 | _VS | _AV1S | _CC | _AZ);
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checkreg R2, 0x00000000;
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checkreg R7, 0x00000000;
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dmm32 ASTAT, (0x14408e10 | _VS | _AV0S | _AQ | _CC | _AZ);
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imm32 R4, 0x0000007f;
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imm32 R6, 0x00000000;
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R4 = R6 << 0x3 (S);
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checkreg R4, 0x00000000;
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checkreg ASTAT, (0x14408e10 | _VS | _AV0S | _AQ | _CC | _AZ);
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dmm32 ASTAT, (0x2850c490 | _VS | _AV1S | _AV0S | _AZ);
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imm32 R5, 0x00000000;
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imm32 R7, 0xf67f0000;
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R7 = ASHIFT R5 BY R7.L (S);
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checkreg R7, 0x00000000;
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checkreg ASTAT, (0x2850c490 | _VS | _AV1S | _AV0S | _AZ);
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dmm32 ASTAT, (0x24a00400 | _VS | _AV1S | _AC0 | _AC0_COPY | _AN);
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imm32 R4, 0x00001e68;
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imm32 R6, 0x00000000;
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R4 = R6 << 0x8 (S);
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checkreg R4, 0x00000000;
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checkreg ASTAT, (0x24a00400 | _VS | _AV1S | _AC0 | _AC0_COPY | _AZ);
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dmm32 ASTAT, (0x34608e00 | _VS | _V | _AV1S | _AV0S | _AC1 | _AQ | _V_COPY | _AN);
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imm32 R1, 0x00000000;
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imm32 R5, 0x272beb60;
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R5 = R1 << 0xa (S);
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checkreg R5, 0x00000000;
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checkreg ASTAT, (0x34608e00 | _VS | _AV1S | _AV0S | _AC1 | _AQ | _AZ);
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dmm32 ASTAT, (0x20800c90 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AC0_COPY | _AN);
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imm32 R3, 0x532993ba;
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imm32 R5, 0x00000000;
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R3 = R5 << 0x9 (S);
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checkreg R3, 0x00000000;
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checkreg ASTAT, (0x20800c90 | _VS | _AV1S | _AV0S | _AC1 | _AC0 | _AC0_COPY | _AZ);
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dmm32 ASTAT, (0x5430c090 | _VS | _V | _AV0S | _AC0 | _AQ | _V_COPY | _AC0_COPY);
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imm32 R1, 0xb1510802;
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imm32 R6, 0x00000000;
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R1 = R6 << 0x1e (S);
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checkreg R1, 0x00000000;
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checkreg ASTAT, (0x5430c090 | _VS | _AV0S | _AC0 | _AQ | _AC0_COPY | _AZ);
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dmm32 ASTAT, (0x5cf04c90 | _VS | _AV1S | _AC1 | _AQ | _AC0_COPY);
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dmm32 A1.w, 0xf9bc55b7;
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dmm32 A1.x, 0x0000002a;
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imm32 R0, 0x002d0024;
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imm32 R1, 0x16970042;
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A1 += R0.L * R1.L;
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checkreg A1.w, 0xf9bc6847;
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checkreg A1.x, 0x0000002a;
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checkreg ASTAT, (0x5cf04c90 | _VS | _AV1S | _AC1 | _AQ | _AC0_COPY);
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dmm32 ASTAT, (0x7c804090 | _VS | _AV0S | _AC1 | _AC0 | _CC | _AC0_COPY | _AZ);
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imm32 R5, 0x00000000;
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imm32 R7, 0xfe773828;
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R7 = R5 << 0x19 (S);
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checkreg R7, 0x00000000;
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checkreg ASTAT, (0x7c804090 | _VS | _AV0S | _AC1 | _AC0 | _CC | _AC0_COPY | _AZ);
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dmm32 ASTAT, (0x30f04e90 | _VS | _AV0S | _AC0 | _AQ);
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imm32 R3, 0x00000000;
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imm32 R7, 0x00000372;
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R7 = R3 << 0x6 (S);
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checkreg R7, 0x00000000;
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checkreg ASTAT, (0x30f04e90 | _VS | _AV0S | _AC0 | _AQ | _AZ);
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dmm32 ASTAT, (0x04708210 | _VS | _AV1S | _AC0 | _AQ | _AN);
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imm32 R5, 0x00000000;
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imm32 R7, 0x79b3d220;
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R7 = R5 << 0x13 (S);
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checkreg R7, 0x00000000;
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checkreg ASTAT, (0x04708210 | _VS | _AV1S | _AC0 | _AQ | _AZ);
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dmm32 ASTAT, (0x24e08680 | _VS | _AV0S | _AC1 | _CC | _AZ);
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imm32 R0, 0x00000000;
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imm32 R6, 0x00000000;
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imm32 R7, 0xa820afc0;
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R6 = ASHIFT R0 BY R7.L (S);
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checkreg ASTAT, (0x24e08680 | _VS | _AV0S | _AC1 | _CC | _AZ);
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checkreg R0, 0x00000000;
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checkreg R6, 0x00000000;
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checkreg R7, 0xa820afc0;
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dmm32 ASTAT, (0x0ca0c090 | _VS | _AQ | _AZ);
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imm32 R6, 0x00000000;
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imm32 R7, 0x0000001f;
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R7 = R6 << 0x14 (S);
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checkreg R7, 0x00000000;
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checkreg ASTAT, (0x0ca0c090 | _VS | _AQ | _AZ);
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dmm32 ASTAT, (0x20204680 | _VS | _AV1S | _AV0S | _AC0 | _AC0_COPY);
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imm32 R6, 0x00000000;
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R6 = R6 << 0x15 (S);
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checkreg ASTAT, (0x20204680 | _VS | _AV1S | _AV0S | _AC0 | _AC0_COPY | _AZ);
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checkreg R6, 0x00000000;
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dmm32 ASTAT, (0x14f08c00 | _VS | _AC1 | _AC0 | _AQ | _AC0_COPY | _AZ);
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imm32 R2, 0x00000000;
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imm32 R6, 0x00007fff;
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R6 = R2 << 0x1b (S);
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checkreg R6, 0x00000000;
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checkreg ASTAT, (0x14f08c00 | _VS | _AC1 | _AC0 | _AQ | _AC0_COPY | _AZ);
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dmm32 ASTAT, (0x50b08c00 | _VS | _AC1 | _AQ | _CC | _AN);
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imm32 R1, 0x00000000;
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imm32 R4, 0x0000fffd;
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R4 = R1 << 0x9 (S);
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checkreg R4, 0x00000000;
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checkreg ASTAT, (0x50b08c00 | _VS | _AC1 | _AQ | _CC | _AZ);
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dmm32 ASTAT, (0x1cb04200 | _VS | _AV0S | _AC1 | _CC);
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imm32 R0, 0x00000000;
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imm32 R2, 0xdeab0000;
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R2 = R0 << 0x1e (S);
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checkreg R2, 0x00000000;
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checkreg ASTAT, (0x1cb04200 | _VS | _AV0S | _AC1 | _CC | _AZ);
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dmm32 ASTAT, (0x54c0ca00 | _VS | _AV1S | _AV0S | _AC1);
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imm32 R6, 0x00000000;
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imm32 R7, 0x9ec9c597;
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R7 = R6 << 0x8 (S);
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checkreg R7, 0x00000000;
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checkreg ASTAT, (0x54c0ca00 | _VS | _AV1S | _AV0S | _AC1 | _AZ);
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dmm32 ASTAT, (0x18804400 | _VS | _AV0S | _AC1 | _AC0 | _AC0_COPY | _AN);
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imm32 R7, 0x00000000;
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R7 = R7 << 0x1d (S);
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checkreg ASTAT, (0x18804400 | _VS | _AV0S | _AC1 | _AC0 | _AC0_COPY | _AZ);
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checkreg R7, 0x00000000;
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dmm32 ASTAT, (0x40c08e90 | _VS | _AV1S | _AV0S | _CC);
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imm32 R2, 0x00000000;
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imm32 R5, 0x80000000;
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imm32 R7, 0x00000000;
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R5 = ASHIFT R2 BY R7.L (S);
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checkreg R5, 0x00000000;
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checkreg ASTAT, (0x40c08e90 | _VS | _AV1S | _AV0S | _CC | _AZ);
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dmm32 ASTAT, (0x70b04290 | _VS | _AV1S | _AV0S | _AQ | _AZ);
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imm32 R5, 0x8000c2d0;
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imm32 R6, 0x00000000;
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R5 = R6 << 0x2 (S);
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checkreg R5, 0x00000000;
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checkreg ASTAT, (0x70b04290 | _VS | _AV1S | _AV0S | _AQ | _AZ);
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dmm32 ASTAT, (0x7cf04480 | _VS | _AV0S | _AC0 | _AC0_COPY | _AZ);
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imm32 R3, 0x00000000;
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imm32 R7, 0x00000000;
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R7 = ASHIFT R3 BY R7.L (S);
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checkreg ASTAT, (0x7cf04480 | _VS | _AV0S | _AC0 | _AC0_COPY | _AZ);
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checkreg R3, 0x00000000;
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checkreg R7, 0x00000000;
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dmm32 ASTAT, (0x78d0c290 | _VS | _AV0S | _AC1 | _AC0 | _AQ | _CC | _AC0_COPY | _AZ);
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imm32 R1, 0x7c98345a;
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imm32 R4, 0x00000000;
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R1 = ASHIFT R4 BY R1.L (S);
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checkreg R1, 0x00000000;
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checkreg ASTAT, (0x78d0c290 | _VS | _AV0S | _AC1 | _AC0 | _AQ | _CC | _AC0_COPY | _AZ);
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dmm32 ASTAT, (0x58400e80 | _VS | _V | _AV0S | _AQ | _CC | _V_COPY);
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imm32 R2, 0x00000000;
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imm32 R4, 0x7fffffff;
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R4 = R2 << 0x8 (S);
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checkreg R4, 0x00000000;
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checkreg ASTAT, (0x58400e80 | _VS | _AV0S | _AQ | _CC | _AZ);
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dmm32 ASTAT, (0x4c804080 | _VS | _V | _AV1S | _AV0S | _AV0 | _V_COPY);
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imm32 R3, 0x00000000;
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imm32 R7, 0x3d196b66;
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R7 = ASHIFT R3 BY R3.L (S);
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checkreg R7, 0x00000000;
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checkreg ASTAT, (0x4c804080 | _VS | _AV1S | _AV0S | _AV0 | _AZ);
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dmm32 ASTAT, (0x44304a10 | _VS | _AV0S | _AQ | _AZ);
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imm32 R4, 0x00000000;
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imm32 R6, 0x00000000;
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R6 = R4 << 0x11 (S);
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checkreg ASTAT, (0x44304a10 | _VS | _AV0S | _AQ | _AZ);
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checkreg R4, 0x00000000;
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checkreg R6, 0x00000000;
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pass
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