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741 lines
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741 lines
28 KiB
Plaintext
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@c Copyright (C) 2002 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@c
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@ifset GENERIC
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@page
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@node Xtensa-Dependent
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@chapter Xtensa Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter Xtensa Dependent Features
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@end ifclear
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@cindex Xtensa architecture
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This chapter covers features of the @sc{gnu} assembler that are specific
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to the Xtensa architecture. For details about the Xtensa instruction
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set, please consult the @cite{Xtensa Instruction Set Architecture (ISA)
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Reference Manual}.
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@menu
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* Xtensa Options:: Command-line Options.
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* Xtensa Syntax:: Assembler Syntax for Xtensa Processors.
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* Xtensa Optimizations:: Assembler Optimizations.
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* Xtensa Relaxation:: Other Automatic Transformations.
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* Xtensa Directives:: Directives for Xtensa Processors.
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@end menu
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@node Xtensa Options
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@section Command Line Options
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The Xtensa version of the @sc{gnu} assembler supports these
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special options:
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@table @code
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@item --density | --no-density
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@kindex --density
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@kindex --no-density
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@cindex Xtensa density option
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@cindex density option, Xtensa
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Enable or disable use of the Xtensa code density option (16-bit
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instructions). @xref{Density Instructions, ,Using Density
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Instructions}. If the processor is configured with the density option,
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this is enabled by default; otherwise, it is always disabled.
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@item --relax | --no-relax
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@kindex --relax
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@kindex --no-relax
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Enable or disable relaxation of instructions with immediate operands
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that are outside the legal range for the instructions. @xref{Xtensa
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Relaxation, ,Xtensa Relaxation}. The default is @samp{--relax} and this
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default should almost always be used. If relaxation is disabled with
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@samp{--no-relax}, instruction operands that are out of range will cause
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errors. Note: In the current implementation, these options also control
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whether assembler optimizations are performed, making these options
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equivalent to @samp{--generics} and @samp{--no-generics}.
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@item --generics | --no-generics
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@kindex --generics
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@kindex --no-generics
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Enable or disable all assembler transformations of Xtensa instructions,
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including both relaxation and optimization. The default is
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@samp{--generics}; @samp{--no-generics} should only be used in the rare
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cases when the instructions must be exactly as specified in the assembly
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source.
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@c The @samp{--no-generics} option is like @samp{--no-relax}
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@c except that it also disables assembler optimizations (@pxref{Xtensa
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@c Optimizations}).
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As with @samp{--no-relax}, using @samp{--no-generics}
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causes out of range instruction operands to be errors.
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@item --text-section-literals | --no-text-section-literals
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@kindex --text-section-literals
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@kindex --no-text-section-literals
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Control the treatment of literal pools. The default is
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@samp{--no-@-text-@-section-@-literals}, which places literals in a
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separate section in the output file. This allows the literal pool to be
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placed in a data RAM/ROM, and it also allows the linker to combine literal
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pools from separate object files to remove redundant literals and
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improve code size. With @samp{--text-@-section-@-literals}, the
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literals are interspersed in the text section in order to keep them as
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close as possible to their references. This may be necessary for large
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assembly files.
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@item --target-align | --no-target-align
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@kindex --target-align
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@kindex --no-target-align
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Enable or disable automatic alignment to reduce branch penalties at some
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expense in code size. @xref{Xtensa Automatic Alignment, ,Automatic
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Instruction Alignment}. This optimization is enabled by default. Note
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that the assembler will always align instructions like @code{LOOP} that
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have fixed alignment requirements.
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@item --longcalls | --no-longcalls
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@kindex --longcalls
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@kindex --no-longcalls
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Enable or disable transformation of call instructions to allow calls
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across a greater range of addresses. @xref{Xtensa Call Relaxation,
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,Function Call Relaxation}. This option should be used when call
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targets can potentially be out of range, but it degrades both code size
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and performance. The default is @samp{--no-@-longcalls}.
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@end table
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@node Xtensa Syntax
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@section Assembler Syntax
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@cindex syntax, Xtensa assembler
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@cindex Xtensa assembler syntax
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Block comments are delimited by @samp{/*} and @samp{*/}. End of line
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comments may be introduced with either @samp{#} or @samp{//}.
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Instructions consist of a leading opcode or macro name followed by
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whitespace and an optional comma-separated list of operands:
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@smallexample
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@var{opcode} [@var{operand},@dots{}]
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@end smallexample
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Instructions must be separated by a newline or semicolon.
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@menu
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* Xtensa Opcodes:: Opcode Naming Conventions.
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* Xtensa Registers:: Register Naming.
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@end menu
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@node Xtensa Opcodes
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@subsection Opcode Names
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@cindex Xtensa opcode names
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@cindex opcode names, Xtenxa
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See the @cite{Xtensa Instruction Set Architecture (ISA) Reference
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Manual} for a complete list of opcodes and descriptions of their
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semantics.
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@cindex generic opcodes
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@cindex specific opcodes
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@cindex _ opcode prefix
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The Xtensa assembler distinguishes between @dfn{generic} and
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@dfn{specific} opcodes. Specific opcodes correspond directly to Xtensa
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machine instructions. Prefixing an opcode with an underscore character
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(@samp{_}) identifies it as a specific opcode. Opcodes without a
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leading underscore are generic, which means the assembler is required to
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preserve their semantics but may not translate them directly to the
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specific opcodes with the same names. Instead, the assembler may
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optimize a generic opcode and select a better instruction to use in its
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place (@pxref{Xtensa Optimizations, ,Xtensa Optimizations}), or the
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assembler may relax the instruction to handle operands that are out of
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range for the corresponding specific opcode (@pxref{Xtensa Relaxation,
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,Xtensa Relaxation}).
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Only use specific opcodes when it is essential to select
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the exact machine instructions produced by the assembler.
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Using specific opcodes unnecessarily only makes the code less
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efficient, by disabling assembler optimization, and less flexible, by
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disabling relaxation.
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Note that this special handling of underscore prefixes only applies to
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Xtensa opcodes, not to either built-in macros or user-defined macros.
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When an underscore prefix is used with a macro (e.g., @code{_NOP}), it
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refers to a different macro. The assembler generally provides built-in
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macros both with and without the underscore prefix, where the underscore
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versions behave as if the underscore carries through to the instructions
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in the macros. For example, @code{_NOP} expands to @code{_OR a1,a1,a1}.
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The underscore prefix only applies to individual instructions, not to
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series of instructions. For example, if a series of instructions have
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underscore prefixes, the assembler will not transform the individual
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instructions, but it may insert other instructions between them (e.g.,
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to align a @code{LOOP} instruction). To prevent the assembler from
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modifying a series of instructions as a whole, use the
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@code{no-generics} directive. @xref{Generics Directive, ,generics}.
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@node Xtensa Registers
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@subsection Register Names
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@cindex Xtensa register names
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@cindex register names, Xtensa
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@cindex sp register
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An initial @samp{$} character is optional in all register names.
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General purpose registers are named @samp{a0}@dots{}@samp{a15}. Additional
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registers may be added by processor configuration options. In
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particular, the @sc{mac16} option adds a @sc{mr} register bank. Its
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registers are named @samp{m0}@dots{}@samp{m3}.
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As a special feature, @samp{sp} is also supported as a synonym for
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@samp{a1}.
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@node Xtensa Optimizations
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@section Xtensa Optimizations
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@cindex optimizations
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The optimizations currently supported by @code{@value{AS}} are
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generation of density instructions where appropriate and automatic
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branch target alignment.
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@menu
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* Density Instructions:: Using Density Instructions.
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* Xtensa Automatic Alignment:: Automatic Instruction Alignment.
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@end menu
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@node Density Instructions
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@subsection Using Density Instructions
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@cindex density instructions
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The Xtensa instruction set has a code density option that provides
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16-bit versions of some of the most commonly used opcodes. Use of these
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opcodes can significantly reduce code size. When possible, the
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assembler automatically translates generic instructions from the core
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Xtensa instruction set into equivalent instructions from the Xtensa code
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density option. This translation can be disabled by using specific
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opcodes (@pxref{Xtensa Opcodes, ,Opcode Names}), by using the
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@samp{--no-density} command-line option (@pxref{Xtensa Options, ,Command
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Line Options}), or by using the @code{no-density} directive
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(@pxref{Density Directive, ,density}).
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It is a good idea @emph{not} to use the density instuctions directly.
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The assembler will automatically select dense instructions where
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possible. If you later need to avoid using the code density option, you
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can disable it in the assembler without having to modify the code.
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@node Xtensa Automatic Alignment
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@subsection Automatic Instruction Alignment
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@cindex alignment of @code{LOOP} instructions
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@cindex alignment of @code{ENTRY} instructions
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@cindex alignment of branch targets
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@cindex @code{LOOP} instructions, alignment
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@cindex @code{ENTRY} instructions, alignment
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@cindex branch target alignment
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The Xtensa assembler will automatically align certain instructions, both
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to optimize performance and to satisfy architectural requirements.
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When the @code{--target-@-align} command-line option is enabled
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(@pxref{Xtensa Options, ,Command Line Options}), the assembler attempts
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to widen density instructions preceding a branch target so that the
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target instruction does not cross a 4-byte boundary. Similarly, the
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assembler also attempts to align each instruction following a call
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instruction. If there are not enough preceding safe density
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instructions to align a target, no widening will be performed. This
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alignment has the potential to reduce branch penalties at some expense
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in code size. The assembler will not attempt to align labels with the
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prefixes @code{.Ln} and @code{.LM}, since these labels are used for
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debugging information and are not typically branch targets.
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The @code{LOOP} family of instructions must be aligned on either a 1 or
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2 mod 4 byte boundary. The assembler knows about this restriction and
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inserts the minimal number of 2 or 3 byte no-op instructions
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to satisfy it. When no-op instructions are added, any label immediately
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preceding the original loop will be moved in order to refer to the loop
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instruction, not the newly generated no-op instruction.
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Similarly, the @code{ENTRY} instruction must be aligned on a 0 mod 4
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byte boundary. The assembler satisfies this requirement by inserting
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zero bytes when required. In addition, labels immediately preceding the
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@code{ENTRY} instruction will be moved to the newly aligned instruction
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location.
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@node Xtensa Relaxation
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@section Xtensa Relaxation
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@cindex relaxation
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When an instruction operand is outside the range allowed for that
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particular instruction field, @code{@value{AS}} can transform the code
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to use a functionally-equivalent instruction or sequence of
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instructions. This process is known as @dfn{relaxation}. This is
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typically done for branch instructions because the distance of the
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branch targets is not known until assembly-time. The Xtensa assembler
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offers branch relaxation and also extends this concept to function
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calls, @code{MOVI} instructions and other instructions with immediate
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fields.
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@menu
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* Xtensa Branch Relaxation:: Relaxation of Branches.
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* Xtensa Call Relaxation:: Relaxation of Function Calls.
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* Xtensa Immediate Relaxation:: Relaxation of other Immediate Fields.
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@end menu
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@node Xtensa Branch Relaxation
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@subsection Conditional Branch Relaxation
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@cindex relaxation of branch instructions
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@cindex branch instructions, relaxation
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When the target of a branch is too far away from the branch itself,
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i.e., when the offset from the branch to the target is too large to fit
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in the immediate field of the branch instruction, it may be necessary to
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replace the branch with a branch around a jump. For example,
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@smallexample
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beqz a2, L
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@end smallexample
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may result in:
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@smallexample
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bnez.n a2, M
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j L
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M:
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@end smallexample
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(The @code{BNEZ.N} instruction would be used in this example only if the
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density option is available. Otherwise, @code{BNEZ} would be used.)
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@node Xtensa Call Relaxation
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@subsection Function Call Relaxation
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@cindex relaxation of call instructions
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@cindex call instructions, relaxation
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Function calls may require relaxation because the Xtensa immediate call
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instructions (@code{CALL0}, @code{CALL4}, @code{CALL8} and
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@code{CALL12}) provide a PC-relative offset of only 512 Kbytes in either
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direction. For larger programs, it may be necessary to use indirect
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calls (@code{CALLX0}, @code{CALLX4}, @code{CALLX8} and @code{CALLX12})
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where the target address is specified in a register. The Xtensa
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assembler can automatically relax immediate call instructions into
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indirect call instructions. This relaxation is done by loading the
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address of the called function into the callee's return address register
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and then using a @code{CALLX} instruction. So, for example:
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@smallexample
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call8 func
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@end smallexample
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might be relaxed to:
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@smallexample
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.literal .L1, func
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l32r a8, .L1
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callx8 a8
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@end smallexample
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Because the addresses of targets of function calls are not generally
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known until link-time, the assembler must assume the worst and relax all
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the calls to functions in other source files, not just those that really
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will be out of range. The linker can recognize calls that were
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unnecessarily relaxed, but it can only partially remove the overhead
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introduced by the assembler.
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Call relaxation has a negative effect
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on both code size and performance, so this relaxation is disabled by
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default. If a program is too large and some of the calls are out of
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range, function call relaxation can be enabled using the
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@samp{--longcalls} command-line option or the @code{longcalls} directive
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(@pxref{Longcalls Directive, ,longcalls}).
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@node Xtensa Immediate Relaxation
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@subsection Other Immediate Field Relaxation
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@cindex immediate fields, relaxation
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@cindex relaxation of immediate fields
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@cindex @code{MOVI} instructions, relaxation
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@cindex relaxation of @code{MOVI} instructions
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The @code{MOVI} machine instruction can only materialize values in the
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range from -2048 to 2047. Values outside this range are best
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materalized with @code{L32R} instructions. Thus:
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@smallexample
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movi a0, 100000
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@end smallexample
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is assembled into the following machine code:
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@smallexample
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.literal .L1, 100000
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l32r a0, .L1
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@end smallexample
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@cindex @code{L8UI} instructions, relaxation
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@cindex @code{L16SI} instructions, relaxation
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@cindex @code{L16UI} instructions, relaxation
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@cindex @code{L32I} instructions, relaxation
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@cindex relaxation of @code{L8UI} instructions
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@cindex relaxation of @code{L16SI} instructions
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@cindex relaxation of @code{L16UI} instructions
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@cindex relaxation of @code{L32I} instructions
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The @code{L8UI} machine instruction can only be used with immediate
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offsets in the range from 0 to 255. The @code{L16SI} and @code{L16UI}
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machine instructions can only be used with offsets from 0 to 510. The
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@code{L32I} machine instruction can only be used with offsets from 0 to
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1020. A load offset outside these ranges can be materalized with
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an @code{L32R} instruction if the destination register of the load
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is different than the source address register. For example:
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@smallexample
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l32i a1, a0, 2040
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@end smallexample
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||
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is translated to:
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@smallexample
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.literal .L1, 2040
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l32r a1, .L1
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addi a1, a0, a1
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l32i a1, a1, 0
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@end smallexample
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@noindent
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If the load destination and source address register are the same, an
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out-of-range offset causes an error.
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|
||
|
@cindex @code{ADDI} instructions, relaxation
|
||
|
@cindex relaxation of @code{ADDI} instructions
|
||
|
The Xtensa @code{ADDI} instruction only allows immediate operands in the
|
||
|
range from -128 to 127. There are a number of alternate instruction
|
||
|
sequences for the generic @code{ADDI} operation. First, if the
|
||
|
immediate is 0, the @code{ADDI} will be turned into a @code{MOV.N}
|
||
|
instruction (or the equivalent @code{OR} instruction if the code density
|
||
|
option is not available). If the @code{ADDI} immediate is outside of
|
||
|
the range -128 to 127, but inside the range -32896 to 32639, an
|
||
|
@code{ADDMI} instruction or @code{ADDMI}/@code{ADDI} sequence will be
|
||
|
used. Finally, if the immediate is outside of this range and a free
|
||
|
register is available, an @code{L32R}/@code{ADD} sequence will be used
|
||
|
with a literal allocated from the literal pool.
|
||
|
|
||
|
For example:
|
||
|
|
||
|
@smallexample
|
||
|
addi a5, a6, 0
|
||
|
addi a5, a6, 512
|
||
|
addi a5, a6, 513
|
||
|
addi a5, a6, 50000
|
||
|
@end smallexample
|
||
|
|
||
|
is assembled into the following:
|
||
|
|
||
|
@smallexample
|
||
|
.literal .L1, 50000
|
||
|
mov.n a5, a6
|
||
|
addmi a5, a6, 0x200
|
||
|
addmi a5, a6, 0x200
|
||
|
addi a5, a5, 1
|
||
|
l32r a5, .L1
|
||
|
add a5, a6, a5
|
||
|
@end smallexample
|
||
|
|
||
|
@node Xtensa Directives
|
||
|
@section Directives
|
||
|
@cindex Xtensa directives
|
||
|
@cindex directives, Xtensa
|
||
|
|
||
|
The Xtensa assember supports a region-based directive syntax:
|
||
|
|
||
|
@smallexample
|
||
|
.begin @var{directive} [@var{options}]
|
||
|
@dots{}
|
||
|
.end @var{directive}
|
||
|
@end smallexample
|
||
|
|
||
|
All the Xtensa-specific directives that apply to a region of code use
|
||
|
this syntax.
|
||
|
|
||
|
The directive applies to code between the @code{.begin} and the
|
||
|
@code{.end}. The state of the option after the @code{.end} reverts to
|
||
|
what it was before the @code{.begin}.
|
||
|
A nested @code{.begin}/@code{.end} region can further
|
||
|
change the state of the directive without having to be aware of its
|
||
|
outer state. For example, consider:
|
||
|
|
||
|
@smallexample
|
||
|
.begin no-density
|
||
|
L: add a0, a1, a2
|
||
|
.begin density
|
||
|
M: add a0, a1, a2
|
||
|
.end density
|
||
|
N: add a0, a1, a2
|
||
|
.end no-density
|
||
|
@end smallexample
|
||
|
|
||
|
The generic @code{ADD} opcodes at @code{L} and @code{N} in the outer
|
||
|
@code{no-density} region both result in @code{ADD} machine instructions,
|
||
|
but the assembler selects an @code{ADD.N} instruction for the generic
|
||
|
@code{ADD} at @code{M} in the inner @code{density} region.
|
||
|
|
||
|
The advantage of this style is that it works well inside macros which can
|
||
|
preserve the context of their callers.
|
||
|
|
||
|
@cindex precedence of directives
|
||
|
@cindex directives, precedence
|
||
|
When command-line options and assembler directives are used at the same
|
||
|
time and conflict, the one that overrides a default behavior takes
|
||
|
precedence over one that is the same as the default. For example, if
|
||
|
the code density option is available, the default is to select density
|
||
|
instructions whenever possible. So, if the above is assembled with the
|
||
|
@samp{--no-density} flag, which overrides the default, all the generic
|
||
|
@code{ADD} instructions result in @code{ADD} machine instructions. If
|
||
|
assembled with the @samp{--density} flag, which is already the default,
|
||
|
the @code{no-density} directive takes precedence and only one of
|
||
|
the generic @code{ADD} instructions is optimized to be a @code{ADD.N}
|
||
|
machine instruction. An underscore prefix identifying a specific opcode
|
||
|
always takes precedence over directives and command-line flags.
|
||
|
|
||
|
The following directives are available:
|
||
|
@menu
|
||
|
* Density Directive:: Disable Use of Density Instructions.
|
||
|
* Relax Directive:: Disable Assembler Relaxation.
|
||
|
* Longcalls Directive:: Use Indirect Calls for Greater Range.
|
||
|
* Generics Directive:: Disable All Assembler Transformations.
|
||
|
* Literal Directive:: Intermix Literals with Instructions.
|
||
|
* Literal Position Directive:: Specify Inline Literal Pool Locations.
|
||
|
* Literal Prefix Directive:: Specify Literal Section Name Prefix.
|
||
|
* Freeregs Directive:: List Registers Available for Assembler Use.
|
||
|
* Frame Directive:: Describe a stack frame.
|
||
|
@end menu
|
||
|
|
||
|
@node Density Directive
|
||
|
@subsection density
|
||
|
@cindex @code{density} directive
|
||
|
@cindex @code{no-density} directive
|
||
|
|
||
|
The @code{density} and @code{no-density} directives enable or disable
|
||
|
optimization of generic instructions into density instructions within
|
||
|
the region. @xref{Density Instructions, ,Using Density Instructions}.
|
||
|
|
||
|
@smallexample
|
||
|
.begin [no-]density
|
||
|
.end [no-]density
|
||
|
@end smallexample
|
||
|
|
||
|
This optimization is enabled by default unless the Xtensa configuration
|
||
|
does not support the code density option or the @samp{--no-density}
|
||
|
command-line option was specified.
|
||
|
|
||
|
@node Relax Directive
|
||
|
@subsection relax
|
||
|
@cindex @code{relax} directive
|
||
|
@cindex @code{no-relax} directive
|
||
|
|
||
|
The @code{relax} directive enables or disables relaxation
|
||
|
within the region. @xref{Xtensa Relaxation, ,Xtensa Relaxation}.
|
||
|
Note: In the current implementation, these directives also control
|
||
|
whether assembler optimizations are performed, making them equivalent to
|
||
|
the @code{generics} and @code{no-generics} directives.
|
||
|
|
||
|
@smallexample
|
||
|
.begin [no-]relax
|
||
|
.end [no-]relax
|
||
|
@end smallexample
|
||
|
|
||
|
Relaxation is enabled by default unless the @samp{--no-relax}
|
||
|
command-line option was specified.
|
||
|
|
||
|
@node Longcalls Directive
|
||
|
@subsection longcalls
|
||
|
@cindex @code{longcalls} directive
|
||
|
@cindex @code{no-longcalls} directive
|
||
|
|
||
|
The @code{longcalls} directive enables or disables function call
|
||
|
relaxation. @xref{Xtensa Call Relaxation, ,Function Call Relaxation}.
|
||
|
|
||
|
@smallexample
|
||
|
.begin [no-]longcalls
|
||
|
.end [no-]longcalls
|
||
|
@end smallexample
|
||
|
|
||
|
Call relaxation is disabled by default unless the @samp{--longcalls}
|
||
|
command-line option is specified.
|
||
|
|
||
|
@node Generics Directive
|
||
|
@subsection generics
|
||
|
@cindex @code{generics} directive
|
||
|
@cindex @code{no-generics} directive
|
||
|
|
||
|
This directive enables or disables all assembler transformation,
|
||
|
including relaxation (@pxref{Xtensa Relaxation, ,Xtensa Relaxation}) and
|
||
|
optimization (@pxref{Xtensa Optimizations, ,Xtensa Optimizations}).
|
||
|
|
||
|
@smallexample
|
||
|
.begin [no-]generics
|
||
|
.end [no-]generics
|
||
|
@end smallexample
|
||
|
|
||
|
Disabling generics is roughly equivalent to adding an underscore prefix
|
||
|
to every opcode within the region, so that every opcode is treated as a
|
||
|
specific opcode. @xref{Xtensa Opcodes, ,Opcode Names}. In the current
|
||
|
implementation of @code{@value{AS}}, built-in macros are also disabled
|
||
|
within a @code{no-generics} region.
|
||
|
|
||
|
@node Literal Directive
|
||
|
@subsection literal
|
||
|
@cindex @code{literal} directive
|
||
|
|
||
|
The @code{.literal} directive is used to define literal pool data, i.e.,
|
||
|
read-only 32-bit data accessed via @code{L32R} instructions.
|
||
|
|
||
|
@smallexample
|
||
|
.literal @var{label}, @var{value}[, @var{value}@dots{}]
|
||
|
@end smallexample
|
||
|
|
||
|
This directive is similar to the standard @code{.word} directive, except
|
||
|
that the actual location of the literal data is determined by the
|
||
|
assembler and linker, not by the position of the @code{.literal}
|
||
|
directive. Using this directive gives the assembler freedom to locate
|
||
|
the literal data in the most appropriate place and possibly to combine
|
||
|
identical literals. For example, the code:
|
||
|
|
||
|
@smallexample
|
||
|
entry sp, 40
|
||
|
.literal .L1, sym
|
||
|
l32r a4, .L1
|
||
|
@end smallexample
|
||
|
|
||
|
can be used to load a pointer to the symbol @code{sym} into register
|
||
|
@code{a4}. The value of @code{sym} will not be placed between the
|
||
|
@code{ENTRY} and @code{L32R} instructions; instead, the assembler puts
|
||
|
the data in a literal pool.
|
||
|
|
||
|
By default literal pools are placed in a separate section; however, when
|
||
|
using the @samp{--text-@-section-@-literals} option (@pxref{Xtensa
|
||
|
Options, ,Command Line Options}), the literal pools are placed in the
|
||
|
current section. These text section literal pools are created
|
||
|
automatically before @code{ENTRY} instructions and manually after
|
||
|
@samp{.literal_position} directives (@pxref{Literal Position Directive,
|
||
|
,literal_position}). If there are no preceding @code{ENTRY}
|
||
|
instructions or @code{.literal_position} directives, the assembler will
|
||
|
print a warning and place the literal pool at the beginning of the
|
||
|
current section. In such cases, explicit @code{.literal_position}
|
||
|
directives should be used to place the literal pools.
|
||
|
|
||
|
@node Literal Position Directive
|
||
|
@subsection literal_position
|
||
|
@cindex @code{literal_position} directive
|
||
|
|
||
|
When using @samp{--text-@-section-@-literals} to place literals inline
|
||
|
in the section being assembled, the @code{.literal_position} directive
|
||
|
can be used to mark a potential location for a literal pool.
|
||
|
|
||
|
@smallexample
|
||
|
.literal_position
|
||
|
@end smallexample
|
||
|
|
||
|
The @code{.literal_position} directive is ignored when the
|
||
|
@samp{--text-@-section-@-literals} option is not used.
|
||
|
|
||
|
The assembler will automatically place text section literal pools
|
||
|
before @code{ENTRY} instructions, so the @code{.literal_position}
|
||
|
directive is only needed to specify some other location for a literal
|
||
|
pool. You may need to add an explicit jump instruction to skip over an
|
||
|
inline literal pool.
|
||
|
|
||
|
For example, an interrupt vector does not begin with an @code{ENTRY}
|
||
|
instruction so the assembler will be unable to automatically find a good
|
||
|
place to put a literal pool. Moreover, the code for the interrupt
|
||
|
vector must be at a specific starting address, so the literal pool
|
||
|
cannot come before the start of the code. The literal pool for the
|
||
|
vector must be explicitly positioned in the middle of the vector (before
|
||
|
any uses of the literals, of course). The @code{.literal_position}
|
||
|
directive can be used to do this. In the following code, the literal
|
||
|
for @samp{M} will automatically be aligned correctly and is placed after
|
||
|
the unconditional jump.
|
||
|
|
||
|
@smallexample
|
||
|
.global M
|
||
|
code_start:
|
||
|
j continue
|
||
|
.literal_position
|
||
|
.align 4
|
||
|
continue:
|
||
|
movi a4, M
|
||
|
@end smallexample
|
||
|
|
||
|
@node Literal Prefix Directive
|
||
|
@subsection literal_prefix
|
||
|
@cindex @code{literal_prefix} directive
|
||
|
|
||
|
The @code{literal_prefix} directive allows you to specify different
|
||
|
sections to hold literals from different portions of an assembly file.
|
||
|
With this directive, a single assembly file can be used to generate code
|
||
|
into multiple sections, including literals generated by the assembler.
|
||
|
|
||
|
@smallexample
|
||
|
.begin literal_prefix [@var{name}]
|
||
|
.end literal_prefix
|
||
|
@end smallexample
|
||
|
|
||
|
For the code inside the delimited region, the assembler puts literals in
|
||
|
the section @code{@var{name}.literal}. If this section does not yet
|
||
|
exist, the assembler creates it. The @var{name} parameter is
|
||
|
optional. If @var{name} is not specified, the literal prefix is set to
|
||
|
the ``default'' for the file. This default is usually @code{.literal}
|
||
|
but can be changed with the @samp{--rename-section} command-line
|
||
|
argument.
|
||
|
|
||
|
@node Freeregs Directive
|
||
|
@subsection freeregs
|
||
|
@cindex @code{freeregs} directive
|
||
|
|
||
|
This directive tells the assembler that the given registers are unused
|
||
|
in the region.
|
||
|
|
||
|
@smallexample
|
||
|
.begin freeregs @var{ri}[,@var{ri}@dots{}]
|
||
|
.end freeregs
|
||
|
@end smallexample
|
||
|
|
||
|
This allows the assembler to use these registers for relaxations or
|
||
|
optimizations. (They are actually only for relaxations at present, but
|
||
|
the possibility of optimizations exists in the future.)
|
||
|
|
||
|
Nested @code{freeregs} directives can be used to add additional registers
|
||
|
to the list of those available to the assembler. For example:
|
||
|
|
||
|
@smallexample
|
||
|
.begin freeregs a3, a4
|
||
|
.begin freeregs a5
|
||
|
@end smallexample
|
||
|
|
||
|
has the effect of declaring @code{a3}, @code{a4}, and @code{a5} all free.
|
||
|
|
||
|
@node Frame Directive
|
||
|
@subsection frame
|
||
|
@cindex @code{frame} directive
|
||
|
|
||
|
This directive tells the assembler to emit information to allow the
|
||
|
debugger to locate a function's stack frame. The syntax is:
|
||
|
|
||
|
@smallexample
|
||
|
.frame @var{reg}, @var{size}
|
||
|
@end smallexample
|
||
|
|
||
|
where @var{reg} is the register used to hold the frame pointer (usually
|
||
|
the same as the stack pointer) and @var{size} is the size in bytes of
|
||
|
the stack frame. The @code{.frame} directive is typically placed
|
||
|
immediately after the @code{ENTRY} instruction for a function.
|
||
|
|
||
|
In almost all circumstances, this information just duplicates the
|
||
|
information given in the function's @code{ENTRY} instruction; however,
|
||
|
there are two cases where this is not true:
|
||
|
|
||
|
@enumerate
|
||
|
@item
|
||
|
The size of the stack frame is too big to fit in the immediate field
|
||
|
of the @code{ENTRY} instruction.
|
||
|
|
||
|
@item
|
||
|
The frame pointer is different than the stack pointer, as with functions
|
||
|
that call @code{alloca}.
|
||
|
@end enumerate
|
||
|
|
||
|
@c Local Variables:
|
||
|
@c fill-column: 72
|
||
|
@c End:
|