1999-04-16 09:35:26 +08:00
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|
/* Main simulator entry points specific to the M32R.
|
2024-01-12 23:30:44 +08:00
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Copyright (C) 1996-2024 Free Software Foundation, Inc.
|
1999-04-16 09:35:26 +08:00
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Contributed by Cygnus Support.
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2003-12-11 19:33:44 +08:00
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This file is part of GDB, the GNU debugger.
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1999-04-16 09:35:26 +08:00
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2003-12-11 19:33:44 +08:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
|
2007-08-24 22:30:15 +08:00
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
|
1999-04-16 09:35:26 +08:00
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2003-12-11 19:33:44 +08:00
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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2007-08-24 22:30:15 +08:00
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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1999-04-16 09:35:26 +08:00
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2021-05-02 06:05:23 +08:00
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/* This must come before any other includes. */
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#include "defs.h"
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2021-11-16 12:04:10 +08:00
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#include <string.h>
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#include <stdlib.h>
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#include "sim/callback.h"
|
1999-04-16 09:35:26 +08:00
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#include "sim-main.h"
|
2022-12-23 08:11:04 +08:00
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#include "sim-hw.h"
|
1999-04-16 09:35:26 +08:00
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#include "sim-options.h"
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#include "libiberty.h"
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#include "bfd.h"
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|
2022-12-23 13:49:09 +08:00
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|
#include "m32r-sim.h"
|
2015-12-26 02:04:26 +08:00
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|
#include "dv-m32r_uart.h"
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2021-07-01 12:28:10 +08:00
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#define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
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1999-04-16 09:35:26 +08:00
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static void free_state (SIM_DESC);
|
2023-01-19 09:14:54 +08:00
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static void print_m32r_misc_cpu (SIM_CPU *cpu, bool verbose);
|
1999-04-16 09:35:26 +08:00
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/* Cover function of sim_state_free to free the cpu buffers as well. */
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static void
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free_state (SIM_DESC sd)
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{
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if (STATE_MODULES (sd) != NULL)
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|
sim_module_uninstall (sd);
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|
sim_cpu_free_all (sd);
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|
sim_state_free (sd);
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|
}
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|
2021-06-29 09:42:56 +08:00
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|
extern const SIM_MACH * const m32r_sim_machs[];
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1999-04-16 09:35:26 +08:00
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/* Create an instance of the simulator. */
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SIM_DESC
|
Do not use old-style definitions in sim
This changes all the non-generated (hand-written) code in sim to use
"new" (post-K&R) style function definitions.
2021-04-08 Tom Tromey <tom@tromey.com>
* bpf.c (bpf_def_model_init): Use new-style declaration.
sim/common/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* cgen-utils.c (RORQI, ROLQI, RORHI, ROLHI, RORSI, ROLSI): Use
new-style declaration.
sim/erc32/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sis.c (run_sim, main): Use new-style declaration.
* interf.c (run_sim, sim_open, sim_close, sim_load)
(sim_create_inferior, sim_store_register, sim_fetch_register)
(sim_info, sim_stop_reason, flush_windows, sim_do_command): Use
new-style declaration.
* help.c (usage, gen_help): Use new-style declaration.
* func.c (batch, set_regi, set_rega, disp_reg, limcalc)
(reset_stat, show_stat, init_bpt, int_handler, init_signals)
(disp_fpu, disp_regs, disp_ctrl, disp_mem, dis_mem, event)
(init_event, set_int, advance_time, now, wait_for_irq, check_bpt)
(reset_all, sys_reset, sys_halt): Use new-style declaration.
* float.c (get_accex, clear_accex, set_fsr): Use new-style
declaration.
* exec.c (sub_cc, add_cc, log_cc, dispatch_instruction, fpexec)
(chk_asi, execute_trap, check_interrupts, init_regs): Use
new-style declaration.
* erc32.c (init_sim, reset, decode_ersr, mecparerror)
(error_mode, decode_memcfg, decode_wcr, decode_mcr, sim_halt)
(close_port, exit_sim, mec_reset, mec_intack, chk_irq, mec_irq)
(set_sfsr, mec_read, mec_write, init_stdio, restore_stdio)
(port_init, read_uart, write_uart, flush_uart, uarta_tx)
(uartb_tx, uart_rx, uart_intr, uart_irq_start, wdog_intr)
(wdog_start, rtc_intr, rtc_start, rtc_counter_read)
(rtc_scaler_set, rtc_reload_set, gpt_intr, gpt_start)
(gpt_counter_read, gpt_scaler_set, gpt_reload_set, timer_ctrl)
(memory_read, memory_write, get_mem_ptr, sis_memory_write)
(sis_memory_read): Use new-style declaration.
sim/frv/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, frv_sim_close, sim_create_inferior): Use
new-style declaration.
sim/h8300/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* compile.c (cmdline_location): Use new-style declaration.
sim/iq2000/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
* iq2000.c (fetch_str): Use new-style declaration.
sim/lm32/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
sim/m32r/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
2021-04-08 20:41:25 +08:00
|
|
|
|
sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
|
|
|
|
|
char * const *argv)
|
1999-04-16 09:35:26 +08:00
|
|
|
|
{
|
|
|
|
|
SIM_DESC sd = sim_state_alloc (kind, callback);
|
|
|
|
|
char c;
|
|
|
|
|
int i;
|
|
|
|
|
|
sim: overhaul alignment settings management
Currently, the sim-config module will abort if alignment settings
haven't been specified by the port's configure.ac. This is a bit
weird when we've allowed SIM_AC_OPTION_ALIGNMENT to seem like it's
optional to use. Thus everyone invokes it.
There are 4 alignment settings, but really only 2 matters: strict
and nonstrict. The "mixed" setting is just the default ("unset"),
and "forced" isn't used directly by anyone (it's available as a
runtime option for some ports).
The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified). If none are specified, then the
build won't work (see above as if SIM_AC_OPTION_ALIGNMENT wasn't
called). If default settings are provided, then that is used, but
we allow the user to override at runtime. Otherwise, the "wire"
settings are used and user runtime options to change are ignored.
Most ports specify a default, or set the "wire" to nonstrict. A
few set "wire" to strict, but it's not clear that's necessary as
it doesn't make the code behavior, by default, any different. It
might make things a little faster, but we should provide the user
the choice of the compromises to make: force a specific mode at
compile time for faster runtime, or allow the choice at runtime.
More likely it seems like an oversight when these ports were
initially created, and/or copied & pasted from existing ports.
With all that backstory, let's get to what this commit does.
First kill off the idea of a compile-time default alignment and
set it to nonstrict in the common code. For any ports that want
strict alignment by default, that code is moved to sim_open while
initializing the sim. That means WITH_DEFAULT_ALIGNMENT can be
completely removed.
Moving the default alignment to the runtime also allows removal
of setting the "wire" settings at configure time. Which allows
removing of all arguments to SIM_AC_OPTION_ALIGNMENT and moving
that call to common code.
The macro logic can be reworked to not pass WITH_ALIGNMENT as -D
CPPFLAG and instead move it to config.h.
All of these taken together mean we can hoist the macro up to the
top level and share it among all sims so behavior is consistent
among all the ports.
2021-06-07 12:54:20 +08:00
|
|
|
|
/* Set default options before parsing user options. */
|
2021-06-29 09:42:56 +08:00
|
|
|
|
STATE_MACHS (sd) = m32r_sim_machs;
|
2021-06-29 10:07:44 +08:00
|
|
|
|
STATE_MODEL_NAME (sd) = "m32r/d";
|
sim: overhaul alignment settings management
Currently, the sim-config module will abort if alignment settings
haven't been specified by the port's configure.ac. This is a bit
weird when we've allowed SIM_AC_OPTION_ALIGNMENT to seem like it's
optional to use. Thus everyone invokes it.
There are 4 alignment settings, but really only 2 matters: strict
and nonstrict. The "mixed" setting is just the default ("unset"),
and "forced" isn't used directly by anyone (it's available as a
runtime option for some ports).
The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified). If none are specified, then the
build won't work (see above as if SIM_AC_OPTION_ALIGNMENT wasn't
called). If default settings are provided, then that is used, but
we allow the user to override at runtime. Otherwise, the "wire"
settings are used and user runtime options to change are ignored.
Most ports specify a default, or set the "wire" to nonstrict. A
few set "wire" to strict, but it's not clear that's necessary as
it doesn't make the code behavior, by default, any different. It
might make things a little faster, but we should provide the user
the choice of the compromises to make: force a specific mode at
compile time for faster runtime, or allow the choice at runtime.
More likely it seems like an oversight when these ports were
initially created, and/or copied & pasted from existing ports.
With all that backstory, let's get to what this commit does.
First kill off the idea of a compile-time default alignment and
set it to nonstrict in the common code. For any ports that want
strict alignment by default, that code is moved to sim_open while
initializing the sim. That means WITH_DEFAULT_ALIGNMENT can be
completely removed.
Moving the default alignment to the runtime also allows removal
of setting the "wire" settings at configure time. Which allows
removing of all arguments to SIM_AC_OPTION_ALIGNMENT and moving
that call to common code.
The macro logic can be reworked to not pass WITH_ALIGNMENT as -D
CPPFLAG and instead move it to config.h.
All of these taken together mean we can hoist the macro up to the
top level and share it among all sims so behavior is consistent
among all the ports.
2021-06-07 12:54:20 +08:00
|
|
|
|
current_alignment = STRICT_ALIGNMENT;
|
sim: overhaul & unify endian settings management
The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified). If none are specified, the arch is
expected to support both, and the value will be probed based on the
user runtime options or the input program.
Only two arches today set the default value (bpf & mips). We can
probably let this go as it only shows up in one scenario: the sim
is invoked, but with no inputs, and no user endian selection. This
means bpf will not behave like the other arches: an error is shown
and forces the user to make a choice. If an input program is used
though, we'll still switch the default to that. This allows us to
remove the WITH_DEFAULT_TARGET_BYTE_ORDER setting.
For the ports that set a "wire" endian, move it to the runtime init
of the respective sim_open calls. This allows us to change the
WITH_TARGET_BYTE_ORDER to purely a user-selected configure setting
if they want to force a specific endianness.
With all the endian logic moved to runtime selection, we can move
the configure call up to the common dir so we only process it once
across all ports.
The ppc arch was picking the wire endian based on the target used,
but since we weren't doing that for other biendian arches, we can
let this go too. We'll rely on the input selecting the endian, or
make the user decide.
2021-06-16 07:51:52 +08:00
|
|
|
|
current_target_byte_order = BFD_ENDIAN_BIG;
|
sim: overhaul alignment settings management
Currently, the sim-config module will abort if alignment settings
haven't been specified by the port's configure.ac. This is a bit
weird when we've allowed SIM_AC_OPTION_ALIGNMENT to seem like it's
optional to use. Thus everyone invokes it.
There are 4 alignment settings, but really only 2 matters: strict
and nonstrict. The "mixed" setting is just the default ("unset"),
and "forced" isn't used directly by anyone (it's available as a
runtime option for some ports).
The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified). If none are specified, then the
build won't work (see above as if SIM_AC_OPTION_ALIGNMENT wasn't
called). If default settings are provided, then that is used, but
we allow the user to override at runtime. Otherwise, the "wire"
settings are used and user runtime options to change are ignored.
Most ports specify a default, or set the "wire" to nonstrict. A
few set "wire" to strict, but it's not clear that's necessary as
it doesn't make the code behavior, by default, any different. It
might make things a little faster, but we should provide the user
the choice of the compromises to make: force a specific mode at
compile time for faster runtime, or allow the choice at runtime.
More likely it seems like an oversight when these ports were
initially created, and/or copied & pasted from existing ports.
With all that backstory, let's get to what this commit does.
First kill off the idea of a compile-time default alignment and
set it to nonstrict in the common code. For any ports that want
strict alignment by default, that code is moved to sim_open while
initializing the sim. That means WITH_DEFAULT_ALIGNMENT can be
completely removed.
Moving the default alignment to the runtime also allows removal
of setting the "wire" settings at configure time. Which allows
removing of all arguments to SIM_AC_OPTION_ALIGNMENT and moving
that call to common code.
The macro logic can be reworked to not pass WITH_ALIGNMENT as -D
CPPFLAG and instead move it to config.h.
All of these taken together mean we can hoist the macro up to the
top level and share it among all sims so behavior is consistent
among all the ports.
2021-06-07 12:54:20 +08:00
|
|
|
|
|
1999-04-16 09:35:26 +08:00
|
|
|
|
/* The cpu data is kept in a separately allocated chunk of memory. */
|
2022-12-25 13:53:25 +08:00
|
|
|
|
if (sim_cpu_alloc_all_extra (sd, 0, sizeof (struct m32r_sim_cpu))
|
2022-11-01 21:04:48 +08:00
|
|
|
|
!= SIM_RC_OK)
|
1999-04-16 09:35:26 +08:00
|
|
|
|
{
|
|
|
|
|
free_state (sd);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
|
|
|
|
|
{
|
|
|
|
|
free_state (sd);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
2016-01-04 10:40:34 +08:00
|
|
|
|
/* The parser will print an error message for us, so we silently return. */
|
1999-04-16 09:35:26 +08:00
|
|
|
|
if (sim_parse_args (sd, argv) != SIM_RC_OK)
|
|
|
|
|
{
|
|
|
|
|
free_state (sd);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Allocate a handler for the control registers and other devices
|
|
|
|
|
if no memory for that range has been allocated by the user.
|
|
|
|
|
All are allocated in one chunk to keep things from being
|
2015-12-26 02:04:26 +08:00
|
|
|
|
unnecessarily complicated.
|
|
|
|
|
TODO: Move these to the sim-model framework. */
|
|
|
|
|
sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
|
|
|
|
|
sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
|
1999-04-16 09:35:26 +08:00
|
|
|
|
|
|
|
|
|
/* Allocate core managed memory if none specified by user.
|
|
|
|
|
Use address 4 here in case the user wanted address 0 unmapped. */
|
|
|
|
|
if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
|
|
|
|
|
sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
|
|
|
|
|
|
|
|
|
|
/* check for/establish the reference program image */
|
2021-11-15 15:32:06 +08:00
|
|
|
|
if (sim_analyze_program (sd, STATE_PROG_FILE (sd), abfd) != SIM_RC_OK)
|
1999-04-16 09:35:26 +08:00
|
|
|
|
{
|
|
|
|
|
free_state (sd);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Establish any remaining configuration options. */
|
|
|
|
|
if (sim_config (sd) != SIM_RC_OK)
|
|
|
|
|
{
|
|
|
|
|
free_state (sd);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (sim_post_argv_init (sd) != SIM_RC_OK)
|
|
|
|
|
{
|
|
|
|
|
free_state (sd);
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Open a copy of the cpu descriptor table. */
|
|
|
|
|
{
|
1999-04-27 02:34:20 +08:00
|
|
|
|
CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
|
|
|
|
|
CGEN_ENDIAN_BIG);
|
1999-04-16 09:35:26 +08:00
|
|
|
|
for (i = 0; i < MAX_NR_PROCESSORS; ++i)
|
|
|
|
|
{
|
|
|
|
|
SIM_CPU *cpu = STATE_CPU (sd, i);
|
|
|
|
|
CPU_CPU_DESC (cpu) = cd;
|
|
|
|
|
CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
|
|
|
|
|
}
|
|
|
|
|
m32r_cgen_init_dis (cd);
|
|
|
|
|
}
|
|
|
|
|
|
2022-12-25 13:48:30 +08:00
|
|
|
|
for (i = 0; i < MAX_NR_PROCESSORS; ++i)
|
1999-04-16 09:35:26 +08:00
|
|
|
|
{
|
|
|
|
|
/* Only needed for profiling, but the structure member is small. */
|
|
|
|
|
memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
|
|
|
|
|
sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
|
|
|
|
|
/* Hook in callback for reporting these stats */
|
|
|
|
|
PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
|
|
|
|
|
= print_m32r_misc_cpu;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return sd;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
SIM_RC
|
Do not use old-style definitions in sim
This changes all the non-generated (hand-written) code in sim to use
"new" (post-K&R) style function definitions.
2021-04-08 Tom Tromey <tom@tromey.com>
* bpf.c (bpf_def_model_init): Use new-style declaration.
sim/common/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* cgen-utils.c (RORQI, ROLQI, RORHI, ROLHI, RORSI, ROLSI): Use
new-style declaration.
sim/erc32/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sis.c (run_sim, main): Use new-style declaration.
* interf.c (run_sim, sim_open, sim_close, sim_load)
(sim_create_inferior, sim_store_register, sim_fetch_register)
(sim_info, sim_stop_reason, flush_windows, sim_do_command): Use
new-style declaration.
* help.c (usage, gen_help): Use new-style declaration.
* func.c (batch, set_regi, set_rega, disp_reg, limcalc)
(reset_stat, show_stat, init_bpt, int_handler, init_signals)
(disp_fpu, disp_regs, disp_ctrl, disp_mem, dis_mem, event)
(init_event, set_int, advance_time, now, wait_for_irq, check_bpt)
(reset_all, sys_reset, sys_halt): Use new-style declaration.
* float.c (get_accex, clear_accex, set_fsr): Use new-style
declaration.
* exec.c (sub_cc, add_cc, log_cc, dispatch_instruction, fpexec)
(chk_asi, execute_trap, check_interrupts, init_regs): Use
new-style declaration.
* erc32.c (init_sim, reset, decode_ersr, mecparerror)
(error_mode, decode_memcfg, decode_wcr, decode_mcr, sim_halt)
(close_port, exit_sim, mec_reset, mec_intack, chk_irq, mec_irq)
(set_sfsr, mec_read, mec_write, init_stdio, restore_stdio)
(port_init, read_uart, write_uart, flush_uart, uarta_tx)
(uartb_tx, uart_rx, uart_intr, uart_irq_start, wdog_intr)
(wdog_start, rtc_intr, rtc_start, rtc_counter_read)
(rtc_scaler_set, rtc_reload_set, gpt_intr, gpt_start)
(gpt_counter_read, gpt_scaler_set, gpt_reload_set, timer_ctrl)
(memory_read, memory_write, get_mem_ptr, sis_memory_write)
(sis_memory_read): Use new-style declaration.
sim/frv/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, frv_sim_close, sim_create_inferior): Use
new-style declaration.
sim/h8300/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* compile.c (cmdline_location): Use new-style declaration.
sim/iq2000/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
* iq2000.c (fetch_str): Use new-style declaration.
sim/lm32/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
sim/m32r/ChangeLog
2021-04-08 Tom Tromey <tom@tromey.com>
* sim-if.c (sim_open, sim_create_inferior): Use new-style
declaration.
2021-04-08 20:41:25 +08:00
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sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv,
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2021-11-16 12:00:04 +08:00
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char * const *env)
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1999-04-16 09:35:26 +08:00
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{
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SIM_CPU *current_cpu = STATE_CPU (sd, 0);
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2021-11-16 12:04:10 +08:00
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host_callback *cb = STATE_CALLBACK (sd);
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2022-11-12 02:13:26 +08:00
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bfd_vma addr;
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1999-04-16 09:35:26 +08:00
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if (abfd != NULL)
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addr = bfd_get_start_address (abfd);
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else
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addr = 0;
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sim_pc_set (current_cpu, addr);
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2021-07-01 12:28:10 +08:00
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if (STATE_ENVIRONMENT (sd) == USER_ENVIRONMENT)
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{
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m32rbf_h_cr_set (current_cpu,
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m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
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m32rbf_h_cr_set (current_cpu,
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m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
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}
|
2003-12-19 19:44:01 +08:00
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2015-12-26 20:05:41 +08:00
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/* Standalone mode (i.e. `run`) will take care of the argv for us in
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sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
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with `gdb`), we need to handle it because the user can change the
|
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argv on the fly via gdb's 'run'. */
|
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if (STATE_PROG_ARGV (sd) != argv)
|
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|
{
|
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freeargv (STATE_PROG_ARGV (sd));
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STATE_PROG_ARGV (sd) = dupargv (argv);
|
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|
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|
}
|
1999-04-16 09:35:26 +08:00
|
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|
|
|
2021-11-16 12:00:04 +08:00
|
|
|
|
if (STATE_PROG_ENVP (sd) != env)
|
|
|
|
|
{
|
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|
|
|
freeargv (STATE_PROG_ENVP (sd));
|
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|
|
|
STATE_PROG_ENVP (sd) = dupargv (env);
|
|
|
|
|
}
|
|
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|
|
2021-11-16 12:04:10 +08:00
|
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|
|
cb->argv = STATE_PROG_ARGV (sd);
|
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|
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|
cb->envp = STATE_PROG_ENVP (sd);
|
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|
|
|
|
1999-04-16 09:35:26 +08:00
|
|
|
|
return SIM_RC_OK;
|
|
|
|
|
}
|
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|
/* PROFILE_CPU_CALLBACK */
|
|
|
|
|
|
|
|
|
|
static void
|
2023-01-19 09:14:54 +08:00
|
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|
|
print_m32r_misc_cpu (SIM_CPU *cpu, bool verbose)
|
1999-04-16 09:35:26 +08:00
|
|
|
|
{
|
|
|
|
|
SIM_DESC sd = CPU_STATE (cpu);
|
|
|
|
|
char buf[20];
|
|
|
|
|
|
|
|
|
|
if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
|
|
|
|
|
{
|
|
|
|
|
sim_io_printf (sd, "Miscellaneous Statistics\n\n");
|
|
|
|
|
sim_io_printf (sd, " %-*s %s\n\n",
|
|
|
|
|
PROFILE_LABEL_WIDTH, "Fill nops:",
|
|
|
|
|
sim_add_commas (buf, sizeof (buf),
|
|
|
|
|
CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
|
1999-10-12 12:37:53 +08:00
|
|
|
|
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
|
|
|
|
|
sim_io_printf (sd, " %-*s %s\n\n",
|
|
|
|
|
PROFILE_LABEL_WIDTH, "Parallel insns:",
|
|
|
|
|
sim_add_commas (buf, sizeof (buf),
|
|
|
|
|
CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
|
2003-12-11 19:33:44 +08:00
|
|
|
|
if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
|
|
|
|
|
sim_io_printf (sd, " %-*s %s\n\n",
|
|
|
|
|
PROFILE_LABEL_WIDTH, "Parallel insns:",
|
|
|
|
|
sim_add_commas (buf, sizeof (buf),
|
|
|
|
|
CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
|
1999-04-16 09:35:26 +08:00
|
|
|
|
}
|
|
|
|
|
}
|