binutils-gdb/gas/config/tc-ppc.h

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/* tc-ppc.h -- Header file for tc-ppc.c.
Copyright (C) 1994-2022 Free Software Foundation, Inc.
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Written by Ian Lance Taylor, Cygnus Support.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
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#define TC_PPC
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#include "opcode/ppc.h"
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struct fix;
/* Set the endianness we are using. Default to big endian. */
#ifndef TARGET_BYTES_BIG_ENDIAN
#define TARGET_BYTES_BIG_ENDIAN 1
#endif
Remove powerpc PE support Plus some leftover powerpc lynxos support. bfd/ * coff-ppc.c: Delete. * pe-ppc.c: Delete. * pei-ppc.c: Delete. * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Remove PE PPC. * coffcode.h (coff_set_arch_mach_hook, coff_set_flags): Remove PPCMAGIC code. (coff_write_object_contents): Remove PPC_PE code. * config.bfd: Move powerpcle-pe to removed targets. * configure.ac: Remove powerpc PE entries. * libcoff-in.h (ppc_allocate_toc_section): Delete. (ppc_process_before_allocation): Delete. * peXXigen.c: Remove POWERPC_LE_PE code and comments. * targets.c: Remove powerpc PE vectors. * po/SRC-POTFILES.in: Regenerate. * libcoff.h: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. binutils/ * dlltool.c: Remove powerpc PE support and comments. * configure.ac: Remove powerpc PE dlltool config. * configure: Regenerate. gas/ * config/obj-coff.h: Remove TE_PE support. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * configure.tgt: Remove powerpc PE and powerpc lynxos. * testsuite/gas/cfi/cfi.exp (cfi-common-6): Remove powerpc PE condition. * testsuite/gas/macros/macros.exp: Don't xfail powerpc PE. include/ * coff/powerpc.h: Delete. ld/ * emulparams/ppcpe.sh: Delete. * scripttempl/ppcpe.sc: Delete. * emulparams/ppclynx.sh: Delete. * Makefile.am (ALL_EMULATION_SOURCES): Remove ppc PE and lynxos. * configure.tgt: Likewise. * emultempl/beos.em: Remove powerpc PE support. * emultempl/pe.em: Likewise. * po/BLD-POTFILES.in: Regenerate. * Makefile.in: Regenerate.
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/* If OBJ_COFF is defined we are assembling XCOFF for AIX or PowerMac. */
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#ifdef OBJ_COFF
#define OBJ_XCOFF
#endif
/* The target BFD architecture. */
#define TARGET_ARCH (ppc_arch ())
Add XCOFF64 support. bfd: * Makefile.am (coff64-rs6000.lo): New rule. * Makefile.in: Regenerate. * coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data, xcoff_is_local_label_name, xcoff_rtype2howto, xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p, xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap, xcoff_write_archive_contents): No longer static, and prefix with _bfd_. (NO_COFF_SYMBOLS): Define. (xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in, xcoff64_swap_aux_out): New functions; handle xcoff symbol tables internally. (MINUS_ONE): New macro. (xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS relocation. (coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in, coff_SWAP_aux_out): Map to the new functions. * coff64-rs6000.c: New file. * libcoff.h (bfd_coff_backend_data): Add new fields _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length. (bfd_coff_force_symnames_in_strings, bfd_coff_debug_string_prefix_length): New macros for above fields. * coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic. Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead of using coff_swap_sym_in directly. (FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64. (coff_set_flags) Set magic for XCOFF64. (coff_compute_section_file_positions): Add symbol name length to string section length if bfd_coff_debug_string_prefix_length is true. (coff_write_object_contents): Don't do reloc overflow for XCOFF64. (coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of using coff_swap_lineno_in directly. (bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length fields. * coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force symbol names into strings table when bfd_coff_force_symnames_in_strings is true. * coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR, SET_RELOC_VADDR): New macros. (coff_swap_reloc_in, coff_swap_reloc_out): Use above macros. (coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C code. (coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64 changes within RS6000COFF_C specific code. (coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC, MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO. * reloc.c (bfd_perform_relocation, bfd_install_relocation): Extend existing hack on target name. * xcofflink.c (XCOFF_XVECP): Extend existing hack on target name. * coff-tic54x.c (ticof): Keep up to date with new fields in bfd_coff_backend_data. * config.bfd: Add bfd_powerpc_64_arch to targ_arch and define targ_selvecs to include rs6000coff64_vec for rs6000. * configure.in: Add rs6000coff64_vec case. * cpu-powerpc.c: New bfd_arch_info_type. gas: * as.c (parse_args): Allow md_parse_option to override -a listing option. * config/obj-coff.c (add_lineno): Change type of offset parameter from "int" to "bfd_vma." * config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine." (ppc_mach, ppc_subseg_align, ppc_target_format): New. (ppc_change_csect): Align correctly for XCOFF64. (ppc_machine): New function, which discards "ppc_machine" line. (ppc_tc): Cons for 8 when code is 64 bit. (md_apply_fix3): Don't check operand->insert. Handle 64 bit relocations. (md_parse_option): Handle -a64 and -a32. (ppc_xcoff64): New. * config/tc-ppc.h (TARGET_MACH): Define. (TARGET_FORMAT): Move to function. (SUB_SEGMENT_ALIGN): Use ppc_subseg_align. include: * include/coff/rs6k64.h: New file. opcodes: * configure.in: Add bfd_powerpc_64_arch. * disassemble.c (disassembler): Use print_insn_big_powerpc for 64 bit code.
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#define TARGET_MACH (ppc_mach ())
extern enum bfd_architecture ppc_arch (void);
extern unsigned long ppc_mach (void);
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/* Whether or not the target is big endian */
extern int target_big_endian;
/* The target BFD format. */
Add XCOFF64 support. bfd: * Makefile.am (coff64-rs6000.lo): New rule. * Makefile.in: Regenerate. * coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data, xcoff_is_local_label_name, xcoff_rtype2howto, xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p, xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap, xcoff_write_archive_contents): No longer static, and prefix with _bfd_. (NO_COFF_SYMBOLS): Define. (xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in, xcoff64_swap_aux_out): New functions; handle xcoff symbol tables internally. (MINUS_ONE): New macro. (xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS relocation. (coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in, coff_SWAP_aux_out): Map to the new functions. * coff64-rs6000.c: New file. * libcoff.h (bfd_coff_backend_data): Add new fields _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length. (bfd_coff_force_symnames_in_strings, bfd_coff_debug_string_prefix_length): New macros for above fields. * coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic. Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead of using coff_swap_sym_in directly. (FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64. (coff_set_flags) Set magic for XCOFF64. (coff_compute_section_file_positions): Add symbol name length to string section length if bfd_coff_debug_string_prefix_length is true. (coff_write_object_contents): Don't do reloc overflow for XCOFF64. (coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of using coff_swap_lineno_in directly. (bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings and _bfd_coff_debug_string_prefix_length fields. * coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force symbol names into strings table when bfd_coff_force_symnames_in_strings is true. * coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR, SET_RELOC_VADDR): New macros. (coff_swap_reloc_in, coff_swap_reloc_out): Use above macros. (coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C code. (coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64 changes within RS6000COFF_C specific code. (coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC, MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO. * reloc.c (bfd_perform_relocation, bfd_install_relocation): Extend existing hack on target name. * xcofflink.c (XCOFF_XVECP): Extend existing hack on target name. * coff-tic54x.c (ticof): Keep up to date with new fields in bfd_coff_backend_data. * config.bfd: Add bfd_powerpc_64_arch to targ_arch and define targ_selvecs to include rs6000coff64_vec for rs6000. * configure.in: Add rs6000coff64_vec case. * cpu-powerpc.c: New bfd_arch_info_type. gas: * as.c (parse_args): Allow md_parse_option to override -a listing option. * config/obj-coff.c (add_lineno): Change type of offset parameter from "int" to "bfd_vma." * config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine." (ppc_mach, ppc_subseg_align, ppc_target_format): New. (ppc_change_csect): Align correctly for XCOFF64. (ppc_machine): New function, which discards "ppc_machine" line. (ppc_tc): Cons for 8 when code is 64 bit. (md_apply_fix3): Don't check operand->insert. Handle 64 bit relocations. (md_parse_option): Handle -a64 and -a32. (ppc_xcoff64): New. * config/tc-ppc.h (TARGET_MACH): Define. (TARGET_FORMAT): Move to function. (SUB_SEGMENT_ALIGN): Use ppc_subseg_align. include: * include/coff/rs6k64.h: New file. opcodes: * configure.in: Add bfd_powerpc_64_arch. * disassemble.c (disassembler): Use print_insn_big_powerpc for 64 bit code.
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#define TARGET_FORMAT (ppc_target_format ())
Convert more variables to a constant form. * as.c (select_emulation_mode): Add const qualifiers. * as.h: Likewise. * config/bfin-defs.h: Likewise. * config/bfin-parse.y: Likewise. * config/rx-parse.y: Likewise. * config/tc-aarch64.c (struct aarch64_option_table): Likewise. (struct aarch64_cpu_option_table): Likewise. (struct aarch64_arch_option_table): Likewise. (struct aarch64_option_cpu_value_table): Likewise. (struct aarch64_long_option_table): Likewise. (struct aarch64_option_abi_value_table): Likewise. * config/tc-arm.c (struct reloc_entry): Likewise. (tc_gen_reloc): Likewise. (struct arm_option_table): Likewise. (struct arm_legacy_option_table): Likewise. (struct arm_cpu_option_table): Likewise. (struct arm_arch_option_table): Likewise. (struct arm_option_extension_value_table): Likewise. (struct arm_option_fpu_value_table): Likewise. (struct arm_option_value_table): Likewise. (struct arm_long_option_table): Likewise. * config/tc-avr.c (struct avr_opcodes_s): Likewise. (struct mcu_type_s): Likewise. (struct exp_mod_s): Likewise. (avr_operand): Likewise. (avr_operands): Likewise. * config/tc-d10v.c (md_begin): Likewise. * config/tc-dlx.c: Likewise. * config/tc-fr30.c (fr30_is_colon_insn): Likewise. * config/tc-ft32.c (parse_condition): Likewise. * config/tc-h8300.c (do_a_fix_imm): Likewise. * config/tc-hppa.c (pa_ip): Likewise. (hppa_regname_to_dw2regnum): Likewise. * config/tc-i370.c (i370_elf_suffix): Likewise. * config/tc-i960.c (struct tabentry): Likewise. * config/tc-m32r.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-mcore.c (parse_psrmod): Likewise. * config/tc-metag.c (struct metag_core_option): Likewise. (struct metag_long_option): Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mips.c (macro): Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-msp430.c (struct rcodes_s): Likewise. (struct hcodes_s): Likewise. (md_parse_option): Likewise. * config/tc-ns32k.c (struct ns32k_option): Likewise. (optlist): Likewise. * config/tc-ppc.c (ppc_elf_suffix): Likewise. (tc_ppc_regname_to_dw2regnum): Likewise. * config/tc-ppc.h: Likewise. * config/tc-rl78.c: Likewise. * config/tc-rx.c (struct cpu_type): Likewise. * config/tc-sh.c (sh_regname_to_dw2regnum): Likewise. * config/tc-sparc.c (struct priv_reg_entry): Likewise. (sparc_ip): Likewise. * config/tc-spu.c (insn_fmt_string): Likewise. * config/tc-tic54x.c (tic54x_set_default_include): Likewise. * config/tc-v850.c: Likewise. * config/tc-visium.c (struct visium_arch_option_table): Likewise. (struct visium_long_option_table): Likewise. * config/tc-xgate.c: Likewise. * config/tc-z8k.c: Likewise. * read.c (add_include_dir): Likewise. * read.h: Likewise.
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extern const char *ppc_target_format (void);
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/* Permit temporary numeric labels. */
#define LOCAL_LABELS_FB 1
/* $ is used to refer to the current location. */
#define DOLLAR_DOT
/* Strings do not use backslash escapes under COFF. */
#ifdef OBJ_COFF
#define TC_STRING_ESCAPES 0
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#endif
#ifdef OBJ_ELF
#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
#endif
#if TARGET_BYTES_BIG_ENDIAN
#define PPC_BIG_ENDIAN 1
#else
#define PPC_BIG_ENDIAN 0
#endif
/* We don't need to handle .word strangely. */
#define WORKING_DOT_WORD
* configure.in: Recognise powerpc*le*, not just powerpcle*. * configure: Regenerate. * config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER, PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros. (md_assemble): Use them. (ppc_machine): Support stub for ELF64 as well as XCOFF. (md_pseudo_table): Add "llong", "quad". (md_parse_option): Match default_cpu of powerpc*. (ppc_arch): Likewise. (ppc_subseg_align): Only for OBJ_XCOFF. (ppc_target_format): Return elf64-powerpc strings for 64 bit ELF. (md_begin): Select PPC_OPCODE_64 for 64 bit. (ppc_insert_operand): Don't bother testing 'file' before calling as_bad_where. Use as_bad_where for operand->insert errors. (mapping): Add ELF64 relocation modifiers. (ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc expressions with abs_symbol. (ppc_elf_cons): Correct offset for little endian targets. (ppc_elf_frob_symbol): New. (md_assemble): Add support for 64 bit ELF relocs. (ppc_tc): Ensure 8 byte alignment when 64 bit. (ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match ".toc" section for 64 bit ELF. (ppc_fix_adjustable): New. Macro body moved from tc-ppc.h. (md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit, use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16. Expand on comments, error message. Add support for 64 bit relocs, and use PPC_HI etc. macros. * config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define. (HANDLE_ALIGN): Define to generate nops in code sections rather than zeros. (TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC. (ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections. (tc_fix_adjustable): Move body of macro to tc-ppc.c. (ppc_fix_adjustable): Declare. (tc_frob_symbol): Define. (ppc_elf_frob_symbol): Declare.
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#define MAX_MEM_FOR_RS_ALIGN_CODE 4
#define HANDLE_ALIGN(FRAGP) \
if ((FRAGP)->fr_type == rs_align_code) \
ppc_handle_align (FRAGP);
extern unsigned int ppc_nop_select (void);
#define NOP_OPCODE ppc_nop_select ()
extern void ppc_handle_align (struct frag *);
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-15 03:45:30 +08:00
extern void ppc_frag_check (struct frag *);
#ifdef OBJ_ELF
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
#endif
* configure.in: Recognise powerpc*le*, not just powerpcle*. * configure: Regenerate. * config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER, PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros. (md_assemble): Use them. (ppc_machine): Support stub for ELF64 as well as XCOFF. (md_pseudo_table): Add "llong", "quad". (md_parse_option): Match default_cpu of powerpc*. (ppc_arch): Likewise. (ppc_subseg_align): Only for OBJ_XCOFF. (ppc_target_format): Return elf64-powerpc strings for 64 bit ELF. (md_begin): Select PPC_OPCODE_64 for 64 bit. (ppc_insert_operand): Don't bother testing 'file' before calling as_bad_where. Use as_bad_where for operand->insert errors. (mapping): Add ELF64 relocation modifiers. (ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc expressions with abs_symbol. (ppc_elf_cons): Correct offset for little endian targets. (ppc_elf_frob_symbol): New. (md_assemble): Add support for 64 bit ELF relocs. (ppc_tc): Ensure 8 byte alignment when 64 bit. (ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match ".toc" section for 64 bit ELF. (ppc_fix_adjustable): New. Macro body moved from tc-ppc.h. (md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit, use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16. Expand on comments, error message. Add support for 64 bit relocs, and use PPC_HI etc. macros. * config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define. (HANDLE_ALIGN): Define to generate nops in code sections rather than zeros. (TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC. (ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections. (tc_fix_adjustable): Move body of macro to tc-ppc.c. (ppc_fix_adjustable): Declare. (tc_frob_symbol): Define. (ppc_elf_frob_symbol): Declare.
2001-08-27 18:42:16 +08:00
Add support for PowerPC VLE. 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
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#define md_frag_check(FRAGP) ppc_frag_check (FRAGP)
/* Arrange to store the value of ppc_cpu at the site of a fixup
for later use in md_apply_fix. */
struct _ppc_fix_extra
{
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ppc_cpu_t ppc_cpu;
};
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extern ppc_cpu_t ppc_cpu;
#define TC_FIX_TYPE struct _ppc_fix_extra
#define TC_INIT_FIX_DATA(FIXP) \
do { (FIXP)->tc_fix_data.ppc_cpu = ppc_cpu; } while (0)
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#ifdef OBJ_XCOFF
/* Declarations needed when generating XCOFF code. XCOFF is an
extension of COFF, used only on the RS/6000. Rather than create an
obj-xcoff, we just use obj-coff, and handle the extensions here in
tc-ppc. */
/* We need to keep some information for symbols. */
struct ppc_tc_sy
{
/* We keep a few linked lists of symbols. */
Add support for storing local symbols in a small structure to save memory when assembling large files. * as.h: Don't include struc-symbol.h. (symbolS): Add typedef. * symbols.c: Include struc-symbol.h. (local_hash): New static variable. (save_symbol_name): New static function, from symbol_create. (symbol_create): Call save_symbol_name. (local_symbol_count): New static variable. (local_symbol_conversion_count): Likewise. (LOCAL_SYMBOL_CHECK): Define. (local_symbol_make): New static function. (local_symbol_convert): New static function. (colon): Handle local symbols. Create local symbol for local label name. (symbol_table_insert): Handle local symbols. (symbol_find_or_make): Create local symbol for local label name. (symbol_find_base): Check for local symbol. (symbol_append, symbol_insert): Check for local symbols. (symbol_clear_list_pointers, symbol_remove): Likewise. (verify_symbol_chain): Likewise. (copy_symbol_attributes): Likewise. (resolve_symbol_value): Handle local symbols. (resolve_local_symbol): New static function. (resolve_local_symbol_values): New function. (S_GET_VALUE, S_SET_VALUE): Handle local symbols. (S_IS_FUNCTION, S_IS_EXTERNAL, S_IS_WEAK, S_IS_COMMON): Likewise. (S_IS_DEFINED, S_IS_DEBUG, S_IS_LOCAL, S_GET_NAME): Likewise. (S_GET_SEGMENT, S_SET_SEGMENT, S_SET_EXTERNAL): Likewise. (S_CLEAR_EXTERNAL, S_SET_WEAK, S_SET_NAME): Likewise. (symbol_previous, symbol_next): New functions. (symbol_get_value_expression): Likewise. (symbol_set_value_expression): Likewise. (symbol_set_frag, symbol_get_frag): Likewise. (symbol_mark_used, symbol_clear_used, symbol_used_p): Likewise. (symbol_mark_used_in_reloc): Likewise. (symbol_clear_used_in_reloc, symbol_used_in_reloc_p): Likewise. (symbol_mark_mri_common, symbol_clear_mri_common): Likewise. (symbol_mri_common_p): Likewise. (symbol_mark_written, symbol_clear_written): Likewise. (symbol_written_p): Likewise. (symbol_mark_resolved, symbol_resolved_p): Likewise. (symbol_section_p, symbol_equated_p): Likewise. (symbol_constant_p): Likewise. (symbol_get_bfdsym, symbol_set_bfdsym): Likewise. (symbol_get_obj, symbol_set_obj): Likewise. (symbol_get_tc, symbol_set_tc): Likewise. (symbol_begin): Initialize local_hash. (print_symbol_value_1): Handle local symbols. (symbol_print_statistics): Print local symbol statistics. * symbols.h: Include "struc-symbol.h" if not BFD_ASSEMBLER. Declare new symbols.c functions. Move many declarations here from struc-symbol.h. (SYMBOLS_NEED_BACKPOINTERS): Define if needed. * struc-symbol.h (SYMBOLS_NEED_BACKPOINTERS): Don't set. (struct symbol): Move bsym to make it clearly the first field. Remove TARGET_SYMBOL_FIELDS. (symbolS): Don't typedef. (struct broken_word): Remove. (N_TYPE_seg, seg_N_TYPE): Move to symbol.h. (SEGMENT_TO_SYMBOL_TYPE, N_REGISTER): Likewise. (symbol_clear_list_pointers): Likewise. (symbol_insert, symbol_remove): Likewise. (symbol_previous, symbol_append): Likewise. (verify_symbol_chain, verify_symbol_chain_2): Likewise. (struct local_symbol): Define. (local_symbol_converted_p, local_symbol_mark_converted): Define. (local_symbol_resolved_p, local_symbol_mark_resolved): Define. (local_symbol_get_frag, local_symbol_set_frag): Define. (local_symbol_get_real_symbol): Define. (local_symbol_set_real_symbol): Define. Define. * write.c (write_object_file): Call resolve_local_symbol_values. * config/obj-ecoff.h (OBJ_SYMFIELD_TYPE): Define. (TARGET_SYMBOL_FIELDS): Don't define. * config/obj-elf.h (OBJ_SYMFIELD_TYPE): Add local field. If ECOFF_DEBUGGING, add ECOFF fields. (ELF_TARGET_SYMBOL_FIELDS, TARGET_SYMBOL_FIELDS): Don't define. * config/obj-multi.h (struct elf_obj_sy): Add local field. If ECOFF_DEBUGGING, add ECOFF fields. (ELF_TARGET_SYMBOL_FIELDS, TARGET_SYMBOL_FIELDS): Don't define. (ECOFF_DEBUG_TARGET_SYMBOL_FIELDS): Don't define. * config/tc-mcore.h: Don't include struc-symbol.h. (TARGET_SYMBOL_FIELDS): Don't define. (struct mcore_tc_sy): Define. (TC_SYMFIELD_TYPE): Define. * Many files: Use symbolS instead of struct symbol. Use new accessor functions rather than referring to symbolS fields directly. * read.c (s_mri_common): Don't add in value of line_label. * config/tc-mips.c (md_apply_fix): Correct parenthesization when checking for SEC_LINK_ONCE. * config/tc-sh.h (sh_fix_adjustable): Declare.
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symbolS *next;
/* The real name, if the symbol was renamed. */
char *real_name;
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/* Non-zero if the symbol should be output. The RS/6000 assembler
only outputs symbols that are external or are mentioned in a
.globl or .lglobl statement. */
unsigned char output;
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/* The symbol class. */
short symbol_class;
/* For a csect or common symbol, the alignment to use. */
unsigned char align;
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/* For a csect symbol, the subsegment we are using. This is zero
for symbols that are not csects. */
subsegT subseg;
/* For a csect symbol, the last symbol which has been defined in
this csect, or NULL if none have been defined so far.
For a .bs symbol, the referenced csect symbol.
For a C_STSYM symbol, the containing block (.bs symbol).
For a label, the enclosing csect. */
Add support for storing local symbols in a small structure to save memory when assembling large files. * as.h: Don't include struc-symbol.h. (symbolS): Add typedef. * symbols.c: Include struc-symbol.h. (local_hash): New static variable. (save_symbol_name): New static function, from symbol_create. (symbol_create): Call save_symbol_name. (local_symbol_count): New static variable. (local_symbol_conversion_count): Likewise. (LOCAL_SYMBOL_CHECK): Define. (local_symbol_make): New static function. (local_symbol_convert): New static function. (colon): Handle local symbols. Create local symbol for local label name. (symbol_table_insert): Handle local symbols. (symbol_find_or_make): Create local symbol for local label name. (symbol_find_base): Check for local symbol. (symbol_append, symbol_insert): Check for local symbols. (symbol_clear_list_pointers, symbol_remove): Likewise. (verify_symbol_chain): Likewise. (copy_symbol_attributes): Likewise. (resolve_symbol_value): Handle local symbols. (resolve_local_symbol): New static function. (resolve_local_symbol_values): New function. (S_GET_VALUE, S_SET_VALUE): Handle local symbols. (S_IS_FUNCTION, S_IS_EXTERNAL, S_IS_WEAK, S_IS_COMMON): Likewise. (S_IS_DEFINED, S_IS_DEBUG, S_IS_LOCAL, S_GET_NAME): Likewise. (S_GET_SEGMENT, S_SET_SEGMENT, S_SET_EXTERNAL): Likewise. (S_CLEAR_EXTERNAL, S_SET_WEAK, S_SET_NAME): Likewise. (symbol_previous, symbol_next): New functions. (symbol_get_value_expression): Likewise. (symbol_set_value_expression): Likewise. (symbol_set_frag, symbol_get_frag): Likewise. (symbol_mark_used, symbol_clear_used, symbol_used_p): Likewise. (symbol_mark_used_in_reloc): Likewise. (symbol_clear_used_in_reloc, symbol_used_in_reloc_p): Likewise. (symbol_mark_mri_common, symbol_clear_mri_common): Likewise. (symbol_mri_common_p): Likewise. (symbol_mark_written, symbol_clear_written): Likewise. (symbol_written_p): Likewise. (symbol_mark_resolved, symbol_resolved_p): Likewise. (symbol_section_p, symbol_equated_p): Likewise. (symbol_constant_p): Likewise. (symbol_get_bfdsym, symbol_set_bfdsym): Likewise. (symbol_get_obj, symbol_set_obj): Likewise. (symbol_get_tc, symbol_set_tc): Likewise. (symbol_begin): Initialize local_hash. (print_symbol_value_1): Handle local symbols. (symbol_print_statistics): Print local symbol statistics. * symbols.h: Include "struc-symbol.h" if not BFD_ASSEMBLER. Declare new symbols.c functions. Move many declarations here from struc-symbol.h. (SYMBOLS_NEED_BACKPOINTERS): Define if needed. * struc-symbol.h (SYMBOLS_NEED_BACKPOINTERS): Don't set. (struct symbol): Move bsym to make it clearly the first field. Remove TARGET_SYMBOL_FIELDS. (symbolS): Don't typedef. (struct broken_word): Remove. (N_TYPE_seg, seg_N_TYPE): Move to symbol.h. (SEGMENT_TO_SYMBOL_TYPE, N_REGISTER): Likewise. (symbol_clear_list_pointers): Likewise. (symbol_insert, symbol_remove): Likewise. (symbol_previous, symbol_append): Likewise. (verify_symbol_chain, verify_symbol_chain_2): Likewise. (struct local_symbol): Define. (local_symbol_converted_p, local_symbol_mark_converted): Define. (local_symbol_resolved_p, local_symbol_mark_resolved): Define. (local_symbol_get_frag, local_symbol_set_frag): Define. (local_symbol_get_real_symbol): Define. (local_symbol_set_real_symbol): Define. Define. * write.c (write_object_file): Call resolve_local_symbol_values. * config/obj-ecoff.h (OBJ_SYMFIELD_TYPE): Define. (TARGET_SYMBOL_FIELDS): Don't define. * config/obj-elf.h (OBJ_SYMFIELD_TYPE): Add local field. If ECOFF_DEBUGGING, add ECOFF fields. (ELF_TARGET_SYMBOL_FIELDS, TARGET_SYMBOL_FIELDS): Don't define. * config/obj-multi.h (struct elf_obj_sy): Add local field. If ECOFF_DEBUGGING, add ECOFF fields. (ELF_TARGET_SYMBOL_FIELDS, TARGET_SYMBOL_FIELDS): Don't define. (ECOFF_DEBUG_TARGET_SYMBOL_FIELDS): Don't define. * config/tc-mcore.h: Don't include struc-symbol.h. (TARGET_SYMBOL_FIELDS): Don't define. (struct mcore_tc_sy): Define. (TC_SYMFIELD_TYPE): Define. * Many files: Use symbolS instead of struct symbol. Use new accessor functions rather than referring to symbolS fields directly. * read.c (s_mri_common): Don't add in value of line_label. * config/tc-mips.c (md_apply_fix): Correct parenthesization when checking for SEC_LINK_ONCE. * config/tc-sh.h (sh_fix_adjustable): Declare.
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symbolS *within;
union
{
/* For a function symbol, a symbol whose value is the size. The
field is NULL if there is no size. */
symbolS *size;
/* For a dwarf symbol, the corresponding dwarf subsection. */
struct dw_subsection *dw;
} u;
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};
#define TC_SYMFIELD_TYPE struct ppc_tc_sy
/* We need an additional auxent for function symbols. */
PR 28447: implement multiple parameters for .file on XCOFF On XCOFF, ".file" pseudo-op allows 3 extras parameters to provide additional information to AIX linker, or its debugger. These are stored in auxiliary entries of the C_FILE symbol. bfd/ PR 28447 * coffcode.h (combined_entry_type): Add extrap field. (coff_bigobj_swap_aux_in): Adjust names of x_file fields. (coff_bigobj_swap_aux_out): Likewise. * coffgen.c (coff_write_auxent_fname): New function. (coff_fix_symbol_name): Write x_file using coff_write_auxent_fname. (coff_write_symbol): Likewise. (coff_write_symbols): Add C_FILE auxiliary entries to string table if needed. (coff_get_normalized_symtab): Adjust names of x_file fields. Normalize C_FILE auxiliary entries. (coff_print_symbol): Print C_FILE auxiliary entries. * coff-rs6000.c (_bfd_xcoff_swap_aux_in): Adjust names of x_file fields. (_bfd_xcoff_swap_aux_out): Likewise. * coff64-rs6000.c (_bfd_xcoff64_swap_aux_in): Likewise. (_bfd_xcoff64_swap_aux_out): Likewise. * cofflink.c (_bfd_coff_final_link): Likewise. (_bfd_coff_link_input_bfd): Likewise. * coffswap.h (coff_swap_aux_in): Likewise. * peXXigen.c (_bfd_XXi_swap_aux_in): Likewise. (_bfd_XXi_swap_aux_out): Likewise. * xcofflink.c (xcoff_link_input_bfd): Likewise. * libcoff.h: Regenerate. gas/ * config/tc-ppc.c (ppc_file): New function. * config/tc-ppc.h (OBJ_COFF_MAX_AUXENTRIES): Change to 4. * testsuite/gas/ppc/aix.exp: Add tests. * testsuite/gas/ppc/xcoff-file-32.d: New test. * testsuite/gas/ppc/xcoff-file-64.d: New test. * testsuite/gas/ppc/xcoff-file.s: New test. include/ * coff/internal.h (union internal_auxent): Change x_file to be a struct instead of a union. Add x_ftype field. * coff/rs6000.h (union external_auxent): Add x_resv field. * coff/xcoff.h (XFT_FN): New define. (XFT_CT): Likewise. (XFT_CV): Likewise. (XFT_CD): Likewise.
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#define OBJ_COFF_MAX_AUXENTRIES 4
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/* Square and curly brackets are permitted in symbol names. */
#define LEX_BR 3
/* Canonicalize the symbol name. */
#define tc_canonicalize_symbol_name(name) ppc_canonicalize_symbol_name (name)
extern char *ppc_canonicalize_symbol_name (char *);
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/* Get the symbol class from the name. */
#define tc_symbol_new_hook(sym) ppc_symbol_new_hook (sym)
extern void ppc_symbol_new_hook (symbolS *);
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/* TOC relocs requires special handling. */
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#define tc_fix_adjustable(FIX) ppc_fix_adjustable (FIX)
extern int ppc_fix_adjustable (struct fix *);
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/* We need to set the section VMA. */
#define tc_frob_section(sec) ppc_frob_section (sec)
extern void ppc_frob_section (asection *);
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/* Finish up the symbol. */
#define tc_frob_symbol(sym, punt) punt = ppc_frob_symbol (sym)
extern int ppc_frob_symbol (symbolS *);
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/* Finish up the entire symtab. */
#define tc_adjust_symtab() ppc_adjust_symtab ()
extern void ppc_adjust_symtab (void);
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/* We also need to copy, in particular, the class of the symbol,
over what obj-coff would otherwise have copied. */
#define OBJ_COPY_SYMBOL_ATTRIBUTES(dest,src) \
do { \
if (SF_GET_GET_SEGMENT (dest)) \
S_SET_SEGMENT (dest, S_GET_SEGMENT (src)); \
symbol_get_tc (dest)->u = symbol_get_tc (src)->u; \
symbol_get_tc (dest)->align = symbol_get_tc (src)->align; \
* bfd/coff-arm.c (coff_arm_relocate_section) (record_thumb_to_arm_glue, bfd_arm_process_before_allocation): Change member name class to symbol_class. * bfd/coff-i960.c (coff_i960_relocate_section) Rename variable class to class_val. Change member name class to symbol_class. * bfd/coff-rs6000.c (_bfd_xcoff_swap_aux_in) (_bfd_xcoff_swap_aux_out): Rename arguments class to in_class. * bfd/coff-stgo32.c (adjust_aux_in_post) (adjust_aux_out_pre, adjust_aux_out_post): Rename arguments class to in_class. * bfd/coff64-rs6000.c (_bfd_xcoff64_swap_aux_in) (_bfd_xcoff64_swap_aux_out): Rename arguments class to in_class. * bfd/coffcode.h (coff_pointerize_aux_hook): Rename variable class to n_sclass. * bfd/coffgen.c (coff_write_symbol, coff_pointerize_aux): Rename variables named class to n_sclass. (coff_write_symbols): Rename variable class to sym_class. (bfd_coff_set_symbol_class): Rename argument class to symbol_class. * bfd/cofflink.c (_bfd_coff_link_hash_newfunc) (coff_link_add_symbols, _bfd_coff_link_input_bfd) (_bfd_coff_write_global_sym, _bfd_coff_generic_relocate_section): Update code to use renamed members. * bfd/coffswap.h (coff_swap_aux_in, coff_swap_aux_out): Rename argument class to in_class. * bfd/libcoff-in.h (struct coff_link_hash_entry, struct coff_debug_merge_type) Renamed members class to symbol_class and type_class. * bfd/libcoff.h Regenerated. * bfd/peXXigen.c: (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out): Rename argument class to in_class. * bfd/pef.c (bfd_pef_parse_imported_symbol): Update code to use renamed members. * bfd/pef.h (struct bfd_pef_imported_symbol): Changed name of member class to symbol_class. * binutils/ieee.c (ieee_read_cxx_misc, ieee_read_cxx_class) (ieee_read_reference): Rename variables named class to cxxclass. * gas/config/tc-arc.c (struct syntax_classes): Rename member class to s_class. (arc_extinst): Rename variable class to s_class. Update code to use renamed members. * gas/config/tc-mips.c (insn_uses_reg): Rename argument class to regclass. * gas/config/tc-ppc.c (ppc_csect, ppc_change_csect, ppc_function) (ppc_tc, ppc_is_toc_sym, ppc_symbol_new_hook, ppc_frob_label) (ppc_fix_adjustable, md_apply_fix): Update code to use renamed members. * gas/config/tc-ppc.h (struct ppc_tc_sy): Change name of member from class to symbol_class. (OBJ_COPY_SYMBOL_ATTRIBUTES): Update code to use renamed members. * gas/config/tc-score.c (s3_adjust_paritybit): Rename argument class to i_class. * gas/config/tc-score7.c (s7_adjust_paritybit): Rename argument class to i_class. * gprof/corefile.c (core_create_function_syms): Rename variable class to cxxclass. * include/coff/ti.h (GET_LNSZ_SIZE, PUT_LNSZ_SIZE): Updated name of class variable to in_class to match changes in function that use this macro. * include/opcode/ia64.h (struct ia64_operand): Renamed member class to op_class * ld/emultempl/elf32.em (gld${EMULATION_NAME}_load_symbols) (gld${EMULATION_NAME}_try_needed): Rename variable class to link_class * opcodes/ia64-dis.c (print_insn_ia64): Update code to use renamed member. * opcodes/m88k-dis.c (m88kdis): Rename variable class to in_class. * opcodes/tic80-opc.c (tic80_symbol_to_value) (tic80_value_to_symbol): Rename argument class to symbol_class.
2009-09-05 15:56:26 +08:00
symbol_get_tc (dest)->symbol_class = symbol_get_tc (src)->symbol_class; \
symbol_get_tc (dest)->within = symbol_get_tc (src)->within; \
} while (0)
gas: rename md_end to md_finish Currently md_end is typically used for some final actions rather than freeing memory like other *_end functions. Rename it to md_finish, and rename target implementation. The renaming of target functions makes it possible to find them all with "grep md_finish", eg. md_mips_end is renamed to mips_md_finish, not md_mips_finish. This patch leaves a number of md_end functions unchanged, those that either do nothing or deallocate memory, and calls them late. The idea here is that target maintainers implement md_end functions to tidy memory, if anyone cares. Freeing persistent memory in gas is not at all important, except that it can hide more important memory leaks, those that happen once per some frequent gas operation, amongst these unimportant memory leaks. * as.c (main): Rename md_end to md_finish. * config/tc-alpha.c, * config/tc-alpha.h, * config/tc-arc.c, * config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h, * config/tc-csky.c, * config/tc-csky.h, * config/tc-ia64.c, * config/tc-ia64.h, * config/tc-mcore.c, * config/tc-mcore.h, * config/tc-mips.c, * config/tc-mips.h, * config/tc-mmix.c, * config/tc-mmix.h, * config/tc-msp430.c, * config/tc-msp430.h, * config/tc-nds32.c, * config/tc-nds32.h, * config/tc-ppc.c, * config/tc-ppc.h, * config/tc-pru.c, * config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h, * config/tc-s390.c, * config/tc-s390.h, * config/tc-sparc.c, * config/tc-sparc.h, * config/tc-tic4x.c, * config/tc-tic4x.h, * config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-v850.c, * config/tc-v850.h, * config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c, * config/tc-z80.h: Similarly. * output-file.c (output_file_close): Call md_end.
2022-07-05 11:56:38 +08:00
extern void ppc_xcoff_md_finish (void);
#define md_finish ppc_xcoff_md_finish
aix: implement TLS relocation for gas and ld Add support for TLS in XCOFF. Amongst the things done by this commit: - Update XCOFF auxialiary header to match new version and allow TLS sections. - Add TLS sections (.tdata and .tbss) support in gas and ld. - Add support for the TLS relocations in gas and ld. Two different types BFD_RELOC are created for PPC and PPC64 as the size is a pointer, thus distinct in 32 or 64bit. The addresses given by ld to .tdata and .tbss is a bit special. In XCOFF, these addresses are actually offsets from the TLS pointer computed at runtime. AIX assembly and linker does the same. In top of that, the .tdata must be before .data (this is mandatory for AIX loader). Thus, the aix ld script is recomputing "." before .data to restore its original value. There might be a simpler way, but this one is working. Optimisation linked to TLS relocations aren't yet implemented. bfd/ * reloc.c (BFD_RELOC_PPC_TLS_LE, BFD_RELOC_PPC_TLS_IE, BFD_RELOC_PPC_TLS_M, BFD_RELOC_PPC_TLS_ML, BFD_RELOC_PPC64_TLS_GD, BFD_RELOC_PPC64_TLS_LD, BFD_RELOC_PPC64_TLS_LE, BFD_RELOC_PPC64_TLS_IE, BFD_RELOC_PPC64_TLS_M, BFD_RELOC_PPC64_TLS_ML): New relocations. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * coff-rs6000.c (xcoff_calculate_relocation): Call xcoff_reloc_type_tls for TLS relocations. (xcoff_howto_table): Implement TLS relocations. (_bfd_xcoff_reloc_type_lookup): Add cases TLS relocations. (xcoff_reloc_type_tls): New function. * coff64-rs6000.c (xcoff_calculate_relocation): Likewise. (xcoff_howto_table): Likewise. (_bfd_xcoff_reloc_type_lookup): Likewise. * coffcode.h (sec_to_styp_flags): Handle TLS sections. (styp_to_sec_flags): Likewise. (coff_compute_section_file_positions): Avoid file offset optimisation for .data when the previous section is .tdata. (coff_write_object_contents): Handle TLS sections. * coffswap.h (coff_swap_aouthdr_out): Add support for new fields in aouthdr. * libxcoff.h (xcoff_reloc_type_tls): Add prototype. * xcofflink.c (xcoff_link_add_symbols): Handle XMC_UL. (xcoff_need_ldrel_p): Add cases for TLS relocations. (xcoff_create_ldrel): Add l_symndx for TLS sections. gas/ * config/tc-ppc.c (ppc_xcoff_text_section, ppc_xcoff_data_section, (ppc_xcoff_bss_section, ppc_xcoff_tdata_section, (ppc_xcoff_tbss_section): New variables. (ppc_text_subsegment, ppc_text_csects, ppc_data_subgments, (ppc_data_csects): Removed. (ppc_xcoff_section_is_initialized, ppc_init_xcoff_section, ppc_xcoff_parse_cons): New functions. (md_being): Initialize XCOFF sections. (ppc_xcoff_suffix): Add support for TLS relocations (fixup_size, md_apply_fix): Add support for new BFD_RELOC. (ppc_change_csect): Handle XMC_TL, XMC_UL. Correctly, add XMC_BS to .bss section. Handle new XCOFF section variables. (ppc_comm): Likewise. (ppc_toc): Likewise. (ppc_symbol_new_hook): Likewise. (ppc_frob_symbol): Likewise. (ppc_fix_adjustable): Add tbss support. * config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): New define. (ppc_xcoff_parse_cons): Add prototype. (struct ppc_xcoff_section): New structure. ld/ * emultempl/aix.em: Ensure .tdata section is removed if empty, even with -r flag. * scripttempl/aix.sc: Handle TLS sections. * testsuite/ld-powerpc/aix52.exp: Add new tests. * testsuite/ld-powerpc/aix-tls-reloc-32.d: New test. * testsuite/ld-powerpc/aix-tls-reloc-64.d: New test. * testsuite/ld-powerpc/aix-tls-reloc.ex: New test. * testsuite/ld-powerpc/aix-tls-reloc.s: New test. * testsuite/ld-powerpc/aix-tls-section-32.d: New test. * testsuite/ld-powerpc/aix-tls-section-64.d: New test. * testsuite/ld-powerpc/aix-tls-section.ex: New test. * testsuite/ld-powerpc/aix-tls-section.s: New test. include/ * coff/internal.h (struct internal_aouthdr): Add new fields. * coff/rs6000.h (AOUTHDRÃ): Add new fields. * coff/rs6k64.h (struct external_filehdr): Likewise. * coff/xcoff.h (_TDATA), _TBSS): New defines (RS6K_AOUTHDR_TLS_LE, RS6K_AOUTHDR_RAS, RS6K_AOUTHDR_ALGNTDATA, RS6K_AOUTHDR_SHR_SYMTAB, RS6K_AOUTHDR_FORK_POLICY, RS6K_AOUTHDR_FORK_COR): New defines. (XMC_TU): Removed. (XMC_UL): New define.
2021-03-11 18:08:19 +08:00
#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) \
ppc_xcoff_parse_cons (EXP, NBYTES)
extern bfd_reloc_code_real_type ppc_xcoff_parse_cons (expressionS *,
unsigned int);
/* XCOFF format allows only few predefined sections. Gather all
information in a common structure. */
struct ppc_xcoff_section {
/* Main segment of the section. */
segT segment;
/* Next subsegment to allocate within the segment. */
subsegT next_subsegment;
/* Linked list of csects in the section. */
symbolS *csects;
};
PowerPC add initial -mfuture instruction support This patch adds initial 64-bit insn assembler/disassembler support. The only instruction added is "pnop" along with the automatic aligning of prefix instruction so they do not cross 64-byte boundaries. include/ * dis-asm.h (WIDE_OUTPUT): Define. * opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare. (PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX), (PPC_PREFIX_P, PPC_PREFIX_SEG): Define. opcodes/ * ppc-dis.c (ppc_opts): Add "future" entry. (PREFIX_OPCD_SEGS): Define. (prefix_opcd_indices): New array. (disassemble_init_powerpc): Initialize prefix_opcd_indices. (lookup_prefix): New function. (print_insn_powerpc): Handle 64-bit prefix instructions. * ppc-opc.c (PREFIX_OP, PREFIX_FORM, SUFFIX_MASK, PREFIX_MASK), (PMRR, POWERXX): Define. (prefix_opcodes): New instruction table. (prefix_num_opcodes): New constant. binutils/ * objdump.c (disassemble_bytes): Set WIDE_OUTPUT in flags. gas/ * config/tc-ppc.c (ppc_setup_opcodes): Handle prefix_opcodes. (struct insn_label_list): New. (insn_labels, free_insn_labels): New variables. (ppc_record_label, ppc_clear_labels, ppc_start_line_hook): New funcs. (ppc_frob_label, ppc_new_dot_label): Move functions earlier in file and call ppc_record_label. (md_assemble): Handle 64-bit prefix instructions. Align labels that are on the same line as a prefix instruction. * config/tc-ppc.h (tc_frob_label, ppc_frob_label): Move to later in the file. (md_start_line_hook): Define. (ppc_start_line_hook): Declare. * testsuite/gas/ppc/prefix-align.d, * testsuite/gas/ppc/prefix-align.s: New test. * testsuite/gas/ppc/ppc.exp: Run new test.
2018-05-16 05:48:14 +08:00
#endif /* OBJ_XCOFF */
#define tc_new_dot_label(sym) ppc_new_dot_label (sym)
extern void ppc_new_dot_label (symbolS *);
extern const char ppc_symbol_chars[];
#define tc_symbol_chars ppc_symbol_chars
1999-05-03 15:29:11 +08:00
#ifdef OBJ_ELF
Implement generic SHF_EXCLUDE. bfd/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * elf.c (_bfd_elf_make_section_from_shdr): Handle SHF_EXCLUDE (elf_fake_sections): Likewise. * elf32-i370.c (i370_elf_section_from_shdr): Don't handle SHF_EXCLUDE here. * elf32-ppc.c (ppc_elf_fake_sections): Likewise. binutils/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * readelf.c (get_elf_section_flags): Treat SHF_EXCLUDE as a generic flag. binutils/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * binutils-all/objcopy.exp: Run exclude-1a and exclude-1b for ELF targets. * binutils-all/exclude-1.s: New. * binutils-all/exclude-1a.d: Likewise. * binutils-all/exclude-1b.d: Likewise. gas/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * obj-elf.c (obj_elf_change_section): Handle SHF_EXCLUDE. (obj_elf_parse_section_letters): Likewise. (obj_elf_section_word): Likewise. * config/tc-ppc.c (ppc_section_letter): Removed. (ppc_section_word): Likewise. * config/tc-ppc.h (ppc_section_letter): Likewise. (ppc_section_word): Likewise. (md_elf_section_letter): Likewise. (md_elf_section_word): Likewise. * doc/as.texinfo: Document `e' and `#exclude'. gas/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * gas/elf/elf.exp: Run section8. * gas/elf/section8.d: New. * gas/elf/section8.s: Likewise. include/elf/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * common.h (SHF_EXCLUDE): New. * i370.h (SHF_EXCLUDE): Removed. * or32.h (SHF_EXCLUDE): Likewise. * ppc.h (SHF_EXCLUDE): Likewise. * sparc.h (SHF_EXCLUDE): Likewise. ld/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * ld-elf/exclude3.s: New. * ld-elf/exclude3a.d: Likewise. * ld-elf/exclude3b.d: Likewise. * ld-elf/exclude3c.d: Likewise.
2010-05-18 11:31:07 +08:00
/* Support for SHT_ORDERED */
extern int ppc_section_type (char *, size_t);
* include/elf/ia64.h (SHT_IA_64_VMS_DISPLAY_NAME_INFO, EF_IA_64_ARCHVER_1): New macros. Minor reformatting. * bfd/Makefile.am (BFD32_BACKENDS): Add new object vmsutil.lo (BFD32_BACKENDS_CFILES): Add new file vmsutil.c (vmsutil.lo): Add dependency rule * bfd/Makefile.in: Regenerate * bfd/config.bfd (ia64*-*-*vms*): Add case. * bfd/configure.in (bfd_elf64_ia64_vms_vec): Add case. * bfd/configure: Regenerate * bfd/vmsutil.[ch]: New files * bfd/elf-bfd.h (struct bfd_elf_special_section): Change type of attr to bfd_vma. * bfd/elfxx-ia64.c (elfNN_vms_post_process_headers, elfNN_vms_section_processing, elfNN_vms_final_write_processing, elfNN_vms_close_and_cleanup, elfNN_vms_section_from_shdr, elfNN_vms_object_p): New functions * bfd/targets.c (bfd_elf64_ia64_vms_vec): New target. * gas/configure.tgt(ia64-*-*vms*): New target. * gas/dwarf2dbg.h (dwarf2_loc_mark_labels): Make extern. * gas/tc.h (md_number_to_chars): Declare iff undefined. * gas/config/obj-elf.c (obj_elf_change_section): Change type of arg attr to bfd_vma. (obj_elf_parse_section_letters): Return a bfd_vma. Change type of variables attr, md_attr to bfd_vma. (obj_elf_section_word): Likewise. (obj_elf_section): Change type of variable attr to bfd_vma * gas/config/obj-elf.h (obj_elf_change_section): Change type of arg attr to bfd_vma * gas/config/tc-ia64.c (bfdver.h,time.h): Include. (ia64_elf_section_letter): Now returns a bfd_vma. Handle VMS specific attributes. (ia64_elf_section_flags): Arg attr now a bfd_vma. (ia64_init): Don't turn on dependency checking for VMS. (ia64_target_format): Check for VMS flag bit. (do_alias): Hande decc$ functions. (get_vms_time): New function. (ia64_vms_note): New function. * gas/config/tc-ia64.h (ia64_elf_section_letter): Now returns a bfd_vma. (ia64_elf_section_flags): Arg attr now a bfd_vma. (tc_init_after_args): Define for VMS. * gas/config/tc-alpha.c (alpha_elf_section_letter): Return a bfd_vma. (alpha_elf_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-alpha.h: Likewise. * gas/config/tc-i386.c (x86_64_section_letter): Return a bfd_vma. (x86_64_section_word): Return a bfd_vma. * gas/config/tc-i386.h: Likewise. * gas/config/tc-ip2k.c (ip2k_elf_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-ip2k.h: Likewise. * gas/config/tc-mep.c (mep_elf_section_letter): Return a bfd_vma. (mep_elf_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-mep.h: Likewise. * gas/config/tc-ppc.c (ppc_section_letter): Return a bfd_vma. (ppc_section_word): Return a bfd_vma. (ppc_section_flags): Change type of arg attr to bfd_vma. * gas/config/tc-ppc.h: Likewise. * gas/config/te-vms.h (DWARF2_DIR_SHOULD_END_WITH_SEPARATOR, DWAR2_FILE_TIME_NAME, DWARF2_FILE_SIZE_NAME, DWARF2_FILEN_NAME): New file with new macros * gas/dwarf2dbg.c (get_filenum, out_file_list): Default and call new macros.
2009-01-15 20:42:52 +08:00
extern int ppc_section_flags (flagword, bfd_vma, int);
1999-05-03 15:29:11 +08:00
#define md_elf_section_type(STR, LEN) ppc_section_type (STR, LEN)
1999-05-03 15:29:11 +08:00
#define md_elf_section_flags(FLAGS, ATTR, TYPE) ppc_section_flags (FLAGS, ATTR, TYPE)
#define tc_comment_chars ppc_comment_chars
extern const char *ppc_comment_chars;
#define md_elf_section_letter ppc_elf_section_letter
extern bfd_vma ppc_elf_section_letter (int, const char **);
/* Keep relocations relative to the GOT, or non-PC relative. */
2002-09-05 08:01:18 +08:00
#define tc_fix_adjustable(FIX) ppc_fix_adjustable (FIX)
extern int ppc_fix_adjustable (struct fix *);
1999-05-03 15:29:11 +08:00
gas: * cgen.c, cgen.h, tc.h, write.c, config/obj-coff.c * config/tc-a29k.c, config/tc-alpha.c, config/tc-alpha.h * config/tc-arc.c, config/tc-arc.h, config/tc-arm.c * config/tc-arm.h, config/tc-avr.c, config/tc-avr.h * config/tc-cris.c, config/tc-crx.c, config/tc-d10v.c * config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h * config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.h * config/tc-frv.c, config/tc-frv.h, config/tc-h8300.c * config/tc-h8500.c, config/tc-hppa.c, config/tc-hppa.h * config/tc-i370.c, config/tc-i370.h, config/tc-i386.c * config/tc-i386.h, config/tc-i860.c, config/tc-i860.h * config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c * config/tc-ip2k.c, config/tc-ip2k.h, config/tc-iq2000.c * config/tc-iq2000.h, config/tc-m32r.c, config/tc-m32r.h * config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c * config/tc-m68k.h, config/tc-m88k.c, config/tc-maxq.c * config/tc-mcore.c, config/tc-mcore.h, config/tc-mips.c * config/tc-mips.h, config/tc-mmix.c, config/tc-mn10200.c * config/tc-mn10300.c, config/tc-msp430.c, config/tc-ns32k.c * config/tc-openrisc.h, config/tc-or32.c, config/tc-or32.h * config/tc-pdp11.c, config/tc-pj.c, config/tc-pj.h * config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c * config/tc-s390.h, config/tc-sh64.c, config/tc-sh.c * config/tc-sh.h, config/tc-sparc.c, config/tc-sparc.h * config/tc-tahoe.c, config/tc-tic30.c, config/tc-tic4x.c * config/tc-tic54x.c, config/tc-tic80.c, config/tc-v850.c * config/tc-v850.h, config/tc-vax.c, config/tc-vax.h * config/tc-w65.c, config/tc-xstormy16.c, config/tc-xstormy16.h * config/tc-xtensa.c, config/tc-z8k.c: Replace all instances of the string "_apply_fix3" with "_apply_fix". * po/POTFILES.in, po/gas.pot: Regenerate. bfd: * coff-i386.c: Change md_apply_fix3 to md_apply_fix in comment. cgen: * doc/porting.texi: Change all mention of md_apply_fix3 and gas_cgen_md_apply_fix3 to md_apply_fix and gas_cgen_md_apply_fix respectively.
2005-06-08 01:54:22 +08:00
/* Values passed to md_apply_fix don't include symbol values. */
2002-09-05 08:01:18 +08:00
#define MD_APPLY_SYM_VALUE(FIX) 0
1999-05-03 15:29:11 +08:00
gas TC_PARSE_CONS_EXPRESSION communication with TC_CONS_FIX_NEW A number of targets pass extra information from TC_PARSE_CONS_EXPRESSION to TC_CONS_FIX_NEW via static variables. That's OK, but not best practice. tc-ppc.c goes further in implementing its own replacement for cons(), because the generic one doesn't allow relocation modifiers on constants. This patch fixes both of these warts. * gas/config/tc-alpha.h (TC_CONS_FIX_NEW): Add RELOC parameter. * gas/config/tc-arc.c (arc_cons_fix_new): Add reloc parameter. * gas/config/tc-arc.h (arc_cons_fix_new): Update prototype. (TC_CONS_FIX_NEW): Add RELOC parameter. * gas/config/tc-arm.c (cons_fix_new_arm): Similarly * gas/config/tc-arm.h (cons_fix_new_arm, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-cr16.c (cr16_cons_fix_new): Similarly. * gas/config/tc-cr16.h (cr16_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-crx.h (TC_CONS_FIX_NEW): Similarly. * gas/config/tc-m32c.c (m32c_cons_fix_new): Similarly. * gas/config/tc-m32c.h (m32c_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-mn10300.c (mn10300_cons_fix_new): Similarly. * gas/config/tc-mn10300.h (mn10300_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-ns32k.c (cons_fix_new_ns32k): Similarly. * gas/config/tc-ns32k.h (cons_fix_new_ns32k): Similarly. * gas/config/tc-pj.c (pj_cons_fix_new_pj): Similarly. * gas/config/tc-pj.h (pj_cons_fix_new_pj, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-rx.c (rx_cons_fix_new): Similarly. * gas/config/tc-rx.h (rx_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-sh.c (sh_cons_fix_new): Similarly. * gas/config/tc-sh.h (sh_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-tic54x.c (tic54x_cons_fix_new): Similarly. * gas/config/tc-tic54x.h (tic54x_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-tic6x.c (tic6x_cons_fix_new): Similarly. * gas/config/tc-tic6x.h (tic6x_cons_fix_new, TC_CONS_FIX_NEW): Similarly. * gas/config/tc-arc.c (arc_parse_cons_expression): Return reloc. * gas/config/tc-arc.h (arc_parse_cons_expression): Update proto. * gas/config/tc-avr.c (exp_mod_data): Make global. (pexp_mod_data): Delete. (avr_parse_cons_expression): Return exp_mod_data pointer. (avr_cons_fix_new): Add exp_mod_data_t pointer param. (exp_mod_data_t): Move typedef.. * gas/config/tc-avr.h: ..to here. (exp_mod_data): Declare. (TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define. (avr_parse_cons_expression, avr_cons_fix_new): Update prototype. (TC_CONS_FIX_NEW): Update. * gas/config/tc-hppa.c (hppa_field_selector): Delete static var. (cons_fix_new_hppa): Add hppa_field_selector param. (fix_new_hppa): Adjust. (parse_cons_expression_hppa): Return field selector. * gas/config/tc-hppa.h (parse_cons_expression_hppa): Update proto. (cons_fix_new_hppa): Likewise. (TC_PARSE_CONS_RETURN_TYPE, TC_PARSE_CONS_RETURN_NONE): Define. * gas/config/tc-i386.c (got_reloc): Delete static var. (x86_cons_fix_new): Add reloc param. (x86_cons): Return got reloc. * gas/config/tc-i386.h (x86_cons, x86_cons_fix_new): Update proto. (TC_CONS_FIX_NEW): Add RELOC param. * gas/config/tc-ia64.c (ia64_cons_fix_new): Add reloc param. Adjust calls. * gas/config/tc-ia64.h (ia64_cons_fix_new): Update prototype. (TC_CONS_FIX_NEW): Add reloc param. * gas/config/tc-microblaze.c (parse_cons_expression_microblaze): Return reloc. (cons_fix_new_microblaze): Add reloc param. * gas/config/tc-microblaze.h: Formatting. (parse_cons_expression_microblaze): Update proto. (cons_fix_new_microblaze): Likewise. * gas/config/tc-nios2.c (nios2_tls_ldo_reloc): Delete static var. (nios2_cons): Return ldo reloc. (nios2_cons_fix_new): Delete. * gas/config/tc-nios2.h (nios2_cons): Update prototype. (nios2_cons_fix_new, TC_CONS_FIX_NEW): Delete. * gas/config/tc-ppc.c (md_pseudo_table): Remove quad, long, word, short. Make llong use cons. (ppc_elf_suffix): Return BFD_RELOC_NONE rather than BFD_RELOC_UNUSED. (ppc_elf_cons): Delete. (ppc_elf_parse_cons): New function. (ppc_elf_validate_fix): Don't check for BFD_RELOC_UNUSED. (md_assemble): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED. * gas/config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): Define (ppc_elf_parse_cons): Declare. * gas/config/tc-sparc.c (sparc_cons_special_reloc): Delete static var. (sparc_cons): Return reloc specifier. (cons_fix_new_sparc): Add reloc specifier param. (sparc_cfi_emit_pcrel_expr): Use emit_expr_with_reloc. * gas/config/tc-sparc.h (TC_PARSE_CONS_RETURN_TYPE): Define. (TC_PARSE_CONS_RETURN_NONE): Define. (sparc_cons, cons_fix_new_sparc): Update prototype. * gas/config/tc-v850.c (hold_cons_reloc): Delete static var. (v850_reloc_prefix): Use BFD_RELOC_NONE rather than BFD_RELOC_UNUSED. (md_assemble): Likewise. (parse_cons_expression_v850): Return reloc. (cons_fix_new_v850): Add reloc parameter. * gas/config/tc-v850.h (parse_cons_expression_v850): Update proto. (cons_fix_new_v850): Likewise. * gas/config/tc-vax.c (vax_cons_special_reloc): Delete static var. (vax_cons): Return reloc. (vax_cons_fix_new): Add reloc parameter. * gas/config/tc-vax.h (vax_cons, vax_cons_fix_new): Update proto. * gas/config/tc-xstormy16.c (xstormy16_cons_fix_new): Add reloc param. * gas/config/tc-xstormy16.h (xstormy16_cons_fix_new): Update proto. * gas/dwarf2dbg.c (TC_PARSE_CONS_RETURN_NONE): Provide default. (emit_fixed_inc_line_addr): Adjust exmit_expr_fix calls. * gas/read.c (TC_PARSE_CONS_EXPRESSION): Return value. (do_parse_cons_expression): Adjust. (cons_worker): Pass return value from TC_PARSE_CONS_EXPRESSION to emit_expr_with_reloc. (emit_expr_with_reloc): New function handling reloc, mostly extracted from.. (emit_expr): ..here. (emit_expr_fix): Add reloc param. Adjust TC_CONS_FIX_NEW invocation. Handle reloc. (parse_mri_cons): Convert to ISO. * gas/read.h (TC_PARSE_CONS_RETURN_TYPE): Define. (TC_PARSE_CONS_RETURN_NONE): Define. (emit_expr_with_reloc): Declare. (emit_expr_fix): Update prototype. * gas/write.c (write_object_file): Update TC_CONS_FIX_NEW invocation.
2014-04-08 13:08:22 +08:00
#define TC_PARSE_CONS_EXPRESSION(EXP, NBYTES) \
ppc_elf_parse_cons (EXP, NBYTES)
extern bfd_reloc_code_real_type ppc_elf_parse_cons (expressionS *,
unsigned int);
#define TC_CONS_FIX_CHECK(EXP, NBYTES, FIX) \
ppc_elf_cons_fix_check (EXP, NBYTES, FIX)
extern void ppc_elf_cons_fix_check (expressionS *, unsigned int, struct fix *);
#define tc_frob_file_before_adjust ppc_frob_file_before_adjust
extern void ppc_frob_file_before_adjust (void);
* configure.in: Recognise powerpc*le*, not just powerpcle*. * configure: Regenerate. * config/tc-ppc.c (PPC_LO, PPC_HI, PPC_HA, PPC_HIGHER, PPC_HIGHERA, PPC_HIGHEST, PPC_HIGHESTA, SEX16): New macros. (md_assemble): Use them. (ppc_machine): Support stub for ELF64 as well as XCOFF. (md_pseudo_table): Add "llong", "quad". (md_parse_option): Match default_cpu of powerpc*. (ppc_arch): Likewise. (ppc_subseg_align): Only for OBJ_XCOFF. (ppc_target_format): Return elf64-powerpc strings for 64 bit ELF. (md_begin): Select PPC_OPCODE_64 for 64 bit. (ppc_insert_operand): Don't bother testing 'file' before calling as_bad_where. Use as_bad_where for operand->insert errors. (mapping): Add ELF64 relocation modifiers. (ppc_elf_suffix): Replace symbol on BFD_RELOC_PPC64_TOC reloc expressions with abs_symbol. (ppc_elf_cons): Correct offset for little endian targets. (ppc_elf_frob_symbol): New. (md_assemble): Add support for 64 bit ELF relocs. (ppc_tc): Ensure 8 byte alignment when 64 bit. (ppc_is_toc_sym): Only define for OBJ_XCOFF and OBJ_ELF. Match ".toc" section for 64 bit ELF. (ppc_fix_adjustable): New. Macro body moved from tc-ppc.h. (md_apply_fix3): Silence warning with ATTRIBUTE_UNUSED. Only do the ppc_is_toc_sym check for OBJ_XCOFF and OBJ_ELF. For 64 bit, use BFD_RELOC_PPC64_TOC16_DS instead of BFD_RELOC_PPC_TOC16. Expand on comments, error message. Add support for 64 bit relocs, and use PPC_HI etc. macros. * config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define. (HANDLE_ALIGN): Define to generate nops in code sections rather than zeros. (TC_FORCE_RELOCATION): Force for BFD_RELOC_PPC64_TOC. (ELF_TC_SPECIAL_SECTIONS): Add 64 bit ELF sections. (tc_fix_adjustable): Move body of macro to tc-ppc.c. (ppc_fix_adjustable): Declare. (tc_frob_symbol): Define. (ppc_elf_frob_symbol): Declare.
2001-08-27 18:42:16 +08:00
#define tc_adjust_symtab() ppc_elf_adjust_symtab ()
extern void ppc_elf_adjust_symtab (void);
gas: rename md_end to md_finish Currently md_end is typically used for some final actions rather than freeing memory like other *_end functions. Rename it to md_finish, and rename target implementation. The renaming of target functions makes it possible to find them all with "grep md_finish", eg. md_mips_end is renamed to mips_md_finish, not md_mips_finish. This patch leaves a number of md_end functions unchanged, those that either do nothing or deallocate memory, and calls them late. The idea here is that target maintainers implement md_end functions to tidy memory, if anyone cares. Freeing persistent memory in gas is not at all important, except that it can hide more important memory leaks, those that happen once per some frequent gas operation, amongst these unimportant memory leaks. * as.c (main): Rename md_end to md_finish. * config/tc-alpha.c, * config/tc-alpha.h, * config/tc-arc.c, * config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h, * config/tc-csky.c, * config/tc-csky.h, * config/tc-ia64.c, * config/tc-ia64.h, * config/tc-mcore.c, * config/tc-mcore.h, * config/tc-mips.c, * config/tc-mips.h, * config/tc-mmix.c, * config/tc-mmix.h, * config/tc-msp430.c, * config/tc-msp430.h, * config/tc-nds32.c, * config/tc-nds32.h, * config/tc-ppc.c, * config/tc-ppc.h, * config/tc-pru.c, * config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h, * config/tc-s390.c, * config/tc-s390.h, * config/tc-sparc.c, * config/tc-sparc.h, * config/tc-tic4x.c, * config/tc-tic4x.h, * config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-v850.c, * config/tc-v850.h, * config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c, * config/tc-z80.h: Similarly. * output-file.c (output_file_close): Call md_end.
2022-07-05 11:56:38 +08:00
extern void ppc_elf_md_finish (void);
#define md_finish ppc_elf_md_finish
1999-05-03 15:29:11 +08:00
#endif /* OBJ_ELF */
extern void ppc_md_end (void);
#define md_end ppc_md_end
#if defined (OBJ_ELF) || defined (OBJ_XCOFF)
2002-09-05 08:01:18 +08:00
#define TC_FORCE_RELOCATION(FIX) ppc_force_relocation (FIX)
extern int ppc_force_relocation (struct fix *);
#endif
2002-09-05 08:01:18 +08:00
PowerPC addpcis fix This came up because I was looking at ld/tmpdir/addpcis.o and noticed the odd addends on REL16DX_HA. They ought to both be -4. The error crept in due REL16DX_HA howto being pc-relative (as indeed it should be), and code at gas/write.c:1001 after this comment /* Make it pc-relative. If the back-end code has not selected a pc-relative reloc, cancel the adjustment we do later on all pc-relative relocs. */ *not* cancelling the pc-relative adjustment. So I've made a dummy non-relative split reloc so that the generic code handles this, rather than attempting to add hacks later in md_apply_fix which would not be very robust. Having the new internal reloc also makes it easy to support addpcis rx,sym@ha as an equivalent to addpcis rx,(sym-0f)@ha 0: The patch also fixes overflow checking, which must test whether the addi will overflow too since @l relocs don't have any overflow check. Lastly, since I was poking at md_apply_fix, I arranged to have the generic gas/write.c code emit errors for subtraction expressions where we lack reloc support. include/ * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment. * elf/ppc.h (R_PPC_16DX_HA): Likewise. bfd/ * reloc.c (BFD_RELOC_PPC_16DX_HA): New. * elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_16DX_HA>): New howto. (ppc64_elf_reloc_type_lookup): Translate new bfd reloc. (ppc64_elf_ha_reloc): Correct overflow test on REL16DX_HA. (ppc64_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_howto_raw <R_PPC_16DX_HA>): New howto. (ppc_elf_reloc_type_lookup): Translate new bfd reloc. (ppc_elf_check_relocs): Handle R_PPC_16DX_HA to pacify gcc. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis. (md_apply_fix): Remove fx_subsy check. Move code converting to pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA. Remove code emiiting errors on seeing fx_pcrel set on unexpected relocs, as that is done now by the generic code via.. * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define. (TC_VALIDATE_FIX_SUB): Define. ld/ * testsuite/ld-powerpc/addpcis.d: Define ext1 and ext2 at limits of addpcis range.
2017-02-28 06:02:36 +08:00
#ifdef OBJ_ELF
/* Don't allow the generic code to convert fixups involving the
subtraction of a label in the current section to pc-relative if we
don't have the necessary pc-relative relocation. */
#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) \
(!((FIX)->fx_r_type == BFD_RELOC_64 \
|| (FIX)->fx_r_type == BFD_RELOC_32 \
|| (FIX)->fx_r_type == BFD_RELOC_16 \
|| (FIX)->fx_r_type == BFD_RELOC_LO16 \
|| (FIX)->fx_r_type == BFD_RELOC_HI16 \
|| (FIX)->fx_r_type == BFD_RELOC_HI16_S \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_ADDR16_HIGH \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_ADDR16_HIGHA \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_HIGHER \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_HIGHER_S \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_HIGHEST \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_HIGHEST_S \
PowerPC relocations for prefix insns include/ * elf/ppc64.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC), (R_PPC64_PCREL_OPT, R_PPC64_D34, R_PPC64_D34_LO, R_PPC64_D34_HI30), (R_PPC64_D34_HA30, R_PPC64_PCREL34, R_PPC64_GOT_PCREL34), (R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC), (R_PPC64_ADDR16_HIGHER34, R_PPC64_ADDR16_HIGHERA34), (R_PPC64_ADDR16_HIGHEST34, R_PPC64_ADDR16_HIGHESTA34), (R_PPC64_REL16_HIGHER34, R_PPC64_REL16_HIGHERA34), (R_PPC64_REL16_HIGHEST34, R_PPC64_REL16_HIGHESTA34), (R_PPC64_D28, R_PPC64_PCREL28): Define. bfd/ * reloc.c (BFD_RELOC_PPC64_D34, BFD_RELOC_PPC64_D34_LO), (BFD_RELOC_PPC64_D34_HI30, BFD_RELOC_PPC64_D34_HA30), (BFD_RELOC_PPC64_PCREL34, BFD_RELOC_PPC64_GOT_PCREL34), (BFD_RELOC_PPC64_PLT_PCREL34), (BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34), (BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34), (BFD_RELOC_PPC64_REL16_HIGHER34, BFD_RELOC_PPC64_REL16_HIGHERA34), (BFD_RELOC_PPC64_REL16_HIGHEST34, BFD_RELOC_PPC64_REL16_HIGHESTA34), (BFD_RELOC_PPC64_D28, BFD_RELOC_PPC64_PCREL28): New reloc enums. * elf64-ppc.c (PNOP): Define. (ppc64_elf_howto_raw): Add reloc howtos for new relocations. (ppc64_elf_reloc_type_lookup): Translate new bfd reloc numbers. (ppc64_elf_ha_reloc): Adjust addend for highera34 and highesta34 relocs. (ppc64_elf_prefix_reloc): New function. (struct ppc_link_hash_table): Add notoc_plt. (is_branch_reloc): Add R_PPC64_PLTCALL_NOTOC. (is_plt_seq_reloc): Add R_PPC64_PLT_PCREL34, R_PPC64_PLT_PCREL34_NOTOC, and R_PPC64_PLTSEQ_NOTOC. (ppc64_elf_check_relocs): Handle pcrel got and plt relocs. Set has_pltcall for section on seeing R_PPC64_PLTCALL_NOTOC. Handle possible need for dynamic relocs on non-pcrel powerxx relocs. (dec_dynrel_count): Handle non-pcrel powerxx relocs. (ppc64_elf_inline_plt): Handle R_PPC64_PLTCALL_NOTOC. (toc_adjusting_stub_needed): Likewise. (ppc64_elf_tls_optimize): Handle R_PPC64_PLTSEQ_NOTOC. (ppc64_elf_relocate_section): Handle new powerxx relocs. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): Support @pcrel, @got@pcrel, @plt@pcrel, @higher34, @highera34, @highest34, and @highesta34. (fixup_size): Handle new powerxx relocs. (md_assemble): Warn for @pcrel on non-prefix insns. Accept @l, @h and @ha on prefix insns, and infer reloc without any @ suffix. Translate powerxx relocs to suit DQ and DS field instructions. Include operand tests as well as opcode test to translate BFD_RELOC_HI16_S to BFD_RELOC_PPC_16DX_HA. (ppc_fix_adjustable): Return false for pcrel GOT and PLT relocs. (md_apply_fix): Handle new powerxx relocs. * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): Accept BFD_RELOC_PPC64_ADDR16_HIGHER34, BFD_RELOC_PPC64_ADDR16_HIGHERA34, BFD_RELOC_PPC64_ADDR16_HIGHEST34, BFD_RELOC_PPC64_ADDR16_HIGHESTA34, BFD_RELOC_PPC64_D34, and BFD_RELOC_PPC64_D28. * testsuite/gas/ppc/prefix-reloc.d, * testsuite/gas/ppc/prefix-reloc.s: New test. * testsuite/gas/ppc/ppc.exp: Run it.
2018-08-29 12:52:34 +08:00
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_ADDR16_HIGHER34 \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_ADDR16_HIGHERA34 \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_ADDR16_HIGHEST34 \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_ADDR16_HIGHESTA34 \
|| (FIX)->fx_r_type == BFD_RELOC_PPC_16DX_HA \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_D34 \
|| (FIX)->fx_r_type == BFD_RELOC_PPC64_D28))
PowerPC addpcis fix This came up because I was looking at ld/tmpdir/addpcis.o and noticed the odd addends on REL16DX_HA. They ought to both be -4. The error crept in due REL16DX_HA howto being pc-relative (as indeed it should be), and code at gas/write.c:1001 after this comment /* Make it pc-relative. If the back-end code has not selected a pc-relative reloc, cancel the adjustment we do later on all pc-relative relocs. */ *not* cancelling the pc-relative adjustment. So I've made a dummy non-relative split reloc so that the generic code handles this, rather than attempting to add hacks later in md_apply_fix which would not be very robust. Having the new internal reloc also makes it easy to support addpcis rx,sym@ha as an equivalent to addpcis rx,(sym-0f)@ha 0: The patch also fixes overflow checking, which must test whether the addi will overflow too since @l relocs don't have any overflow check. Lastly, since I was poking at md_apply_fix, I arranged to have the generic gas/write.c code emit errors for subtraction expressions where we lack reloc support. include/ * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment. * elf/ppc.h (R_PPC_16DX_HA): Likewise. bfd/ * reloc.c (BFD_RELOC_PPC_16DX_HA): New. * elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_16DX_HA>): New howto. (ppc64_elf_reloc_type_lookup): Translate new bfd reloc. (ppc64_elf_ha_reloc): Correct overflow test on REL16DX_HA. (ppc64_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_howto_raw <R_PPC_16DX_HA>): New howto. (ppc_elf_reloc_type_lookup): Translate new bfd reloc. (ppc_elf_check_relocs): Handle R_PPC_16DX_HA to pacify gcc. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis. (md_apply_fix): Remove fx_subsy check. Move code converting to pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA. Remove code emiiting errors on seeing fx_pcrel set on unexpected relocs, as that is done now by the generic code via.. * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define. (TC_VALIDATE_FIX_SUB): Define. ld/ * testsuite/ld-powerpc/addpcis.d: Define ext1 and ext2 at limits of addpcis range.
2017-02-28 06:02:36 +08:00
#endif /* OBJ_ELF */
#define RELOC_EXPANSION_POSSIBLE
#define MAX_RELOC_EXPANSION 2
#if defined (OBJ_XCOFF)
/* Force a relocation when the fix is negative. */
#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \
(GENERIC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \
|| (((SEG)->flags & SEC_DEBUGGING) == 0 \
&& (FIX)->fx_addsy && (FIX)->fx_subsy \
&& (S_GET_VALUE (fixP->fx_addsy) < S_GET_VALUE (fixP->fx_subsy))))
/* XCOFF allows undefined differences which will be encoded with
R_NEG relocations. */
#define UNDEFINED_DIFFERENCE_OK
#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
(md_register_arithmetic || (SEG) != reg_section)
#endif /* OBJ_XCOFF */
PowerPC add initial -mfuture instruction support This patch adds initial 64-bit insn assembler/disassembler support. The only instruction added is "pnop" along with the automatic aligning of prefix instruction so they do not cross 64-byte boundaries. include/ * dis-asm.h (WIDE_OUTPUT): Define. * opcode/ppc.h (prefix_opcodes, prefix_num_opcodes): Declare. (PPC_OPCODE_POWERXX, PPC_GET_PREFIX, PPC_GET_SUFFIX), (PPC_PREFIX_P, PPC_PREFIX_SEG): Define. opcodes/ * ppc-dis.c (ppc_opts): Add "future" entry. (PREFIX_OPCD_SEGS): Define. (prefix_opcd_indices): New array. (disassemble_init_powerpc): Initialize prefix_opcd_indices. (lookup_prefix): New function. (print_insn_powerpc): Handle 64-bit prefix instructions. * ppc-opc.c (PREFIX_OP, PREFIX_FORM, SUFFIX_MASK, PREFIX_MASK), (PMRR, POWERXX): Define. (prefix_opcodes): New instruction table. (prefix_num_opcodes): New constant. binutils/ * objdump.c (disassemble_bytes): Set WIDE_OUTPUT in flags. gas/ * config/tc-ppc.c (ppc_setup_opcodes): Handle prefix_opcodes. (struct insn_label_list): New. (insn_labels, free_insn_labels): New variables. (ppc_record_label, ppc_clear_labels, ppc_start_line_hook): New funcs. (ppc_frob_label, ppc_new_dot_label): Move functions earlier in file and call ppc_record_label. (md_assemble): Handle 64-bit prefix instructions. Align labels that are on the same line as a prefix instruction. * config/tc-ppc.h (tc_frob_label, ppc_frob_label): Move to later in the file. (md_start_line_hook): Define. (ppc_start_line_hook): Declare. * testsuite/gas/ppc/prefix-align.d, * testsuite/gas/ppc/prefix-align.s: New test. * testsuite/gas/ppc/ppc.exp: Run new test.
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/* Various frobbings of labels and their addresses. */
#define md_start_line_hook() ppc_start_line_hook ()
extern void ppc_start_line_hook (void);
/* Set the symbol class of a label based on the csect. */
#define tc_frob_label(sym) ppc_frob_label (sym)
extern void ppc_frob_label (symbolS *);
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/* call md_pcrel_from_section, not md_pcrel_from */
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#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section(FIX, SEC)
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#define md_parse_name(name, exp, mode, c) \
(ppc_parse_name (name, exp, mode), true)
extern void ppc_parse_name (const char *, struct expressionS *, enum expr_mode);
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#define md_optimize_expr(left, op, right) ppc_optimize_expr (left, op, right)
extern int ppc_optimize_expr (expressionS *, operatorT, expressionS *);
#define md_cleanup() ppc_cleanup ()
extern void ppc_cleanup (void);
#if (defined TE_AIX5 || defined TE_AIX \
|| defined TE_FreeBSD || defined TE_NetBSD || defined TE_LYNX)
/* ppc uses different register numbers between .eh_frame and .debug_frame.
This macro translates the .eh_frame register numbers to .debug_frame
register numbers. */
#define md_reg_eh_frame_to_debug_frame(regno) \
((regno) == 70 ? 64 /* cr2 */ \
: (regno) == 65 ? 108 /* lr */ \
: (regno) == 66 ? 109 /* ctr */ \
: (regno) >= 68 && (regno) <= 75 ? (regno) + 86 - 68 /* crN */ \
: (regno) == 76 ? 101 /* xer */ \
: (regno) >= 77 && (regno) <= 108 ? (regno) + 1124 - 77 /* vrN */ \
: (regno) == 109 ? 356 /* vrsave */ \
: (regno) == 110 ? 67 /* vscr */ \
: (regno) == 111 ? 99 /* spe_acc */ \
: (regno) == 112 ? 612 /* spefscr */ \
: (regno))
#endif
#define TARGET_USE_CFIPOP 1
#define tc_cfi_frame_initial_instructions ppc_cfi_frame_initial_instructions
extern void ppc_cfi_frame_initial_instructions (void);
#define tc_regname_to_dw2regnum tc_ppc_regname_to_dw2regnum
extern int tc_ppc_regname_to_dw2regnum (char *);
extern int ppc_cie_data_alignment;
extern int ppc_dwarf2_line_min_insn_length;
#define DWARF2_LINE_MIN_INSN_LENGTH ppc_dwarf2_line_min_insn_length
#define DWARF2_DEFAULT_RETURN_COLUMN 0x41
#define DWARF2_CIE_DATA_ALIGNMENT ppc_cie_data_alignment
#define EH_FRAME_ALIGNMENT 2