2009-11-25 03:22:45 +08:00
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/* gdb-if.c -- sim interface to GDB.
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2021-01-01 16:03:39 +08:00
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Copyright (C) 2008-2021 Free Software Foundation, Inc.
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2009-11-25 03:22:45 +08:00
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Contributed by Red Hat, Inc.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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2010-09-24 07:05:28 +08:00
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#include "config.h"
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2009-11-25 03:22:45 +08:00
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#include <stdio.h>
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#include <assert.h>
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#include <signal.h>
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#include <string.h>
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#include <ctype.h>
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#include <stdlib.h>
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#include "ansidecl.h"
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#include "gdb/callback.h"
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#include "gdb/remote-sim.h"
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#include "gdb/signals.h"
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#include "gdb/sim-rx.h"
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#include "cpu.h"
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#include "mem.h"
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#include "load.h"
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#include "syscalls.h"
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#include "err.h"
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2010-06-25 04:38:05 +08:00
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#include "trace.h"
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2009-11-25 03:22:45 +08:00
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/* Ideally, we'd wrap up all the minisim's data structures in an
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object and pass that around. However, neither GDB nor run needs
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that ability.
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So we just have one instance, that lives in global variables, and
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each time we open it, we re-initialize it. */
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struct sim_state
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{
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const char *message;
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};
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static struct sim_state the_minisim = {
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"This is the sole rx minisim instance. See libsim.a's global variables."
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};
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2015-01-15 11:14:45 +08:00
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static int rx_sim_is_open;
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2009-11-25 03:22:45 +08:00
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SIM_DESC
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sim_open (SIM_OPEN_KIND kind,
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struct host_callback_struct *callback,
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2016-01-03 14:51:44 +08:00
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struct bfd *abfd, char * const *argv)
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2009-11-25 03:22:45 +08:00
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{
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2015-01-15 11:14:45 +08:00
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if (rx_sim_is_open)
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2009-11-25 03:22:45 +08:00
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fprintf (stderr, "rx minisim: re-opened sim\n");
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/* The 'run' interface doesn't use this function, so we don't care
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about KIND; it's always SIM_OPEN_DEBUG. */
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if (kind != SIM_OPEN_DEBUG)
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fprintf (stderr, "rx minisim: sim_open KIND != SIM_OPEN_DEBUG: %d\n",
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kind);
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set_callbacks (callback);
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/* We don't expect any command-line arguments. */
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init_mem ();
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init_regs ();
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execution_error_init_debugger ();
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sim_disasm_init (abfd);
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2015-01-15 11:14:45 +08:00
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rx_sim_is_open = 1;
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2009-11-25 03:22:45 +08:00
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return &the_minisim;
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}
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static void
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check_desc (SIM_DESC sd)
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{
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if (sd != &the_minisim)
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fprintf (stderr, "rx minisim: desc != &the_minisim\n");
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}
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void
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sim_close (SIM_DESC sd, int quitting)
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{
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check_desc (sd);
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/* Not much to do. At least free up our memory. */
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init_mem ();
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2015-01-15 11:14:45 +08:00
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rx_sim_is_open = 0;
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2009-11-25 03:22:45 +08:00
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}
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static bfd *
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open_objfile (const char *filename)
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{
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bfd *prog = bfd_openr (filename, 0);
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if (!prog)
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{
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fprintf (stderr, "Can't read %s\n", filename);
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return 0;
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}
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if (!bfd_check_format (prog, bfd_object))
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{
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fprintf (stderr, "%s not a rx program\n", filename);
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return 0;
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}
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return prog;
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}
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static struct swap_list
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{
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bfd_vma start, end;
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struct swap_list *next;
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} *swap_list = NULL;
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static void
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free_swap_list (void)
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{
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while (swap_list)
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{
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struct swap_list *next = swap_list->next;
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free (swap_list);
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swap_list = next;
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}
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}
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/* When running in big endian mode, we must do an additional
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byte swap of memory areas used to hold instructions. See
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the comment preceding rx_load in load.c to see why this is
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so.
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Construct a list of memory areas that must be byte swapped.
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This list will be consulted when either reading or writing
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memory. */
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static void
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build_swap_list (struct bfd *abfd)
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{
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asection *s;
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free_swap_list ();
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/* Nothing to do when in little endian mode. */
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if (!rx_big_endian)
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return;
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for (s = abfd->sections; s; s = s->next)
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{
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if ((s->flags & SEC_LOAD) && (s->flags & SEC_CODE))
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{
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struct swap_list *sl;
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bfd_size_type size;
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bfd_section_* macros
This large patch removes the unnecessary bfd parameter from various
bfd section macros and functions. The bfd is hardly ever used and if
needed for the bfd_set_section_* or bfd_rename_section functions can
be found via section->owner except for the com, und, abs, and ind
std_section special sections. Those sections shouldn't be modified
anyway.
The patch also removes various bfd_get_section_<field> macros,
replacing their use with bfd_section_<field>, and adds
bfd_set_section_lma. I've also fixed a minor bug in gas where
compressed section renaming was done directly rather than calling
bfd_rename_section. This would have broken bfd_get_section_by_name
and similar functions, but that hardly mattered at such a late stage
in gas processing.
bfd/
* bfd-in.h (bfd_get_section_name, bfd_get_section_vma),
(bfd_get_section_lma, bfd_get_section_alignment),
(bfd_get_section_size, bfd_get_section_flags),
(bfd_get_section_userdata): Delete.
(bfd_section_name, bfd_section_size, bfd_section_vma),
(bfd_section_lma, bfd_section_alignment): Lose bfd parameter.
(bfd_section_flags, bfd_section_userdata): New.
(bfd_is_com_section): Rename parameter.
* section.c (bfd_set_section_userdata, bfd_set_section_vma),
(bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section),
(bfd_set_section_size): Delete bfd parameter, rename section parameter.
(bfd_set_section_lma): New.
* bfd-in2.h: Regenerate.
* mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param,
update callers.
* aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c,
* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
* compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h,
* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c,
* elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c,
* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
* elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c,
* elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c,
* elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c,
* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
* elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c,
* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
* elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c,
* elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c,
* elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c,
* elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
* elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c,
* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
* elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c,
* elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c,
* elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c,
* mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c,
* peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c,
* xcofflink.c: Update throughout for bfd section macro and function
changes.
binutils/
* addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c,
* objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c,
* od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c,
* resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update
throughout for bfd section macro and function changes.
gas/
* as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
* read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
* config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
* config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
* config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
* config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
* config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
* config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
* config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
* config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
* config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
* config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
* config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
* config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
* config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
* config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
* config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
* config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
* config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
* config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
* config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
* config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
bfd section macro and function changes.
* write.c (compress_debug): Use bfd_rename_section.
gdb/
* aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c,
* coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c,
* dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c,
* exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h,
* hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c,
* i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c,
* maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c,
* mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c,
* objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c,
* ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c,
* rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c,
* s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c,
* solib-spu.c, * solib-svr4.c, * solib-target.c,
* spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c,
* symmisc.c, * symtab.c, * target.c, * windows-nat.c,
* xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c,
* mi/mi-interp.c: Update throughout for bfd section macro and
function changes.
* gcore (gcore_create_callback): Use bfd_set_section_lma.
* spu-tdep.c (spu_overlay_new_objfile): Likewise.
gprof/
* corefile.c, * symtab.c: Update throughout for bfd section
macro and function changes.
ld/
* ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c,
* emultempl/aarch64elf.em, * emultempl/aix.em,
* emultempl/armcoff.em, * emultempl/armelf.em,
* emultempl/cr16elf.em, * emultempl/cskyelf.em,
* emultempl/m68hc1xelf.em, * emultempl/m68kelf.em,
* emultempl/mipself.em, * emultempl/mmix-elfnmmo.em,
* emultempl/mmo.em, * emultempl/msp430.em,
* emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em,
* emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update
throughout for bfd section macro and function changes.
libctf/
* ctf-open-bfd.c: Update throughout for bfd section macro changes.
opcodes/
* arc-ext.c: Update throughout for bfd section macro changes.
sim/
* common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c,
* erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c,
* m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c,
* rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c,
* rx/trace.c: Update throughout for bfd section macro changes.
2019-09-16 18:55:17 +08:00
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size = bfd_section_size (s);
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2009-11-25 03:22:45 +08:00
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if (size <= 0)
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continue;
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sl = malloc (sizeof (struct swap_list));
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assert (sl != NULL);
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sl->next = swap_list;
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bfd_section_* macros
This large patch removes the unnecessary bfd parameter from various
bfd section macros and functions. The bfd is hardly ever used and if
needed for the bfd_set_section_* or bfd_rename_section functions can
be found via section->owner except for the com, und, abs, and ind
std_section special sections. Those sections shouldn't be modified
anyway.
The patch also removes various bfd_get_section_<field> macros,
replacing their use with bfd_section_<field>, and adds
bfd_set_section_lma. I've also fixed a minor bug in gas where
compressed section renaming was done directly rather than calling
bfd_rename_section. This would have broken bfd_get_section_by_name
and similar functions, but that hardly mattered at such a late stage
in gas processing.
bfd/
* bfd-in.h (bfd_get_section_name, bfd_get_section_vma),
(bfd_get_section_lma, bfd_get_section_alignment),
(bfd_get_section_size, bfd_get_section_flags),
(bfd_get_section_userdata): Delete.
(bfd_section_name, bfd_section_size, bfd_section_vma),
(bfd_section_lma, bfd_section_alignment): Lose bfd parameter.
(bfd_section_flags, bfd_section_userdata): New.
(bfd_is_com_section): Rename parameter.
* section.c (bfd_set_section_userdata, bfd_set_section_vma),
(bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section),
(bfd_set_section_size): Delete bfd parameter, rename section parameter.
(bfd_set_section_lma): New.
* bfd-in2.h: Regenerate.
* mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param,
update callers.
* aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c,
* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
* compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h,
* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c,
* elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c,
* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
* elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c,
* elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c,
* elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c,
* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
* elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c,
* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
* elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c,
* elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c,
* elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c,
* elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
* elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c,
* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
* elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c,
* elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c,
* elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c,
* mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c,
* peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c,
* xcofflink.c: Update throughout for bfd section macro and function
changes.
binutils/
* addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c,
* objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c,
* od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c,
* resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update
throughout for bfd section macro and function changes.
gas/
* as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
* read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
* config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
* config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
* config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
* config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
* config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
* config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
* config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
* config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
* config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
* config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
* config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
* config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
* config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
* config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
* config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
* config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
* config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
* config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
* config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
* config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
bfd section macro and function changes.
* write.c (compress_debug): Use bfd_rename_section.
gdb/
* aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c,
* coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c,
* dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c,
* exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h,
* hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c,
* i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c,
* maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c,
* mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c,
* objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c,
* ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c,
* rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c,
* s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c,
* solib-spu.c, * solib-svr4.c, * solib-target.c,
* spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c,
* symmisc.c, * symtab.c, * target.c, * windows-nat.c,
* xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c,
* mi/mi-interp.c: Update throughout for bfd section macro and
function changes.
* gcore (gcore_create_callback): Use bfd_set_section_lma.
* spu-tdep.c (spu_overlay_new_objfile): Likewise.
gprof/
* corefile.c, * symtab.c: Update throughout for bfd section
macro and function changes.
ld/
* ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c,
* emultempl/aarch64elf.em, * emultempl/aix.em,
* emultempl/armcoff.em, * emultempl/armelf.em,
* emultempl/cr16elf.em, * emultempl/cskyelf.em,
* emultempl/m68hc1xelf.em, * emultempl/m68kelf.em,
* emultempl/mipself.em, * emultempl/mmix-elfnmmo.em,
* emultempl/mmo.em, * emultempl/msp430.em,
* emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em,
* emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update
throughout for bfd section macro and function changes.
libctf/
* ctf-open-bfd.c: Update throughout for bfd section macro changes.
opcodes/
* arc-ext.c: Update throughout for bfd section macro changes.
sim/
* common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c,
* erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c,
* m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c,
* rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c,
* rx/trace.c: Update throughout for bfd section macro changes.
2019-09-16 18:55:17 +08:00
|
|
|
sl->start = bfd_section_lma (s);
|
2009-11-25 03:22:45 +08:00
|
|
|
sl->end = sl->start + size;
|
|
|
|
swap_list = sl;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
addr_in_swap_list (bfd_vma addr)
|
|
|
|
{
|
|
|
|
struct swap_list *s;
|
|
|
|
|
|
|
|
for (s = swap_list; s; s = s->next)
|
|
|
|
{
|
|
|
|
if (s->start <= addr && addr < s->end)
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
SIM_RC
|
2014-02-20 13:13:48 +08:00
|
|
|
sim_load (SIM_DESC sd, const char *prog, struct bfd *abfd, int from_tty)
|
2009-11-25 03:22:45 +08:00
|
|
|
{
|
|
|
|
check_desc (sd);
|
|
|
|
|
|
|
|
if (!abfd)
|
|
|
|
abfd = open_objfile (prog);
|
|
|
|
if (!abfd)
|
|
|
|
return SIM_RC_FAIL;
|
|
|
|
|
2012-03-03 09:23:45 +08:00
|
|
|
rx_load (abfd, get_callbacks ());
|
2009-11-25 03:22:45 +08:00
|
|
|
build_swap_list (abfd);
|
|
|
|
|
|
|
|
return SIM_RC_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
SIM_RC
|
2016-01-03 14:51:44 +08:00
|
|
|
sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
|
|
|
|
char * const *argv, char * const *env)
|
2009-11-25 03:22:45 +08:00
|
|
|
{
|
|
|
|
check_desc (sd);
|
|
|
|
|
|
|
|
if (abfd)
|
|
|
|
{
|
2012-03-03 09:23:45 +08:00
|
|
|
rx_load (abfd, NULL);
|
2009-11-25 03:22:45 +08:00
|
|
|
build_swap_list (abfd);
|
|
|
|
}
|
|
|
|
|
|
|
|
return SIM_RC_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
sim_read (SIM_DESC sd, SIM_ADDR mem, unsigned char *buf, int length)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
check_desc (sd);
|
|
|
|
|
|
|
|
if (mem == 0)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
execution_error_clear_last_error ();
|
|
|
|
|
|
|
|
for (i = 0; i < length; i++)
|
|
|
|
{
|
|
|
|
bfd_vma addr = mem + i;
|
|
|
|
int do_swap = addr_in_swap_list (addr);
|
|
|
|
buf[i] = mem_get_qi (addr ^ (do_swap ? 3 : 0));
|
|
|
|
|
|
|
|
if (execution_error_get_last_error () != SIM_ERR_NONE)
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
|
|
|
|
return length;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2010-04-14 15:38:06 +08:00
|
|
|
sim_write (SIM_DESC sd, SIM_ADDR mem, const unsigned char *buf, int length)
|
2009-11-25 03:22:45 +08:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
check_desc (sd);
|
|
|
|
|
|
|
|
execution_error_clear_last_error ();
|
|
|
|
|
|
|
|
for (i = 0; i < length; i++)
|
|
|
|
{
|
|
|
|
bfd_vma addr = mem + i;
|
|
|
|
int do_swap = addr_in_swap_list (addr);
|
|
|
|
mem_put_qi (addr ^ (do_swap ? 3 : 0), buf[i]);
|
|
|
|
|
|
|
|
if (execution_error_get_last_error () != SIM_ERR_NONE)
|
|
|
|
return i;
|
|
|
|
}
|
|
|
|
|
|
|
|
return length;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Read the LENGTH bytes at BUF as an little-endian value. */
|
|
|
|
static DI
|
|
|
|
get_le (unsigned char *buf, int length)
|
|
|
|
{
|
|
|
|
DI acc = 0;
|
|
|
|
while (--length >= 0)
|
|
|
|
acc = (acc << 8) + buf[length];
|
|
|
|
|
|
|
|
return acc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Read the LENGTH bytes at BUF as a big-endian value. */
|
|
|
|
static DI
|
|
|
|
get_be (unsigned char *buf, int length)
|
|
|
|
{
|
|
|
|
DI acc = 0;
|
|
|
|
while (length-- > 0)
|
|
|
|
acc = (acc << 8) + *buf++;
|
|
|
|
|
|
|
|
return acc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Store VAL as a little-endian value in the LENGTH bytes at BUF. */
|
|
|
|
static void
|
|
|
|
put_le (unsigned char *buf, int length, DI val)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < length; i++)
|
|
|
|
{
|
|
|
|
buf[i] = val & 0xff;
|
|
|
|
val >>= 8;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Store VAL as a big-endian value in the LENGTH bytes at BUF. */
|
|
|
|
static void
|
|
|
|
put_be (unsigned char *buf, int length, DI val)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = length-1; i >= 0; i--)
|
|
|
|
{
|
|
|
|
buf[i] = val & 0xff;
|
|
|
|
val >>= 8;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
check_regno (enum sim_rx_regnum regno)
|
|
|
|
{
|
|
|
|
return 0 <= regno && regno < sim_rx_num_regs;
|
|
|
|
}
|
|
|
|
|
|
|
|
static size_t
|
|
|
|
reg_size (enum sim_rx_regnum regno)
|
|
|
|
{
|
|
|
|
size_t size;
|
|
|
|
|
|
|
|
switch (regno)
|
|
|
|
{
|
|
|
|
case sim_rx_r0_regnum:
|
|
|
|
size = sizeof (regs.r[0]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r1_regnum:
|
|
|
|
size = sizeof (regs.r[1]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r2_regnum:
|
|
|
|
size = sizeof (regs.r[2]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r3_regnum:
|
|
|
|
size = sizeof (regs.r[3]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r4_regnum:
|
|
|
|
size = sizeof (regs.r[4]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r5_regnum:
|
|
|
|
size = sizeof (regs.r[5]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r6_regnum:
|
|
|
|
size = sizeof (regs.r[6]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r7_regnum:
|
|
|
|
size = sizeof (regs.r[7]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r8_regnum:
|
|
|
|
size = sizeof (regs.r[8]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r9_regnum:
|
|
|
|
size = sizeof (regs.r[9]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r10_regnum:
|
|
|
|
size = sizeof (regs.r[10]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r11_regnum:
|
|
|
|
size = sizeof (regs.r[11]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r12_regnum:
|
|
|
|
size = sizeof (regs.r[12]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r13_regnum:
|
|
|
|
size = sizeof (regs.r[13]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r14_regnum:
|
|
|
|
size = sizeof (regs.r[14]);
|
|
|
|
break;
|
|
|
|
case sim_rx_r15_regnum:
|
|
|
|
size = sizeof (regs.r[15]);
|
|
|
|
break;
|
|
|
|
case sim_rx_isp_regnum:
|
|
|
|
size = sizeof (regs.r_isp);
|
|
|
|
break;
|
|
|
|
case sim_rx_usp_regnum:
|
|
|
|
size = sizeof (regs.r_usp);
|
|
|
|
break;
|
|
|
|
case sim_rx_intb_regnum:
|
|
|
|
size = sizeof (regs.r_intb);
|
|
|
|
break;
|
|
|
|
case sim_rx_pc_regnum:
|
|
|
|
size = sizeof (regs.r_pc);
|
|
|
|
break;
|
|
|
|
case sim_rx_ps_regnum:
|
|
|
|
size = sizeof (regs.r_psw);
|
|
|
|
break;
|
|
|
|
case sim_rx_bpc_regnum:
|
|
|
|
size = sizeof (regs.r_bpc);
|
|
|
|
break;
|
|
|
|
case sim_rx_bpsw_regnum:
|
|
|
|
size = sizeof (regs.r_bpsw);
|
|
|
|
break;
|
|
|
|
case sim_rx_fintv_regnum:
|
|
|
|
size = sizeof (regs.r_fintv);
|
|
|
|
break;
|
|
|
|
case sim_rx_fpsw_regnum:
|
|
|
|
size = sizeof (regs.r_fpsw);
|
|
|
|
break;
|
2010-06-25 04:38:05 +08:00
|
|
|
case sim_rx_acc_regnum:
|
|
|
|
size = sizeof (regs.r_acc);
|
|
|
|
break;
|
2009-11-25 03:22:45 +08:00
|
|
|
default:
|
|
|
|
size = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
sim_fetch_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
|
|
|
|
{
|
|
|
|
size_t size;
|
|
|
|
DI val;
|
|
|
|
|
|
|
|
check_desc (sd);
|
|
|
|
|
|
|
|
if (!check_regno (regno))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
size = reg_size (regno);
|
|
|
|
|
|
|
|
if (length != size)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
switch (regno)
|
|
|
|
{
|
|
|
|
case sim_rx_r0_regnum:
|
|
|
|
val = get_reg (0);
|
|
|
|
break;
|
|
|
|
case sim_rx_r1_regnum:
|
|
|
|
val = get_reg (1);
|
|
|
|
break;
|
|
|
|
case sim_rx_r2_regnum:
|
|
|
|
val = get_reg (2);
|
|
|
|
break;
|
|
|
|
case sim_rx_r3_regnum:
|
|
|
|
val = get_reg (3);
|
|
|
|
break;
|
|
|
|
case sim_rx_r4_regnum:
|
|
|
|
val = get_reg (4);
|
|
|
|
break;
|
|
|
|
case sim_rx_r5_regnum:
|
|
|
|
val = get_reg (5);
|
|
|
|
break;
|
|
|
|
case sim_rx_r6_regnum:
|
|
|
|
val = get_reg (6);
|
|
|
|
break;
|
|
|
|
case sim_rx_r7_regnum:
|
|
|
|
val = get_reg (7);
|
|
|
|
break;
|
|
|
|
case sim_rx_r8_regnum:
|
|
|
|
val = get_reg (8);
|
|
|
|
break;
|
|
|
|
case sim_rx_r9_regnum:
|
|
|
|
val = get_reg (9);
|
|
|
|
break;
|
|
|
|
case sim_rx_r10_regnum:
|
|
|
|
val = get_reg (10);
|
|
|
|
break;
|
|
|
|
case sim_rx_r11_regnum:
|
|
|
|
val = get_reg (11);
|
|
|
|
break;
|
|
|
|
case sim_rx_r12_regnum:
|
|
|
|
val = get_reg (12);
|
|
|
|
break;
|
|
|
|
case sim_rx_r13_regnum:
|
|
|
|
val = get_reg (13);
|
|
|
|
break;
|
|
|
|
case sim_rx_r14_regnum:
|
|
|
|
val = get_reg (14);
|
|
|
|
break;
|
|
|
|
case sim_rx_r15_regnum:
|
|
|
|
val = get_reg (15);
|
|
|
|
break;
|
|
|
|
case sim_rx_isp_regnum:
|
|
|
|
val = get_reg (isp);
|
|
|
|
break;
|
|
|
|
case sim_rx_usp_regnum:
|
|
|
|
val = get_reg (usp);
|
|
|
|
break;
|
|
|
|
case sim_rx_intb_regnum:
|
|
|
|
val = get_reg (intb);
|
|
|
|
break;
|
|
|
|
case sim_rx_pc_regnum:
|
|
|
|
val = get_reg (pc);
|
|
|
|
break;
|
|
|
|
case sim_rx_ps_regnum:
|
|
|
|
val = get_reg (psw);
|
|
|
|
break;
|
|
|
|
case sim_rx_bpc_regnum:
|
|
|
|
val = get_reg (bpc);
|
|
|
|
break;
|
|
|
|
case sim_rx_bpsw_regnum:
|
|
|
|
val = get_reg (bpsw);
|
|
|
|
break;
|
|
|
|
case sim_rx_fintv_regnum:
|
|
|
|
val = get_reg (fintv);
|
|
|
|
break;
|
|
|
|
case sim_rx_fpsw_regnum:
|
|
|
|
val = get_reg (fpsw);
|
|
|
|
break;
|
2010-06-25 04:38:05 +08:00
|
|
|
case sim_rx_acc_regnum:
|
|
|
|
val = ((DI) get_reg (acchi) << 32) | get_reg (acclo);
|
|
|
|
break;
|
2009-11-25 03:22:45 +08:00
|
|
|
default:
|
|
|
|
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
|
|
|
|
regno);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rx_big_endian)
|
|
|
|
put_be (buf, length, val);
|
|
|
|
else
|
|
|
|
put_le (buf, length, val);
|
|
|
|
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
sim_store_register (SIM_DESC sd, int regno, unsigned char *buf, int length)
|
|
|
|
{
|
|
|
|
size_t size;
|
|
|
|
DI val;
|
|
|
|
|
|
|
|
check_desc (sd);
|
|
|
|
|
|
|
|
if (!check_regno (regno))
|
2011-01-11 22:19:34 +08:00
|
|
|
return -1;
|
2009-11-25 03:22:45 +08:00
|
|
|
|
|
|
|
size = reg_size (regno);
|
|
|
|
|
|
|
|
if (length != size)
|
2011-01-11 22:19:34 +08:00
|
|
|
return -1;
|
2009-11-25 03:22:45 +08:00
|
|
|
|
|
|
|
if (rx_big_endian)
|
|
|
|
val = get_be (buf, length);
|
|
|
|
else
|
|
|
|
val = get_le (buf, length);
|
|
|
|
|
|
|
|
switch (regno)
|
|
|
|
{
|
|
|
|
case sim_rx_r0_regnum:
|
|
|
|
put_reg (0, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r1_regnum:
|
|
|
|
put_reg (1, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r2_regnum:
|
|
|
|
put_reg (2, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r3_regnum:
|
|
|
|
put_reg (3, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r4_regnum:
|
|
|
|
put_reg (4, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r5_regnum:
|
|
|
|
put_reg (5, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r6_regnum:
|
|
|
|
put_reg (6, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r7_regnum:
|
|
|
|
put_reg (7, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r8_regnum:
|
|
|
|
put_reg (8, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r9_regnum:
|
|
|
|
put_reg (9, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r10_regnum:
|
|
|
|
put_reg (10, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r11_regnum:
|
|
|
|
put_reg (11, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r12_regnum:
|
|
|
|
put_reg (12, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r13_regnum:
|
|
|
|
put_reg (13, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r14_regnum:
|
|
|
|
put_reg (14, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_r15_regnum:
|
|
|
|
put_reg (15, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_isp_regnum:
|
|
|
|
put_reg (isp, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_usp_regnum:
|
|
|
|
put_reg (usp, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_intb_regnum:
|
|
|
|
put_reg (intb, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_pc_regnum:
|
|
|
|
put_reg (pc, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_ps_regnum:
|
|
|
|
put_reg (psw, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_bpc_regnum:
|
|
|
|
put_reg (bpc, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_bpsw_regnum:
|
|
|
|
put_reg (bpsw, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_fintv_regnum:
|
|
|
|
put_reg (fintv, val);
|
|
|
|
break;
|
|
|
|
case sim_rx_fpsw_regnum:
|
|
|
|
put_reg (fpsw, val);
|
|
|
|
break;
|
2010-07-08 07:22:43 +08:00
|
|
|
case sim_rx_acc_regnum:
|
|
|
|
put_reg (acclo, val & 0xffffffff);
|
|
|
|
put_reg (acchi, (val >> 32) & 0xffffffff);
|
|
|
|
break;
|
2009-11-25 03:22:45 +08:00
|
|
|
default:
|
|
|
|
fprintf (stderr, "rx minisim: unrecognized register number: %d\n",
|
|
|
|
regno);
|
2011-01-11 22:19:34 +08:00
|
|
|
return 0;
|
2009-11-25 03:22:45 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return size;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_info (SIM_DESC sd, int verbose)
|
|
|
|
{
|
|
|
|
check_desc (sd);
|
|
|
|
|
|
|
|
printf ("The rx minisim doesn't collect any statistics.\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
static volatile int stop;
|
|
|
|
static enum sim_stop reason;
|
|
|
|
int siggnal;
|
|
|
|
|
|
|
|
|
|
|
|
/* Given a signal number used by the RX bsp (that is, newlib),
|
2014-02-18 09:15:56 +08:00
|
|
|
return a target signal number used by GDB. */
|
|
|
|
static int
|
|
|
|
rx_signal_to_gdb_signal (int rx)
|
2009-11-25 03:22:45 +08:00
|
|
|
{
|
|
|
|
switch (rx)
|
|
|
|
{
|
|
|
|
case 4:
|
2014-02-18 09:15:56 +08:00
|
|
|
return GDB_SIGNAL_ILL;
|
2009-11-25 03:22:45 +08:00
|
|
|
|
|
|
|
case 5:
|
2014-02-18 09:15:56 +08:00
|
|
|
return GDB_SIGNAL_TRAP;
|
2009-11-25 03:22:45 +08:00
|
|
|
|
|
|
|
case 10:
|
2014-02-18 09:15:56 +08:00
|
|
|
return GDB_SIGNAL_BUS;
|
2009-11-25 03:22:45 +08:00
|
|
|
|
|
|
|
case 11:
|
2014-02-18 09:15:56 +08:00
|
|
|
return GDB_SIGNAL_SEGV;
|
2009-11-25 03:22:45 +08:00
|
|
|
|
|
|
|
case 24:
|
2014-02-18 09:15:56 +08:00
|
|
|
return GDB_SIGNAL_XCPU;
|
2009-11-25 03:22:45 +08:00
|
|
|
|
|
|
|
case 2:
|
2014-02-18 09:15:56 +08:00
|
|
|
return GDB_SIGNAL_INT;
|
2009-11-25 03:22:45 +08:00
|
|
|
|
|
|
|
case 8:
|
2014-02-18 09:15:56 +08:00
|
|
|
return GDB_SIGNAL_FPE;
|
2009-11-25 03:22:45 +08:00
|
|
|
|
|
|
|
case 6:
|
2014-02-18 09:15:56 +08:00
|
|
|
return GDB_SIGNAL_ABRT;
|
2009-11-25 03:22:45 +08:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
/* Take a step return code RC and set up the variables consulted by
|
|
|
|
sim_stop_reason appropriately. */
|
2021-01-29 01:27:44 +08:00
|
|
|
static void
|
2009-11-25 03:22:45 +08:00
|
|
|
handle_step (int rc)
|
|
|
|
{
|
|
|
|
if (execution_error_get_last_error () != SIM_ERR_NONE)
|
|
|
|
{
|
|
|
|
reason = sim_stopped;
|
2012-05-25 00:51:47 +08:00
|
|
|
siggnal = GDB_SIGNAL_SEGV;
|
2009-11-25 03:22:45 +08:00
|
|
|
}
|
|
|
|
if (RX_STEPPED (rc) || RX_HIT_BREAK (rc))
|
|
|
|
{
|
|
|
|
reason = sim_stopped;
|
2012-05-25 00:51:47 +08:00
|
|
|
siggnal = GDB_SIGNAL_TRAP;
|
2009-11-25 03:22:45 +08:00
|
|
|
}
|
|
|
|
else if (RX_STOPPED (rc))
|
|
|
|
{
|
|
|
|
reason = sim_stopped;
|
2014-02-18 09:15:56 +08:00
|
|
|
siggnal = rx_signal_to_gdb_signal (RX_STOP_SIG (rc));
|
2009-11-25 03:22:45 +08:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
assert (RX_EXITED (rc));
|
|
|
|
reason = sim_exited;
|
|
|
|
siggnal = RX_EXIT_STATUS (rc);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
sim_resume (SIM_DESC sd, int step, int sig_to_deliver)
|
|
|
|
{
|
[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-30 02:41:28 +08:00
|
|
|
int rc;
|
|
|
|
|
2009-11-25 03:22:45 +08:00
|
|
|
check_desc (sd);
|
|
|
|
|
|
|
|
if (sig_to_deliver != 0)
|
|
|
|
{
|
|
|
|
fprintf (stderr,
|
|
|
|
"Warning: the rx minisim does not implement "
|
|
|
|
"signal delivery yet.\n" "Resuming with no signal.\n");
|
|
|
|
}
|
|
|
|
|
|
|
|
execution_error_clear_last_error ();
|
|
|
|
|
|
|
|
if (step)
|
[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-30 02:41:28 +08:00
|
|
|
{
|
|
|
|
rc = setjmp (decode_jmp_buf);
|
|
|
|
if (rc == 0)
|
|
|
|
rc = decode_opcode ();
|
|
|
|
handle_step (rc);
|
|
|
|
}
|
2009-11-25 03:22:45 +08:00
|
|
|
else
|
|
|
|
{
|
|
|
|
/* We don't clear 'stop' here, because then we would miss
|
|
|
|
interrupts that arrived on the way here. Instead, we clear
|
|
|
|
the flag in sim_stop_reason, after GDB has disabled the
|
|
|
|
interrupt signal handler. */
|
|
|
|
for (;;)
|
|
|
|
{
|
|
|
|
if (stop)
|
|
|
|
{
|
|
|
|
stop = 0;
|
|
|
|
reason = sim_stopped;
|
2012-05-25 00:51:47 +08:00
|
|
|
siggnal = GDB_SIGNAL_INT;
|
2009-11-25 03:22:45 +08:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
[include/opcode]
* rx.h (RX_Operand_Type): Add TwoReg.
(RX_Opcode_ID): Remove ediv and ediv2.
[opcodes]
* rx-decode.opc (SRR): New.
(rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov
r0,r0) and NOP3 (max r0,r0) special cases.
* rx-decode.c: Regenerate.
[sim/rx]
* rx.c (decode_cache_base): New.
(id_names): Remove ediv and edivu.
(optype_names): Add TwoReg.
(maybe_get_mem_page): New.
(rx_get_byte): Call it.
(get_op): Add TwoReg support.
(put_op): Likewise.
(PD, PS, PS2, GD, GS, GS2, DSZ, SSZ, S2SZ, US1, US2, OM): "opcode"
is a pointer now.
(DO_RETURN): New. We use longjmp to return an exception result.
(decode_opcode): Make opcode a pointer to the decode cache. Save
decoded opcode information and re-use. Call DO_RETURN instead of
return throughout. Remove ediv and edivu.
* mem.c (ptdc): New. Adds decode cache.
(rx_mem_ptr): Support it.
(rx_mem_decode_cache): New.
* mem.h (enum mem_ptr_action): add MPA_DECODE_CACHE.
(rx_mem_decode_cache): Declare.
* gdb-if.c (sim_resume): Add decode_opcode's setjmp logic here...
* main.c (main): ...and here. Use a fast loop if neither trace
nor disassemble is given.
* cpu.h (RX_MAKE_STEPPED, RX_MAKE_HIT_BREAK, RX_MAKE_EXITED,
RX_MAKE_STOPPED, RX_EXITED, RX_STOPPED): Adjust so that 0 is not a
valid code for anything.
2010-07-30 02:41:28 +08:00
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rc = setjmp (decode_jmp_buf);
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if (rc == 0)
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rc = decode_opcode ();
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2009-11-25 03:22:45 +08:00
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if (execution_error_get_last_error () != SIM_ERR_NONE)
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{
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reason = sim_stopped;
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2012-05-25 00:51:47 +08:00
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siggnal = GDB_SIGNAL_SEGV;
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2009-11-25 03:22:45 +08:00
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break;
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}
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if (!RX_STEPPED (rc))
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{
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handle_step (rc);
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break;
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}
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}
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}
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}
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int
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sim_stop (SIM_DESC sd)
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{
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stop = 1;
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return 1;
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}
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void
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sim_stop_reason (SIM_DESC sd, enum sim_stop *reason_p, int *sigrc_p)
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{
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check_desc (sd);
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*reason_p = reason;
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*sigrc_p = siggnal;
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}
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void
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2014-02-20 13:28:17 +08:00
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sim_do_command (SIM_DESC sd, const char *cmd)
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2009-11-25 03:22:45 +08:00
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{
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2014-02-20 13:28:17 +08:00
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const char *args;
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char *p = strdup (cmd);
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2009-11-25 03:22:45 +08:00
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2014-02-20 13:28:17 +08:00
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check_desc (sd);
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2009-11-25 03:22:45 +08:00
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/* Skip leading whitespace. */
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while (isspace (*p))
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p++;
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/* Find the extent of the command word. */
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2021-01-29 01:17:08 +08:00
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for (; *p != '\0'; p++)
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2009-11-25 03:22:45 +08:00
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if (isspace (*p))
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break;
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/* Null-terminate the command word, and record the start of any
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further arguments. */
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2021-01-29 01:17:08 +08:00
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if (*p != '\0')
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2009-11-25 03:22:45 +08:00
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{
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*p = '\0';
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args = p + 1;
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while (isspace (*args))
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args++;
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}
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else
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args = p;
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if (strcmp (cmd, "trace") == 0)
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{
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if (strcmp (args, "on") == 0)
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trace = 1;
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else if (strcmp (args, "off") == 0)
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trace = 0;
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else
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printf ("The 'sim trace' command expects 'on' or 'off' "
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"as an argument.\n");
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}
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else if (strcmp (cmd, "verbose") == 0)
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{
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if (strcmp (args, "on") == 0)
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verbose = 1;
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2010-05-29 01:10:32 +08:00
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else if (strcmp (args, "noisy") == 0)
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verbose = 2;
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2009-11-25 03:22:45 +08:00
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else if (strcmp (args, "off") == 0)
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verbose = 0;
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else
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2010-05-29 01:10:32 +08:00
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printf ("The 'sim verbose' command expects 'on', 'noisy', or 'off'"
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2009-11-25 03:22:45 +08:00
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" as an argument.\n");
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}
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else
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printf ("The 'sim' command expects either 'trace' or 'verbose'"
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" as a subcommand.\n");
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2014-02-20 13:28:17 +08:00
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free (p);
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2009-11-25 03:22:45 +08:00
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}
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2011-04-17 02:16:36 +08:00
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char **
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2013-03-16 01:53:44 +08:00
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sim_complete_command (SIM_DESC sd, const char *text, const char *word)
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2011-04-17 02:16:36 +08:00
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{
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return NULL;
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}
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2021-01-26 02:58:37 +08:00
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/* Stub this out for now. */
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char *
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sim_memory_map (SIM_DESC sd)
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{
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return NULL;
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}
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