binutils-gdb/sim/riscv/model_list.def

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M(G)
M(I)
M(IM)
M(IMA)
M(IA)
M(E)
M(EM)
M(EMA)
M(EA)
sim: riscv: new port This is a hand-written implementation that should have fairly complete coverage for the base integer instruction set ("i"), and for the atomic ("a") and integer multiplication+division ("m") extensions. It also covers 32-bit & 64-bit targets. The unittest coverage is a bit weak atm, but should get better. 2015-05-21 23:16:45 +08:00			`M(G)`
			`M(I)`
			`M(IM)`
			`M(IMA)`
			`M(IA)`
			`M(E)`
			`M(EM)`
			`M(EMA)`
			`M(EA)`