2013-06-21 23:01:57 +08:00
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/* Opcode decoder for the TI MSP430
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2014-03-05 19:46:15 +08:00
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Copyright (C) 2012-2014 Free Software Foundation, Inc.
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2013-06-21 23:01:57 +08:00
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Written by DJ Delorie <dj@redhat.com>
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This file is part of GDB, the GNU Debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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typedef enum
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{
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MSO_unknown,
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/* Double-operand instructions - all repeat .REPEATS times. */
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MSO_mov, /* dest = src */
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MSO_add, /* dest += src */
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MSO_addc, /* dest += src + carry */
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MSO_subc, /* dest -= (src-1) + carry */
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MSO_sub, /* dest -= src */
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MSO_cmp, /* dest - src -> status */
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MSO_dadd, /* dest += src (as BCD) */
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MSO_bit, /* dest & src -> status */
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MSO_bic, /* dest &= ~src (bit clear) */
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MSO_bis, /* dest |= src (bit set, OR) */
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MSO_xor, /* dest ^= src */
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MSO_and, /* dest &= src */
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/* Single-operand instructions. */
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MSO_rrc, /* Rotate through carry, dest >>= .REPEATS. */
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MSO_swpb, /* Swap lower bytes of operand. */
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MSO_rra, /* Signed shift dest >>= .REPEATS. */
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MSO_sxt, /* Sign extend lower byte. */
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MSO_push, /* Push .REPEATS registers (or other op) starting at SRC going towards R0. */
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MSO_pop, /* Pop .REPEATS registers starting at DEST going towards R15. */
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MSO_call,
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MSO_reti,
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/* Jumps. */
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MSO_jmp, /* PC = SRC if .COND true. */
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/* Extended single-operand instructions. */
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MSO_rru, /* Unsigned shift right, dest >>= .REPEATS. */
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} MSP430_Opcode_ID;
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typedef enum
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{
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MSP430_Operand_None,
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MSP430_Operand_Immediate,
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MSP430_Operand_Register,
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MSP430_Operand_Indirect,
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MSP430_Operand_Indirect_Postinc
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} MSP430_Operand_Type;
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typedef enum
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{
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MSR_0 = 0,
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MSR_PC = 0,
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MSR_SP = 1,
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MSR_SR = 2,
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MSR_CG = 3,
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MSR_None = 16,
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} MSP430_Register;
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typedef struct
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{
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MSP430_Operand_Type type;
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int addend;
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MSP430_Register reg : 8;
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MSP430_Register reg2 : 8;
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unsigned char bit_number : 4;
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unsigned char condition : 3;
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} MSP430_Opcode_Operand;
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typedef enum
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{
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MSP430_Byte = 0,
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MSP430_Word,
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MSP430_Addr
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} MSP430_Size;
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/* These numerically match the bit encoding. */
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typedef enum
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{
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MSC_nz = 0,
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MSC_z,
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MSC_nc,
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MSC_c,
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MSC_n,
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MSC_ge,
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MSC_l,
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MSC_true,
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} MSP430_Condition;
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#define MSP430_FLAG_C 0x01
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#define MSP430_FLAG_Z 0x02
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#define MSP430_FLAG_N 0x04
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#define MSP430_FLAG_V 0x80
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typedef struct
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{
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int lineno;
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MSP430_Opcode_ID id;
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unsigned flags_1:8; /* These flags are set to '1' by the insn. */
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unsigned flags_0:8; /* These flags are set to '0' by the insn. */
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unsigned flags_set:8; /* These flags are set appropriately by the insn. */
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unsigned zc:1; /* If set, pretend the carry bit is zero. */
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unsigned repeat_reg:1; /* If set, count is in REG[repeats]. */
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unsigned ofs_430x:1; /* If set, the offset in any operand is 430x (else use 430 compatibility mode). */
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unsigned repeats:5; /* Contains COUNT-1, or register number. */
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int n_bytes; /* Opcode size in BYTES. */
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char * syntax;
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MSP430_Size size; /* Operand size in BITS. */
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MSP430_Condition cond;
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/* By convention, these are [0]destination, [1]source. */
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MSP430_Opcode_Operand op[2];
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} MSP430_Opcode_Decoded;
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int msp430_decode_opcode (unsigned long, MSP430_Opcode_Decoded *, int (*)(void *), void *);
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