mirror of
https://sourceware.org/git/binutils-gdb.git
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213 lines
4.7 KiB
ArmAsm
213 lines
4.7 KiB
ArmAsm
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//Original:/testcases/core/c_dsp32mult_dr_m_t/c_dsp32mult_dr_m_t.dsp
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// Spec Reference: dsp32mult single dr munop t
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# mach: bfin
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.include "testutils.inc"
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start
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imm32 r0, 0xfb235625;
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imm32 r1, 0x9fba5127;
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imm32 r2, 0xa3ff6725;
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imm32 r3, 0x0006f027;
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imm32 r4, 0xb0abcd29;
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imm32 r5, 0x1facef2b;
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imm32 r6, 0xc0fc002d;
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imm32 r7, 0xd24f702f;
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R4.L = R0.H * R0.L (T);
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R5.H = R0.L * R1.L (T);
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R6.L = R1.L * R0.H (T);
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R7.L = R1.L * R1.L (T);
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R0.H = R0.L * R0.L (T);
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R1.L = R0.L * R1.L (T);
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R2.L = R1.H * R0.L (T);
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R3.H = R1.L * R1.L (T);
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CHECKREG r0, 0x39F95625;
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CHECKREG r1, 0x9FBA369D;
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CHECKREG r2, 0xA3FFBF35;
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CHECKREG r3, 0x174DF027;
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CHECKREG r4, 0xB0ABFCBA;
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CHECKREG r5, 0x369DEF2B;
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CHECKREG r6, 0xC0FCFCEA;
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CHECKREG r7, 0xD24F3373;
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imm32 r0, 0xeb23a635;
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imm32 r1, 0x6fba5137;
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imm32 r2, 0x1324b7e5;
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imm32 r3, 0x9e060037;
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imm32 r4, 0x80ebcd39;
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imm32 r5, 0xb0aeef3b;
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imm32 r6, 0xa00ce03d;
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imm32 r7, 0x12467e03;
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R4.H = R2.L * R2.L (T);
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R5.L = R2.L * R3.H (T);
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R6.L = R3.H * R2.L (T);
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R7.H = R3.L * R3.L (T);
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R2.H = R2.L * R2.H (T);
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R3.L = R2.H * R3.H (T);
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R0.H = R3.L * R2.L (T);
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R1.L = R3.L * R3.L (T);
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CHECKREG r0, 0xFB59A635;
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CHECKREG r1, 0x6FBA0088;
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CHECKREG r2, 0xF537B7E5;
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CHECKREG r3, 0x9E060841;
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CHECKREG r4, 0x289ECD39;
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CHECKREG r5, 0xB0AE3731;
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CHECKREG r6, 0xA00C3731;
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CHECKREG r7, 0x00007E03;
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imm32 r0, 0xdd235655;
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imm32 r1, 0xc4dd5157;
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imm32 r2, 0x6324d755;
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imm32 r3, 0x00060055;
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imm32 r4, 0x90dbc509;
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imm32 r5, 0x10adef5b;
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imm32 r6, 0xb00cd05d;
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imm32 r7, 0x12467d5f;
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R0.L = R4.L * R4.H (T);
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R1.H = R4.H * R5.L (T);
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R2.L = R5.H * R4.L (T);
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R3.L = R5.L * R5.L (T);
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R4.H = R4.L * R4.H (T);
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R5.L = R4.L * R5.H (T);
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R6.H = R5.H * R4.H (T);
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R7.L = R5.H * R5.H (T);
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CHECKREG r0, 0xDD233333;
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CHECKREG r1, 0x0E735157;
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CHECKREG r2, 0x6324F851;
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CHECKREG r3, 0x0006022A;
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CHECKREG r4, 0x3333C509;
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CHECKREG r5, 0x10ADF851;
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CHECKREG r6, 0x06ABD05D;
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CHECKREG r7, 0x1246022C;
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imm32 r0, 0xcb235666;
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imm32 r1, 0xefba5166;
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imm32 r2, 0x1c248766;
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imm32 r3, 0xf0060066;
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imm32 r4, 0x90cb9d69;
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imm32 r5, 0x10acef6b;
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imm32 r6, 0x800cc06d;
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imm32 r7, 0x12467c6f;
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// test the unsigned U=1
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R0.L = R6.L * R6.L (T);
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R1.H = R6.H * R7.L (T);
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R2.L = R7.L * R6.L (T);
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R3.L = R7.L * R7.L (T);
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R6.L = R6.L * R6.L (T);
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R7.L = R6.L * R7.L (T);
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R4.L = R7.L * R6.L (T);
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R5.L = R7.L * R7.L (T);
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CHECKREG r0, 0xCB231F93;
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CHECKREG r1, 0x839C5166;
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CHECKREG r2, 0x1C24C232;
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CHECKREG r3, 0xF00678F7;
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CHECKREG r4, 0x90CB0792;
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CHECKREG r5, 0x10AC075B;
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CHECKREG r6, 0x800C1F93;
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CHECKREG r7, 0x12461EB1;
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// mix order
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imm32 r0, 0xab23a675;
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imm32 r1, 0xcfba5127;
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imm32 r2, 0x13246705;
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imm32 r3, 0xe0060007;
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imm32 r4, 0x9eabcd09;
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imm32 r5, 0x10ecdfdb;
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imm32 r6, 0x000e000d;
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imm32 r7, 0x1246e00f;
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R0.H = R0.L * R7.H (T);
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R1.L = R1.H * R6.H (T);
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R2.L = R2.L * R5.L (T);
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R3.H = R3.H * R4.H (T);
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R4.L = R4.L * R3.H (T);
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R5.L = R5.H * R2.H (T);
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R6.H = R6.H * R1.L (T);
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R7.L = R7.L * R0.H (T);
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CHECKREG r0, 0xF337A675;
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CHECKREG r1, 0xCFBAFFFA;
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CHECKREG r2, 0x1324E620;
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CHECKREG r3, 0x18500007;
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CHECKREG r4, 0x9EABF651;
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CHECKREG r5, 0x10EC0287;
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CHECKREG r6, 0xFFFF000D;
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CHECKREG r7, 0x12460330;
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imm32 r0, 0x9b235a75;
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imm32 r1, 0xcfba5127;
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imm32 r2, 0x93246905;
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imm32 r3, 0x09060007;
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imm32 r4, 0x909bcd09;
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imm32 r5, 0x10a9e9db;
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imm32 r6, 0x000c9d0d;
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imm32 r7, 0x1246790f;
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R0.L = R7.L * R0.H (T);
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R1.L = R6.L * R1.L (T);
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R2.H = R5.L * R2.L (T);
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R3.L = R4.H * R3.L (T);
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R4.L = R3.H * R4.H (T);
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R5.H = R2.H * R5.L (T);
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R6.L = R1.H * R6.L (T);
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R7.L = R0.L * R7.L (T);
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CHECKREG r0, 0x9B23A09B;
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CHECKREG r1, 0xCFBAC144;
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CHECKREG r2, 0xEDD46905;
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CHECKREG r3, 0x0906FFF9;
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CHECKREG r4, 0x909BF825;
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CHECKREG r5, 0x0324E9DB;
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CHECKREG r6, 0x000C2551;
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CHECKREG r7, 0x1246A5C7;
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imm32 r0, 0xa9235675;
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imm32 r1, 0xc8ba5127;
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imm32 r2, 0x13246705;
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imm32 r3, 0x08060007;
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imm32 r4, 0x908bcd09;
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imm32 r5, 0x10a88fdb;
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imm32 r6, 0x000c080d;
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imm32 r7, 0x1246708f;
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R2.L = R3.L * R6.L (T);
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R3.L = R4.H * R7.L (T);
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R0.H = R7.L * R0.L, R0.L = R7.H * R0.H (T);
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R1.H = R6.L * R1.L (T);
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R4.L = R5.H * R2.L (T);
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R5.L = R2.L * R3.L (T);
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R6.L = R0.L * R4.L (T);
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R7.H = R1.H * R5.L (T);
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CHECKREG r0, 0x4C06F399;
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CHECKREG r1, 0x051A5127;
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CHECKREG r2, 0x13240000;
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CHECKREG r3, 0x08069DFD;
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CHECKREG r4, 0x908B0000;
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CHECKREG r5, 0x10A80000;
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CHECKREG r6, 0x000C0000;
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CHECKREG r7, 0x0000708F;
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imm32 r0, 0x7b235675;
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imm32 r1, 0xcfba5127;
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imm32 r2, 0x17246705;
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imm32 r3, 0x00760007;
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imm32 r4, 0x907bcd09;
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imm32 r5, 0x10a7efdb;
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imm32 r6, 0x000c700d;
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imm32 r7, 0x1246770f;
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R4.L = R5.L * R3.L (T);
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R6.L = R6.L * R4.H (T);
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R0.H = R7.L * R5.H (T);
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R1.L = R0.L * R6.L (T);
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R2.L = R1.L * R7.H (T);
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R5.L = R2.L * R2.H (T);
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R3.H = R3.H * R0.L (T);
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R7.L = R4.H * R1.H (T);
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CHECKREG r0, 0x0F7D5675;
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CHECKREG r1, 0xCFBABE0F;
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CHECKREG r2, 0x1724F696;
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CHECKREG r3, 0x004F0007;
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CHECKREG r4, 0x907BFFFF;
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CHECKREG r5, 0x10A7FE4C;
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CHECKREG r6, 0x000C9E60;
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CHECKREG r7, 0x12462A0E;
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pass
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