binutils-gdb/gas/config/tc-frv.h

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/* tc-frv.h -- Header file for tc-frv.c.
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Copyright 2002, 2004, 2005, 2007 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA. */
#define TC_FRV
#define LISTING_HEADER "FRV GAS "
/* The target BFD architecture. */
#define TARGET_ARCH bfd_arch_frv
#define TARGET_FORMAT (frv_md_fdpic_enabled () \
? "elf32-frvfdpic" : "elf32-frv")
extern bfd_boolean frv_md_fdpic_enabled (void);
#define TARGET_BYTES_BIG_ENDIAN 1
/* Permit temporary numeric labels. */
#define LOCAL_LABELS_FB 1
#define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs */
/* We don't need to handle .word strangely. */
#define WORKING_DOT_WORD
gas: * cgen.c, cgen.h, tc.h, write.c, config/obj-coff.c * config/tc-a29k.c, config/tc-alpha.c, config/tc-alpha.h * config/tc-arc.c, config/tc-arc.h, config/tc-arm.c * config/tc-arm.h, config/tc-avr.c, config/tc-avr.h * config/tc-cris.c, config/tc-crx.c, config/tc-d10v.c * config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h * config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.h * config/tc-frv.c, config/tc-frv.h, config/tc-h8300.c * config/tc-h8500.c, config/tc-hppa.c, config/tc-hppa.h * config/tc-i370.c, config/tc-i370.h, config/tc-i386.c * config/tc-i386.h, config/tc-i860.c, config/tc-i860.h * config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c * config/tc-ip2k.c, config/tc-ip2k.h, config/tc-iq2000.c * config/tc-iq2000.h, config/tc-m32r.c, config/tc-m32r.h * config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c * config/tc-m68k.h, config/tc-m88k.c, config/tc-maxq.c * config/tc-mcore.c, config/tc-mcore.h, config/tc-mips.c * config/tc-mips.h, config/tc-mmix.c, config/tc-mn10200.c * config/tc-mn10300.c, config/tc-msp430.c, config/tc-ns32k.c * config/tc-openrisc.h, config/tc-or32.c, config/tc-or32.h * config/tc-pdp11.c, config/tc-pj.c, config/tc-pj.h * config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c * config/tc-s390.h, config/tc-sh64.c, config/tc-sh.c * config/tc-sh.h, config/tc-sparc.c, config/tc-sparc.h * config/tc-tahoe.c, config/tc-tic30.c, config/tc-tic4x.c * config/tc-tic54x.c, config/tc-tic80.c, config/tc-v850.c * config/tc-v850.h, config/tc-vax.c, config/tc-vax.h * config/tc-w65.c, config/tc-xstormy16.c, config/tc-xstormy16.h * config/tc-xtensa.c, config/tc-z8k.c: Replace all instances of the string "_apply_fix3" with "_apply_fix". * po/POTFILES.in, po/gas.pot: Regenerate. bfd: * coff-i386.c: Change md_apply_fix3 to md_apply_fix in comment. cgen: * doc/porting.texi: Change all mention of md_apply_fix3 and gas_cgen_md_apply_fix3 to md_apply_fix and gas_cgen_md_apply_fix respectively.
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/* Values passed to md_apply_fix don't include the symbol value. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
extern void frv_tomcat_workaround PARAMS ((void));
#define md_cleanup frv_tomcat_workaround
#define md_number_to_chars frv_md_number_to_chars
extern long frv_relax_frag PARAMS ((fragS *, long));
#define md_relax_frag(segment, fragP, stretch) frv_relax_frag(fragP, stretch)
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#define tc_fix_adjustable(FIX) frv_fix_adjustable (FIX)
struct fix;
extern bfd_boolean frv_fix_adjustable PARAMS ((struct fix *));
/* When relaxing, we need to emit various relocs we otherwise wouldn't. */
#define TC_FORCE_RELOCATION(fix) frv_force_relocation (fix)
extern int frv_force_relocation PARAMS ((struct fix *));
/* If we simplify subtractions that aren't SUB_SAME or SUB_ABS, we end
up with PCrel fixups, but since we don't have any PCrel relocs, we
crash. Preventing simplification gets us a good, early error. */
#define TC_FORCE_RELOCATION_SUB_LOCAL(fixP) 1
#undef GAS_CGEN_MAX_FIXUPS
#define GAS_CGEN_MAX_FIXUPS 1
void frv_frob_label PARAMS ((symbolS *));
#define tc_frob_label(sym) frv_frob_label(sym)
#define tc_gen_reloc gas_cgen_tc_gen_reloc
#define md_cgen_record_fixup_exp frv_cgen_record_fixup_exp
/* Call md_pcrel_from_section(), not md_pcrel_from(). */
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#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
/* After all of the symbols have been adjusted, go over the file looking
for any relocations that pic won't support. */
#define tc_frob_file() frv_frob_file ()
extern void frv_frob_file PARAMS ((void));
/* We don't want 0x00 for code alignment because this generates `add.p
gr0, gr0, gr0' patterns. Although it's fine as a nop instruction,
it has the VLIW packing bit set, which means if you have a bunch of
them in a row and attempt to execute them, you'll exceed the VLIW
capacity and fail. This also gets GDB confused sometimes, because
it won't set breakpoints in instructions other than the first of a
VLIW pack, so you used to be unable to set a breakpoint in the
initial instruction of a function that followed such
alignment-introduced instructions.
We could have arranged to emit `nop' instructions (0x80880000),
maybe even VLIW-pack sequences of nop instructions as much as
possible for the selected machine type, just in case the alignment
code actually happens to run, but this is probably too much effort
for little gain. This code is not meant to be run anyway, so just
emit nops. */
#define MAX_MEM_FOR_RS_ALIGN_CODE (3 + 4)
#define HANDLE_ALIGN(FRAGP) do \
if ((FRAGP)->fr_type == rs_align_code) \
{ \
valueT count = ((FRAGP)->fr_next->fr_address \
- ((FRAGP)->fr_address + (FRAGP)->fr_fix)); \
char *dest = (FRAGP)->fr_literal + (FRAGP)->fr_fix; \
if ((count & 3) != 0) \
{ \
memset (dest, 0, (count & 3)); \
(FRAGP)->fr_fix += (count & 3); \
dest += (count & 3); \
count -= (count & 3); \
} \
if (count) \
{ \
(FRAGP)->fr_var = 4; \
*dest++ = 0x80; \
*dest++ = 0x88; \
*dest++ = 0x00; \
*dest++ = 0x00; \
} \
} \
while (0)