binutils-gdb/gas/config/tc-sh.h

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/* This file is tc-sh.h
* symbols.c (S_FORCE_RELOC): Add "strict" param. * symbols.h (S_FORCE_RELOC): Likewise. * config/obj-aout.h (S_FORCE_RELOC): Likewise. * config/obj-bout.h (S_FORCE_RELOC): Likewise. * config/obj-coff.h (S_FORCE_RELOC): Likewise. * config/obj-ieee.h (S_FORCE_RELOC): Likewise. * config/obj-vms.h (S_FORCE_RELOC): Likewise. * write.c (generic_force_reloc): New function. (TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. (adjust_reloc_syms): Adjust S_FORCE_RELOC call. * as.h (generic_force_reloc): Declare. * doc/internals.texi (S_FORCE_RELOC): Update. (TC_FORCE_RELOCATION_SUB_SAME): Update. * config/tc-alpha.c (alpha_force_relocation): Adjust to use generic_force_reloc. (alpha_fix_adjustable): Likewise. * config/tc-arm.c (arm_force_relocation): Likewise. * config/tc-cris.c (md_cris_force_relocation): Likewise. * config/tc-frv.c (frv_force_relocation): Likewise. * config/tc-i386.c (md_apply_fix3): Likewise. * config/tc-ia64.c (ia64_force_relocation): Likewise. * config/tc-ip2k.c (ip2k_force_relocation): Likewise. * config/tc-m32r.c (m32r_force_relocation): Likewise. * config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise. * config/tc-mcore.c (mcore_force_relocation): Likewise. * config/tc-mips.c (mips_force_relocation): Likewise. * config/tc-mmix.c (mmix_force_relocation): Likewise. * config/tc-ppc.c (ppc_force_relocation): Likewise. * config/tc-s390.c (tc_s390_force_relocation): Likewise. * config/tc-sh.c (sh_force_relocation): Likewise. (md_pcrel_from_section): Likewise. * config/tc-sparc.c (tc_gen_reloc): Likewise. * config/tc-v850.c (v850_force_relocation): Likewise. * config/tc-xstormy16.c (xstormy16_force_relocation): Likewise. * config/tc-i386.h (TC_FORCE_RELOCATION): Likewise. * config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise. * config/tc-sparc.h (tc_fix_adjustable): Likewise. * config/tc-d10v.c (d10v_force_relocation): Delete. * config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define. * config/tc-dlx.c (md_dlx_force_relocation): Delete. * config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define. * config/tc-fr30.c (fr30_force_relocation): Delete. * config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define. * config/tc-mn10300.c (mn10300_force_relocation): Delete. * config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise. * config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call. * config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix. * config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define. * config/tc-openrisc.c (openrisc_force_relocation): Delete. * config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sparc.c (elf32_sparc_force_relocation): Delete. * config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF. * config/tc-i386.c (i386_force_relocation): Delete. * config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for BFD_ASSEMBLER. (EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting. * config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define. * config/tc-pj.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
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Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA. */
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#define TC_SH
#define TARGET_ARCH bfd_arch_sh
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/* The type fixS is defined (to struct fix) in write.h, but write.h uses
definitions from this file. To avoid problems with including write.h
after the "right" definitions, don't; just forward-declare struct fix
here. */
struct fix;
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struct segment_info_struct;
struct internal_reloc;
/* Whether -relax was used. */
extern int sh_relax;
/* Whether -small was used. */
extern int sh_small;
/* Don't try to break words. */
#define WORKING_DOT_WORD
/* We require .long, et. al., to be aligned correctly. */
#define md_cons_align(nbytes) sh_cons_align (nbytes)
extern void sh_cons_align (int);
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/* We need to optimize expr with taking account of rs_align_test
frags. */
#ifdef OBJ_ELF
#define md_optimize_expr(l,o,r) sh_optimize_expr (l, o, r)
extern int sh_optimize_expr (expressionS *, operatorT, expressionS *);
#endif
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/* When relaxing, we need to generate relocations for alignment
directives. */
#define HANDLE_ALIGN(frag) sh_handle_align (frag)
extern void sh_handle_align (fragS *);
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* as.h (rs_align_test): New. * frags.c (NOP_OPCODE): Move default from read.c. (MAX_MEM_FOR_RS_ALIGN_CODE): New default. (frag_align_code): New. * frags.h (frag_align_code): Declare. * read.c (NOP_OPCODE): Remove. (do_align): Use frag_align_code. * write.c (NOP_OPCODE): Remove. (get_recorded_alignment): New. (cvt_frag_to_fill): Handle rs_align_test. (relax_segment): Likewise. (subsegs_finish): Align last subseg in section to the section alignment. Use frag_align_code. * write.h (get_recorded_alignment): Declare. * config/obj-coff.c (size_section): Handle rs_align_test. (fill_section, fixup_mdeps): Likewise. (write_object_file): Use frag_align_code. * config/tc-alpha.c (alpha_align): Use frag_align_code. (alpha_handle_align): New. * config/tc-alpha.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-i386.h (md_do_align): Use frag_align_code. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-ia64.c (ia64_md_do_align): Don't do code alignment. (ia64_handle_align): New. * config/tc-ia64.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m32r.c (m32r_do_align): Remove. (m32r_handle_align): New. (fill_insn): Use frag_align_code. * config/tc-m32r.h (md_do_align): Remove. (HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m88k.c, config/tc-m88k.h: Similarly. * config/tc-mips.c, config/tc-mips.h: Similarly. * config/tc-sh.c (sh_cons_align): Use rs_align_test. (sh_handle_align): Likewise. Handle rs_align_code. (sh_do_align): Remove. * config/tc-sh.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-sparc.c (sparc_cons_align): Use rs_align_test. (sparc_handle_align): Likewise. Handle rs_align_code. * config/tc-sparc.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New.
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#define MAX_MEM_FOR_RS_ALIGN_CODE (1 + 2)
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/* We need to force out some relocations when relaxing. */
#define TC_FORCE_RELOCATION(fix) sh_force_relocation (fix)
extern int sh_force_relocation (struct fix *);
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/* This macro decides whether a particular reloc is an entry in a
switch table. It is used when relaxing, because the linker needs
to know about all such entries so that it can adjust them if
necessary. */
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#define SWITCH_TABLE(FIX) \
((FIX)->fx_addsy != NULL \
&& (FIX)->fx_subsy != NULL \
&& S_GET_SEGMENT ((FIX)->fx_addsy) == text_section \
&& S_GET_SEGMENT ((FIX)->fx_subsy) == text_section \
&& ((FIX)->fx_r_type == BFD_RELOC_32 \
|| (FIX)->fx_r_type == BFD_RELOC_16 \
* README-vms: Delete. * config-gas.com: Delete. * makefile.vms: Delete. * vmsconf.sh: Delete. * config/atof-tahoe.c: Delete. * config/m88k-opcode.h: Delete. * config/obj-bout.c: Delete. * config/obj-bout.h: Delete. * config/obj-hp300.c: Delete. * config/obj-hp300.h: Delete. * config/tc-a29k.c: Delete. * config/tc-a29k.h: Delete. * config/tc-h8500.c: Delete. * config/tc-h8500.h: Delete. * config/tc-m88k.c: Delete. * config/tc-m88k.h: Delete. * config/tc-tahoe.c: Delete. * config/tc-tahoe.h: Delete. * config/tc-tic80.c: Delete. * config/tc-tic80.h: Delete. * config/tc-w65.c: Delete. * config/tc-w65.h: Delete. * config/te-aux.h: Delete. * config/te-delt88.h: Delete. * config/te-delta.h: Delete. * config/te-dpx2.h: Delete. * config/te-hp300.h: Delete. * config/te-ic960.h: Delete. * config/vms-a-conf.h: Delete. * doc/c-a29k.texi: Delete. * doc/c-h8500.texi: Delete. * doc/c-m88k.texi: Delete. * README: Remove obsolete examples, and list of supported targets. * Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65, bout and hp300 support. (DEP_FLAGS): Don't define BFD_ASSEMBLER. * configure.in: Remove --enable-bfd-assembler, need_bfd, primary_bfd_gas. * configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf, m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy. * as.c: Remove all non-BFD_ASSEMBLER code, support for above targets. * as.h: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c: Likewise. * ehopt.c: Likewise. * input-file.c: Likewise. * listing.c: Likewise. * literal.c: Likewise. * messages.c: Likewise. * obj.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * struc-symbol.h: Likewise. * subsegs.c: Likewise. * subsegs.h: Likewise. * symbols.c: Likewise. * symbols.h: Likewise. * tc.h: Likewise. * write.c: Likewise. * write.h: Likewise. * config/aout_gnu.h: Likewise. * config/obj-aout.c: Likewise. * config/obj-aout.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-coff.h: Likewise. * config/obj-evax.h: Likewise. * config/obj-ieee.h: Likewise. * config/tc-arm.c: Likewise. * config/tc-arm.h: Likewise. * config/tc-avr.c: Likewise. * config/tc-avr.h: Likewise. * config/tc-crx.h: Likewise. * config/tc-d10v.h: Likewise. * config/tc-d30v.h: Likewise. * config/tc-dlx.h: Likewise. * config/tc-fr30.h: Likewise. * config/tc-frv.h: Likewise. * config/tc-h8300.c: Likewise. * config/tc-h8300.h: Likewise. * config/tc-hppa.h: Likewise. * config/tc-i370.h: Likewise. * config/tc-i386.c: Likewise. * config/tc-i386.h: Likewise. * config/tc-i860.h: Likewise. * config/tc-i960.c: Likewise. * config/tc-i960.h: Likewise. * config/tc-ip2k.h: Likewise. * config/tc-iq2000.h: Likewise. * config/tc-m32c.h: Likewise. * config/tc-m32r.h: Likewise. * config/tc-m68hc11.h: Likewise. * config/tc-m68k.c: Likewise. * config/tc-m68k.h: Likewise. * config/tc-maxq.c: Likewise. * config/tc-maxq.h: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mcore.h: Likewise. * config/tc-mn10200.h: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-mn10300.h: Likewise. * config/tc-ms1.h: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-ns32k.h: Likewise. * config/tc-openrisc.h: Likewise. * config/tc-or32.c: Likewise. * config/tc-or32.h: Likewise. * config/tc-ppc.c: Likewise. * config/tc-ppc.h: Likewise. * config/tc-s390.h: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh.h: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic30.c: Likewise. * config/tc-tic30.h: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic54x.h: Likewise. * config/tc-v850.h: Likewise. * config/tc-vax.c: Likewise. * config/tc-vax.h: Likewise. * config/tc-xstormy16.h: Likewise. * config/tc-xtensa.h: Likewise. * config/tc-z8k.c: Likewise. * config/tc-z8k.h: Likewise. * config/vms-a-conf.h * doc/Makefile.am: Likewise. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * doc/Makefile.in: Regenerate. * Makefile.in: Regenerate. * configure: Regenerate. * config.in: Regenerate. * po/POTFILES.in: Regenerate.
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|| (FIX)->fx_r_type == BFD_RELOC_8))
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* symbols.c (S_FORCE_RELOC): Add "strict" param. * symbols.h (S_FORCE_RELOC): Likewise. * config/obj-aout.h (S_FORCE_RELOC): Likewise. * config/obj-bout.h (S_FORCE_RELOC): Likewise. * config/obj-coff.h (S_FORCE_RELOC): Likewise. * config/obj-ieee.h (S_FORCE_RELOC): Likewise. * config/obj-vms.h (S_FORCE_RELOC): Likewise. * write.c (generic_force_reloc): New function. (TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. (adjust_reloc_syms): Adjust S_FORCE_RELOC call. * as.h (generic_force_reloc): Declare. * doc/internals.texi (S_FORCE_RELOC): Update. (TC_FORCE_RELOCATION_SUB_SAME): Update. * config/tc-alpha.c (alpha_force_relocation): Adjust to use generic_force_reloc. (alpha_fix_adjustable): Likewise. * config/tc-arm.c (arm_force_relocation): Likewise. * config/tc-cris.c (md_cris_force_relocation): Likewise. * config/tc-frv.c (frv_force_relocation): Likewise. * config/tc-i386.c (md_apply_fix3): Likewise. * config/tc-ia64.c (ia64_force_relocation): Likewise. * config/tc-ip2k.c (ip2k_force_relocation): Likewise. * config/tc-m32r.c (m32r_force_relocation): Likewise. * config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise. * config/tc-mcore.c (mcore_force_relocation): Likewise. * config/tc-mips.c (mips_force_relocation): Likewise. * config/tc-mmix.c (mmix_force_relocation): Likewise. * config/tc-ppc.c (ppc_force_relocation): Likewise. * config/tc-s390.c (tc_s390_force_relocation): Likewise. * config/tc-sh.c (sh_force_relocation): Likewise. (md_pcrel_from_section): Likewise. * config/tc-sparc.c (tc_gen_reloc): Likewise. * config/tc-v850.c (v850_force_relocation): Likewise. * config/tc-xstormy16.c (xstormy16_force_relocation): Likewise. * config/tc-i386.h (TC_FORCE_RELOCATION): Likewise. * config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise. * config/tc-sparc.h (tc_fix_adjustable): Likewise. * config/tc-d10v.c (d10v_force_relocation): Delete. * config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define. * config/tc-dlx.c (md_dlx_force_relocation): Delete. * config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define. * config/tc-fr30.c (fr30_force_relocation): Delete. * config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define. * config/tc-mn10300.c (mn10300_force_relocation): Delete. * config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise. * config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call. * config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix. * config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define. * config/tc-openrisc.c (openrisc_force_relocation): Delete. * config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sparc.c (elf32_sparc_force_relocation): Delete. * config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF. * config/tc-i386.c (i386_force_relocation): Delete. * config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for BFD_ASSEMBLER. (EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting. * config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define. * config/tc-pj.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
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#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEC) \
(! SEG_NORMAL (SEC) \
|| TC_FORCE_RELOCATION (FIX) \
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|| (sh_relax && SWITCH_TABLE (FIX)))
/* Don't complain when we leave fx_subsy around. */
#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
((md_register_arithmetic || (SEG) != reg_section) \
&& sh_relax && SWITCH_TABLE (FIX))
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#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
extern long md_pcrel_from_section (struct fix *, segT);
/* SH_COUNT relocs are allowed outside of frag.
The target is also buggy and sets fix size too large for other relocs. */
#define TC_FX_SIZE_SLACK(FIX) \
((FIX)->fx_r_type == BFD_RELOC_SH_COUNT ? -1 : 2)
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#define IGNORE_NONSTANDARD_ESCAPES
#define LISTING_HEADER \
(!target_big_endian \
? "Renesas / SuperH SH GAS Little Endian" \
: "Renesas / SuperH SH GAS Big Endian")
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#define md_operand(x)
extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table
/* We record, for each section, whether we have most recently output a
CODE reloc or a DATA reloc. */
struct sh_segment_info_type
{
int in_code : 1;
};
#define TC_SEGMENT_INFO_TYPE struct sh_segment_info_type
/* We call a routine to emit a reloc for a label, so that the linker
can align loads and stores without crossing a label. */
* dwarf2dbg.c (struct line_entry): Replace frag and frag_ofs with label. (dwarf2_loc_mark_labels): New. (dwarf2_gen_line_info_1): Split out of ... (dwarf2_gen_line_info): ... here. Create the temp symbol here. (dwarf2_emit_label): New. (dwarf2_directive_loc_mark_labels): New. (out_set_addr): Take a symbol instead of frag+ofs. (relax_inc_line_addr): Likewise. (emit_inc_line_addr): Assert delta non-negative. (process_entries): Remove dead code. Update to work with temp symbols instead of frag+ofs. * dwarf2dbg.h (dwarf2_directive_loc_mark_labels): Declare. (dwarf2_emit_label, dwarf2_loc_mark_labels): Declare. * config/obj-elf.c (elf_pseudo_tab): Add loc_mark_labels. * config/obj-elf.h (obj_frob_label): New. * config/tc-alpha.c (alpha_define_label): Call dwarf2_emit_label. * config/tc-arm.c, config/tc-hppa.c, config/tc-m68k.c, config/tc-mips.c, config/tc-ppc.c, config/tc-sh.c, config/tc-xtensa.c: Similarly in the respective tc_frob_label implementation functions. * config/tc-i386.c (md_pseudo_table): Move file and loc to non-elf section; add loc_mark_labels. * config/tc-ia64.c (struct label_fix): Add dw2_mark_labels. (ia64_flush_insns): Check for marked labels; emit line entry if so. (emit_one_bundle): Similarly. (ia64_frob_label): Record marked labels. * config/tc-m68hc11.h (tc_frob_label): Remove. * config/tc-ms1.c (md_pseudo_table): Remove file and loc. * config/tc-sh.h (tc_frob_label): Pass sym to sh_frob_label. * config/tc-sh64.h (tc_frob_label): Likewise. * doc/as.texinfo (LNS directives): Docuement .loc_mark_blocks.
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extern void sh_frob_label (symbolS *);
#define tc_frob_label(sym) sh_frob_label (sym)
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/* We call a routine to flush pending output in order to output a DATA
reloc when required. */
extern void sh_flush_pending_output (void);
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#define md_flush_pending_output() sh_flush_pending_output ()
#define tc_frob_file_before_adjust sh_frob_file
extern void sh_frob_file (void);
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#ifdef OBJ_COFF
/* COFF specific definitions. */
#define COFF_MAGIC (!target_big_endian ? SH_ARCH_MAGIC_LITTLE : SH_ARCH_MAGIC_BIG)
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#define tc_coff_symbol_emit_hook(a) ; /* not used */
#define TC_KEEP_FX_OFFSET 1
#define SEG_NAME(SEG) segment_name (SEG)
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/* We align most sections to a 16 byte boundary. */
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) \
(strncmp (SEG_NAME (SEG), ".stabstr", 8) == 0 \
? 0 \
: ((strncmp (SEG_NAME (SEG), ".stab", 5) == 0 \
|| strcmp (SEG_NAME (SEG), ".ctors") == 0 \
|| strcmp (SEG_NAME (SEG), ".dtors") == 0) \
? 2 \
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: (sh_small ? 2 : 4)))
#endif /* OBJ_COFF */
#ifdef OBJ_ELF
/* ELF specific definitions. */
/* Whether or not the target is big endian */
extern int target_big_endian;
#ifdef TE_LINUX
#define TARGET_FORMAT (!target_big_endian ? "elf32-sh-linux" : "elf32-shbig-linux")
#elif defined(TE_NetBSD)
#define TARGET_FORMAT (!target_big_endian ? "elf32-shl-nbsd" : "elf32-sh-nbsd")
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#elif defined TARGET_SYMBIAN
#define TARGET_FORMAT (!target_big_endian ? "elf32-shl-symbian" : "elf32-sh-symbian")
bfd/ 2006-08-02 Richard Sandiford <richard@codesourcery.com> Kazu Hirata <kazu@codesourcery.com> Phil Edwards <phil@codesourcery.com> Nathan Sidwell <nathan@codesourcery.com> * config.bfd (sh-*-vxworks): Use bfd_elf32_shvxworks_vec and bfd_elf32_shlvxworks_vec. * configure.in (bfd_elf32_sh64_vec): Add elf-vxworks.lo. (bfd_elf32_sh64l_vec, bfd_elf32_sh64lin_vec): Likewise. (bfd_elf32_sh64blin_vec, bfd_elf32_sh64lnbsd_vec): Likewise. (bfd_elf32_sh64nbsd_vec, bfd_elf32_sh_vec): Likewise. (bfd_elf32_shblin_vec, bfd_elf32_shl_vec): Likewise. (bfd_elf32_shl_symbian_vec, bfd_elf32_shlin_vec): Likewise. (bfd_elf32_shlnbsd_vec, bfd_elf32_shnbsd_vec): Likewise. (bfd_elf32_shlvxworks_vec, bfd_elf32_shvxworks_vec): New stanzas. * configure: Regenerate. * Makefile.am: Regenerate dependencies. * Makefile.in: Regenerate. * elf-vxworks.c (elf_vxworks_gott_symbol_p): New function. (elf_vxworks_add_symbol_hook): Use it. (elf_vxworks_link_output_symbol_hook): Likewise. Use the hash table entry to check for weak undefined symbols and to obtain the original bfd. (elf_vxworks_emit_relocs): Use target_index instead of this_idx. * elf32-sh-relocs.h: New file, split from elf32-sh.c. (R_SH_DIR32): Use SH_PARTIAL32 for the partial_inplace field, SH_SRC_MASK32 for the src_mask field, and SH_ELF_RELOC for the special_function field. (R_SH_REL32): Use SH_PARTIAL32 and SH_SRC_MASK32 here too. (R_SH_REL32, R_SH_TLS_GD_32, R_SH_TLS_LD_32): Likewise. (R_SH_TLS_LDO_32, R_SH_TLS_IE_32, R_SH_TLS_LE_32): Likewise. (R_SH_TLS_DTPMOD32, R_SH_TLS_DTPOFF32, R_SH_TLS_TPOFF32): Likewise. (R_SH_GOT32, R_SH_PLT32, R_SH_COPY, R_SH_GLOB_DAT): Likewise. (R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Likewise. (SH_PARTIAL32, SH_SRC_MASK32, SH_ELF_RELOC): Undefine at end of file. * elf32-sh.c: Include elf32-vxworks.h. (MINUS_ONE): Define. (sh_elf_howto_table): Include elf32-sh-relocs.h with SH_PARTIAL32 set to TRUE, SH_SRC_MASK32 set to 0xffffffff, and SH_ELF_RELOC set to sh_elf_reloc. (sh_vxworks_howto_table): New variable. Include elf32-sh-relocs.h with SH_PARTIAL32 set to FALSE, SH_SRC_MASK32 set to 0, and SH_ELF_RELOC set to bfd_elf_generic_reloc. (vxworks_object_p, get_howto_table): New functions. (sh_elf_reloc_type_lookup): Fix typo. Use get_howto_table. (sh_elf_info_to_howto): Use get_howto_table. (sh_elf_relax_section): Honor the partial_inplace field of the R_SH_DIR32 howto. (sh_elf_relax_delete_bytes): Likewise. (elf_sh_plt_info): New structure. (PLT_ENTRY_SIZE): Replace both definitions with... (ELF_PLT_ENTRY_SIZE): ...this new macro, with separate definitions for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA. (elf_sh_plt0_entry_be): Update sizes of both definitions accordingly. (elf_sh_plt0_entry_le): Likewise. (elf_sh_plt_entry_be, elf_sh_plt_entry_le): Likewise. (elf_sh_pic_plt_entry_be, elf_sh_pic_plt_entry_le): Likewise. (elf_sh_plts): New structure, with separate definitions for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA. (elf_sh_plt0_entry): Delete both definitions. (elf_sh_plt_entry, elf_sh_pic_plt_entry): Likewise. (elf_sh_sizeof_plt, elf_sh_plt_plt0_offset): Likewise. (elf_sh_plt_temp_offset, elf_sh_plt_symbol_offset): Likewise. (elf_sh_plt_reloc_offset): Likewise. (movi_shori_putval): Delete in favor of... (install_plt_field): ...this new function, with separate definitions for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA. (get_plt_info): New function, with separate definitions for INCLUDE_SHMEDIA and !INCLUDE_SHMEDIA. (elf_sh_plt0_linker_offset, elf_sh_plt0_gotid_offset): Delete. (VXWORKS_PLT_HEADER_SIZE, VXWORKS_PLT_ENTRY_SIZE): New macros. (vxworks_sh_plt0_entry_be, vxworks_sh_plt0_entry_le): New constants. (vxworks_sh_plt_entry_be, vxworks_sh_plt_entry_le): Likewise. (vxworks_sh_pic_plt_entry_be, vxworks_sh_pic_plt_entry_le): Likewise. (get_plt_index, get_plt_offset): New functions. (elf_sh_link_hash_table): Add srelplt2, plt_info and vxworks_p fields. (sh_elf_link_hash_table_create): Initialize them. (sh_elf_create_dynamic_sections): Call elf_vxworks_create_dynamic_sections for VxWorks. (allocate_dynrelocs): Use htab->plt_info to get the size of PLT entries. Allocate relocation entries in .rela.plt.unloaded if generating a VxWorks executable. (sh_elf_always_size_sections): New function. (sh_elf_size_dynamic_sections): Extend .rela.plt handling to .rela.plt.unloaded. (sh_elf_relocate_section): Use get_howto_table. Honor partial_inplace when calculating the addend for dynamic relocations. Use get_plt_index. (sh_elf_finish_dynamic_symbol): Use get_plt_index, install_plt_field and htab->plt_info. Fill in the bra .plt offset for VxWorks executables. Populate .rela.plt.unloaded. Do not make _GLOBAL_OFFSET_TABLE_ absolute on VxWorks. (sh_elf_finish_dynamic_sections): Use install_plt_field and htab->plt_info. Handle cases where there is no special PLT header. Populate the first relocation in .rela.plt.unloaded and fix up the remaining entries. (sh_elf_plt_sym_val): Use get_plt_info. (elf_backend_always_size_sections): Define. (TARGET_BIG_SYM, TARGET_BIG_NAME): Override for VxWorks. (TARGET_LITTLE_SYM, TARGET_BIG_SYM): Likewise. (elf32_bed, elf_backend_want_plt_sym): Likewise. (elf_symbol_leading_char, elf_backend_want_got_underscore): Likewise. (elf_backend_grok_prstatus, elf_backend_grok_psinfo): Likewise. (elf_backend_add_symbol_hook): Likewise. (elf_backend_link_output_symbol_hook): Likewise. (elf_backend_emit_relocs): Likewise. (elf_backend_final_write_processing): Likewise. (ELF_MAXPAGESIZE, ELF_COMMONPAGESIZE): Likewise. * targets.c (bfd_elf32_shlvxworks_vec): Declare. (bfd_elf32_shvxworks_vec): Likewise. (_bfd_target_vector): Include bfd_elf32_shlvxworks_vec and bfd_elf32_shvxworks_vec. gas/ * config/tc-sh.c (apply_full_field_fix): New function. (md_apply_fix): Use it instead of md_number_to_chars. Do not fill in fx_addnumber for BFD_RELOC_32_PLT_PCREL. (tc_gen_reloc): Use fx_addnumber rather than 0 as the default case. * config/tc-sh.h (TARGET_FORMAT): Override for TE_VXWORKS. ld/ 2006-08-02 Richard Sandiford <richard@codesourcery.com> Kazu Hirata <kazu@codesourcery.com> Phil Edwards <phil@codesourcery.com> * Makefile.am (ALL_EMULATIONS): Add eshelf_vxworks.o and eshlelf_vxworks.o. (eshelf_vxworks.c, eshlelf_vxworks.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh-*-vxworks): Use shelf_vxworks and shlelf_vxworks. * emulparams/shelf_vxworks.sh: New file. * emulparams/shlelf_vxworks.sh: Likewise. * emulparams/vxworks.sh (FINI): Prefix _etext with ${SYMPREFIX}. (OTHER_END_SYMBOLS): Likewise _ehdr. (DATA_END_SYMBOLS): Likewise _edata. * emultempl/vxworks.em (vxworks_after_open): Check whether output_bfd is indeed an ELF file before dealing with --force-dynamic. ld/testsuite/ * ld-sh/rd-sh.exp: Treat vxworks1-static.d specially. * ld-sh/sh-vxworks.exp: New file. * ld-sh/sh.exp: Extend sh-linux SIZEOF_HEADERS handling to sh-*-vxworks. * ld-sh/vxworks1-le.dd, ld-sh/vxworks1-lib-le.dd, * ld-sh/vxworks1-lib.dd, ld-sh/vxworks1-lib.nd, * ld-sh/vxworks1-lib.rd, ld-sh/vxworks1-lib.s, * ld-sh/vxworks1-static.d, ld-sh/vxworks1.dd, * ld-sh/vxworks1.ld, ld-sh/vxworks1.rd, ld-sh/vxworks1.s, * ld-sh/vxworks2-static.sd, ld-sh/vxworks2.s, * ld-sh/vxworks2.sd, ld-sh/vxworks3-le.dd, * ld-sh/vxworks3-lib-le.dd, ld-sh/vxworks3-lib.dd, * ld-sh/vxworks3-lib.s, ld-sh/vxworks3.dd, ld-sh/vxworks3.s, * ld-sh/vxworks4.d, ld-sh/vxworks4a.s, ld-sh/vxworks4b.s, * ld-sh/reloc1.s, ld-sh/reloc1.d: New tests.
2006-08-04 21:13:56 +08:00
#elif defined (TE_VXWORKS)
#define TARGET_FORMAT (!target_big_endian ? "elf32-shl-vxworks" : "elf32-sh-vxworks")
#else
#define TARGET_FORMAT (!target_big_endian ? "elf32-shl" : "elf32-sh")
#endif
1999-05-03 15:29:11 +08:00
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:36 +08:00
#define elf_tc_final_processing sh_elf_final_processing
extern void sh_elf_final_processing (void);
bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-02-17 08:33:36 +08:00
#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
/* This is the relocation type for direct references to
GLOBAL_OFFSET_TABLE. It comes up in complicated expressions such
as _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed
normally with the regular expressions. The fixup specified here
when used at runtime implies that we should add the address of the
GOT to the specified location, and as a result we have simplified
the expression into something we can use. */
#define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_SH_GOTPC
2002-09-05 08:01:18 +08:00
#define tc_fix_adjustable(FIX) sh_fix_adjustable(FIX)
extern bfd_boolean sh_fix_adjustable (struct fix *);
2002-09-05 08:01:18 +08:00
gas: * cgen.c, cgen.h, tc.h, write.c, config/obj-coff.c * config/tc-a29k.c, config/tc-alpha.c, config/tc-alpha.h * config/tc-arc.c, config/tc-arc.h, config/tc-arm.c * config/tc-arm.h, config/tc-avr.c, config/tc-avr.h * config/tc-cris.c, config/tc-crx.c, config/tc-d10v.c * config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h * config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.h * config/tc-frv.c, config/tc-frv.h, config/tc-h8300.c * config/tc-h8500.c, config/tc-hppa.c, config/tc-hppa.h * config/tc-i370.c, config/tc-i370.h, config/tc-i386.c * config/tc-i386.h, config/tc-i860.c, config/tc-i860.h * config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c * config/tc-ip2k.c, config/tc-ip2k.h, config/tc-iq2000.c * config/tc-iq2000.h, config/tc-m32r.c, config/tc-m32r.h * config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c * config/tc-m68k.h, config/tc-m88k.c, config/tc-maxq.c * config/tc-mcore.c, config/tc-mcore.h, config/tc-mips.c * config/tc-mips.h, config/tc-mmix.c, config/tc-mn10200.c * config/tc-mn10300.c, config/tc-msp430.c, config/tc-ns32k.c * config/tc-openrisc.h, config/tc-or32.c, config/tc-or32.h * config/tc-pdp11.c, config/tc-pj.c, config/tc-pj.h * config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c * config/tc-s390.h, config/tc-sh64.c, config/tc-sh.c * config/tc-sh.h, config/tc-sparc.c, config/tc-sparc.h * config/tc-tahoe.c, config/tc-tic30.c, config/tc-tic4x.c * config/tc-tic54x.c, config/tc-tic80.c, config/tc-v850.c * config/tc-v850.h, config/tc-vax.c, config/tc-vax.h * config/tc-w65.c, config/tc-xstormy16.c, config/tc-xstormy16.h * config/tc-xtensa.c, config/tc-z8k.c: Replace all instances of the string "_apply_fix3" with "_apply_fix". * po/POTFILES.in, po/gas.pot: Regenerate. bfd: * coff-i386.c: Change md_apply_fix3 to md_apply_fix in comment. cgen: * doc/porting.texi: Change all mention of md_apply_fix3 and gas_cgen_md_apply_fix3 to md_apply_fix and gas_cgen_md_apply_fix respectively.
2005-06-08 01:54:22 +08:00
/* Values passed to md_apply_fix don't include symbol values. */
2002-09-05 08:01:18 +08:00
#define MD_APPLY_SYM_VALUE(FIX) 0
/* This expression evaluates to true if the relocation is for a local object
for which we still want to do the relocation at runtime. False if we
are willing to perform this relocation while building the .o file.
We can't resolve references to the GOT or the PLT when creating the
object file, since these tables are only created by the linker.
Also, if the symbol is global, weak, common or not defined, the
assembler can't compute the appropriate reloc, since its location
can only be determined at link time. */
2002-09-05 08:01:18 +08:00
#define TC_FORCE_RELOCATION_LOCAL(FIX) \
(!(FIX)->fx_pcrel \
|| (FIX)->fx_r_type == BFD_RELOC_32_PLT_PCREL \
|| (FIX)->fx_r_type == BFD_RELOC_32_GOT_PCREL \
|| (FIX)->fx_r_type == BFD_RELOC_SH_GOTPC \
|| TC_FORCE_RELOCATION (FIX))
#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) \
((!md_register_arithmetic && (SEG) == reg_section) \
|| (sh_relax && SWITCH_TABLE (FIX)))
Fix sh-elf linker relaxation: gcc: * config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and subtarget_asm_isa_spec. (SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define. (ASM_SPEC): Define as SH_ASM_SPEC. (SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h. Use subtarget_asm_relax_spec and subtarget_asm_isa_spec. * config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC. (SUBTARGET_ASM_ISA_SPEC): Undef / define. gcc/testsuite: gcc.dg/sh-relax.c: New test. include/elf: * sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E, and SH2E & SH4 merge to SH4, not SH2E. gas: * config/tc-sh.c (sh_dsp): Replace with preset_target_arch. (md_begin): Use preset_target_arch. (md_longopts): Make isa option unconditional. (md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any set preset_target_arch. (md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups by -S_GET_VALUE (fixP->fx_subsy). (tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy, and the addend is 0. Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define. bfd: elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary relocation (no special function), and make it non-partial_inplace. (sh_elf_relax_section): When creating a bsr, use a consistent value no matter if the symbol is extern or not; set addend to -4. Don't swap load / non-load instructions for SH4. (sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset rather than if the symbol is external to determine if adjusting the offset makes sense. Adjust the addend too if appropriate. (sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the relocation.
2003-03-04 05:04:01 +08:00
2002-09-05 08:01:18 +08:00
/* This keeps the subtracted symbol around, for use by PLT_PCREL
relocs. */
#define TC_FORCE_RELOCATION_SUB_ABS(FIX, SEG) \
((FIX)->fx_r_type == BFD_RELOC_32_PLT_PCREL \
|| (!md_register_arithmetic && (SEG) == reg_section))
2002-09-05 08:01:18 +08:00
/* Don't complain when we leave fx_subsy around. */
#undef TC_VALIDATE_FIX_SUB
#define TC_VALIDATE_FIX_SUB(FIX, SEG) \
((md_register_arithmetic || (SEG) != reg_section) \
&& ((FIX)->fx_r_type == BFD_RELOC_32_PLT_PCREL \
|| (sh_relax && SWITCH_TABLE (FIX))))
#define md_parse_name(name, exprP, mode, nextcharP) \
sh_parse_name ((name), (exprP), (mode), (nextcharP))
int sh_parse_name (char const *name, expressionS *exprP,
enum expr_mode mode, char *nextchar);
#define TC_CONS_FIX_NEW(FRAG, OFF, LEN, EXP) \
sh_cons_fix_new ((FRAG), (OFF), (LEN), (EXP))
void sh_cons_fix_new (fragS *, int, int, expressionS *);
/* This is used to construct expressions out of @GOTOFF, @PLT and @GOT
symbols. The relocation type is stored in X_md. */
#define O_PIC_reloc O_md1
#define TARGET_USE_CFIPOP 1
#define tc_cfi_frame_initial_instructions sh_cfi_frame_initial_instructions
extern void sh_cfi_frame_initial_instructions (void);
#define tc_regname_to_dw2regnum sh_regname_to_dw2regnum
extern int sh_regname_to_dw2regnum (char *regname);
/* All SH instructions are multiples of 16 bits. */
#define DWARF2_LINE_MIN_INSN_LENGTH 2
#define DWARF2_DEFAULT_RETURN_COLUMN 17
#define DWARF2_CIE_DATA_ALIGNMENT (-4)
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#endif /* OBJ_ELF */
#define H_TICK_HEX 1