mirror of
https://sourceware.org/git/binutils-gdb.git
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212 lines
4.4 KiB
ArmAsm
212 lines
4.4 KiB
ArmAsm
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//Original:/testcases/core/c_dsp32mult_dr_m/c_dsp32mult_dr_m.dsp
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// Spec Reference: dsp32mult single dr (mix) MUNOP
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# mach: bfin
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.include "testutils.inc"
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start
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imm32 r0, 0x34235625;
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imm32 r1, 0x9f7a5127;
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imm32 r2, 0xa3286725;
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imm32 r3, 0x00069027;
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imm32 r4, 0xb0abc029;
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imm32 r5, 0x10acef2b;
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imm32 r6, 0xc00c00de;
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imm32 r7, 0xd246712f;
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R4.L = R0.L * R0.L;
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R5.L = R0.L * R1.H;
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R6.L = R1.H * R0.L;
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R7.L = R1.H * R1.H;
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R0.L = R0.L * R0.L;
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R1.L = R0.L * R1.H;
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R2.L = R1.H * R0.L;
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R3.L = R1.H * R1.H;
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CHECKREG r0, 0x342339FA;
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CHECKREG r1, 0x9F7AD448;
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CHECKREG r2, 0xA328D448;
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CHECKREG r3, 0x000648CA;
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CHECKREG r4, 0xB0AB39FA;
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CHECKREG r5, 0x10ACBF0A;
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CHECKREG r6, 0xC00CBF0A;
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CHECKREG r7, 0xD24648CA;
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imm32 r0, 0x5b23a635;
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imm32 r1, 0x6fba5137;
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imm32 r2, 0x1324b735;
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imm32 r3, 0x90060037;
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imm32 r4, 0x80abcd39;
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imm32 r5, 0xb0acef3b;
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imm32 r6, 0xa00c003d;
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imm32 r7, 0x12467003;
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R4.L = R2.H * R2.L;
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R5.L = R2.H * R3.H;
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R6.L = R3.L * R2.L;
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R7.L = R3.L * R3.H;
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R0.L = R2.H * R2.L;
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R1.L = R2.H * R3.H;
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R2.L = R3.L * R2.L;
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R3.L = R3.L * R3.H;
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CHECKREG r0, 0x5B23F51D;
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CHECKREG r1, 0x6FBAEF41;
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CHECKREG r2, 0x1324FFE1;
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CHECKREG r3, 0x9006FFD0;
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CHECKREG r4, 0x80ABF51D;
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CHECKREG r5, 0xB0ACEF41;
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CHECKREG r6, 0xA00CFFE1;
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CHECKREG r7, 0x1246FFD0;
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imm32 r0, 0x1b235655;
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imm32 r1, 0xc4ba5157;
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imm32 r2, 0x43246755;
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imm32 r3, 0x05060055;
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imm32 r4, 0x906bc509;
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imm32 r5, 0x10a7ef5b;
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imm32 r6, 0xb00c805d;
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imm32 r7, 0x1246795f;
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R0.L = R4.L * R4.L;
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R1.L = R4.L * R5.H;
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R2.L = R5.H * R4.L;
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R3.L = R5.H * R5.H;
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R4.L = R4.L * R4.L;
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R5.L = R4.L * R5.H;
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R6.L = R5.H * R4.L;
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R7.L = R5.H * R5.H;
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CHECKREG r0, 0x1B231B2A;
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CHECKREG r1, 0xC4BAF854;
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CHECKREG r2, 0x4324F854;
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CHECKREG r3, 0x0506022B;
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CHECKREG r4, 0x906B1B2A;
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CHECKREG r5, 0x10A70389;
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CHECKREG r6, 0xB00C0389;
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CHECKREG r7, 0x1246022B;
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imm32 r0, 0xbb235666;
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imm32 r1, 0xefba5166;
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imm32 r2, 0x13248766;
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imm32 r3, 0xf0060066;
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imm32 r4, 0x90ab9d69;
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imm32 r5, 0x10acef6b;
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imm32 r6, 0x800cb06d;
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imm32 r7, 0x1246706f;
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// test the unsigned U=1
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R0.L = R6.L * R6.L;
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R1.L = R6.L * R7.H;
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R2.L = R7.H * R6.L;
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R3.L = R7.H * R7.H;
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R4.L = R6.L * R6.L;
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R5.L = R6.L * R7.H;
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R6.L = R7.H * R6.L;
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R7.L = R7.H * R7.H;
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CHECKREG r0, 0xBB233178;
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CHECKREG r1, 0xEFBAF4A4;
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CHECKREG r2, 0x1324F4A4;
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CHECKREG r3, 0xF006029C;
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CHECKREG r4, 0x90AB3178;
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CHECKREG r5, 0x10ACF4A4;
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CHECKREG r6, 0x800CF4A4;
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CHECKREG r7, 0x1246029C;
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// mix order
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imm32 r0, 0xab23a675;
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imm32 r1, 0xcfba5127;
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imm32 r2, 0x13246705;
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imm32 r3, 0x00060007;
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imm32 r4, 0x90abcd09;
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imm32 r5, 0x10acdfdb;
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imm32 r6, 0x000c000d;
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imm32 r7, 0x1246f00f;
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R0.L = R0.H * R7.L;
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R1.L = R1.H * R6.H;
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R2.L = R2.L * R5.L;
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R3.L = R3.H * R4.H;
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R4.L = R4.L * R3.H;
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R5.L = R5.H * R2.L;
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R6.L = R6.L * R1.L;
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R7.L = R7.H * R0.L;
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CHECKREG r0, 0xAB230A92;
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CHECKREG r1, 0xCFBAFFFB;
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CHECKREG r2, 0x1324E621;
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CHECKREG r3, 0x0006FFFB;
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CHECKREG r4, 0x90ABFFFE;
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CHECKREG r5, 0x10ACFCA1;
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CHECKREG r6, 0x000C0000;
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CHECKREG r7, 0x12460182;
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imm32 r0, 0xab235a75;
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imm32 r1, 0xcfba5127;
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imm32 r2, 0x13246905;
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imm32 r3, 0x00060007;
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imm32 r4, 0x90abcd09;
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imm32 r5, 0x10ace9db;
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imm32 r6, 0x000c0d0d;
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imm32 r7, 0x1246700f;
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R0.H = R7.H * R0.H;
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R1.H = R6.H * R1.H;
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R2.H = R5.H * R2.L;
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R3.H = R4.H * R3.H;
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R4.H = R3.L * R4.H;
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R5.H = R2.H * R5.L;
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R6.H = R1.H * R6.H;
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R7.H = R0.L * R7.H;
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CHECKREG r0, 0xF3E35A75;
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CHECKREG r1, 0xFFFB5127;
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CHECKREG r2, 0x0DAE6905;
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CHECKREG r3, 0xFFFB0007;
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CHECKREG r4, 0xFFFACD09;
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CHECKREG r5, 0xFDA2E9DB;
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CHECKREG r6, 0x00000D0D;
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CHECKREG r7, 0x0CEA700F;
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imm32 r0, 0x9b235675;
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imm32 r1, 0xc9ba5127;
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imm32 r2, 0x13946705;
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imm32 r3, 0x00090007;
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imm32 r4, 0x90ab9d09;
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imm32 r5, 0x10ace9db;
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imm32 r6, 0x000c009d;
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imm32 r7, 0x12467009;
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R2.H = R0.L * R6.L;
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R3.H = R1.H * R7.L;
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R0.H = R2.L * R0.L;
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R1.H = R3.L * R1.H;
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R4.H = R4.H * R2.H;
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R5.H = R5.L * R3.H;
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R6.H = R6.H * R4.L;
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R7.H = R7.L * R5.H;
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CHECKREG r0, 0x45965675;
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CHECKREG r1, 0xFFFD5127;
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CHECKREG r2, 0x006A6705;
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CHECKREG r3, 0xD07F0007;
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CHECKREG r4, 0xFFA49D09;
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CHECKREG r5, 0x0838E9DB;
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CHECKREG r6, 0xFFF7009D;
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CHECKREG r7, 0x07327009;
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imm32 r0, 0xeb235675;
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imm32 r1, 0xceba5127;
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imm32 r2, 0x13e46705;
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imm32 r3, 0x000e0007;
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imm32 r4, 0x90abed09;
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imm32 r5, 0x10aceedb;
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imm32 r6, 0x000c00ed;
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imm32 r7, 0x1246700e;
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R4.H = R5.L * R2.L;
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R6.H = R6.H * R3.H;
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R0.H = R7.H * R4.L;
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R1.H = R0.H * R5.L;
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R2.H = R1.H * R6.H;
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R5.H = R2.H * R7.L;
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R3.H = R3.H * R0.L;
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R7.H = R4.L * R1.H;
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CHECKREG r0, 0xFD4B5675;
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CHECKREG r1, 0x005D5127;
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CHECKREG r2, 0x00006705;
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CHECKREG r3, 0x00090007;
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CHECKREG r4, 0xF234ED09;
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CHECKREG r5, 0x0000EEDB;
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CHECKREG r6, 0x000000ED;
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CHECKREG r7, 0xFFF2700E;
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pass
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