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binutils-gdb/ld/testsuite/ld-powerpc/tlsldopt32.d

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[PowerPC] Rename testcase Just making room for a new tlsld test. * testsuite/ld-powerpc/tlsldopt.d: Rename from tlsld.d. * testsuite/ld-powerpc/tlsldopt.s: Rename from tlsld.s. * testsuite/ld-powerpc/tlsldopt32.d: Rename from tlsld32.d. * testsuite/ld-powerpc/tlsldopt32.s: Rename from tlsld32.s. * testsuite/ld-powerpc/powerpc.exp: Update.
2019-07-19 13:00:36 +08:00
#source: tlsldopt32.s
Correct PowerPC64 local-dynamic TLS linker optimization The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-29 08:39:55 +08:00
#as: -a32
#ld: -melf32ppc
#objdump: -dr
#target: powerpc*-*-*
.*: file format .*
Disassembly of section \.text:
.*:
.* nop
PowerPC TPREL_HA/LO optimisation ppc64 ld optimises sequences like the following addis 3,13,wot@tprel@ha lwz 3,wot@tprel@l(3) to nop lwz 3,wot@tprel(13) when "wot" is located near enough to the thread pointer. However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on an addis rt,13,imm instruction, and while ld checked for that on the high-part instruction it didn't disable the optimisation on the low-part instruction. This patch fixes that problem, disabling the tprel optimisation globally if high-part instructions don't pass sanity checks. The optimisation is also enabled for ppc32, where before ld.bfd had the code in the wrong place and ld.gold had it in a block only enabled for ppc64. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later. Don't sanity check them here. * elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc64_elf_relocate_section): Don't sanity check TPREL16_HA. ld/ * testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation. * testsuite/ld-powerpc/tlsexe32.d: Likewise. * testsuite/ld-powerpc/tlsldopt32.d: Likewise. * testsuite/ld-powerpc/tlsmark32.d: Likewise. * testsuite/ld-powerpc/tlsopt4_32.d: Likewise. * testsuite/ld-powerpc/tprel.s, * testsuite/ld-powerpc/tprel.d, * testsuite/ld-powerpc/tprel32.d: New tests. * testsuite/ld-powerpc/tprelbad.s, * testsuite/ld-powerpc/tprelbad.d: New test. * testsuite/ld-powerpc/powerpc.exp: Run them. gold/ * powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors. (Target_powerpc::Scan::local): Sanity check tprel high relocs. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Control tprel optimisation with tprel_opt_ and enable for 32-bit.
2020-08-24 15:02:57 +08:00
.* nop
Correct PowerPC64 local-dynamic TLS linker optimization The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-29 08:39:55 +08:00
.* mr r3,r29
PowerPC TPREL_HA/LO optimisation ppc64 ld optimises sequences like the following addis 3,13,wot@tprel@ha lwz 3,wot@tprel@l(3) to nop lwz 3,wot@tprel(13) when "wot" is located near enough to the thread pointer. However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on an addis rt,13,imm instruction, and while ld checked for that on the high-part instruction it didn't disable the optimisation on the low-part instruction. This patch fixes that problem, disabling the tprel optimisation globally if high-part instructions don't pass sanity checks. The optimisation is also enabled for ppc32, where before ld.bfd had the code in the wrong place and ld.gold had it in a block only enabled for ppc64. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later. Don't sanity check them here. * elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc64_elf_relocate_section): Don't sanity check TPREL16_HA. ld/ * testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation. * testsuite/ld-powerpc/tlsexe32.d: Likewise. * testsuite/ld-powerpc/tlsldopt32.d: Likewise. * testsuite/ld-powerpc/tlsmark32.d: Likewise. * testsuite/ld-powerpc/tlsopt4_32.d: Likewise. * testsuite/ld-powerpc/tprel.s, * testsuite/ld-powerpc/tprel.d, * testsuite/ld-powerpc/tprel32.d: New tests. * testsuite/ld-powerpc/tprelbad.s, * testsuite/ld-powerpc/tprelbad.d: New test. * testsuite/ld-powerpc/powerpc.exp: Run them. gold/ * powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors. (Target_powerpc::Scan::local): Sanity check tprel high relocs. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Control tprel optimisation with tprel_opt_ and enable for 32-bit.
2020-08-24 15:02:57 +08:00
.* addi r3,r2,4096
Correct PowerPC64 local-dynamic TLS linker optimization The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-29 08:39:55 +08:00
.* addis r3,r3,0
.* lwz r3,-32768\(r3\)
.* nop
.* nop
PowerPC TPREL_HA/LO optimisation ppc64 ld optimises sequences like the following addis 3,13,wot@tprel@ha lwz 3,wot@tprel@l(3) to nop lwz 3,wot@tprel(13) when "wot" is located near enough to the thread pointer. However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on an addis rt,13,imm instruction, and while ld checked for that on the high-part instruction it didn't disable the optimisation on the low-part instruction. This patch fixes that problem, disabling the tprel optimisation globally if high-part instructions don't pass sanity checks. The optimisation is also enabled for ppc32, where before ld.bfd had the code in the wrong place and ld.gold had it in a block only enabled for ppc64. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later. Don't sanity check them here. * elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc64_elf_relocate_section): Don't sanity check TPREL16_HA. ld/ * testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation. * testsuite/ld-powerpc/tlsexe32.d: Likewise. * testsuite/ld-powerpc/tlsldopt32.d: Likewise. * testsuite/ld-powerpc/tlsmark32.d: Likewise. * testsuite/ld-powerpc/tlsopt4_32.d: Likewise. * testsuite/ld-powerpc/tprel.s, * testsuite/ld-powerpc/tprel.d, * testsuite/ld-powerpc/tprel32.d: New tests. * testsuite/ld-powerpc/tprelbad.s, * testsuite/ld-powerpc/tprelbad.d: New test. * testsuite/ld-powerpc/powerpc.exp: Run them. gold/ * powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors. (Target_powerpc::Scan::local): Sanity check tprel high relocs. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Control tprel optimisation with tprel_opt_ and enable for 32-bit.
2020-08-24 15:02:57 +08:00
.* nop
Correct PowerPC64 local-dynamic TLS linker optimization The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-29 08:39:55 +08:00
.* mr r3,r29
PowerPC TPREL_HA/LO optimisation ppc64 ld optimises sequences like the following addis 3,13,wot@tprel@ha lwz 3,wot@tprel@l(3) to nop lwz 3,wot@tprel(13) when "wot" is located near enough to the thread pointer. However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on an addis rt,13,imm instruction, and while ld checked for that on the high-part instruction it didn't disable the optimisation on the low-part instruction. This patch fixes that problem, disabling the tprel optimisation globally if high-part instructions don't pass sanity checks. The optimisation is also enabled for ppc32, where before ld.bfd had the code in the wrong place and ld.gold had it in a block only enabled for ppc64. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later. Don't sanity check them here. * elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc64_elf_relocate_section): Don't sanity check TPREL16_HA. ld/ * testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation. * testsuite/ld-powerpc/tlsexe32.d: Likewise. * testsuite/ld-powerpc/tlsldopt32.d: Likewise. * testsuite/ld-powerpc/tlsmark32.d: Likewise. * testsuite/ld-powerpc/tlsopt4_32.d: Likewise. * testsuite/ld-powerpc/tprel.s, * testsuite/ld-powerpc/tprel.d, * testsuite/ld-powerpc/tprel32.d: New tests. * testsuite/ld-powerpc/tprelbad.s, * testsuite/ld-powerpc/tprelbad.d: New test. * testsuite/ld-powerpc/powerpc.exp: Run them. gold/ * powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors. (Target_powerpc::Scan::local): Sanity check tprel high relocs. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Control tprel optimisation with tprel_opt_ and enable for 32-bit.
2020-08-24 15:02:57 +08:00
.* addi r3,r2,4096
Correct PowerPC64 local-dynamic TLS linker optimization The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-29 08:39:55 +08:00
.* lwz r3,-32768\(r3\)
.* nop
.* nop
.* nop
.* nop
.* nop
PowerPC TPREL_HA/LO optimisation ppc64 ld optimises sequences like the following addis 3,13,wot@tprel@ha lwz 3,wot@tprel@l(3) to nop lwz 3,wot@tprel(13) when "wot" is located near enough to the thread pointer. However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on an addis rt,13,imm instruction, and while ld checked for that on the high-part instruction it didn't disable the optimisation on the low-part instruction. This patch fixes that problem, disabling the tprel optimisation globally if high-part instructions don't pass sanity checks. The optimisation is also enabled for ppc32, where before ld.bfd had the code in the wrong place and ld.gold had it in a block only enabled for ppc64. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later. Don't sanity check them here. * elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc64_elf_relocate_section): Don't sanity check TPREL16_HA. ld/ * testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation. * testsuite/ld-powerpc/tlsexe32.d: Likewise. * testsuite/ld-powerpc/tlsldopt32.d: Likewise. * testsuite/ld-powerpc/tlsmark32.d: Likewise. * testsuite/ld-powerpc/tlsopt4_32.d: Likewise. * testsuite/ld-powerpc/tprel.s, * testsuite/ld-powerpc/tprel.d, * testsuite/ld-powerpc/tprel32.d: New tests. * testsuite/ld-powerpc/tprelbad.s, * testsuite/ld-powerpc/tprelbad.d: New test. * testsuite/ld-powerpc/powerpc.exp: Run them. gold/ * powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors. (Target_powerpc::Scan::local): Sanity check tprel high relocs. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Control tprel optimisation with tprel_opt_ and enable for 32-bit.
2020-08-24 15:02:57 +08:00
.* nop
Correct PowerPC64 local-dynamic TLS linker optimization The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-29 08:39:55 +08:00
.* mr r3,r29
PowerPC TPREL_HA/LO optimisation ppc64 ld optimises sequences like the following addis 3,13,wot@tprel@ha lwz 3,wot@tprel@l(3) to nop lwz 3,wot@tprel(13) when "wot" is located near enough to the thread pointer. However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on an addis rt,13,imm instruction, and while ld checked for that on the high-part instruction it didn't disable the optimisation on the low-part instruction. This patch fixes that problem, disabling the tprel optimisation globally if high-part instructions don't pass sanity checks. The optimisation is also enabled for ppc32, where before ld.bfd had the code in the wrong place and ld.gold had it in a block only enabled for ppc64. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later. Don't sanity check them here. * elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc64_elf_relocate_section): Don't sanity check TPREL16_HA. ld/ * testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation. * testsuite/ld-powerpc/tlsexe32.d: Likewise. * testsuite/ld-powerpc/tlsldopt32.d: Likewise. * testsuite/ld-powerpc/tlsmark32.d: Likewise. * testsuite/ld-powerpc/tlsopt4_32.d: Likewise. * testsuite/ld-powerpc/tprel.s, * testsuite/ld-powerpc/tprel.d, * testsuite/ld-powerpc/tprel32.d: New tests. * testsuite/ld-powerpc/tprelbad.s, * testsuite/ld-powerpc/tprelbad.d: New test. * testsuite/ld-powerpc/powerpc.exp: Run them. gold/ * powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors. (Target_powerpc::Scan::local): Sanity check tprel high relocs. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Control tprel optimisation with tprel_opt_ and enable for 32-bit.
2020-08-24 15:02:57 +08:00
.* addi r3,r2,-28672
Correct PowerPC64 local-dynamic TLS linker optimization The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-29 08:39:55 +08:00
.* lwz r3,0\(r3\)
.* nop
.* nop
.* nop
PowerPC TPREL_HA/LO optimisation ppc64 ld optimises sequences like the following addis 3,13,wot@tprel@ha lwz 3,wot@tprel@l(3) to nop lwz 3,wot@tprel(13) when "wot" is located near enough to the thread pointer. However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on an addis rt,13,imm instruction, and while ld checked for that on the high-part instruction it didn't disable the optimisation on the low-part instruction. This patch fixes that problem, disabling the tprel optimisation globally if high-part instructions don't pass sanity checks. The optimisation is also enabled for ppc32, where before ld.bfd had the code in the wrong place and ld.gold had it in a block only enabled for ppc64. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later. Don't sanity check them here. * elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc64_elf_relocate_section): Don't sanity check TPREL16_HA. ld/ * testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation. * testsuite/ld-powerpc/tlsexe32.d: Likewise. * testsuite/ld-powerpc/tlsldopt32.d: Likewise. * testsuite/ld-powerpc/tlsmark32.d: Likewise. * testsuite/ld-powerpc/tlsopt4_32.d: Likewise. * testsuite/ld-powerpc/tprel.s, * testsuite/ld-powerpc/tprel.d, * testsuite/ld-powerpc/tprel32.d: New tests. * testsuite/ld-powerpc/tprelbad.s, * testsuite/ld-powerpc/tprelbad.d: New test. * testsuite/ld-powerpc/powerpc.exp: Run them. gold/ * powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors. (Target_powerpc::Scan::local): Sanity check tprel high relocs. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Control tprel optimisation with tprel_opt_ and enable for 32-bit.
2020-08-24 15:02:57 +08:00
.* nop
Correct PowerPC64 local-dynamic TLS linker optimization The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-29 08:39:55 +08:00
.* mr r3,r29
PowerPC TPREL_HA/LO optimisation ppc64 ld optimises sequences like the following addis 3,13,wot@tprel@ha lwz 3,wot@tprel@l(3) to nop lwz 3,wot@tprel(13) when "wot" is located near enough to the thread pointer. However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on an addis rt,13,imm instruction, and while ld checked for that on the high-part instruction it didn't disable the optimisation on the low-part instruction. This patch fixes that problem, disabling the tprel optimisation globally if high-part instructions don't pass sanity checks. The optimisation is also enabled for ppc32, where before ld.bfd had the code in the wrong place and ld.gold had it in a block only enabled for ppc64. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later. Don't sanity check them here. * elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc64_elf_relocate_section): Don't sanity check TPREL16_HA. ld/ * testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation. * testsuite/ld-powerpc/tlsexe32.d: Likewise. * testsuite/ld-powerpc/tlsldopt32.d: Likewise. * testsuite/ld-powerpc/tlsmark32.d: Likewise. * testsuite/ld-powerpc/tlsopt4_32.d: Likewise. * testsuite/ld-powerpc/tprel.s, * testsuite/ld-powerpc/tprel.d, * testsuite/ld-powerpc/tprel32.d: New tests. * testsuite/ld-powerpc/tprelbad.s, * testsuite/ld-powerpc/tprelbad.d: New test. * testsuite/ld-powerpc/powerpc.exp: Run them. gold/ * powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors. (Target_powerpc::Scan::local): Sanity check tprel high relocs. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Control tprel optimisation with tprel_opt_ and enable for 32-bit.
2020-08-24 15:02:57 +08:00
.* addi r3,r2,-28672
Correct PowerPC64 local-dynamic TLS linker optimization The linker hardcoded r3 into a local-dynamic to local-exec TLS optimization sequence. This is normally the case since r3 is required as a parameter to (the optimized out) __tls_get_addr call. However, it is possible for a compiler, LLVM in this case, to set up the parameter value in another register then copy it to r3 before the call. When fixing this problem, I noticed that ppc32 had another bug when optimizing away one of the TLS insns to a nop. The patch also tidies a mask used by global-dynamic to initial-exec TLS optimization, to just select the fields needed. Leaving the offset in the instruction wasn't a bug since it will be overwritten anyway. bfd/ * elf64-ppc.c (ppc64_elf_relocate_section): Correct GOT_TLSLD optimization. Tidy mask for GOT_TLSGD optimization. * elf32-ppc.c (ppc_elf_relocate_section): Likewise. Correct location of nop zapping high insn too. ld/testsuite/ * ld-powerpc/tlsld.d, * ld-powerpc/tlsld.s: New test. * ld-powerpc/tlsld32.d, * ld-powerpc/tlsld32.s: New test. * ld-powerpc/powerpc.exp: Run them. Move tocvar and tocnovar.
2015-01-29 08:39:55 +08:00
.* lwz r3,0\(r3\)
.* nop
.* nop
.* nop
.* nop
#pass
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