2013-10-29 14:10:34 +08:00
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#source: elfv2.s
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#as: -a64
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2018-02-05 10:47:52 +08:00
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#ld: -melf64ppc -shared
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2013-10-29 14:10:34 +08:00
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#objdump: -dr
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.*
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Disassembly of section \.text:
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2017-08-06 20:34:25 +08:00
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.* <.*\.plt_call\.f4>:
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2015-04-21 17:48:24 +08:00
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.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
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2019-06-23 10:58:39 +08:00
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.*: (e9 82 80 40|40 80 82 e9) ld r12,-32704\(r2\)
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2015-04-21 17:48:24 +08:00
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (4e 80 04 20|20 04 80 4e) bctr
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2017-09-09 20:25:22 +08:00
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\.\.\.
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2013-10-29 14:10:34 +08:00
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2018-04-09 07:52:53 +08:00
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.* <.*\.plt_call\.f3>:
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2015-04-21 17:48:24 +08:00
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.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
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2019-06-23 10:58:39 +08:00
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.*: (e9 82 80 30|30 80 82 e9) ld r12,-32720\(r2\)
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2018-07-26 10:41:11 +08:00
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (4e 80 04 20|20 04 80 4e) bctr
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\.\.\.
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.* <.*\.plt_call\.f5>:
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.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
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2019-06-23 10:58:39 +08:00
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.*: (e9 82 80 28|28 80 82 e9) ld r12,-32728\(r2\)
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2015-04-21 17:48:24 +08:00
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (4e 80 04 20|20 04 80 4e) bctr
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2017-09-09 20:25:22 +08:00
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\.\.\.
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2013-10-29 14:10:34 +08:00
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2018-04-09 07:52:53 +08:00
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.* <.*\.plt_call\.f1>:
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2015-04-21 17:48:24 +08:00
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.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
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2019-06-23 10:58:39 +08:00
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.*: (e9 82 80 48|48 80 82 e9) ld r12,-32696\(r2\)
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2015-04-21 17:48:24 +08:00
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (4e 80 04 20|20 04 80 4e) bctr
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2017-09-09 20:25:22 +08:00
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\.\.\.
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2013-10-29 14:10:34 +08:00
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PowerPC PLT stub tidy
This is in preparation for the next patch adding Spectre variant 2
mitigation for PowerPC and PowerPC64. Besides tidying code involved
in stub output (to reduce the number of places where bctr is output),
the patch adds some user visible features:
1) PowerPC64 ELFv2 global entry stubs now are aligned under the
control of --plt-align, with a default alignment of 32 bytes.
2) PowerPC64 __glink_PLTresolve is no longer padded out with nops.
3) PowerPC32 PLT stubs are aligned under the control of --plt-align,
with the default alignment being 16 bytes as before.
4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve
is now smaller in many cases. It was sized incorrectly when the
__tls_get_addr_opt stub was used, and unnecessarily included space
for local ifuncs.
bfd/
* elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle
__tls_get_addr_opt, and alignment sizing.
(TLS_GET_ADDR_GLINK_SIZE): Delete.
(is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE.
(ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6,
or 8 insns.
(ppc_elf_link_hash_table_create): Init new ppc_elf_params field.
(allocate_dynrelocs): Use new GLINK_ENTRY_SIZE.
(ppc_elf_size_dynamic_sections): Likewise. Size branch table
by PLT reloc count.
(write_glink_stub): Handle __tls_get_addr_opt stub.
Pad out to size given by GLINK_ENTRY_SIZE.
(ppc_elf_relocate_section): Adjust write_glink_stub call.
(ppc_elf_finish_dynamic_symbol): Likewise.
(ppc_elf_finish_dynamic_sections): Write PLTresolve without using
insn array since so many need rewriting.
* elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align.
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from
GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without
nops. Adjust all uses.
(ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE
in glink_vma calculation.
(struct ppc_link_hash_table): Add global_entry section pointer.
(create_linkage_sections): Create separate section for global
entry stubs.
(PPC_LO, PPC_HI, PPC_HA): Move earlier.
(size_global_entry_stubs): Handle sizing for aligned stubs.
(ppc64_elf_size_dynamic_sections): Handle global_entry alloc,
and don't stash end of glink branch table in rawsize.
(ppc_build_one_stub): Rewrite stub size calculations.
(build_global_entry_stubs): Use new section.
(ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops.
Build lazy link stubs out to end of section. Build global entry
stubs in new section.
gold/
* options.h (plt_align): Support for PowerPC32 too.
* powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit.
(Stub_table::plt_call_size, branch_stub_size): Tidy.
(Stub_table::plt_call_align): Implement using stub_align.
(Output_data_glink::global_entry_align): New function.
(Output_data_glink::global_entry_off): New function.
(Output_data_glink::global_entry_address): Use global_entry_off.
(Output_data_glink::pltresolve_size): New function, replacing
pltresolve_size_ constant. Update all uses.
(Output_data_glink::add_global_entry): Align offset.
(Output_data_glink::set_final_data_size): Use global_entry_align.
(Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops.
Tidy stub output. Use global_entry_off.
ld/
* emultempl/ppc32elf.em (params): Init new field.
(enum ppc32_opt): New enum to define OPTION_* values. Add
OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN.
(PARSE_AND_LIST_LONGOPTS): Handle new options.
(PARSE_AND_LIST_ARGS_CASES): Likewise.
(PARSE_AND_LIST_OPTIONS): Likewise. Break up help output.
* emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment
correctly for negative --plt-stub-align.
* testsuite/ld-powerpc/elfv2exe.d,
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/relbrlt.d,
* testsuite/ld-powerpc/relbrlt.s,
* testsuite/ld-powerpc/tlsexe.d,
* testsuite/ld-powerpc/tlsexe.r,
* testsuite/ld-powerpc/tlsexe32.d,
* testsuite/ld-powerpc/tlsexe32.g,
* testsuite/ld-powerpc/tlsexe32.r,
* testsuite/ld-powerpc/tlsexetoc.d,
* testsuite/ld-powerpc/tlsexetoc.r,
* testsuite/ld-powerpc/tlsopt5_32.d,
* testsuite/ld-powerpc/tlsso.d,
* testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
2018-01-13 16:23:41 +08:00
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.* <.*\.plt_call\.f2>:
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2015-04-21 17:48:24 +08:00
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.*: (f8 41 00 18|18 00 41 f8) std r2,24\(r1\)
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2019-06-23 10:58:39 +08:00
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.*: (e9 82 80 38|38 80 82 e9) ld r12,-32712\(r2\)
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2015-04-21 17:48:24 +08:00
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (4e 80 04 20|20 04 80 4e) bctr
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2017-09-09 20:25:22 +08:00
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\.\.\.
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2013-10-29 14:10:34 +08:00
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2017-08-06 20:34:25 +08:00
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.* <f1>:
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2015-04-21 17:48:24 +08:00
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.*: (3c 4c 00 02|02 00 4c 3c) addis r2,r12,2
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2017-08-06 20:34:25 +08:00
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.*: (38 42 .. ..|.. .. 42 38) addi r2,r2,.*
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2015-04-21 17:48:24 +08:00
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.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
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.*: (f8 21 ff e1|e1 ff 21 f8) stdu r1,-32\(r1\)
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.*: (f8 01 00 30|30 00 01 f8) std r0,48\(r1\)
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2018-07-26 10:41:11 +08:00
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.*: (4b .. .. ..|.. .. .. 4b) bl .*\.plt_call\.f1>
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2015-04-21 17:48:24 +08:00
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.*: (e8 62 80 08|08 80 62 e8) ld r3,-32760\(r2\)
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2018-07-26 10:41:11 +08:00
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.*: (4b .. .. ..|.. .. .. 4b) bl .*\.plt_call\.f2>
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2015-04-21 17:48:24 +08:00
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.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\)
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2019-06-23 10:58:39 +08:00
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.*: (38 62 80 50|50 80 62 38) addi r3,r2,-32688
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2018-07-26 10:41:11 +08:00
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.*: (4b .. .. ..|.. .. .. 4b) bl .*\.plt_call\.f3>
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.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\)
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.*: (4b .. .. ..|.. .. .. 4b) bl .*\.plt_call\.f4>
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2015-04-21 17:48:24 +08:00
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.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\)
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2018-07-26 10:41:11 +08:00
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.*: (4b .. .. ..|.. .. .. 4b) bl .*\.plt_call\.f5>
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2015-04-21 17:48:24 +08:00
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.*: (e8 41 00 18|18 00 41 e8) ld r2,24\(r1\)
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.*: (e8 01 00 30|30 00 01 e8) ld r0,48\(r1\)
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.*: (38 21 00 20|20 00 21 38) addi r1,r1,32
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.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
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.*: (4e 80 00 20|20 00 80 4e) blr
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2018-07-26 10:41:11 +08:00
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.* <f5>:
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.*: (4e 80 00 20|20 00 80 4e) blr
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.*: (60 00 00 00|00 00 00 60) nop
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2017-08-06 20:34:25 +08:00
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.*
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.*
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2013-10-29 14:10:34 +08:00
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2017-08-06 20:34:25 +08:00
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.* <__glink_PLTresolve>:
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2015-04-21 17:48:24 +08:00
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.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
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.*: (42 9f 00 05|05 00 9f 42) bcl .*
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.*: (7d 68 02 a6|a6 02 68 7d) mflr r11
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.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
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PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
2020-09-26 13:40:09 +08:00
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.*: (e8 0b ff f0|f0 ff 0b e8) ld r0,-16\(r11\)
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2015-04-21 17:48:24 +08:00
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.*: (7d 8b 60 50|50 60 8b 7d) subf r12,r11,r12
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PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
2020-09-26 13:40:09 +08:00
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.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
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.*: (38 0c ff d4|d4 ff 0c 38) addi r0,r12,-44
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2015-04-21 17:48:24 +08:00
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.*: (e9 8b 00 00|00 00 8b e9) ld r12,0\(r11\)
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.*: (78 00 f0 82|82 f0 00 78) rldicl r0,r0,62,2
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.*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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.*: (e9 6b 00 08|08 00 6b e9) ld r11,8\(r11\)
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.*: (4e 80 04 20|20 04 80 4e) bctr
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2013-10-29 14:10:34 +08:00
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2018-07-26 10:41:11 +08:00
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.* <f5@plt>:
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PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
2020-09-26 13:40:09 +08:00
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.*: (4b ff ff cc|cc ff ff 4b) b .* <__glink_PLTresolve>
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2013-10-29 14:10:34 +08:00
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2018-07-26 10:41:11 +08:00
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.* <f3@plt>:
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PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
2020-09-26 13:40:09 +08:00
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.*: (4b ff ff c8|c8 ff ff 4b) b .* <__glink_PLTresolve>
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2013-10-29 14:10:34 +08:00
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2018-07-26 10:41:11 +08:00
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.* <f2@plt>:
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PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
2020-09-26 13:40:09 +08:00
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.*: (4b ff ff c4|c4 ff ff 4b) b .* <__glink_PLTresolve>
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2013-10-29 14:10:34 +08:00
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2018-07-26 10:41:11 +08:00
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.* <f4@plt>:
|
PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
2020-09-26 13:40:09 +08:00
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.*: (4b ff ff c0|c0 ff ff 4b) b .* <__glink_PLTresolve>
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2018-07-26 10:41:11 +08:00
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.* <f1@plt>:
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PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
2020-09-26 13:40:09 +08:00
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.*: (4b ff ff bc|bc ff ff 4b) b .* <__glink_PLTresolve>
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