binutils-gdb/sim/testsuite/mips/r6-forbidden.s

# mips r6 test for forbidden slot behaviour
# mach: mips32r6 mips64r6
# as:   -mabi=eabi
# ld:   -N -Ttext=0x80010000
# output: *\\nReservedInstruction at PC = *\\nprogram stopped with signal 4 (Illegal instruction).\\n
# xerror:

  .include "testutils.inc"

  setup

  .set noreorder

  .ent DIAG
DIAG:

  writemsg "[1] Test if FS is ignored when branch is taken"
  li $4, 0
  beqzalc $4, L1
  bc L2

L2:
  fail

L1:
  writemsg "[2] Test if FS is used when branch is not taken"
  li $4, 1
  blezc $4, L3
  addiu $4, $4, 1
  li $2, 2
  beq $4, $2, L4

L3:
  nop
  fail

L4:
  writemsg "[3] Test if FS causes an error when it contains a branch"
  li $4, 3
  beqzalc $4, L6
  bc L5

L5:
  nop
  fail

L6:
  #There is no passing condition here, all routes to the end indicate failure
  fail

  .end DIAG
sim: mips: Add simulator support for mips32r6/mips64r6 2022-02-01 Ali Lown <ali.lown@imgtec.com> Andrew Bennett <andrew.bennett@imgtec.com> Dragan Mladjenovic <dragan.mladjenovic@rt-rk.com> Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-bits.h (EXTEND9, EXTEND18 ,EXTEND19, EXTEND21, EXTEND26): New macros. sim/mips/ChangeLog: * Makefile.in (IGEN_INCLUDE): Add mips3264r6.igen. * configure: Regenerate. * configure.ac: Support mipsisa32r6 and mipsisa64r6. (sim_engine_run): Pick simulator model from processor specified in e_flags. * cp1.c (value_fpr): Handle fmt_dc32. (fp_unary, fp_binary): Zero initialize locals. (update_fcsr, fp_classify, fp_rint, fp_r6_cmp, inner_fmac, fp_fmac, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New functions. (sim_fpu_class_mips_mapping): New. * cp1.h (fcsr_ABS2008_mask, fcsr_ABS2008_shift): New define. * interp.c (MIPSR6_P): New. (load_word): Allow unaligned memory access for MIPSR6. * micromips.igen (sc, scd): Adapt to new do_sc* helper signature. * mips.igen: Add r6 models. (signal_if_cti, forbiddenslot32): New helpers. (delayslot32): Use signal_if_cti. (do_sc, do_scd); Add store_ll_bit parameter. (sc, scd): Adapt to previous change. (nal, beq, bal): New definitions for r6. (sll): Split nop and ssnop cases into ... (nop, ssnop): New definitions. (loadstore_ea): Use the 32-bit compatibility adressing. (cache): Split logic into ... (do_cache): New helper. (check_fpu): Select IEEE 754-2008 mode for R6. (not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_multi_hilo, check_div_hilo, check_u64, do_dmfc1b, add, li, addu, and, andi, bgez, bgtz, blez, bltz, bne, break, dadd, daddiu, daddu, dror, dror32, drorv, dsll, dsll32, dsllv, dsra, dsra32, dsrav, dsrl, dsrl32, dsub, dsubu, j, jal, jalr, jalr.hb, lb, lbu, ld, lh, lhu, lui, lw, lwu, nor, or, ori, ror, rorv, sb, sd, sh, sll, sllv, slt, slti, sltiu, sltu, sra, srav, srl, srlv, sub, subu, sw, sync, syscall, teq, tge, tgeu, tlt, tltu, tne, xor, xori, check_fmt_p, do_load_double, do_store_double, abs.FMT, add.FMT, ceil.l.FMT, ceil.w.FMT, cfc1, ctc1, cvt.d.FMT, cvt.l.FMT, cvt.w.FMT, div.FMT, dfmc1, dmtc1, floor.l.FMT, floor.w.FMT, ldc1, lwc1, mfc1, mov.FMT, mtc1, mul.FMT, recip.FMT, round.l.FMT, round.w.FMT, rsqrt.FMT, sdc1, sqrt.FMT, sub.FMT, swc1, trunc.l.FMT, trunc.w.FMT, bc0f, bc0fl, bc0t, bc0tl, dmfc0, dmtc0, eret, mfc0, mtc0, cop, tlbp, tlbr, tlbwi, tlbwr): Enable on r6 models. mips3264r2.igen (dext, dextm, dextu, di, dins, dinsm, dinsu, dsbh, dshd, ei, ext, mfhc1, mthc1, ins, seb, seh, synci, rdhwr, wsbh): Likewise. * mips3264r6.igen: New file. * sim-main.h (FP_formats): Add fmt_dc32. (FORBIDDEN_SLOT): New macros. (simFORBIDDENSLOT, FP_R6CMP_, FP_R6CLASS_): New defines. (fp_r6_cmp, fp_classify, fp_rint, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New declarations. (R6Compare, Classify, RoundToIntegralExact, Min, Max, MinA, MaxA, FusedMultiplyAdd, FusedMultiplySub): New macros. Wrapping previous declarations. sim/testsuite/mips/ChangeLog: * basic.exp: Add r6-.s tests. (run_r6_removed_test): New function. (run_endian_tests): New function. hilo-hazard-3.s: Skip for mipsr6. r2-fpu.s: New test. * r6-64.s: New test. * r6-branch.s: New test. * r6-forbidden.s: New test. * r6-fpu.s: New test. * r6-llsc-dp.s: New test. * r6-llsc-wp.s: New test. * r6-removed.csv: New test. * r6-removed.s: New test. * r6.s: New test. * utils-r6.inc: New inc. 2022-02-02 18:17:25 +08:00			`# mips r6 test for forbidden slot behaviour`
			`# mach: mips32r6 mips64r6`
			`# as: -mabi=eabi`
			`# ld: -N -Ttext=0x80010000`
			`# output: \\nReservedInstruction at PC = \\nprogram stopped with signal 4 (Illegal instruction).\\n`
			`# xerror:`

			`.include "testutils.inc"`

			`setup`

			`.set noreorder`

			`.ent DIAG`
			`DIAG:`

			`writemsg "[1] Test if FS is ignored when branch is taken"`
			`li $4, 0`
			`beqzalc $4, L1`
			`bc L2`

			`L2:`
			`fail`

			`L1:`
			`writemsg "[2] Test if FS is used when branch is not taken"`
			`li $4, 1`
			`blezc $4, L3`
			`addiu $4, $4, 1`
			`li $2, 2`
			`beq $4, $2, L4`

			`L3:`
			`nop`
			`fail`

			`L4:`
			`writemsg "[3] Test if FS causes an error when it contains a branch"`
			`li $4, 3`
			`beqzalc $4, L6`
			`bc L5`

			`L5:`
			`nop`
			`fail`

			`L6:`
			`#There is no passing condition here, all routes to the end indicate failure`
			`fail`

			`.end DIAG`