2016-12-09 00:58:23 +08:00
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#source: arclinux-nps.s
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2018-11-09 19:24:29 +08:00
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#as: -mcpu=arc700 -mnps400
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2016-12-09 00:58:23 +08:00
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#ld: -marclinux_nps
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#objdump: -dr
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.*: +file format .*arc.*
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Disassembly of section .text:
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[0-9a-f]+ <.*>:
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[0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
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[0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
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[0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
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[0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
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[0-9a-f]+: 200a 0f80 5800 0000 mov r0,0x58000000
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[0-9a-f]+: 200a 0f80 5880 0000 mov r0,0x58800000
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[0-9a-f]+: 200a 0f80 5900 0000 mov r0,0x59000000
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[0-9a-f]+: 200a 0f80 5980 0000 mov r0,0x59800000
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[0-9a-f]+: 200a 0f80 5a00 0000 mov r0,0x5a000000
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[0-9a-f]+: 200a 0f80 5a80 0000 mov r0,0x5a800000
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[0-9a-f]+: 200a 0f80 5b00 0000 mov r0,0x5b000000
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[0-9a-f]+: 200a 0f80 5b80 0000 mov r0,0x5b800000
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[0-9a-f]+: 200a 0f80 5c00 0000 mov r0,0x5c000000
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[0-9a-f]+: 200a 0f80 5c80 0000 mov r0,0x5c800000
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[0-9a-f]+: 200a 0f80 5d00 0000 mov r0,0x5d000000
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[0-9a-f]+: 200a 0f80 5d80 0000 mov r0,0x5d800000
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[0-9a-f]+: 200a 0f80 5e00 0000 mov r0,0x5e000000
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[0-9a-f]+: 200a 0f80 5e80 0000 mov r0,0x5e800000
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[0-9a-f]+: 200a 0f80 5f00 0000 mov r0,0x5f000000
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[0-9a-f]+: 200a 0f80 5f80 0000 mov r0,0x5f800000
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[0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
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[0-9a-f]+: 200a 0f80 57f0 0000 mov r0,0x57f00000
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[0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
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[0-9a-f]+: 200a 0f80 57f0 8000 mov r0,0x57f08000
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[0-9a-f]+: 200a 0f80 5800 0000 mov r0,0x58000000
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[0-9a-f]+: 200a 0f80 5880 0000 mov r0,0x58800000
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[0-9a-f]+: 200a 0f80 5900 0000 mov r0,0x59000000
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[0-9a-f]+: 200a 0f80 5980 0000 mov r0,0x59800000
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[0-9a-f]+: 200a 0f80 5a00 0000 mov r0,0x5a000000
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[0-9a-f]+: 200a 0f80 5a80 0000 mov r0,0x5a800000
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[0-9a-f]+: 200a 0f80 5b00 0000 mov r0,0x5b000000
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[0-9a-f]+: 200a 0f80 5b80 0000 mov r0,0x5b800000
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[0-9a-f]+: 200a 0f80 5c00 0000 mov r0,0x5c000000
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[0-9a-f]+: 200a 0f80 5c80 0000 mov r0,0x5c800000
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[0-9a-f]+: 200a 0f80 5d00 0000 mov r0,0x5d000000
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[0-9a-f]+: 200a 0f80 5d80 0000 mov r0,0x5d800000
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[0-9a-f]+: 200a 0f80 5e00 0000 mov r0,0x5e000000
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[0-9a-f]+: 200a 0f80 5e80 0000 mov r0,0x5e800000
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[0-9a-f]+: 200a 0f80 5f00 0000 mov r0,0x5f000000
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[0-9a-f]+: 200a 0f80 5f80 0000 mov r0,0x5f800000
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