2000-04-22 04:22:24 +08:00
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/* ia64-opc-x.c -- IA-64 `X' opcode table.
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2002-11-07 22:33:48 +08:00
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Copyright 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
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2000-04-22 04:22:24 +08:00
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Contributed by Timothy Wall <twall@cygnus.com>
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This file is part of GDB, GAS, and the GNU binutils.
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GDB, GAS, and the GNU binutils are free software; you can redistribute
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them and/or modify them under the terms of the GNU General Public
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License as published by the Free Software Foundation; either version
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2, or (at your option) any later version.
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GDB, GAS, and the GNU binutils are distributed in the hope that they
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will be useful, but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the
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2005-05-07 15:34:31 +08:00
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Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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2000-04-22 04:22:24 +08:00
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#include "ia64-opc.h"
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2002-11-07 22:33:48 +08:00
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/* Identify the specific X-unit type. */
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2000-04-22 04:22:24 +08:00
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#define X0 IA64_TYPE_X, 0
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#define X IA64_TYPE_X, 1
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2002-11-07 22:33:48 +08:00
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/* Instruction bit fields: */
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2000-04-22 04:22:24 +08:00
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#define bBtype(x) (((ia64_insn) ((x) & 0x7)) << 6)
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#define bD(x) (((ia64_insn) ((x) & 0x1)) << 35)
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#define bPa(x) (((ia64_insn) ((x) & 0x1)) << 12)
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#define bPr(x) (((ia64_insn) ((x) & 0x3f)) << 0)
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#define bVc(x) (((ia64_insn) ((x) & 0x1)) << 20)
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#define bWha(x) (((ia64_insn) ((x) & 0x3)) << 33)
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#define bX3(x) (((ia64_insn) ((x) & 0x7)) << 33)
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#define bX6(x) (((ia64_insn) ((x) & 0x3f)) << 27)
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Patch to update IA-64 port to SDM 2.1.
bfd/ChangeLog
* cpu-ia64-opc.c: Add operand constant "ar.csd".
gas/ChangeLog
* config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint"
instruction.
(emit_one_bundle): Handle "hint" instruction.
(operand_match): Match IA64_OPND_AR_CSD.
gas/testsuite/ChangeLog
* gas/ia64/opc-b.d: Update for instructions added by SDM2.1.
* gas/ia64/opc-b.s: Ditto.
* gas/ia64/opc-f.d: Ditto.
* gas/ia64/opc-f.s: Ditto.
* gas/ia64/opc-i.d: Ditto.
* gas/ia64/opc-i.s: Ditto.
* gas/ia64/opc-m.d: Ditto.
* gas/ia64/opc-m.s: Ditto.
* gas/ia64/opc-x.d: Ditto.
* gas/ia64/opc-x.s: Ditto.
include/opcode/ChangeLog
* ia64.h: Fix copyright message.
(IA64_OPND_AR_CSD): New operand kind.
opcodes/ChangeLog
* ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
* ia64-opc-b.c: Add "hint.b" instruction.
* ia64-opc-f.c: Add "hint.f" instruction.
* ia64-opc-i.c: Add "hint.i" instruction.
* ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
"cmp8xchg16" instructions.
* ia64-opc-x.c: Add "hint.x" instruction.
* ia64-opc.h (AR_CSD): New macro.
* ia64-ic.tbl: Update according to SDM2.1.
* ia64-raw.tbl: Ditto.
* ia64-waw.tbl: Ditto.
* ia64-gen.c (in_iclass): Handle "hint" like "nop".
(lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
* ia64-asmtab.c: Regenerate.
2002-12-05 10:08:02 +08:00
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#define bY(x) (((ia64_insn) ((x) & 0x1)) << 26)
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2000-04-22 04:22:24 +08:00
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#define mBtype bBtype (-1)
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#define mD bD (-1)
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#define mPa bPa (-1)
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#define mPr bPr (-1)
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#define mVc bVc (-1)
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#define mWha bWha (-1)
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#define mX3 bX3 (-1)
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#define mX6 bX6 (-1)
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Patch to update IA-64 port to SDM 2.1.
bfd/ChangeLog
* cpu-ia64-opc.c: Add operand constant "ar.csd".
gas/ChangeLog
* config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint"
instruction.
(emit_one_bundle): Handle "hint" instruction.
(operand_match): Match IA64_OPND_AR_CSD.
gas/testsuite/ChangeLog
* gas/ia64/opc-b.d: Update for instructions added by SDM2.1.
* gas/ia64/opc-b.s: Ditto.
* gas/ia64/opc-f.d: Ditto.
* gas/ia64/opc-f.s: Ditto.
* gas/ia64/opc-i.d: Ditto.
* gas/ia64/opc-i.s: Ditto.
* gas/ia64/opc-m.d: Ditto.
* gas/ia64/opc-m.s: Ditto.
* gas/ia64/opc-x.d: Ditto.
* gas/ia64/opc-x.s: Ditto.
include/opcode/ChangeLog
* ia64.h: Fix copyright message.
(IA64_OPND_AR_CSD): New operand kind.
opcodes/ChangeLog
* ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
* ia64-opc-b.c: Add "hint.b" instruction.
* ia64-opc-f.c: Add "hint.f" instruction.
* ia64-opc-i.c: Add "hint.i" instruction.
* ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
"cmp8xchg16" instructions.
* ia64-opc-x.c: Add "hint.x" instruction.
* ia64-opc.h (AR_CSD): New macro.
* ia64-ic.tbl: Update according to SDM2.1.
* ia64-raw.tbl: Ditto.
* ia64-waw.tbl: Ditto.
* ia64-gen.c (in_iclass): Handle "hint" like "nop".
(lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
* ia64-asmtab.c: Regenerate.
2002-12-05 10:08:02 +08:00
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#define mY bY (-1)
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2000-04-22 04:22:24 +08:00
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#define OpX3X6(a,b,c) (bOp (a) | bX3 (b) | bX6(c)), \
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(mOp | mX3 | mX6)
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Patch to update IA-64 port to SDM 2.1.
bfd/ChangeLog
* cpu-ia64-opc.c: Add operand constant "ar.csd".
gas/ChangeLog
* config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint"
instruction.
(emit_one_bundle): Handle "hint" instruction.
(operand_match): Match IA64_OPND_AR_CSD.
gas/testsuite/ChangeLog
* gas/ia64/opc-b.d: Update for instructions added by SDM2.1.
* gas/ia64/opc-b.s: Ditto.
* gas/ia64/opc-f.d: Ditto.
* gas/ia64/opc-f.s: Ditto.
* gas/ia64/opc-i.d: Ditto.
* gas/ia64/opc-i.s: Ditto.
* gas/ia64/opc-m.d: Ditto.
* gas/ia64/opc-m.s: Ditto.
* gas/ia64/opc-x.d: Ditto.
* gas/ia64/opc-x.s: Ditto.
include/opcode/ChangeLog
* ia64.h: Fix copyright message.
(IA64_OPND_AR_CSD): New operand kind.
opcodes/ChangeLog
* ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
* ia64-opc-b.c: Add "hint.b" instruction.
* ia64-opc-f.c: Add "hint.f" instruction.
* ia64-opc-i.c: Add "hint.i" instruction.
* ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
"cmp8xchg16" instructions.
* ia64-opc-x.c: Add "hint.x" instruction.
* ia64-opc.h (AR_CSD): New macro.
* ia64-ic.tbl: Update according to SDM2.1.
* ia64-raw.tbl: Ditto.
* ia64-waw.tbl: Ditto.
* ia64-gen.c (in_iclass): Handle "hint" like "nop".
(lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
* ia64-asmtab.c: Regenerate.
2002-12-05 10:08:02 +08:00
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#define OpX3X6Y(a,b,c,d) (bOp (a) | bX3 (b) | bX6(c) | bY(d)), \
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(mOp | mX3 | mX6 | mY)
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2000-04-22 04:22:24 +08:00
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#define OpVc(a,b) (bOp (a) | bVc (b)), (mOp | mVc)
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#define OpPaWhaD(a,b,c,d) \
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(bOp (a) | bPa (b) | bWha (c) | bD (d)), (mOp | mPa | mWha | mD)
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#define OpBtypePaWhaD(a,b,c,d,e) \
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(bOp (a) | bBtype (b) | bPa (c) | bWha (d) | bD (e)), \
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(mOp | mBtype | mPa | mWha | mD)
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#define OpBtypePaWhaDPr(a,b,c,d,e,f) \
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(bOp (a) | bBtype (b) | bPa (c) | bWha (d) | bD (e) | bPr (f)), \
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(mOp | mBtype | mPa | mWha | mD | mPr)
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struct ia64_opcode ia64_opcodes_x[] =
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{
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Patch to update IA-64 port to SDM 2.1.
bfd/ChangeLog
* cpu-ia64-opc.c: Add operand constant "ar.csd".
gas/ChangeLog
* config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint"
instruction.
(emit_one_bundle): Handle "hint" instruction.
(operand_match): Match IA64_OPND_AR_CSD.
gas/testsuite/ChangeLog
* gas/ia64/opc-b.d: Update for instructions added by SDM2.1.
* gas/ia64/opc-b.s: Ditto.
* gas/ia64/opc-f.d: Ditto.
* gas/ia64/opc-f.s: Ditto.
* gas/ia64/opc-i.d: Ditto.
* gas/ia64/opc-i.s: Ditto.
* gas/ia64/opc-m.d: Ditto.
* gas/ia64/opc-m.s: Ditto.
* gas/ia64/opc-x.d: Ditto.
* gas/ia64/opc-x.s: Ditto.
include/opcode/ChangeLog
* ia64.h: Fix copyright message.
(IA64_OPND_AR_CSD): New operand kind.
opcodes/ChangeLog
* ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
* ia64-opc-b.c: Add "hint.b" instruction.
* ia64-opc-f.c: Add "hint.f" instruction.
* ia64-opc-i.c: Add "hint.i" instruction.
* ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
"cmp8xchg16" instructions.
* ia64-opc-x.c: Add "hint.x" instruction.
* ia64-opc.h (AR_CSD): New macro.
* ia64-ic.tbl: Update according to SDM2.1.
* ia64-raw.tbl: Ditto.
* ia64-waw.tbl: Ditto.
* ia64-gen.c (in_iclass): Handle "hint" like "nop".
(lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
* ia64-asmtab.c: Regenerate.
2002-12-05 10:08:02 +08:00
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{"break.x", X0, OpX3X6 (0, 0, 0x00), {IMMU62}, 0, 0, NULL},
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{"nop.x", X0, OpX3X6Y (0, 0, 0x01, 0), {IMMU62}, 0, 0, NULL},
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{"hint.x", X0, OpX3X6Y (0, 0, 0x01, 1), {IMMU62}, 0, 0, NULL},
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2002-11-07 22:33:48 +08:00
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{"movl", X, OpVc (6, 0), {R1, IMMU64}, 0, 0, NULL},
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2000-04-22 04:22:24 +08:00
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#define BRL(a,b) \
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2002-11-07 22:33:48 +08:00
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X0, OpBtypePaWhaDPr (0xC, 0, a, 0, b, 0), {TGT64}, PSEUDO, 0, NULL
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{"brl.few", BRL (0, 0)},
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{"brl", BRL (0, 0)},
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{"brl.few.clr", BRL (0, 1)},
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{"brl.clr", BRL (0, 1)},
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{"brl.many", BRL (1, 0)},
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{"brl.many.clr", BRL (1, 1)},
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2000-04-22 04:22:24 +08:00
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#undef BRL
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#define BRL(a,b,c) \
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2002-11-07 22:33:48 +08:00
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X0, OpBtypePaWhaD (0xC, 0, a, b, c), {TGT64}, 0, 0, NULL
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#define BRLP(a,b,c) \
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X0, OpBtypePaWhaD (0xC, 0, a, b, c), {TGT64}, PSEUDO, 0, NULL
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2000-04-22 04:22:24 +08:00
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{"brl.cond.sptk.few", BRL (0, 0, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.cond.sptk", BRLP (0, 0, 0)},
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2000-04-22 04:22:24 +08:00
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{"brl.cond.sptk.few.clr", BRL (0, 0, 1)},
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2002-11-07 22:33:48 +08:00
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{"brl.cond.sptk.clr", BRLP (0, 0, 1)},
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2000-04-22 04:22:24 +08:00
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{"brl.cond.spnt.few", BRL (0, 1, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.cond.spnt", BRLP (0, 1, 0)},
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2000-04-22 04:22:24 +08:00
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{"brl.cond.spnt.few.clr", BRL (0, 1, 1)},
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2002-11-07 22:33:48 +08:00
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{"brl.cond.spnt.clr", BRLP (0, 1, 1)},
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2000-04-22 04:22:24 +08:00
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{"brl.cond.dptk.few", BRL (0, 2, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.cond.dptk", BRLP (0, 2, 0)},
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2000-04-22 04:22:24 +08:00
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{"brl.cond.dptk.few.clr", BRL (0, 2, 1)},
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2002-11-07 22:33:48 +08:00
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{"brl.cond.dptk.clr", BRLP (0, 2, 1)},
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2000-04-22 04:22:24 +08:00
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{"brl.cond.dpnt.few", BRL (0, 3, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.cond.dpnt", BRLP (0, 3, 0)},
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2000-04-22 04:22:24 +08:00
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{"brl.cond.dpnt.few.clr", BRL (0, 3, 1)},
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2002-11-07 22:33:48 +08:00
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{"brl.cond.dpnt.clr", BRLP (0, 3, 1)},
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2000-04-22 04:22:24 +08:00
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{"brl.cond.sptk.many", BRL (1, 0, 0)},
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{"brl.cond.sptk.many.clr", BRL (1, 0, 1)},
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{"brl.cond.spnt.many", BRL (1, 1, 0)},
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{"brl.cond.spnt.many.clr", BRL (1, 1, 1)},
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{"brl.cond.dptk.many", BRL (1, 2, 0)},
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{"brl.cond.dptk.many.clr", BRL (1, 2, 1)},
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{"brl.cond.dpnt.many", BRL (1, 3, 0)},
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{"brl.cond.dpnt.many.clr", BRL (1, 3, 1)},
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{"brl.sptk.few", BRL (0, 0, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.sptk", BRLP (0, 0, 0)},
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2000-04-22 04:22:24 +08:00
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{"brl.sptk.few.clr", BRL (0, 0, 1)},
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2002-11-07 22:33:48 +08:00
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{"brl.sptk.clr", BRLP (0, 0, 1)},
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2000-04-22 04:22:24 +08:00
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{"brl.spnt.few", BRL (0, 1, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.spnt", BRLP (0, 1, 0)},
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2000-04-22 04:22:24 +08:00
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{"brl.spnt.few.clr", BRL (0, 1, 1)},
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2002-11-07 22:33:48 +08:00
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{"brl.spnt.clr", BRLP (0, 1, 1)},
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2000-04-22 04:22:24 +08:00
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{"brl.dptk.few", BRL (0, 2, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.dptk", BRLP (0, 2, 0)},
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2000-04-22 04:22:24 +08:00
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{"brl.dptk.few.clr", BRL (0, 2, 1)},
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2002-11-07 22:33:48 +08:00
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{"brl.dptk.clr", BRLP (0, 2, 1)},
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2000-04-22 04:22:24 +08:00
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{"brl.dpnt.few", BRL (0, 3, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.dpnt", BRLP (0, 3, 0)},
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2000-04-22 04:22:24 +08:00
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{"brl.dpnt.few.clr", BRL (0, 3, 1)},
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2002-11-07 22:33:48 +08:00
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{"brl.dpnt.clr", BRLP (0, 3, 1)},
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2000-04-22 04:22:24 +08:00
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{"brl.sptk.many", BRL (1, 0, 0)},
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{"brl.sptk.many.clr", BRL (1, 0, 1)},
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{"brl.spnt.many", BRL (1, 1, 0)},
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{"brl.spnt.many.clr", BRL (1, 1, 1)},
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{"brl.dptk.many", BRL (1, 2, 0)},
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{"brl.dptk.many.clr", BRL (1, 2, 1)},
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{"brl.dpnt.many", BRL (1, 3, 0)},
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{"brl.dpnt.many.clr", BRL (1, 3, 1)},
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#undef BRL
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2002-11-07 22:33:48 +08:00
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#undef BRLP
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#define BRL(a,b,c) X, OpPaWhaD (0xD, a, b, c), {B1, TGT64}, 0, 0, NULL
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#define BRLP(a,b,c) X, OpPaWhaD (0xD, a, b, c), {B1, TGT64}, PSEUDO, 0, NULL
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2000-04-22 04:22:24 +08:00
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{"brl.call.sptk.few", BRL (0, 0, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.call.sptk", BRLP (0, 0, 0)},
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2000-04-22 04:22:24 +08:00
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{"brl.call.sptk.few.clr", BRL (0, 0, 1)},
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2002-11-07 22:33:48 +08:00
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{"brl.call.sptk.clr", BRLP (0, 0, 1)},
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2000-04-22 04:22:24 +08:00
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{"brl.call.spnt.few", BRL (0, 1, 0)},
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2002-11-07 22:33:48 +08:00
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{"brl.call.spnt", BRLP (0, 1, 0)},
|
2000-04-22 04:22:24 +08:00
|
|
|
{"brl.call.spnt.few.clr", BRL (0, 1, 1)},
|
2002-11-07 22:33:48 +08:00
|
|
|
{"brl.call.spnt.clr", BRLP (0, 1, 1)},
|
2000-04-22 04:22:24 +08:00
|
|
|
{"brl.call.dptk.few", BRL (0, 2, 0)},
|
2002-11-07 22:33:48 +08:00
|
|
|
{"brl.call.dptk", BRLP (0, 2, 0)},
|
2000-04-22 04:22:24 +08:00
|
|
|
{"brl.call.dptk.few.clr", BRL (0, 2, 1)},
|
2002-11-07 22:33:48 +08:00
|
|
|
{"brl.call.dptk.clr", BRLP (0, 2, 1)},
|
2000-04-22 04:22:24 +08:00
|
|
|
{"brl.call.dpnt.few", BRL (0, 3, 0)},
|
2002-11-07 22:33:48 +08:00
|
|
|
{"brl.call.dpnt", BRLP (0, 3, 0)},
|
2000-04-22 04:22:24 +08:00
|
|
|
{"brl.call.dpnt.few.clr", BRL (0, 3, 1)},
|
2002-11-07 22:33:48 +08:00
|
|
|
{"brl.call.dpnt.clr", BRLP (0, 3, 1)},
|
2000-04-22 04:22:24 +08:00
|
|
|
{"brl.call.sptk.many", BRL (1, 0, 0)},
|
|
|
|
{"brl.call.sptk.many.clr", BRL (1, 0, 1)},
|
|
|
|
{"brl.call.spnt.many", BRL (1, 1, 0)},
|
|
|
|
{"brl.call.spnt.many.clr", BRL (1, 1, 1)},
|
|
|
|
{"brl.call.dptk.many", BRL (1, 2, 0)},
|
|
|
|
{"brl.call.dptk.many.clr", BRL (1, 2, 1)},
|
|
|
|
{"brl.call.dpnt.many", BRL (1, 3, 0)},
|
|
|
|
{"brl.call.dpnt.many.clr", BRL (1, 3, 1)},
|
|
|
|
#undef BRL
|
2002-11-07 22:33:48 +08:00
|
|
|
#undef BRLP
|
|
|
|
{NULL, 0, 0, 0, 0, {0}, 0, 0, NULL}
|
2000-04-22 04:22:24 +08:00
|
|
|
};
|
|
|
|
|
|
|
|
#undef X0
|
|
|
|
#undef X
|
|
|
|
|
|
|
|
#undef bBtype
|
|
|
|
#undef bD
|
|
|
|
#undef bPa
|
|
|
|
#undef bPr
|
|
|
|
#undef bVc
|
|
|
|
#undef bWha
|
|
|
|
#undef bX3
|
|
|
|
#undef bX6
|
|
|
|
|
|
|
|
#undef mBtype
|
|
|
|
#undef mD
|
|
|
|
#undef mPa
|
|
|
|
#undef mPr
|
|
|
|
#undef mVc
|
|
|
|
#undef mWha
|
|
|
|
#undef mX3
|
|
|
|
#undef mX6
|
|
|
|
|
|
|
|
#undef OpX3X6
|
|
|
|
#undef OpVc
|
|
|
|
#undef OpPaWhaD
|
|
|
|
#undef OpBtypePaWhaD
|
|
|
|
#undef OpBtypePaWhaDPr
|