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167 lines
5.5 KiB
C
167 lines
5.5 KiB
C
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/* i370-dis.c -- Disassemble Instruction 370 (ESA/390) instructions
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Copyright 1994, 2000 Free Software Foundation, Inc.
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PowerPC version written by Ian Lance Taylor, Cygnus Support
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Rewritten for i370 ESA/390 support by Linas Vepstas <linas@linas.org>
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This file is part of GDB, GAS, and the GNU binutils.
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GDB, GAS, and the GNU binutils are free software; you can redistribute
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them and/or modify them under the terms of the GNU General Public
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License as published by the Free Software Foundation; either version
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2, or (at your option) any later version.
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GDB, GAS, and the GNU binutils are distributed in the hope that they
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will be useful, but WITHOUT ANY WARRANTY; without even the implied
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warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the Free
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Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <stdio.h>
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#include "sysdep.h"
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#include "dis-asm.h"
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#include "opcode/i370.h"
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/* This file provides several disassembler functions, all of which use
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the disassembler interface defined in dis-asm.h.
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*/
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int
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print_insn_i370 (memaddr, info)
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bfd_vma memaddr;
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struct disassemble_info *info;
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{
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bfd_byte buffer[8];
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int status;
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i370_insn_t insn;
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const struct i370_opcode *opcode;
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const struct i370_opcode *opcode_end;
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status = (*info->read_memory_func) (memaddr, buffer, 6, info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, memaddr, info);
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return -1;
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}
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/* Cast the bytes into the insn (in a host-endian indep way) */
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insn.i[0] = (buffer[0] << 24) & 0xff000000;
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insn.i[0] |= (buffer[1] << 16) & 0xff0000;
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insn.i[0] |= (buffer[2] << 8) & 0xff00;
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insn.i[0] |= buffer[3] & 0xff;
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insn.i[1] = (buffer[4] << 24) & 0xff000000;
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insn.i[1] |= (buffer[5] << 16) & 0xff0000;
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/* Find the first match in the opcode table. We could speed this up
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a bit by doing a binary search on the major opcode. */
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opcode_end = i370_opcodes + i370_num_opcodes;
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for (opcode = i370_opcodes; opcode < opcode_end; opcode++)
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{
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const unsigned char *opindex;
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const struct i370_operand *operand;
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i370_insn_t masked;
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int invalid;
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/* Mask off operands, and look for a match ... */
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masked = insn;
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if (2 == opcode->len)
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{
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masked.i[0] >>= 16;
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masked.i[0] &= 0xffff;
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}
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masked.i[0] &= opcode->mask.i[0];
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if (masked.i[0] != opcode->opcode.i[0]) continue;
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if (6 == opcode->len)
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{
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masked.i[1] &= opcode->mask.i[1];
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if (masked.i[1] != opcode->opcode.i[1]) continue;
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}
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/* Found a match. adjust a tad */
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if (2 == opcode->len)
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{
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insn.i[0] >>= 16;
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insn.i[0] &= 0xffff;
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}
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/* Make two passes over the operands. First see if any of them
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have extraction functions, and, if they do, make sure the
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instruction is valid. */
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invalid = 0;
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for (opindex = opcode->operands; *opindex != 0; opindex++)
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{
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operand = i370_operands + *opindex;
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if (operand->extract)
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(*operand->extract) (insn, &invalid);
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}
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if (invalid) continue;
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/* The instruction is valid. */
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(*info->fprintf_func) (info->stream, "%s", opcode->name);
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if (opcode->operands[0] != 0)
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(*info->fprintf_func) (info->stream, "\t");
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/* Now extract and print the operands. */
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for (opindex = opcode->operands; *opindex != 0; opindex++)
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{
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long value;
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operand = i370_operands + *opindex;
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/* Extract the value from the instruction. */
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if (operand->extract)
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value = (*operand->extract) (insn, (int *) NULL);
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else
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{
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value = (insn.i[0] >> operand->shift) & ((1 << operand->bits) - 1);
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}
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/* Print the operand as directed by the flags. */
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if ((operand->flags & I370_OPERAND_OPTIONAL) != 0)
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{
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if (value)
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(*info->fprintf_func) (info->stream, "(r%ld)", value);
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}
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else if ((operand->flags & I370_OPERAND_SBASE) != 0)
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{
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(*info->fprintf_func) (info->stream, "(r%ld)", value);
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}
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else if ((operand->flags & I370_OPERAND_INDEX) != 0)
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{
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if (value)
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(*info->fprintf_func) (info->stream, "(r%ld,", value);
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else
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(*info->fprintf_func) (info->stream, "(,");
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}
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else if ((operand->flags & I370_OPERAND_LENGTH) != 0)
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{
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(*info->fprintf_func) (info->stream, "(%ld,", value);
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}
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else if ((operand->flags & I370_OPERAND_BASE) != 0)
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(*info->fprintf_func) (info->stream, "r%ld)", value);
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else if ((operand->flags & I370_OPERAND_GPR) != 0)
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(*info->fprintf_func) (info->stream, "r%ld,", value);
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else if ((operand->flags & I370_OPERAND_FPR) != 0)
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(*info->fprintf_func) (info->stream, "f%ld,", value);
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else if ((operand->flags & I370_OPERAND_RELATIVE) != 0)
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(*info->fprintf_func) (info->stream, "%ld", value);
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else
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(*info->fprintf_func) (info->stream, " %ld, ", value);
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}
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return opcode->len;
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}
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/* We could not find a match. */
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(*info->fprintf_func) (info->stream, ".short 0x%02x%02x", buffer[0], buffer[1]);
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return 2;
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}
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