mirror/binutils-gdb
2
0
Fork 0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2024-12-21 04:42:53 +08:00
Code Issues Packages Projects Releases Wiki Activity
b50f433498
binutils-gdb/opcodes/i386-dis-evex-mod.h

90 lines
1.9 KiB
C
Raw Normal View History

i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{
/* MOD_EVEX_0F12_PREFIX_0 */
x86: drop xmm_m{b,w,d,q}_mode They're effectively redundant with {b,w,d,q}_mode.
2021-07-22 19:08:39 +08:00
{ "vmovlpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F12_P_0_M_1) },
},
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{
/* MOD_EVEX_0F12_PREFIX_2 */
x86: drop xmm_m{b,w,d,q}_mode They're effectively redundant with {b,w,d,q}_mode.
2021-07-22 19:08:39 +08:00
{ "vmovlpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
},
{
/* MOD_EVEX_0F13 */
x86: drop xmm_m{b,w,d,q}_mode They're effectively redundant with {b,w,d,q}_mode.
2021-07-22 19:08:39 +08:00
{ "vmovlpX", { EXq, XMM }, PREFIX_OPCODE },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
},
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{
/* MOD_EVEX_0F16_PREFIX_0 */
x86: drop xmm_m{b,w,d,q}_mode They're effectively redundant with {b,w,d,q}_mode.
2021-07-22 19:08:39 +08:00
{ "vmovhpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{ VEX_W_TABLE (EVEX_W_0F16_P_0_M_1) },
},
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
{
/* MOD_EVEX_0F16_PREFIX_2 */
x86: drop xmm_m{b,w,d,q}_mode They're effectively redundant with {b,w,d,q}_mode.
2021-07-22 19:08:39 +08:00
{ "vmovhpX", { XMM, Vex, EXq }, PREFIX_OPCODE },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
},
{
/* MOD_EVEX_0F17 */
x86: drop xmm_m{b,w,d,q}_mode They're effectively redundant with {b,w,d,q}_mode.
2021-07-22 19:08:39 +08:00
{ "vmovhpX", { EXq, XMM }, PREFIX_OPCODE },
x86: utilize X macro in EVEX decoding For major opcodes allowing only packed FP kinds of operands, i.e. the ones where legacy and AVX decoding uses the X macro, we can do so for AVX512 as well, by attaching to the checking logic the "EVEX.W must match presence of embedded 66 prefix" rule. (Encodings not following this general pattern simply may not gain the PREFIX_OPCODE attribute.) Note that testing of the thus altered decoding has already been put in place by "x86: correct decoding of packed-FP-only AVX encodings". This can also be at least partly applied to scalar-FP-only insns (i.e. V{,U}COMIS{S,D}) as well as the vector-FP forms of insns also allowing scalar encodings (e.g. VADDP{S,D}). Take the opportunity and also fix EVEX-encoded VMOVNTP{S,D} as well as to-memory forms of VMOV{L,H}PS and both forms of VMOV{L,H}PD to wrongly disassemble with only register operands.
2020-06-09 14:57:22 +08:00
},
{
/* MOD_EVEX_0F2B */
{ "vmovntpX", { EXx, XM }, PREFIX_OPCODE },
},
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
/* MOD_EVEX_0F381A */
x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands VBROADCAST{F,I}32x2 are the only exceptions here.
2020-07-06 19:43:34 +08:00
{
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
{ EVEX_LEN_TABLE (EVEX_LEN_0F381A_M_0) },
x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands VBROADCAST{F,I}32x2 are the only exceptions here.
2020-07-06 19:43:34 +08:00
},
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
/* MOD_EVEX_0F381B */
x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands VBROADCAST{F,I}32x2 are the only exceptions here.
2020-07-06 19:43:34 +08:00
{
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
{ EVEX_LEN_TABLE (EVEX_LEN_0F381B_M_0) },
x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands VBROADCAST{F,I}32x2 are the only exceptions here.
2020-07-06 19:43:34 +08:00
},
x86: drop Rdq, Rd, and MaskR Rdq, Rd, and MaskR can be replaced by Edq, Ed / Rm, and MaskE respectively, as OP_R() doesn't enforce ModRM.mod == 3, and hence where MOD matters but hasn't been decoded yet it needs to be anyway. (The case of converting to Rm is temporary until a subsequent change.)
2020-07-14 16:42:33 +08:00
/* MOD_EVEX_0F3828_P_1 */
{
{ Bad_Opcode },
{ "vpmovm2%BW", { XM, MaskE }, 0 },
},
/* MOD_EVEX_0F382A_P_1_W_1 */
{
{ Bad_Opcode },
{ "vpbroadcastmb2q", { XM, MaskE }, 0 },
},
/* MOD_EVEX_0F3838_P_1 */
{
{ Bad_Opcode },
{ "vpmovm2%DQ", { XM, MaskE }, 0 },
},
/* MOD_EVEX_0F383A_P_1_W_0 */
{
{ Bad_Opcode },
{ "vpbroadcastmw2d", { XM, MaskE }, 0 },
},
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
/* MOD_EVEX_0F385A */
x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands VBROADCAST{F,I}32x2 are the only exceptions here.
2020-07-06 19:43:34 +08:00
{
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
{ EVEX_LEN_TABLE (EVEX_LEN_0F385A_M_0) },
x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands VBROADCAST{F,I}32x2 are the only exceptions here.
2020-07-06 19:43:34 +08:00
},
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
/* MOD_EVEX_0F385B */
x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands VBROADCAST{F,I}32x2 are the only exceptions here.
2020-07-06 19:43:34 +08:00
{
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
{ EVEX_LEN_TABLE (EVEX_LEN_0F385B_M_0) },
x86: most VBROADCAST{F,I}{32,64}x* only accept memory operands VBROADCAST{F,I}32x2 are the only exceptions here.
2020-07-06 19:43:34 +08:00
},
x86: drop Rdq, Rd, and MaskR Rdq, Rd, and MaskR can be replaced by Edq, Ed / Rm, and MaskE respectively, as OP_R() doesn't enforce ModRM.mod == 3, and hence where MOD matters but hasn't been decoded yet it needs to be anyway. (The case of converting to Rm is temporary until a subsequent change.)
2020-07-14 16:42:33 +08:00
/* MOD_EVEX_0F387A_W_0 */
{
{ Bad_Opcode },
{ "vpbroadcastb", { XM, Ed }, PREFIX_DATA },
},
/* MOD_EVEX_0F387B_W_0 */
{
{ Bad_Opcode },
{ "vpbroadcastw", { XM, Ed }, PREFIX_DATA },
},
/* MOD_EVEX_0F387C */
{
{ Bad_Opcode },
{ "vpbroadcastK", { XM, Edq }, PREFIX_DATA },
},
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
{
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
/* MOD_EVEX_0F38C6 */
{ EVEX_LEN_TABLE (EVEX_LEN_0F38C6_M_0) },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
{
x86: re-arrange order of decode for various EVEX opcodes The order of decodes influences the overall number of table entries. Reduce table size quite a bit by first decoding few-alternatives attributes common to all valid leaves. This also adds a PREFIX_DATA 7531c61332db ("x86: simplify decode of opcodes valid with (embedded) 66 prefix only") missed to apply to vbroadcastf64x4.
2021-03-10 15:16:54 +08:00
/* MOD_EVEX_0F38C7 */
{ EVEX_LEN_TABLE (EVEX_LEN_0F38C7_M_0) },
i386: Break i386-dis-evex.h into small files Break i386-dis-evex.h into small files such that each file is included just once. * i386-dis-evex.h: Break into ... * i386-dis-evex-len.h: New file. * i386-dis-evex-mod.h: Likewise. * i386-dis-evex-prefix.h: Likewise. * i386-dis-evex-reg.h: Likewise. * i386-dis-evex-w.h: Likewise. * i386-dis.c: Include i386-dis-evex-reg.h, i386-dis-evex-prefix.h, i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-w.h and i386-dis-evex-mod.h.
2019-06-22 04:18:41 +08:00
},
Reference in New Issue Copy Permalink