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binutils-gdb/gdb/features/sparc/sparc32-cpu.xml

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gdb: provide and use sparc{32,64} target description XML files. gdb/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 Provide and use sparc32 and sparc64 target description XML files. * features/sparc/sparc32-cp0.xml, features/sparc/sparc32-cpu.xml, features/sparc/sparc32-fpu.xml: New files for sparc 32-bit. * features/sparc/sparc64-cp0.xml, features/sparc/sparc64-cpu.xml, features/sparc/sparc64-fpu.xml: New files for sparc 64-bit. * features/sparc/sparc32-solaris.xml: New file. * features/sparc/sparc64-solaris.xml: New file. * features/sparc/sparc32-solaris.c: Generated. * features/sparc/sparc64-solaris.c: Generated. * sparc-tdep.h: Account for differences in target descriptions. * sparc-tdep.c (sparc32_register_name): Use target provided registers. (sparc32_register_type): Use target provided registers. (validate_tdesc_registers): New function. (sparc32_gdbarch_init): Use tdesc_has_registers. Set pseudoregister functions. * sparc64-tdep.c (sparc64_register_name): Use target provided registers. (sparc64_register_type): Use target provided registers. (sparc64_init_abi): Set pseudoregister functions. gdb/doc/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 * gdb.texinfo: (Standard Target Features): Document SPARC features. (Sparc Features): New node. gdb/testsuite/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 * gdb.xml/tdesc-regs.exp: Provide sparc core registers for the tests.
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<?xml version="1.0"?>
Update copyright year range in all GDB files gdb/ChangeLog: Update copyright year range in all GDB files
2018-01-01 12:43:02 +08:00
<!-- Copyright (C) 2013-2018 Free Software Foundation, Inc.
gdb: provide and use sparc{32,64} target description XML files. gdb/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 Provide and use sparc32 and sparc64 target description XML files. * features/sparc/sparc32-cp0.xml, features/sparc/sparc32-cpu.xml, features/sparc/sparc32-fpu.xml: New files for sparc 32-bit. * features/sparc/sparc64-cp0.xml, features/sparc/sparc64-cpu.xml, features/sparc/sparc64-fpu.xml: New files for sparc 64-bit. * features/sparc/sparc32-solaris.xml: New file. * features/sparc/sparc64-solaris.xml: New file. * features/sparc/sparc32-solaris.c: Generated. * features/sparc/sparc64-solaris.c: Generated. * sparc-tdep.h: Account for differences in target descriptions. * sparc-tdep.c (sparc32_register_name): Use target provided registers. (sparc32_register_type): Use target provided registers. (validate_tdesc_registers): New function. (sparc32_gdbarch_init): Use tdesc_has_registers. Set pseudoregister functions. * sparc64-tdep.c (sparc64_register_name): Use target provided registers. (sparc64_register_type): Use target provided registers. (sparc64_init_abi): Set pseudoregister functions. gdb/doc/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 * gdb.texinfo: (Standard Target Features): Document SPARC features. (Sparc Features): New node. gdb/testsuite/ChangeLog: 2017-02-06 Ivo Raisr <ivo.raisr@oracle.com> PR tdep/20936 * gdb.xml/tdesc-regs.exp: Provide sparc core registers for the tests.
2017-02-06 15:44:03 +08:00
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved. -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.sparc.cpu">
<reg name="g0" bitsize="32" type="uint32" regnum="0"/>
<reg name="g1" bitsize="32" type="uint32" regnum="1"/>
<reg name="g2" bitsize="32" type="uint32" regnum="2"/>
<reg name="g3" bitsize="32" type="uint32" regnum="3"/>
<reg name="g4" bitsize="32" type="uint32" regnum="4"/>
<reg name="g5" bitsize="32" type="uint32" regnum="5"/>
<reg name="g6" bitsize="32" type="uint32" regnum="6"/>
<reg name="g7" bitsize="32" type="uint32" regnum="7"/>
<reg name="o0" bitsize="32" type="uint32" regnum="8"/>
<reg name="o1" bitsize="32" type="uint32" regnum="9"/>
<reg name="o2" bitsize="32" type="uint32" regnum="10"/>
<reg name="o3" bitsize="32" type="uint32" regnum="11"/>
<reg name="o4" bitsize="32" type="uint32" regnum="12"/>
<reg name="o5" bitsize="32" type="uint32" regnum="13"/>
<reg name="sp" bitsize="32" type="uint32" regnum="14"/>
<reg name="o7" bitsize="32" type="uint32" regnum="15"/>
<reg name="l0" bitsize="32" type="uint32" regnum="16"/>
<reg name="l1" bitsize="32" type="uint32" regnum="17"/>
<reg name="l2" bitsize="32" type="uint32" regnum="18"/>
<reg name="l3" bitsize="32" type="uint32" regnum="19"/>
<reg name="l4" bitsize="32" type="uint32" regnum="20"/>
<reg name="l5" bitsize="32" type="uint32" regnum="21"/>
<reg name="l6" bitsize="32" type="uint32" regnum="22"/>
<reg name="l7" bitsize="32" type="uint32" regnum="23"/>
<reg name="i0" bitsize="32" type="uint32" regnum="24"/>
<reg name="i1" bitsize="32" type="uint32" regnum="25"/>
<reg name="i2" bitsize="32" type="uint32" regnum="26"/>
<reg name="i3" bitsize="32" type="uint32" regnum="27"/>
<reg name="i4" bitsize="32" type="uint32" regnum="28"/>
<reg name="i5" bitsize="32" type="uint32" regnum="29"/>
<reg name="fp" bitsize="32" type="uint32" regnum="30"/>
<reg name="i7" bitsize="32" type="uint32" regnum="31"/>
</feature>
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