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binutils-gdb/include/elf/amdgpu.h

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bfd: add AMDGCN architecture Add support for the AMDGCN architecture to BFD. This is the bare minimum to get $ ./configure --target=amdgcn-hsa-amdhsa --disable-gas $ make all-binutils working later in this series. The specific AMDGCN models added here are a bit arbitrary, based on what we intend to initially support in GDB. This list will need to be updated in the future anyway. The complete up-to-date list of existing AMDGPU models can be found here: https://llvm.org/docs/AMDGPUUsage.html#processors The ELF format for this architecture is documented here: https://llvm.org/docs/AMDGPUUsage.html#elf-code-object The flags for the "HSA" OS ABI are properly versioned and documented on that page. But the NONE, PAL and MESA3D OS ABIs are not well documented nor versioned. Taking a peek at the LLVM source code, we see that they encode their flags the same way as HSA v3. For example, for PAL: https://github.com/llvm/llvm-project/blob/c8b614cd74a92d85936aed5ac7c642af75ffdc29/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp#L601 So at least, we know that all AMDGPU objects (of which AMDGCN objects are a subset of) at the time of writing encode the specific GPU model in the EF_AMDGPU_MACH field of e_flags. bfd/ChangeLog: * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add cpu-amdgcn.c. (BFD64_BACKENDS): Add elf64-amdgcn.lo. (BFD64_BACKENDS_CFILES): Add elf64-amdgcn.c. * Makefile.in: Re-generate. * cpu-amdgcn.c: New. * elf64-amdgcn.c: New. * archures.c (bfd_architecture): Add bfd_arch_amdgcn and related mach defines. (bfd_amdgcn_arch): New. (bfd_archures_list): Add bfd_amdgcn_arch. * bfd-in2.h: Re-generate. * config.bfd: Handle amdgcn* target. * configure.ac: Handle amdgcn_elf64_le_vec. * configure: Re-generate. * elf-bfd.h (elf_target_id): Add AMDGCN_ELF_DATA. * targets.c (amdgcn_elf64_le_vec): New. (_bfd_target_vector): Add amdgcn_elf64_le_vec. include/ChangeLog: * elf/amdgpu.h: New. * elf/common.h (ELFOSABI_AMDGPU_HSA): Add. Change-Id: I969f7b14960797e88891c308749a6e341eece5b2
2022-03-16 21:00:27 +08:00
/* AMDGPU ELF support for BFD.
Copyright (C) 2019-2021 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#ifndef _ELF_AMDGPU_H
#define _ELF_AMDGPU_H
binutils/readelf: handle AMDGPU relocation types Make readelf recognize AMDGPU relocation types, as documented here: https://llvm.org/docs/AMDGPUUsage.html#amdgpu-relocation-records The user-visible change looks like: -000000000004 000400000001 unrecognized: 1 0000000000000000 SCRATCH_RSRC_DWORD0 -00000000000c 000500000001 unrecognized: 1 0000000000000000 SCRATCH_RSRC_DWORD1 -000000000014 000600000007 unrecognized: 7 0000000000000000 global_var0 -00000000001c 000700000008 unrecognized: 8 0000000000000000 global_var1 -000000000024 000800000009 unrecognized: 9 0000000000000000 global_var2 -00000000002c 00090000000a unrecognized: a 0000000000000000 global_var3 -000000000034 000a0000000b unrecognized: b 0000000000000000 global_var4 +000000000004 000400000001 R_AMDGPU_ABS32_LO 0000000000000000 SCRATCH_RSRC_DWORD0 +00000000000c 000500000001 R_AMDGPU_ABS32_LO 0000000000000000 SCRATCH_RSRC_DWORD1 +000000000014 000600000007 R_AMDGPU_GOTPCREL 0000000000000000 global_var0 +00000000001c 000700000008 R_AMDGPU_GOTPCREL 0000000000000000 global_var1 +000000000024 000800000009 R_AMDGPU_GOTPCREL 0000000000000000 global_var2 +00000000002c 00090000000a R_AMDGPU_REL32_LO 0000000000000000 global_var3 +000000000034 000a0000000b R_AMDGPU_REL32_HI 0000000000000000 global_var4 binutils/ChangeLog: * readelf.c (dump_relocations): Handle EM_AMDGPU. include/ChangeLog: * elf/amdgpu.h: Add relocation values. Change-Id: I2ed4589f4cd37ea11ad2e0cb38d4b682271e1334
2022-03-16 21:01:54 +08:00
#include "elf/reloc-macros.h"
bfd: add AMDGCN architecture Add support for the AMDGCN architecture to BFD. This is the bare minimum to get $ ./configure --target=amdgcn-hsa-amdhsa --disable-gas $ make all-binutils working later in this series. The specific AMDGCN models added here are a bit arbitrary, based on what we intend to initially support in GDB. This list will need to be updated in the future anyway. The complete up-to-date list of existing AMDGPU models can be found here: https://llvm.org/docs/AMDGPUUsage.html#processors The ELF format for this architecture is documented here: https://llvm.org/docs/AMDGPUUsage.html#elf-code-object The flags for the "HSA" OS ABI are properly versioned and documented on that page. But the NONE, PAL and MESA3D OS ABIs are not well documented nor versioned. Taking a peek at the LLVM source code, we see that they encode their flags the same way as HSA v3. For example, for PAL: https://github.com/llvm/llvm-project/blob/c8b614cd74a92d85936aed5ac7c642af75ffdc29/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp#L601 So at least, we know that all AMDGPU objects (of which AMDGCN objects are a subset of) at the time of writing encode the specific GPU model in the EF_AMDGPU_MACH field of e_flags. bfd/ChangeLog: * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add cpu-amdgcn.c. (BFD64_BACKENDS): Add elf64-amdgcn.lo. (BFD64_BACKENDS_CFILES): Add elf64-amdgcn.c. * Makefile.in: Re-generate. * cpu-amdgcn.c: New. * elf64-amdgcn.c: New. * archures.c (bfd_architecture): Add bfd_arch_amdgcn and related mach defines. (bfd_amdgcn_arch): New. (bfd_archures_list): Add bfd_amdgcn_arch. * bfd-in2.h: Re-generate. * config.bfd: Handle amdgcn* target. * configure.ac: Handle amdgcn_elf64_le_vec. * configure: Re-generate. * elf-bfd.h (elf_target_id): Add AMDGCN_ELF_DATA. * targets.c (amdgcn_elf64_le_vec): New. (_bfd_target_vector): Add amdgcn_elf64_le_vec. include/ChangeLog: * elf/amdgpu.h: New. * elf/common.h (ELFOSABI_AMDGPU_HSA): Add. Change-Id: I969f7b14960797e88891c308749a6e341eece5b2
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/* e_ident[EI_ABIVERSION] values, when e_ident[EI_OSABI] is
ELFOSABI_AMDGPU_HSA. */
#define ELFABIVERSION_AMDGPU_HSA_V2 0
#define ELFABIVERSION_AMDGPU_HSA_V3 1
#define ELFABIVERSION_AMDGPU_HSA_V4 2
#define ELFABIVERSION_AMDGPU_HSA_V5 3
/* Processor selection mask for EF_AMDGPU_MACH_* values. */
#define EF_AMDGPU_MACH 0x0ff
#define EF_AMDGPU_MACH_AMDGCN_MIN 0x020
binutils/readelf: decode AMDGPU-specific e_flags Decode and print the AMDGPU-specific fields of e_flags, as documented here: https://llvm.org/docs/AMDGPUUsage.html#header That is: - The specific GPU model - Whether the xnack and sramecc features are enabled The result looks like: - Flags: 0x52f + Flags: 0x52f, gfx906, xnack any, sramecc any The flags for the "HSA" OS ABI are properly versioned and documented on that page. But the NONE, PAL and MESA3D OS ABIs are not well documented nor versioned. Taking a peek at the LLVM source code, we see that they encode their flags the same way as HSA v3. For example, for PAL: https://github.com/llvm/llvm-project/blob/c8b614cd74a92d85936aed5ac7c642af75ffdc29/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp#L601 So for those other OS ABIs, we read them the same as HSA v3. binutils/ChangeLog: * readelf.c: Include elf/amdgcn.h. (decode_AMDGPU_machine_flags): New. (get_machine_flags): Handle flags for EM_AMDGPU machine type. include/ChangeLog: * elf/amdgcn.h: Add EF_AMDGPU_MACH_AMDGCN_* and EF_AMDGPU_FEATURE_* defines. Change-Id: Ib5b94df7cae0719a22cf4e4fd0629330e9485c12
2022-03-16 21:01:15 +08:00
#define EF_AMDGPU_MACH_AMDGCN_GFX600 0x020
#define EF_AMDGPU_MACH_AMDGCN_GFX601 0x021
#define EF_AMDGPU_MACH_AMDGCN_GFX700 0x022
#define EF_AMDGPU_MACH_AMDGCN_GFX701 0x023
#define EF_AMDGPU_MACH_AMDGCN_GFX702 0x024
#define EF_AMDGPU_MACH_AMDGCN_GFX703 0x025
#define EF_AMDGPU_MACH_AMDGCN_GFX704 0x026
#define EF_AMDGPU_MACH_AMDGCN_GFX801 0x028
#define EF_AMDGPU_MACH_AMDGCN_GFX802 0x029
#define EF_AMDGPU_MACH_AMDGCN_GFX803 0x02a
#define EF_AMDGPU_MACH_AMDGCN_GFX810 0x02b
#define EF_AMDGPU_MACH_AMDGCN_GFX900 0x02c
#define EF_AMDGPU_MACH_AMDGCN_GFX902 0x02d
#define EF_AMDGPU_MACH_AMDGCN_GFX904 0x02e
#define EF_AMDGPU_MACH_AMDGCN_GFX906 0x02f
#define EF_AMDGPU_MACH_AMDGCN_GFX908 0x030
#define EF_AMDGPU_MACH_AMDGCN_GFX909 0x031
#define EF_AMDGPU_MACH_AMDGCN_GFX90C 0x032
#define EF_AMDGPU_MACH_AMDGCN_GFX1010 0x033
#define EF_AMDGPU_MACH_AMDGCN_GFX1011 0x034
#define EF_AMDGPU_MACH_AMDGCN_GFX1012 0x035
#define EF_AMDGPU_MACH_AMDGCN_GFX1030 0x036
#define EF_AMDGPU_MACH_AMDGCN_GFX1031 0x037
#define EF_AMDGPU_MACH_AMDGCN_GFX1032 0x038
#define EF_AMDGPU_MACH_AMDGCN_GFX1033 0x039
#define EF_AMDGPU_MACH_AMDGCN_GFX602 0x03a
#define EF_AMDGPU_MACH_AMDGCN_GFX705 0x03b
#define EF_AMDGPU_MACH_AMDGCN_GFX805 0x03c
#define EF_AMDGPU_MACH_AMDGCN_GFX1035 0x03d
#define EF_AMDGPU_MACH_AMDGCN_GFX1034 0x03e
#define EF_AMDGPU_MACH_AMDGCN_GFX90A 0x03f
#define EF_AMDGPU_MACH_AMDGCN_GFX940 0x040
#define EF_AMDGPU_MACH_AMDGCN_GFX1013 0x042
#define EF_AMDGPU_MACH_AMDGCN_GFX1036 0x045
/* Code object v3 machine flags. */
#define EF_AMDGPU_FEATURE_XNACK_V3 0x100
#define EF_AMDGPU_FEATURE_SRAMECC_V3 0x200
/* Code object v4 (and later) machine flags. */
#define EF_AMDGPU_FEATURE_XNACK_V4 0x300
#define EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4 0x000
#define EF_AMDGPU_FEATURE_XNACK_ANY_V4 0x100
#define EF_AMDGPU_FEATURE_XNACK_OFF_V4 0x200
#define EF_AMDGPU_FEATURE_XNACK_ON_V4 0x300
#define EF_AMDGPU_FEATURE_SRAMECC_V4 0xc00
#define EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4 0x000
#define EF_AMDGPU_FEATURE_SRAMECC_ANY_V4 0x400
#define EF_AMDGPU_FEATURE_SRAMECC_OFF_V4 0x800
#define EF_AMDGPU_FEATURE_SRAMECC_ON_V4 0xc00
binutils/readelf: handle NT_AMDGPU_METADATA note name Handle the NT_AMDGPU_METADATA note, which is described here: https://llvm.org/docs/AMDGPUUsage.html#code-object-v3-note-records As of this patch, just print out the name, not the contents, which is in the msgpack format. binutils/ChangeLog: * readelf.c (get_amdgpu_elf_note_type): New. (process_note): Handle "AMDGPU" notes. include/ChangeLog: * elf/amdgcn.h (NT_AMDGPU_METADATA): New. Change-Id: Id2dba2e2aeaa55ef7464fb35aee9c7d5f96ddb23
2022-03-16 21:01:26 +08:00
/* Notes. */
#define NT_AMDGPU_METADATA 32
binutils/readelf: handle AMDGPU relocation types Make readelf recognize AMDGPU relocation types, as documented here: https://llvm.org/docs/AMDGPUUsage.html#amdgpu-relocation-records The user-visible change looks like: -000000000004 000400000001 unrecognized: 1 0000000000000000 SCRATCH_RSRC_DWORD0 -00000000000c 000500000001 unrecognized: 1 0000000000000000 SCRATCH_RSRC_DWORD1 -000000000014 000600000007 unrecognized: 7 0000000000000000 global_var0 -00000000001c 000700000008 unrecognized: 8 0000000000000000 global_var1 -000000000024 000800000009 unrecognized: 9 0000000000000000 global_var2 -00000000002c 00090000000a unrecognized: a 0000000000000000 global_var3 -000000000034 000a0000000b unrecognized: b 0000000000000000 global_var4 +000000000004 000400000001 R_AMDGPU_ABS32_LO 0000000000000000 SCRATCH_RSRC_DWORD0 +00000000000c 000500000001 R_AMDGPU_ABS32_LO 0000000000000000 SCRATCH_RSRC_DWORD1 +000000000014 000600000007 R_AMDGPU_GOTPCREL 0000000000000000 global_var0 +00000000001c 000700000008 R_AMDGPU_GOTPCREL 0000000000000000 global_var1 +000000000024 000800000009 R_AMDGPU_GOTPCREL 0000000000000000 global_var2 +00000000002c 00090000000a R_AMDGPU_REL32_LO 0000000000000000 global_var3 +000000000034 000a0000000b R_AMDGPU_REL32_HI 0000000000000000 global_var4 binutils/ChangeLog: * readelf.c (dump_relocations): Handle EM_AMDGPU. include/ChangeLog: * elf/amdgpu.h: Add relocation values. Change-Id: I2ed4589f4cd37ea11ad2e0cb38d4b682271e1334
2022-03-16 21:01:54 +08:00
/* Relocations. */
START_RELOC_NUMBERS (elf_amdgpu_reloc_type)
RELOC_NUMBER (R_AMDGPU_NONE, 0)
RELOC_NUMBER (R_AMDGPU_ABS32_LO, 1)
RELOC_NUMBER (R_AMDGPU_ABS32_HI, 2)
RELOC_NUMBER (R_AMDGPU_ABS64, 3)
RELOC_NUMBER (R_AMDGPU_REL32, 4)
RELOC_NUMBER (R_AMDGPU_REL64, 5)
RELOC_NUMBER (R_AMDGPU_ABS32, 6)
RELOC_NUMBER (R_AMDGPU_GOTPCREL, 7)
RELOC_NUMBER (R_AMDGPU_GOTPCREL32_LO, 8)
RELOC_NUMBER (R_AMDGPU_GOTPCREL32_HI, 9)
RELOC_NUMBER (R_AMDGPU_REL32_LO, 10)
RELOC_NUMBER (R_AMDGPU_REL32_HI, 11)
RELOC_NUMBER (R_AMDGPU_RELATIVE64, 13)
RELOC_NUMBER (R_AMDGPU_REL16, 16)
END_RELOC_NUMBERS (R_AMDGPU_max)
bfd: add AMDGCN architecture Add support for the AMDGCN architecture to BFD. This is the bare minimum to get $ ./configure --target=amdgcn-hsa-amdhsa --disable-gas $ make all-binutils working later in this series. The specific AMDGCN models added here are a bit arbitrary, based on what we intend to initially support in GDB. This list will need to be updated in the future anyway. The complete up-to-date list of existing AMDGPU models can be found here: https://llvm.org/docs/AMDGPUUsage.html#processors The ELF format for this architecture is documented here: https://llvm.org/docs/AMDGPUUsage.html#elf-code-object The flags for the "HSA" OS ABI are properly versioned and documented on that page. But the NONE, PAL and MESA3D OS ABIs are not well documented nor versioned. Taking a peek at the LLVM source code, we see that they encode their flags the same way as HSA v3. For example, for PAL: https://github.com/llvm/llvm-project/blob/c8b614cd74a92d85936aed5ac7c642af75ffdc29/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp#L601 So at least, we know that all AMDGPU objects (of which AMDGCN objects are a subset of) at the time of writing encode the specific GPU model in the EF_AMDGPU_MACH field of e_flags. bfd/ChangeLog: * Makefile.am (ALL_MACHINES, ALL_MACHINES_CFILES): Add cpu-amdgcn.c. (BFD64_BACKENDS): Add elf64-amdgcn.lo. (BFD64_BACKENDS_CFILES): Add elf64-amdgcn.c. * Makefile.in: Re-generate. * cpu-amdgcn.c: New. * elf64-amdgcn.c: New. * archures.c (bfd_architecture): Add bfd_arch_amdgcn and related mach defines. (bfd_amdgcn_arch): New. (bfd_archures_list): Add bfd_amdgcn_arch. * bfd-in2.h: Re-generate. * config.bfd: Handle amdgcn* target. * configure.ac: Handle amdgcn_elf64_le_vec. * configure: Re-generate. * elf-bfd.h (elf_target_id): Add AMDGCN_ELF_DATA. * targets.c (amdgcn_elf64_le_vec): New. (_bfd_target_vector): Add amdgcn_elf64_le_vec. include/ChangeLog: * elf/amdgpu.h: New. * elf/common.h (ELFOSABI_AMDGPU_HSA): Add. Change-Id: I969f7b14960797e88891c308749a6e341eece5b2
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#endif /* _ELF_AMDGPU_H */
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