2012-08-13 22:52:54 +08:00
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/* AArch64 ELF support for BFD.
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2022-01-02 06:30:17 +08:00
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Copyright (C) 2009-2022 Free Software Foundation, Inc.
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2012-08-13 22:52:54 +08:00
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Contributed by ARM Ltd.
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This file is part of GNU Binutils.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the license, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#ifndef _ELF_AARCH64_H
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#define _ELF_AARCH64_H
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#include "elf/reloc-macros.h"
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/* Processor specific program header types. */
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#define PT_AARCH64_ARCHEXT (PT_LOPROC + 0)
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2022-06-28 19:57:34 +08:00
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/* MTE memory tag segment type. */
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#define PT_AARCH64_MEMTAG_MTE (PT_LOPROC + 0x2)
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2012-08-13 22:52:54 +08:00
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/* Additional section types. */
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#define SHT_AARCH64_ATTRIBUTES 0x70000003 /* Section holds attributes. */
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/* AArch64-specific values for sh_flags. */
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#define SHF_ENTRYSECT 0x10000000 /* Section contains an
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entry point. */
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#define SHF_COMDEF 0x80000000 /* Section may be multiply defined
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in the input to a link step. */
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[BFD, LD, AArch64, 2/3] Add --force-bti to enable BTI and to select BTI enabled PLTs
This is part of the patch series to add support for BTI and
PAC in AArch64 linker.
1) This patch adds a new ld command line option: --force-bti.
In the presence of this option, the linker enables BTI with the
GNU_PROPERTY_AARCH64_FEATURE_1_BTI feature. This gives out warning
in case of missing gnu notes for BTI in inputs.
2) It also defines a new set of BTI enabled PLTs. These are used either
when all the inputs are marked with GNU_PROPERTY_AARCH64_FEATURE_1_BTI
or when the new --force-bti option is used. This required adding new
fields in elf_aarch64_link_hash_table so that we could make the PLT
related information more generic.
3) It also defines a dynamic tag DT_AARCH64_BTI_PLT. The linker uses
this whenever it picks BTI enabled PLTs.
All these are made according to the new AArch64 ELF ABI
https://developer.arm.com/docs/ihi0056/latest/elf-for-the-arm-64-bit-architecture-aarch64-abi-2018q4
*** bfd/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* bfd-in.h (aarch64_plt_type, aarch64_enable_bti_type): New.
(aarch64_bti_pac_info): New.
(bfd_elf64_aarch64_set_options): Add aarch64_bti_pac_info argument.
(bfd_elf32_aarch64_set_options): Likewise.
* bfd-in2.h: Regenerate
* elfnn-aarch64.c (PLT_BTI_ENTRY_SIZE): New.
(PLT_BTI_SMALL_ENTRY_SIZE, PLT_BTI_TLSDESC_ENTRY_SIZE): New.
(elfNN_aarch64_small_plt0_bti_entry): New.
(elfNN_aarch64_small_plt_bti_entry): New.
(elfNN_aarch64_tlsdesc_small_plt_bti_entry): New.
(elf_aarch64_obj_tdata): Add no_bti_warn and plt_type fields.
(elf_aarch64_link_hash_table): Add plt0_entry, plt_entry and
tlsdesc_plt_entry_size fields.
(elfNN_aarch64_link_hash_table_create): Initialise the new fields.
(setup_plt_values): New helper function.
(bfd_elfNN_aarch64_set_options): Use new bp_info to set plt sizes and
bti enable type.
(elfNN_aarch64_allocate_dynrelocs): Use new size members instead of
fixed macros.
(elfNN_aarch64_size_dynamic_sections): Likewise and add checks.
(elfNN_aarch64_create_small_pltn_entry): Use new generic pointers
to plt stubs instead of fixed ones and update filling them according
to the need for bti.
(elfNN_aarch64_init_small_plt0_entry): Likewise.
(elfNN_aarch64_finish_dynamic_sections): Likewise.
(get_plt_type, elfNN_aarch64_get_synthetic_symtab): New.
(elfNN_aarch64_plt_sym_val): Update size accordingly.
(elfNN_aarch64_link_setup_gnu_properties): Set up plts if BTI GNU NOTE
is set.
(bfd_elfNN_get_synthetic_symtab): Define.
(elfNN_aarch64_merge_gnu_properties): Give out warning with --force-bti
and mising BTI NOTE SECTION.
*** binutils/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* readelf.c (get_aarch64_dynamic_type): New.
(get_dynamic_type): Use above for EM_AARCH64.
(dynamic_section_aarch64_val): New.
(process_dynamic_section): Use above for EM_AARCH64.
*** include/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
*** ld/ChangeLog ***
2019-03-13 Sudakshina Das <sudi.das@arm.com>
Szabolcs Nagy <szabolcs.nagy@arm.com>
* NEWS: Document --force-bti.
* emultempl/aarch64elf.em (plt_type, bti_type, OPTION_FORCE_BTI): New.
(PARSE_AND_LIST_SHORTOPTS, PARSE_AND_LIST_OPTIONS): Add force-bti.
(PARSE_AND_LIST_ARGS_CASES): Handle OPTION_FORCE_BTI.
* testsuite/ld-aarch64/aarch64-elf.exp: Add all the tests below.
* testsuite/ld-aarch64/bti-plt-1.d: New test.
* testsuite/ld-aarch64/bti-plt-1.s: New test.
* testsuite/ld-aarch64/bti-plt-2.s: New test.
* testsuite/ld-aarch64/bti-plt-2.d: New test.
* testsuite/ld-aarch64/bti-plt-3.d: New test.
* testsuite/ld-aarch64/bti-plt-4.d: New test.
* testsuite/ld-aarch64/bti-plt-5.d: New test.
* testsuite/ld-aarch64/bti-plt-6.d: New test.
* testsuite/ld-aarch64/bti-plt-7.d: New test.
* testsuite/ld-aarch64/bti-plt-so.s: New test.
* testsuite/ld-aarch64/bti-plt.ld: New test.
2019-03-13 18:54:30 +08:00
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/* Processor specific dynamic array tags. */
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#define DT_AARCH64_BTI_PLT (DT_LOPROC + 1)
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2019-03-13 19:09:10 +08:00
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#define DT_AARCH64_PAC_PLT (DT_LOPROC + 3)
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2019-04-25 20:46:01 +08:00
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#define DT_AARCH64_VARIANT_PCS (DT_LOPROC + 5)
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/* AArch64-specific values for st_other. */
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#define STO_AARCH64_VARIANT_PCS 0x80 /* Symbol may follow different call
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convention from the base PCS. */
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2012-08-13 22:52:54 +08:00
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/* Relocation types. */
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START_RELOC_NUMBERS (elf_aarch64_reloc_type)
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/* Null relocations. */
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RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */
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2013-06-26 18:47:06 +08:00
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/* Basic data relocations. */
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/* .word: (S+A) */
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RELOC_NUMBER (R_AARCH64_P32_ABS32, 1)
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/* .half: (S+A) */
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RELOC_NUMBER (R_AARCH64_P32_ABS16, 2)
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/* .word: (S+A-P) */
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RELOC_NUMBER (R_AARCH64_P32_PREL32, 3)
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/* .half: (S+A-P) */
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RELOC_NUMBER (R_AARCH64_P32_PREL16, 4)
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/* Group relocations to create a 16, 32, 48 or 64 bit
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unsigned data or abs address inline. */
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/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
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RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0, 5)
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/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
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RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0_NC, 6)
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/* MOV[ZK]: ((S+A) >> 16) & 0xffff */
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RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G1, 7)
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/* Group relocations to create high part of a 16, 32, 48 or 64 bit
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signed data or abs address inline. Will change instruction
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to MOVN or MOVZ depending on sign of calculated value. */
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/* MOV[ZN]: ((S+A) >> 0) & 0xffff */
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RELOC_NUMBER (R_AARCH64_P32_MOVW_SABS_G0, 8)
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/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
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addresses: PG(x) is (x & ~0xfff). */
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/* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
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RELOC_NUMBER (R_AARCH64_P32_LD_PREL_LO19, 9)
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/* ADR: (S+A-P) & 0x1fffff */
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RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_LO21, 10)
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/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
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RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_PG_HI21, 11)
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/* ADD: (S+A) & 0xfff */
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RELOC_NUMBER (R_AARCH64_P32_ADD_ABS_LO12_NC, 12)
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/* LD/ST8: (S+A) & 0xfff */
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RELOC_NUMBER (R_AARCH64_P32_LDST8_ABS_LO12_NC, 13)
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/* LD/ST16: (S+A) & 0xffe */
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RELOC_NUMBER (R_AARCH64_P32_LDST16_ABS_LO12_NC, 14)
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/* LD/ST32: (S+A) & 0xffc */
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RELOC_NUMBER (R_AARCH64_P32_LDST32_ABS_LO12_NC, 15)
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/* LD/ST64: (S+A) & 0xff8 */
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RELOC_NUMBER (R_AARCH64_P32_LDST64_ABS_LO12_NC, 16)
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/* LD/ST128: (S+A) & 0xff0 */
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RELOC_NUMBER (R_AARCH64_P32_LDST128_ABS_LO12_NC, 17)
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/* Relocations for control-flow instructions. */
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/* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */
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RELOC_NUMBER (R_AARCH64_P32_TSTBR14, 18)
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/* B.cond: ((S+A-P) >> 2) & 0x7ffff. */
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RELOC_NUMBER (R_AARCH64_P32_CONDBR19, 19)
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/* B: ((S+A-P) >> 2) & 0x3ffffff. */
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RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20)
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/* BL: ((S+A-P) >> 2) & 0x3ffffff. */
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RELOC_NUMBER (R_AARCH64_P32_CALL26, 21)
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2018-11-29 03:35:04 +08:00
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/* Group relocations to create a 16 or 32 bit PC-relative offset inline. */
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RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0, 22)
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RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G0_NC, 23)
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RELOC_NUMBER (R_AARCH64_P32_MOVW_PREL_G1, 24)
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2013-06-26 18:47:06 +08:00
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RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25)
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RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26)
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RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27)
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2015-05-12 20:47:15 +08:00
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RELOC_NUMBER (R_AARCH64_P32_LD32_GOTPAGE_LO14, 28)
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2013-06-26 18:47:06 +08:00
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2015-02-13 15:13:57 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PREL21, 80)
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2013-06-26 18:47:06 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81)
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RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
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2015-07-16 22:38:32 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
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2015-08-11 23:53:12 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
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2015-08-12 00:07:30 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
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[AArch64][3/6] GAS support TLSLD move/add relocation types
2015-08-19 Jiong Wang <jiong.wang@arm.com>
bfd/
* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-aarch64.c (reloc_table): New relocation modifiers,
"dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
"dtprel_g1_nc", "dtprel_g2".
(md_apply_fix): Support new relocation types.
(aarch64_force_relocation): Likewise.
(process_movw_reloc_info): Likewise.
gas/testsuite/
* gas/aarch64/reloc-dtprel_g0.s: New testcase.
* gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
* gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_g1.s: Likewise.
* gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
* gas/aarch64/reloc-dtprel_g2.s: Likewise.
* gas/aarch64/reloc-dtprel_hi12.s: Likewise.
* gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
* gas/aarch64/reloc-dtprel_g0.d: New expectation file.
* gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
* gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
* gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
* gas/aarch64/reloc-dtprel_g1.d: Likewise.
* gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
* gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
* gas/aarch64/reloc-dtprel_g2.d: Likewise.
* gas/aarch64/reloc-dtprel_hi12.d: Likewise.
* gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19 18:02:34 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87)
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RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88)
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RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89)
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RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90)
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2015-08-12 00:38:49 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
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2015-08-19 17:57:34 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92)
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2013-06-26 18:47:06 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
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RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
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RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 106)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 107)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111)
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2018-03-29 01:03:55 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12, 112)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC, 113)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12, 114)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC, 115)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12, 116)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC, 117)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12, 118)
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RELOC_NUMBER (R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC, 119)
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2013-06-26 18:47:06 +08:00
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RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122)
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RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123)
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RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PAGE21, 124)
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RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 125)
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RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 126)
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RELOC_NUMBER (R_AARCH64_P32_TLSDESC_CALL, 127)
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/* Dynamic relocations */
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/* Copy symbol at runtime. */
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RELOC_NUMBER (R_AARCH64_P32_COPY, 180)
|
|
|
|
|
|
|
|
/* Create GOT entry. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_P32_GLOB_DAT, 181)
|
|
|
|
|
|
|
|
/* Create PLT entry. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_P32_JUMP_SLOT, 182)
|
|
|
|
|
|
|
|
/* Adjust by program base. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_P32_RELATIVE, 183)
|
|
|
|
RELOC_NUMBER (R_AARCH64_P32_TLS_DTPMOD, 184)
|
|
|
|
RELOC_NUMBER (R_AARCH64_P32_TLS_DTPREL, 185)
|
|
|
|
RELOC_NUMBER (R_AARCH64_P32_TLS_TPREL, 186)
|
|
|
|
RELOC_NUMBER (R_AARCH64_P32_TLSDESC, 187)
|
|
|
|
RELOC_NUMBER (R_AARCH64_P32_IRELATIVE, 188)
|
2012-08-13 22:52:54 +08:00
|
|
|
|
|
|
|
RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */
|
|
|
|
|
|
|
|
/* Basic data relocations. */
|
|
|
|
|
|
|
|
/* .xword: (S+A) */
|
|
|
|
RELOC_NUMBER (R_AARCH64_ABS64, 257)
|
|
|
|
|
|
|
|
/* .word: (S+A) */
|
|
|
|
RELOC_NUMBER (R_AARCH64_ABS32, 258)
|
|
|
|
|
|
|
|
/* .half: (S+A) */
|
|
|
|
RELOC_NUMBER (R_AARCH64_ABS16, 259)
|
|
|
|
|
|
|
|
/* .xword: (S+A-P) */
|
|
|
|
RELOC_NUMBER (R_AARCH64_PREL64, 260)
|
|
|
|
|
|
|
|
/* .word: (S+A-P) */
|
|
|
|
RELOC_NUMBER (R_AARCH64_PREL32, 261)
|
|
|
|
|
|
|
|
/* .half: (S+A-P) */
|
|
|
|
RELOC_NUMBER (R_AARCH64_PREL16, 262)
|
|
|
|
|
|
|
|
/* Group relocations to create a 16, 32, 48 or 64 bit
|
|
|
|
unsigned data or abs address inline. */
|
|
|
|
|
|
|
|
/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0, 263)
|
|
|
|
|
|
|
|
/* MOV[ZK]: ((S+A) >> 0) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0_NC, 264)
|
|
|
|
|
|
|
|
/* MOV[ZK]: ((S+A) >> 16) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1, 265)
|
|
|
|
|
|
|
|
/* MOV[ZK]: ((S+A) >> 16) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1_NC, 266)
|
|
|
|
|
|
|
|
/* MOV[ZK]: ((S+A) >> 32) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2, 267)
|
|
|
|
|
|
|
|
/* MOV[ZK]: ((S+A) >> 32) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2_NC, 268)
|
|
|
|
|
|
|
|
/* MOV[ZK]: ((S+A) >> 48) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_UABS_G3, 269)
|
|
|
|
|
|
|
|
/* Group relocations to create high part of a 16, 32, 48 or 64 bit
|
|
|
|
signed data or abs address inline. Will change instruction
|
|
|
|
to MOVN or MOVZ depending on sign of calculated value. */
|
|
|
|
|
|
|
|
/* MOV[ZN]: ((S+A) >> 0) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_SABS_G0, 270)
|
|
|
|
|
|
|
|
/* MOV[ZN]: ((S+A) >> 16) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_SABS_G1, 271)
|
|
|
|
|
|
|
|
/* MOV[ZN]: ((S+A) >> 32) & 0xffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_SABS_G2, 272)
|
|
|
|
|
|
|
|
/* Relocations to generate 19, 21 and 33 bit PC-relative load/store
|
|
|
|
addresses: PG(x) is (x & ~0xfff). */
|
|
|
|
|
|
|
|
/* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_LD_PREL_LO19, 273)
|
|
|
|
|
|
|
|
/* ADR: (S+A-P) & 0x1fffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_ADR_PREL_LO21, 274)
|
|
|
|
|
|
|
|
/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21, 275)
|
|
|
|
|
|
|
|
/* ADRH: ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21_NC, 276)
|
|
|
|
|
|
|
|
/* ADD: (S+A) & 0xfff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_ADD_ABS_LO12_NC, 277)
|
|
|
|
|
|
|
|
/* LD/ST8: (S+A) & 0xfff */
|
|
|
|
RELOC_NUMBER (R_AARCH64_LDST8_ABS_LO12_NC, 278)
|
|
|
|
|
|
|
|
/* Relocations for control-flow instructions. */
|
|
|
|
|
|
|
|
/* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_TSTBR14, 279)
|
|
|
|
|
|
|
|
/* B.cond: ((S+A-P) >> 2) & 0x7ffff. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_CONDBR19, 280)
|
|
|
|
|
|
|
|
/* 281 unused */
|
|
|
|
|
|
|
|
/* B: ((S+A-P) >> 2) & 0x3ffffff. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_JUMP26, 282)
|
|
|
|
|
|
|
|
/* BL: ((S+A-P) >> 2) & 0x3ffffff. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_CALL26, 283)
|
|
|
|
|
|
|
|
/* LD/ST16: (S+A) & 0xffe */
|
|
|
|
RELOC_NUMBER (R_AARCH64_LDST16_ABS_LO12_NC, 284)
|
|
|
|
|
|
|
|
/* LD/ST32: (S+A) & 0xffc */
|
|
|
|
RELOC_NUMBER (R_AARCH64_LDST32_ABS_LO12_NC, 285)
|
|
|
|
|
|
|
|
/* LD/ST64: (S+A) & 0xff8 */
|
|
|
|
RELOC_NUMBER (R_AARCH64_LDST64_ABS_LO12_NC, 286)
|
|
|
|
|
2014-09-30 19:17:32 +08:00
|
|
|
/* Group relocations to create a 16, 32, 48, or 64 bit PC-relative
|
|
|
|
offset inline. */
|
|
|
|
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0, 287)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0_NC, 288)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1, 289)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1_NC, 290)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2, 291)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2_NC, 292)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_PREL_G3, 293)
|
|
|
|
|
2012-08-13 22:52:54 +08:00
|
|
|
/* LD/ST128: (S+A) & 0xff0 */
|
|
|
|
RELOC_NUMBER (R_AARCH64_LDST128_ABS_LO12_NC, 299)
|
|
|
|
|
2014-09-30 19:17:32 +08:00
|
|
|
/* Group relocations to create a 16, 32, 48, or 64 bit GOT-relative
|
|
|
|
offset inline. */
|
|
|
|
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0, 300)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0_NC, 301)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1, 302)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1_NC, 303)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2, 304)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2_NC, 305)
|
|
|
|
RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G3, 306)
|
|
|
|
|
|
|
|
/* GOT-relative data relocations. */
|
|
|
|
|
|
|
|
RELOC_NUMBER (R_AARCH64_GOTREL64, 307)
|
|
|
|
RELOC_NUMBER (R_AARCH64_GOTREL32, 308)
|
|
|
|
|
|
|
|
/* GOT-relative instruction relocations. */
|
|
|
|
|
2012-09-13 00:25:51 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309)
|
2014-09-30 19:17:32 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_LD64_GOTOFF_LO15, 310)
|
2012-08-13 22:52:54 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311)
|
|
|
|
RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312)
|
2014-09-30 19:17:32 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_LD64_GOTPAGE_LO15, 313)
|
2012-08-13 22:52:54 +08:00
|
|
|
|
2014-09-30 19:17:32 +08:00
|
|
|
/* General Dynamic TLS relocations. */
|
|
|
|
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PREL21, 512)
|
2012-08-13 22:52:54 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514)
|
2014-09-30 19:17:32 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G1, 515)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G0_NC, 516)
|
|
|
|
|
|
|
|
/* Local Dynamic TLS relocations. */
|
|
|
|
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PREL21, 517)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PAGE21, 518)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_ADD_LO12_NC, 519)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G1, 520)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G0_NC, 521)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LD_PREL19, 522)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G2, 523)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1, 524)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 525)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0, 526)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, 527)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_HI12, 528)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12, 529)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC, 530)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12, 531)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC, 532)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12, 533)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, 534)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12, 535)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, 536)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12, 537)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, 538)
|
|
|
|
|
|
|
|
/* Initial Exec TLS relocations. */
|
|
|
|
|
2012-08-13 22:52:54 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 540)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 541)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 542)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 543)
|
2014-09-30 19:17:32 +08:00
|
|
|
|
|
|
|
/* Local Exec TLS relocations. */
|
|
|
|
|
2012-08-13 22:52:54 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G2, 544)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1, 545)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 546)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0, 547)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551)
|
2014-09-30 19:17:32 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12, 552)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC, 553)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12, 554)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, 555)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12, 556)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 557)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12, 558)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 559)
|
|
|
|
|
|
|
|
/* TLS descriptor relocations. */
|
2012-08-13 22:52:54 +08:00
|
|
|
|
2013-05-29 00:39:51 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560)
|
2012-08-13 22:52:54 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561)
|
2013-05-29 00:39:51 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562)
|
2017-03-13 17:58:04 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12, 563)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12, 564)
|
2012-08-13 22:52:54 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569)
|
|
|
|
|
2014-09-30 19:17:32 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12, 570)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 571)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 572)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 573)
|
|
|
|
|
2012-08-13 22:52:54 +08:00
|
|
|
/* Dynamic relocations */
|
|
|
|
|
|
|
|
/* Copy symbol at runtime. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_COPY, 1024)
|
|
|
|
|
|
|
|
/* Create GOT entry. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_GLOB_DAT, 1025)
|
|
|
|
|
|
|
|
/* Create PLT entry. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026)
|
|
|
|
|
|
|
|
/* Adjust by program base. */
|
|
|
|
RELOC_NUMBER (R_AARCH64_RELATIVE, 1027)
|
2013-11-13 22:47:04 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLS_DTPMOD64, 1028)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLS_DTPREL64, 1029)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLS_TPREL64, 1030)
|
|
|
|
/* Aliasing relocs are guarded by RELOC_MACROS_GEN_FUNC
|
|
|
|
so that readelf.c won't generate duplicated case
|
|
|
|
statements. */
|
|
|
|
#ifndef RELOC_MACROS_GEN_FUNC
|
2013-06-26 18:47:06 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLS_DTPMOD, 1028)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLS_DTPREL, 1029)
|
|
|
|
RELOC_NUMBER (R_AARCH64_TLS_TPREL, 1030)
|
2013-11-13 22:47:04 +08:00
|
|
|
#endif
|
2012-08-13 22:52:54 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_TLSDESC, 1031)
|
2013-06-26 18:47:06 +08:00
|
|
|
RELOC_NUMBER (R_AARCH64_IRELATIVE, 1032)
|
2012-08-13 22:52:54 +08:00
|
|
|
|
|
|
|
END_RELOC_NUMBERS (R_AARCH64_end)
|
|
|
|
|
|
|
|
#endif /* _ELF_AARCH64_H */
|