2003-01-16 12:08:47 +08:00
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/* PPC64 ELF support for BFD.
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2015-01-01 22:15:26 +08:00
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Copyright (C) 2003-2015 Free Software Foundation, Inc.
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2003-01-16 12:08:47 +08:00
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2010-04-15 18:26:09 +08:00
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This file is part of BFD, the Binary File Descriptor library.
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2003-01-16 12:08:47 +08:00
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2010-04-15 18:26:09 +08:00
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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2003-01-16 12:08:47 +08:00
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2010-04-15 18:26:09 +08:00
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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2003-01-16 12:08:47 +08:00
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2010-04-15 18:26:09 +08:00
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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2003-01-16 12:08:47 +08:00
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#ifndef _ELF_PPC64_H
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#define _ELF_PPC64_H
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#include "elf/reloc-macros.h"
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/* Relocations. */
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START_RELOC_NUMBERS (elf_ppc64_reloc_type)
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2003-02-04 22:48:36 +08:00
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RELOC_NUMBER (R_PPC64_NONE, 0)
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RELOC_NUMBER (R_PPC64_ADDR32, 1)
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RELOC_NUMBER (R_PPC64_ADDR24, 2)
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RELOC_NUMBER (R_PPC64_ADDR16, 3)
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RELOC_NUMBER (R_PPC64_ADDR16_LO, 4)
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RELOC_NUMBER (R_PPC64_ADDR16_HI, 5)
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RELOC_NUMBER (R_PPC64_ADDR16_HA, 6)
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RELOC_NUMBER (R_PPC64_ADDR14, 7)
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RELOC_NUMBER (R_PPC64_ADDR14_BRTAKEN, 8)
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RELOC_NUMBER (R_PPC64_ADDR14_BRNTAKEN, 9)
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RELOC_NUMBER (R_PPC64_REL24, 10)
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RELOC_NUMBER (R_PPC64_REL14, 11)
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RELOC_NUMBER (R_PPC64_REL14_BRTAKEN, 12)
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RELOC_NUMBER (R_PPC64_REL14_BRNTAKEN, 13)
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RELOC_NUMBER (R_PPC64_GOT16, 14)
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RELOC_NUMBER (R_PPC64_GOT16_LO, 15)
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RELOC_NUMBER (R_PPC64_GOT16_HI, 16)
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RELOC_NUMBER (R_PPC64_GOT16_HA, 17)
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2003-01-16 12:08:47 +08:00
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/* 18 unused. 32-bit reloc is R_PPC_PLTREL24. */
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2003-02-04 22:48:36 +08:00
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RELOC_NUMBER (R_PPC64_COPY, 19)
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RELOC_NUMBER (R_PPC64_GLOB_DAT, 20)
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RELOC_NUMBER (R_PPC64_JMP_SLOT, 21)
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RELOC_NUMBER (R_PPC64_RELATIVE, 22)
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2003-01-16 12:08:47 +08:00
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/* 23 unused. 32-bit reloc is R_PPC_LOCAL24PC. */
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2003-02-04 22:48:36 +08:00
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RELOC_NUMBER (R_PPC64_UADDR32, 24)
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RELOC_NUMBER (R_PPC64_UADDR16, 25)
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RELOC_NUMBER (R_PPC64_REL32, 26)
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RELOC_NUMBER (R_PPC64_PLT32, 27)
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RELOC_NUMBER (R_PPC64_PLTREL32, 28)
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RELOC_NUMBER (R_PPC64_PLT16_LO, 29)
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RELOC_NUMBER (R_PPC64_PLT16_HI, 30)
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RELOC_NUMBER (R_PPC64_PLT16_HA, 31)
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2003-01-16 12:08:47 +08:00
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/* 32 unused. 32-bit reloc is R_PPC_SDAREL16. */
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2003-02-04 22:48:36 +08:00
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RELOC_NUMBER (R_PPC64_SECTOFF, 33)
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RELOC_NUMBER (R_PPC64_SECTOFF_LO, 34)
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RELOC_NUMBER (R_PPC64_SECTOFF_HI, 35)
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RELOC_NUMBER (R_PPC64_SECTOFF_HA, 36)
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RELOC_NUMBER (R_PPC64_REL30, 37)
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RELOC_NUMBER (R_PPC64_ADDR64, 38)
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RELOC_NUMBER (R_PPC64_ADDR16_HIGHER, 39)
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RELOC_NUMBER (R_PPC64_ADDR16_HIGHERA, 40)
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RELOC_NUMBER (R_PPC64_ADDR16_HIGHEST, 41)
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RELOC_NUMBER (R_PPC64_ADDR16_HIGHESTA, 42)
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RELOC_NUMBER (R_PPC64_UADDR64, 43)
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RELOC_NUMBER (R_PPC64_REL64, 44)
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RELOC_NUMBER (R_PPC64_PLT64, 45)
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RELOC_NUMBER (R_PPC64_PLTREL64, 46)
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RELOC_NUMBER (R_PPC64_TOC16, 47)
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RELOC_NUMBER (R_PPC64_TOC16_LO, 48)
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RELOC_NUMBER (R_PPC64_TOC16_HI, 49)
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RELOC_NUMBER (R_PPC64_TOC16_HA, 50)
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RELOC_NUMBER (R_PPC64_TOC, 51)
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RELOC_NUMBER (R_PPC64_PLTGOT16, 52)
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RELOC_NUMBER (R_PPC64_PLTGOT16_LO, 53)
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RELOC_NUMBER (R_PPC64_PLTGOT16_HI, 54)
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RELOC_NUMBER (R_PPC64_PLTGOT16_HA, 55)
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2003-01-16 12:08:47 +08:00
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2003-02-04 22:48:36 +08:00
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/* The following relocs were added in the 64-bit PowerPC ELF ABI
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revision 1.2. */
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RELOC_NUMBER (R_PPC64_ADDR16_DS, 56)
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RELOC_NUMBER (R_PPC64_ADDR16_LO_DS, 57)
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RELOC_NUMBER (R_PPC64_GOT16_DS, 58)
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RELOC_NUMBER (R_PPC64_GOT16_LO_DS, 59)
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RELOC_NUMBER (R_PPC64_PLT16_LO_DS, 60)
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RELOC_NUMBER (R_PPC64_SECTOFF_DS, 61)
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RELOC_NUMBER (R_PPC64_SECTOFF_LO_DS, 62)
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RELOC_NUMBER (R_PPC64_TOC16_DS, 63)
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RELOC_NUMBER (R_PPC64_TOC16_LO_DS, 64)
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RELOC_NUMBER (R_PPC64_PLTGOT16_DS, 65)
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RELOC_NUMBER (R_PPC64_PLTGOT16_LO_DS, 66)
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/* Relocs added to support TLS. PowerPC64 ELF ABI revision 1.5. */
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RELOC_NUMBER (R_PPC64_TLS, 67)
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RELOC_NUMBER (R_PPC64_DTPMOD64, 68)
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RELOC_NUMBER (R_PPC64_TPREL16, 69)
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RELOC_NUMBER (R_PPC64_TPREL16_LO, 70)
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RELOC_NUMBER (R_PPC64_TPREL16_HI, 71)
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RELOC_NUMBER (R_PPC64_TPREL16_HA, 72)
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RELOC_NUMBER (R_PPC64_TPREL64, 73)
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RELOC_NUMBER (R_PPC64_DTPREL16, 74)
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RELOC_NUMBER (R_PPC64_DTPREL16_LO, 75)
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RELOC_NUMBER (R_PPC64_DTPREL16_HI, 76)
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RELOC_NUMBER (R_PPC64_DTPREL16_HA, 77)
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RELOC_NUMBER (R_PPC64_DTPREL64, 78)
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RELOC_NUMBER (R_PPC64_GOT_TLSGD16, 79)
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RELOC_NUMBER (R_PPC64_GOT_TLSGD16_LO, 80)
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RELOC_NUMBER (R_PPC64_GOT_TLSGD16_HI, 81)
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RELOC_NUMBER (R_PPC64_GOT_TLSGD16_HA, 82)
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RELOC_NUMBER (R_PPC64_GOT_TLSLD16, 83)
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RELOC_NUMBER (R_PPC64_GOT_TLSLD16_LO, 84)
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RELOC_NUMBER (R_PPC64_GOT_TLSLD16_HI, 85)
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RELOC_NUMBER (R_PPC64_GOT_TLSLD16_HA, 86)
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RELOC_NUMBER (R_PPC64_GOT_TPREL16_DS, 87)
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RELOC_NUMBER (R_PPC64_GOT_TPREL16_LO_DS, 88)
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RELOC_NUMBER (R_PPC64_GOT_TPREL16_HI, 89)
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RELOC_NUMBER (R_PPC64_GOT_TPREL16_HA, 90)
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RELOC_NUMBER (R_PPC64_GOT_DTPREL16_DS, 91)
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RELOC_NUMBER (R_PPC64_GOT_DTPREL16_LO_DS, 92)
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RELOC_NUMBER (R_PPC64_GOT_DTPREL16_HI, 93)
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RELOC_NUMBER (R_PPC64_GOT_DTPREL16_HA, 94)
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RELOC_NUMBER (R_PPC64_TPREL16_DS, 95)
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RELOC_NUMBER (R_PPC64_TPREL16_LO_DS, 96)
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RELOC_NUMBER (R_PPC64_TPREL16_HIGHER, 97)
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RELOC_NUMBER (R_PPC64_TPREL16_HIGHERA, 98)
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RELOC_NUMBER (R_PPC64_TPREL16_HIGHEST, 99)
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RELOC_NUMBER (R_PPC64_TPREL16_HIGHESTA, 100)
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RELOC_NUMBER (R_PPC64_DTPREL16_DS, 101)
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RELOC_NUMBER (R_PPC64_DTPREL16_LO_DS, 102)
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RELOC_NUMBER (R_PPC64_DTPREL16_HIGHER, 103)
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RELOC_NUMBER (R_PPC64_DTPREL16_HIGHERA, 104)
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RELOC_NUMBER (R_PPC64_DTPREL16_HIGHEST, 105)
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RELOC_NUMBER (R_PPC64_DTPREL16_HIGHESTA, 106)
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2009-03-04 13:50:50 +08:00
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RELOC_NUMBER (R_PPC64_TLSGD, 107)
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RELOC_NUMBER (R_PPC64_TLSLD, 108)
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2011-10-10 21:21:07 +08:00
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RELOC_NUMBER (R_PPC64_TOCSAVE, 109)
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2003-01-16 12:08:47 +08:00
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Report overflow on PowerPC64 @h and @ha relocations.
This changes the behaviour of @h and @ha on PowerPC64 to report errors
on 32-bit overflow. The motivation for this change is that on
PowerPC64, most uses of @h and @ha modifiers and their corresponding
relocations are to build up 32-bit offsets. We'd like to know when
such offsets overflow. Only rarely do people use @h or @ha with the
high 32-bit modifiers to build a 64-bit constant. Those uses will now
need to use two new modifiers, @high and @higha, if the constant isn't
known at assembly time. For now, we won't report overflow at assembly
time..
This also fixes an error when applying some of the HIGHER and HIGHEST
relocations.
include/elf/
* ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New.
(IS_PPC64_TLS_RELOC): Match new tls relocs.
bfd/
* reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA,
BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA,
BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New.
* elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs.
Make all _HA and _HI relocs report signed overflow.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise.
(dec_dynrel_count, ppc64_elf_relocate_section): Likewise.
(ppc64_elf_relocate_section): Don't apply 0x8000 adjust to
R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST,
R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (SEX16): Don't mask.
(REPORT_OVERFLOW_HI): Define as zero.
(ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
@tprel@high, and @tprel@higha modifiers.
(md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
Handle new relocs.
(md_apply_fix): Similarly.
elfcpp/
* powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs.
(Target_powerpc::Scan::global, local): Likewise.
(Target_powerpc::Relocate::relocate): Likewise. Check for overflow
on all ppc64 @h and @ha relocs.
2013-10-29 14:23:25 +08:00
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/* Added when HA and HI relocs were changed to report overflows. */
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RELOC_NUMBER (R_PPC64_ADDR16_HIGH, 110)
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RELOC_NUMBER (R_PPC64_ADDR16_HIGHA, 111)
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RELOC_NUMBER (R_PPC64_TPREL16_HIGH, 112)
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RELOC_NUMBER (R_PPC64_TPREL16_HIGHA, 113)
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RELOC_NUMBER (R_PPC64_DTPREL16_HIGH, 114)
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RELOC_NUMBER (R_PPC64_DTPREL16_HIGHA, 115)
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2014-03-05 17:27:39 +08:00
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/* Added for ELFv2. */
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RELOC_NUMBER (R_PPC64_REL24_NOTOC, 116)
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RELOC_NUMBER (R_PPC64_ADDR64_LOCAL, 117)
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2010-06-25 13:20:57 +08:00
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#ifndef RELOC_MACROS_GEN_FUNC
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/* Fake relocation only used internally by ld. */
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RELOC_NUMBER (R_PPC64_LO_DS_OPT, 128)
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#endif
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Add assembler, disassembler and linker support for power9.
include/opcode/
* ppc.h (PPC_OPCODE_POWER9): New define.
(PPC_OPCODE_VSX3): Likewise.
opcodes/
* ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries.
Add PPC_OPCODE_VSX3 to the vsx entry.
(powerpc_init_dialect): Set default dialect to power9.
* ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd,
insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1,
extract_l1 insert_xtq6, extract_xtq6): New static functions.
(insert_esync): Test for illegal L operand value.
(DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6,
XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA,
XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK,
XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3,
PPCVSX3): New defines.
(powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu,
fcmpo, ftdiv, ftsqrt>: Use XBF_MASK.
<mcrxr>: Use XBFRARB_MASK.
<addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq.,
bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc.,
cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first,
cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx,
lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll,
lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw,
modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last,
rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx,
stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx,
subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh,
vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh.,
vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd,
vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d,
vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx,
vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq,
vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd,
vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait,
xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp,
xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp,
xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz,
xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp,
xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp,
xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo,
xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo,
xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo,
xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp,
xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp,
xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp,
xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw,
xxinsertw, xxperm, xxpermr, xxspltib>: New instructions.
<doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9.
<tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands.
include/elf/
* ppc.h (R_PPC_REL16DX_HA): New reloction.
* ppc64.h (R_PPC64_REL16DX_HA): Likewise.
bfd/
* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA.
(ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA.
(ppc_elf_addr16_ha_reloc): Likewise.
(ppc_elf_check_relocs): Likewise.
(ppc_elf_relocate_section): Likewise.
(is_insn_dq_form): Handle lxv and stxv instructions.
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA.
(ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA.
(ppc64_elf_ha_reloc): Likewise.
(ppc64_elf_check_relocs): Likewise.
(ppc64_elf_relocate_section): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Likewise.
* reloc.c (BFD_RELOC_PPC_REL16DX_HA): New.
elfcpp/
* powerpc.h (R_POWERPC_REL16DX_HA): Define.
gas/
* doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9.
* doc/c-ppc.texi (PowerPC-Opts): Likewise.
* config/tc-ppc.c (md_show_usage): Likewise.
(md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA.
(md_apply_fix): Likewise.
(ppc_handle_align): Handle power9's group ending nop.
gas/testsuite/
* gas/ppc/altivec3.s: New test.
* gas/ppc/altivec3.d: Likewise.
* gas/ppc/vsx3.s: Likewise.
* gas/ppc/vsx3.d: Likewise.
* gas/ppc/power9.s: Likewise.
* gas/ppc/power9.d: Likewise.
* gas/ppc/ppc.exp: Run them.
* gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests.
* gas/ppc/power8.d: Likewise.
* gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ...
<lxvd2x, stxvd2x>: ...to this.
* gas/ppc/vsx.d: Likewise.
gold/
* gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function.
(Powerpc_relocate_functions::addr16dx_ha): Likewise.
(Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Likewise.
ld/testsuite/
* ld-powerpc/addpcis.d: New test.
* ld-powerpc/addpcis.s: New test.
* ld-powerpc/powerpc.exp: Run it.
2015-11-12 09:52:52 +08:00
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/* Power9 split rel16 for addpcis. */
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RELOC_NUMBER (R_PPC64_REL16DX_HA, 246)
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2009-07-10 20:19:58 +08:00
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/* Support STT_GNU_IFUNC plt calls. */
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2009-07-29 22:55:20 +08:00
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RELOC_NUMBER (R_PPC64_JMP_IREL, 247)
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2009-07-10 20:19:58 +08:00
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RELOC_NUMBER (R_PPC64_IRELATIVE, 248)
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2009-07-29 22:55:20 +08:00
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/* These are GNU extensions used in PIC code sequences. */
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RELOC_NUMBER (R_PPC64_REL16, 249)
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RELOC_NUMBER (R_PPC64_REL16_LO, 250)
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RELOC_NUMBER (R_PPC64_REL16_HI, 251)
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RELOC_NUMBER (R_PPC64_REL16_HA, 252)
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2003-01-16 12:08:47 +08:00
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/* These are GNU extensions to enable C++ vtable garbage collection. */
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2003-02-04 22:48:36 +08:00
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RELOC_NUMBER (R_PPC64_GNU_VTINHERIT, 253)
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RELOC_NUMBER (R_PPC64_GNU_VTENTRY, 254)
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2003-01-16 12:08:47 +08:00
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END_RELOC_NUMBERS (R_PPC64_max)
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Report overflow on PowerPC64 @h and @ha relocations.
This changes the behaviour of @h and @ha on PowerPC64 to report errors
on 32-bit overflow. The motivation for this change is that on
PowerPC64, most uses of @h and @ha modifiers and their corresponding
relocations are to build up 32-bit offsets. We'd like to know when
such offsets overflow. Only rarely do people use @h or @ha with the
high 32-bit modifiers to build a 64-bit constant. Those uses will now
need to use two new modifiers, @high and @higha, if the constant isn't
known at assembly time. For now, we won't report overflow at assembly
time..
This also fixes an error when applying some of the HIGHER and HIGHEST
relocations.
include/elf/
* ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New.
(IS_PPC64_TLS_RELOC): Match new tls relocs.
bfd/
* reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA,
BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA,
BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New.
* elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs.
Make all _HA and _HI relocs report signed overflow.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise.
(dec_dynrel_count, ppc64_elf_relocate_section): Likewise.
(ppc64_elf_relocate_section): Don't apply 0x8000 adjust to
R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST,
R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (SEX16): Don't mask.
(REPORT_OVERFLOW_HI): Define as zero.
(ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
@tprel@high, and @tprel@higha modifiers.
(md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
Handle new relocs.
(md_apply_fix): Similarly.
elfcpp/
* powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs.
(Target_powerpc::Scan::global, local): Likewise.
(Target_powerpc::Relocate::relocate): Likewise. Check for overflow
on all ppc64 @h and @ha relocs.
2013-10-29 14:23:25 +08:00
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#define IS_PPC64_TLS_RELOC(R) \
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(((R) >= R_PPC64_TLS && (R) <= R_PPC64_DTPREL16_HIGHESTA) \
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|| ((R) >= R_PPC64_TPREL16_HIGH && (R) <= R_PPC64_DTPREL16_HIGHA))
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2003-02-04 22:48:36 +08:00
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2013-10-29 12:36:09 +08:00
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/* e_flags bits specifying ABI.
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1 for original function descriptor using ABI,
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2 for revised ABI without function descriptors,
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0 for unspecified or not using any features affected by the differences. */
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#define EF_PPC64_ABI 3
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2013-10-29 13:07:43 +08:00
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/* The ELFv2 ABI uses three bits in the symbol st_other field of a
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function definition to specify the number of instructions between a
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function's global entry point and local entry point.
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The global entry point is used when it is necessary to set up the
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toc pointer (r2) for the function. Callers must enter the global
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entry point with r12 set to the global entry point address. On
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return from the function, r2 may have a different value to that
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which it had on entry.
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The local entry point is used when r2 is known to already be valid
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for the function. There is no requirement on r12 when using the
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local entry point, and on return r2 will contain the same value as
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at entry.
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A value of zero in these bits means that the function has a single
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entry point with no requirement on r12 or r2, and that on return r2
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will contain the same value as at entry.
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Values of one and seven are reserved. */
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#define STO_PPC64_LOCAL_BIT 5
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#define STO_PPC64_LOCAL_MASK (7 << STO_PPC64_LOCAL_BIT)
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// 3 bit other field to bytes.
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static inline unsigned int
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ppc64_decode_local_entry(unsigned int other)
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{
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return ((1 << other) >> 2) << 2;
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}
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// bytes to field value.
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static inline unsigned int
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ppc64_encode_local_entry(unsigned int val)
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{
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return (val >= 4 * 4
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? (val >= 8 * 4
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? (val >= 16 * 4 ? 6 : 5)
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: 4)
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: (val >= 2 * 4
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? 3
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: (val >= 1 * 4 ? 2 : 0)));
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}
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/* st_other to number of bytes. */
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|
#define PPC64_LOCAL_ENTRY_OFFSET(other) \
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ppc64_decode_local_entry (((other) & STO_PPC64_LOCAL_MASK) \
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>> STO_PPC64_LOCAL_BIT)
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|
/* number of bytes to st_other. */
|
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|
|
#define PPC64_SET_LOCAL_ENTRY_OFFSET(val) \
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|
|
ppc64_encode_local_entry (val) << STO_PPC64_LOCAL_BIT
|
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|
2003-01-16 12:08:47 +08:00
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|
/* Specify the start of the .glink section. */
|
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|
|
#define DT_PPC64_GLINK DT_LOPROC
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|
/* Specify the start and size of the .opd section. */
|
|
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|
|
#define DT_PPC64_OPD (DT_LOPROC + 1)
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|
|
#define DT_PPC64_OPDSZ (DT_LOPROC + 2)
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|
2013-10-29 14:04:35 +08:00
|
|
|
/* Specify whether various optimisations are possible. */
|
|
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|
|
#define DT_PPC64_OPT (DT_LOPROC + 3)
|
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|
|
#define PPC64_OPT_TLS 1
|
|
|
|
|
#define PPC64_OPT_MULTI_TOC 2
|
include/elf/
* ppc.h (DT_PPC_TLSOPT): Define.
* ppc64.h (DT_PPC64_TLSOPT): Define.
bfd/
* elf32-ppc.c (TLS_GET_ADDR_GLINK_SIZE): Define.
(ADD_3_12_2, BEQLR, CMPWI_11_0, LWZ_11_3, LWZ_12_3): Define.
(MR_0_3, MR_3_0): Define.
(struct ppc_elf_link_hash_table): Add no_tls_get_addr_opt.
(ppc_elf_select_plt_layout): Save emit_stub_syms param earlier.
(ppc_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash
table. Check for presense of __tls_get_addr_opt
(allocate_dynrelocs): Increase glink entry size for __tls_get_addr.
(ppc_elf_size_dynamic_sections): Add DT_PPC_TLS_OPT tag.
(write_glink_stub): Add param p.
(ppc_elf_relocate_section): Adjust write_glink_stub call.
(ppc_elf_finish_dynamic_symbol): Emit special glink call stub for
__tls_get_addr.
* elf32-ppc.h (ppc_elf_tls_setup): Update prototype.
* elf64-ppc.c (struct ppc_link_hash_table): Add no_tls_get_addr_opt.
(ppc64_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash
table. Check for presense of __tls_get_addr_opt.
(ppc64_elf_size_dynamic_sections): Add DT_PPC64_TLS_OPT tag.
(LD_R11_0R3, LD_R12_0R3, MR_R0_R3, CMPDI_R11_0, ADD_R3_R12_R13,
BEQLR, MR_R3_R0, MFLR_R11, STD_R11_0R1, BCTRL, LD_R11_0R1,
LD_R2_0R1, MTLR_R11): Define.
(build_tls_get_addr_stub): New function.
(ppc_build_one_stub): Call it.
(ppc_size_one_stub): Add extra size for __tls_get_addr stub.
(ppc64_elf_relocate_section): Don't change nop to ld 2,40(1) for
__tls_get_addr plt call.
* elf64-ppc.h (ppc64_elf_tls_setup): Update prototype.
binutils/
* readelf.c (get_ppc_dynamic_type): Add TLSOPT.
(get_ppc64_dynamic_type): Likewise.
ld/
* emultempl/ppc32elf.em (no_tls_get_addr_opt): New var.
(ppc_before_allocation): Pass to ppc_elf_tls_setup.
(OPTION_NO_TLS_GET_ADDR_OPT): Define. Redefine other options in
terms of previous option.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add
--no-tls-get-addr-optimize.
(PARSE_AND_LIST_ARGS_CASES): Handle it.
* emultempl/ppc64elf.em (no_tls_get_addr_opt): New var.
(ppc_before_allocation): Pass to ppc64_elf_tls_setup.
(OPTION_NO_TLS_GET_ADDR_OPT): Define.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add
--no-tls-get-addr-optimize.
(PARSE_AND_LIST_ARGS_CASES): Handle it.
ld/testsuite/
* ld-powerpc/tlslib.s: Delete dot-symbol entry syms. Add
__tls_get_addr_opt.
* ld-powerpc/tlslib32.s: Add __tls_get_addr_opt.
* ld-powerpc/oldtlslib.s: New file, old-abi version of tlslib.s.
* ld-powerpc/powerpc.exp: Build old-abi library and use it in
two new link tests.
* ld-powerpc/tlsexe.d: Update for new __tls_get_addr stub.
* ld-powerpc/tlsexe.g, * ld-powerpc/tlsexe.r, *ld-powerpc/tlsexe32.d,
* ld-powerpc/tlsexe32.g, * ld-powerpc/tlsexe32.r,
* ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g,
* ld-powerpc/tlsexetoc.r: Likewise.
2009-09-21 19:51:02 +08:00
|
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|
2003-01-16 12:08:47 +08:00
|
|
|
#endif /* _ELF_PPC64_H */
|
