2003-08-30 00:41:31 +08:00
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# frv testcase for nsdiv $GRi,$GRj,$GRk
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2003-10-09 02:21:02 +08:00
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# mach: fr500 fr550 frv
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2003-08-30 00:41:31 +08:00
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.include "testutils.inc"
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start
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.global nsdiv
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nsdiv:
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set_spr_immed 0,gner0
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set_spr_immed 0,gner1
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; simple division 12 / 3
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set_gr_immed 3,gr3
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set_gr_immed 12,gr1
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nsdiv gr1,gr3,gr2
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test_gr_immed 4,gr2
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test_spr_immed 0,gner0
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test_spr_immed 0,gner1
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; Random example
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set_gr_limmed 0x0123,0x4567,gr3
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set_gr_limmed 0xfedc,0xba98,gr1
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nsdiv gr1,gr3,gr2
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test_gr_immed -1,gr2
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test_spr_immed 0,gner0
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test_spr_immed 0,gner1
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; Special case from the Arch Spec Vol 2
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or_spr_immed 0x20,isr ; turn on isr.edem
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set_gr_immed -1,gr3
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set_gr_limmed 0x8000,0x0000,gr1
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set_spr_immed 4,gner1 ; turn on NE bit for gr2
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nsdiv gr1,gr3,gr2 ; overflow is masked
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test_gr_limmed 0x7fff,0xffff,gr2
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test_spr_bits 0x4,2,1,isr ; isr.aexc is set
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test_spr_immed 0,gner0
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test_spr_immed 0,gner1
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nsdiv gr1,gr0,gr32 ; divide by zero
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test_spr_immed 1,gner0
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test_spr_immed 0,gner1
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and_spr_immed -33,isr ; turn off isr.edem
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set_gr_immed -1,gr3
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set_gr_limmed 0x8000,0x0000,gr1
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nsdiv gr1,gr3,gr2
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test_gr_limmed 0x8000,0x0000,gr2
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test_spr_immed 1,gner0
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test_spr_immed 4,gner1
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nsdiv gr1,gr0,gr10 ; divide by zero
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test_spr_immed 1,gner0
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test_spr_immed 0x00000404,gner1
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; simple division 12 / 3 -- should turn off ne flag
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set_gr_immed 3,gr3
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set_gr_immed 12,gr1
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nsdiv gr1,gr3,gr2
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test_gr_immed 4,gr2
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test_spr_immed 1,gner0
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test_spr_immed 0x00000400,gner1
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pass
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