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https://sourceware.org/git/binutils-gdb.git
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294 lines
3.9 KiB
Plaintext
294 lines
3.9 KiB
Plaintext
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# frv testcase for bcgelr $ICCi,$ccond,$hint
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# mach: all
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.include "testutils.inc"
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start
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.global bcgelr
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bcgelr:
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; ccond is true
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set_spr_immed 128,lcr
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set_spr_addr ok1,lr
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set_icc 0x0 0
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bcgelr icc0,0,0
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fail
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ok1:
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set_spr_addr ok2,lr
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set_icc 0x1 1
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bcgelr icc1,0,1
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fail
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ok2:
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set_spr_addr bad,lr
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set_icc 0x2 2
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bcgelr icc2,0,2
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set_spr_addr bad,lr
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set_icc 0x3 3
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bcgelr icc3,0,3
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set_spr_addr ok5,lr
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set_icc 0x4 0
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bcgelr icc0,0,0
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fail
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ok5:
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set_spr_addr ok6,lr
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set_icc 0x5 1
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bcgelr icc1,0,1
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fail
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ok6:
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set_spr_addr bad,lr
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set_icc 0x6 2
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bcgelr icc2,0,2
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set_spr_addr bad,lr
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set_icc 0x7 3
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bcgelr icc3,0,3
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set_spr_addr bad,lr
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set_icc 0x8 0
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bcgelr icc0,0,0
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set_spr_addr bad,lr
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set_icc 0x9 1
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bcgelr icc1,0,1
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set_spr_addr okb,lr
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set_icc 0xa 2
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bcgelr icc2,0,2
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fail
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okb:
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set_spr_addr okc,lr
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set_icc 0xb 3
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bcgelr icc3,0,3
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fail
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okc:
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set_spr_addr bad,lr
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set_icc 0xc 0
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bcgelr icc0,0,0
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set_spr_addr bad,lr
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set_icc 0xd 1
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bcgelr icc1,0,1
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set_spr_addr okf,lr
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set_icc 0xe 2
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bcgelr icc2,0,2
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fail
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okf:
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set_spr_addr okg,lr
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set_icc 0xf 3
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bcgelr icc3,0,3
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fail
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okg:
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; ccond is true
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set_spr_immed 1,lcr
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set_spr_addr okh,lr
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set_icc 0x0 0
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bcgelr icc0,1,0
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fail
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okh:
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set_spr_immed 1,lcr
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set_spr_addr oki,lr
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set_icc 0x1 1
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bcgelr icc1,1,1
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fail
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oki:
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0x2 2
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bcgelr icc2,1,2
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0x3 3
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bcgelr icc3,1,3
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set_spr_immed 1,lcr
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set_spr_addr okl,lr
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set_icc 0x4 0
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bcgelr icc0,1,0
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fail
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okl:
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set_spr_immed 1,lcr
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set_spr_addr okm,lr
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set_icc 0x5 1
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bcgelr icc1,1,1
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fail
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okm:
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0x6 2
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bcgelr icc2,1,2
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0x7 3
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bcgelr icc3,1,3
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0x8 0
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bcgelr icc0,1,0
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0x9 1
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bcgelr icc1,1,1
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set_spr_immed 1,lcr
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set_spr_addr okr,lr
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set_icc 0xa 2
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bcgelr icc2,1,2
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fail
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okr:
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set_spr_immed 1,lcr
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set_spr_addr oks,lr
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set_icc 0xb 3
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bcgelr icc3,1,3
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fail
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oks:
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0xc 0
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bcgelr icc0,1,0
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0xd 1
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bcgelr icc1,1,1
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set_spr_immed 1,lcr
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set_spr_addr okv,lr
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set_icc 0xe 2
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bcgelr icc2,1,2
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fail
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okv:
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set_spr_immed 1,lcr
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set_spr_addr okw,lr
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set_icc 0xf 3
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bcgelr icc3,1,3
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fail
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okw:
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; ccond is false
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set_spr_immed 128,lcr
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set_spr_addr bad,lr
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set_icc 0x0 0
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bcgelr icc0,1,0
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set_icc 0x1 1
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bcgelr icc1,1,1
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set_icc 0x2 2
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bcgelr icc2,1,2
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set_icc 0x3 3
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bcgelr icc3,1,3
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set_icc 0x4 0
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bcgelr icc0,1,0
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set_icc 0x5 1
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bcgelr icc1,1,1
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set_icc 0x6 2
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bcgelr icc2,1,2
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set_icc 0x7 3
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bcgelr icc3,1,3
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set_icc 0x8 0
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bcgelr icc0,1,0
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set_icc 0x9 1
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bcgelr icc1,1,1
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set_icc 0xa 2
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bcgelr icc2,1,2
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set_icc 0xb 3
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bcgelr icc3,1,3
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set_icc 0xc 0
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bcgelr icc0,1,0
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set_icc 0xd 1
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bcgelr icc1,1,1
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set_icc 0xe 2
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bcgelr icc2,1,2
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set_icc 0xf 3
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bcgelr icc3,1,3
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; ccond is false
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set_spr_immed 1,lcr
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set_spr_addr bad,lr
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set_icc 0x0 0
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bcgelr icc0,0,0
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set_spr_immed 1,lcr
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set_icc 0x1 1
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bcgelr icc1,0,1
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set_spr_immed 1,lcr
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set_icc 0x2 2
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bcgelr icc2,0,2
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set_spr_immed 1,lcr
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set_icc 0x3 3
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bcgelr icc3,0,3
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set_spr_immed 1,lcr
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set_icc 0x4 0
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bcgelr icc0,0,0
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set_spr_immed 1,lcr
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set_icc 0x5 1
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bcgelr icc1,0,1
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set_spr_immed 1,lcr
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set_icc 0x6 2
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bcgelr icc2,0,2
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set_spr_immed 1,lcr
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set_icc 0x7 3
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bcgelr icc3,0,3
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set_spr_immed 1,lcr
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set_icc 0x8 0
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bcgelr icc0,0,0
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set_spr_immed 1,lcr
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set_icc 0x9 1
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bcgelr icc1,0,1
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set_spr_immed 1,lcr
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set_icc 0xa 2
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bcgelr icc2,0,2
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set_spr_immed 1,lcr
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set_icc 0xb 3
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bcgelr icc3,0,3
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set_spr_immed 1,lcr
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set_icc 0xc 0
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bcgelr icc0,0,0
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set_spr_immed 1,lcr
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set_icc 0xd 1
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bcgelr icc1,0,1
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set_spr_immed 1,lcr
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set_icc 0xe 2
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bcgelr icc2,0,2
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set_spr_immed 1,lcr
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set_icc 0xf 3
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bcgelr icc3,0,3
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pass
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bad:
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fail
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