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108 lines
1.8 KiB
ArmAsm
108 lines
1.8 KiB
ArmAsm
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//Original:/testcases/core/c_regmv_dr_pr/c_regmv_dr_pr.dsp
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// Spec Reference: regmv dreg-to-preg
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# mach: bfin
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.include "testutils.inc"
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start
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// check R-reg to R-reg move
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imm32 r0, 0x20001001;
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imm32 r1, 0x20021003;
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imm32 r2, 0x20041005;
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imm32 r3, 0x20061007;
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imm32 r4, 0x20081009;
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imm32 r5, 0x200a100b;
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imm32 r6, 0x200c100d;
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imm32 r7, 0x200e100f;
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P1 = R0;
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P2 = R0;
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P4 = R0;
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P5 = R0;
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FP = R0;
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CHECKREG p1, 0x20001001;
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CHECKREG p2, 0x20001001;
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CHECKREG p4, 0x20001001;
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CHECKREG p5, 0x20001001;
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CHECKREG fp, 0x20001001;
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P1 = R1;
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P2 = R1;
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P4 = R1;
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P5 = R1;
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FP = R1;
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CHECKREG p1, 0x20021003;
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CHECKREG p2, 0x20021003;
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CHECKREG p4, 0x20021003;
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CHECKREG p5, 0x20021003;
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CHECKREG fp, 0x20021003;
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P1 = R2;
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P2 = R2;
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P4 = R2;
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P5 = R2;
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FP = R2;
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CHECKREG p1, 0x20041005;
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CHECKREG p2, 0x20041005;
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CHECKREG p4, 0x20041005;
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CHECKREG p5, 0x20041005;
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CHECKREG fp, 0x20041005;
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P1 = R3;
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P2 = R3;
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P4 = R3;
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P5 = R3;
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FP = R3;
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CHECKREG p1, 0x20061007;
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CHECKREG p2, 0x20061007;
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CHECKREG p4, 0x20061007;
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CHECKREG p5, 0x20061007;
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CHECKREG fp, 0x20061007;
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P1 = R4;
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P2 = R4;
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P4 = R4;
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P5 = R4;
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FP = R4;
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CHECKREG p1, 0x20081009;
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CHECKREG p2, 0x20081009;
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CHECKREG p4, 0x20081009;
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CHECKREG p5, 0x20081009;
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CHECKREG fp, 0x20081009;
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P1 = R5;
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P2 = R5;
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P4 = R5;
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P5 = R5;
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FP = R5;
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CHECKREG p1, 0x200a100b;
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CHECKREG p2, 0x200a100b;
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CHECKREG p4, 0x200a100b;
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CHECKREG p5, 0x200a100b;
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CHECKREG fp, 0x200a100b;
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P1 = R6;
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P2 = R6;
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P4 = R6;
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P5 = R6;
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FP = R6;
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CHECKREG p1, 0x200c100d;
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CHECKREG p2, 0x200c100d;
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CHECKREG p4, 0x200c100d;
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CHECKREG p5, 0x200c100d;
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CHECKREG fp, 0x200c100d;
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P1 = R7;
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P2 = R7;
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P4 = R7;
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P5 = R7;
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FP = R7;
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CHECKREG p1, 0x200e100f;
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CHECKREG p2, 0x200e100f;
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CHECKREG p4, 0x200e100f;
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CHECKREG p5, 0x200e100f;
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CHECKREG fp, 0x200e100f;
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End:
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pass
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