mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2025-01-06 12:09:26 +08:00
356 lines
6.1 KiB
ArmAsm
356 lines
6.1 KiB
ArmAsm
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//Original:testcases/core/c_dspldst_st_drhi_ipp/c_dspldst_st_drhi_ipp.dsp
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// Spec Reference: c_dspldst st_drhi_ipp
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# mach: bfin
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.include "testutils.inc"
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start
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// set all regs
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INIT_I_REGS -1;
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init_b_regs 0;
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init_l_regs 0;
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init_m_regs -1;
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// Half reg 16 bit mem store
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imm32 r0, 0x0a123456;
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imm32 r1, 0x11b12345;
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imm32 r2, 0x222c1234;
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imm32 r3, 0x3344d012;
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imm32 r4, 0x5566e012;
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imm32 r5, 0x789abf01;
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imm32 r6, 0xabcd0123;
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imm32 r7, 0x01234567;
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// initial values
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loadsym i0, DATA_ADDR_3;
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loadsym i1, DATA_ADDR_4;
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loadsym i2, DATA_ADDR_5;
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loadsym i3, DATA_ADDR_6;
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W [ I0 ++ ] = R0.H;
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W [ I1 ++ ] = R1.H;
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W [ I2 ++ ] = R2.H;
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W [ I3 ++ ] = R3.H;
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W [ I0 ++ ] = R1.H;
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W [ I1 ++ ] = R2.H;
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W [ I2 ++ ] = R3.H;
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W [ I3 ++ ] = R4.H;
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W [ I0 ++ ] = R3.H;
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W [ I1 ++ ] = R4.H;
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W [ I2 ++ ] = R5.H;
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W [ I3 ++ ] = R6.H;
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W [ I0 ++ ] = R4.H;
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W [ I1 ++ ] = R5.H;
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W [ I2 ++ ] = R6.H;
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W [ I3 ++ ] = R7.H;
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loadsym i0, DATA_ADDR_3;
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loadsym i1, DATA_ADDR_4;
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loadsym i2, DATA_ADDR_5;
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loadsym i3, DATA_ADDR_6;
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R0 = [ I0 ++ ];
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R1 = [ I1 ++ ];
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R2 = [ I2 ++ ];
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R3 = [ I3 ++ ];
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R4 = [ I0 ++ ];
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R5 = [ I1 ++ ];
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R6 = [ I2 ++ ];
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R7 = [ I3 ++ ];
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CHECKREG r0, 0x11B10A12;
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CHECKREG r1, 0x222C11B1;
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CHECKREG r2, 0x3344222C;
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CHECKREG r3, 0x55663344;
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CHECKREG r4, 0x55663344;
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CHECKREG r5, 0x789A5566;
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CHECKREG r6, 0xABCD789A;
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CHECKREG r7, 0x0123ABCD;
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R0 = [ I0 ++ ];
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R1 = [ I1 ++ ];
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R2 = [ I2 ++ ];
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R3 = [ I3 ++ ];
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R4 = [ I0 ++ ];
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R5 = [ I1 ++ ];
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R6 = [ I2 ++ ];
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R7 = [ I3 ++ ];
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CHECKREG r0, 0x08090A0B;
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CHECKREG r1, 0x28292A2B;
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CHECKREG r2, 0x48494A4B;
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CHECKREG r3, 0x68696A6B;
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CHECKREG r4, 0x0C0D0E0F;
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CHECKREG r5, 0x2C2D2E2F;
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CHECKREG r6, 0x4C4D4E4F;
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CHECKREG r7, 0x6C6D6E6F;
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// initial values
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imm32 r0, 0x01b2c3d4;
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imm32 r1, 0x10145618;
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imm32 r2, 0xa2016729;
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imm32 r3, 0xbb30183a;
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imm32 r4, 0xdec4014b;
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imm32 r5, 0x5f7d501c;
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imm32 r6, 0x3089eb01;
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imm32 r7, 0x719abf70;
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loadsym i0, DATA_ADDR_3, 0x20;
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loadsym i1, DATA_ADDR_4, 0x20;
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loadsym i2, DATA_ADDR_5, 0x20;
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loadsym i3, DATA_ADDR_6, 0x20;
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W [ I0 -- ] = R0.H;
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W [ I1 -- ] = R1.H;
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W [ I2 -- ] = R2.H;
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W [ I3 -- ] = R3.H;
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W [ I0 -- ] = R1.H;
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W [ I1 -- ] = R2.H;
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W [ I2 -- ] = R3.H;
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W [ I3 -- ] = R4.H;
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W [ I0 -- ] = R3.H;
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W [ I1 -- ] = R4.H;
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W [ I2 -- ] = R5.H;
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W [ I3 -- ] = R6.H;
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W [ I0 -- ] = R4.H;
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W [ I1 -- ] = R5.H;
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W [ I2 -- ] = R6.H;
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W [ I3 -- ] = R7.H;
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loadsym i0, DATA_ADDR_3, 0x20;
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loadsym i1, DATA_ADDR_4, 0x20;
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loadsym i2, DATA_ADDR_5, 0x20;
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loadsym i3, DATA_ADDR_6, 0x20;
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R0 = [ I0 -- ];
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R1 = [ I1 -- ];
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R2 = [ I2 -- ];
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R3 = [ I3 -- ];
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R4 = [ I0 -- ];
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R5 = [ I1 -- ];
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R6 = [ I2 -- ];
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R7 = [ I3 -- ];
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CHECKREG r0, 0x000001B2;
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CHECKREG r1, 0x00001014;
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CHECKREG r2, 0x0000A201;
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CHECKREG r3, 0x0000BB30;
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CHECKREG r4, 0x1014BB30;
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CHECKREG r5, 0xA201DEC4;
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CHECKREG r6, 0xBB305F7D;
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CHECKREG r7, 0xDEC43089;
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R0 = [ I0 -- ];
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R1 = [ I1 -- ];
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R2 = [ I2 -- ];
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R3 = [ I3 -- ];
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R4 = [ I0 -- ];
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R5 = [ I1 -- ];
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R6 = [ I2 -- ];
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R7 = [ I3 -- ];
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CHECKREG r0, 0xDEC41A1B;
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CHECKREG r1, 0x5F7D3A3B;
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CHECKREG r2, 0x30895A5B;
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CHECKREG r3, 0x719A7A7B;
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CHECKREG r4, 0x14151617;
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CHECKREG r5, 0x34353637;
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CHECKREG r6, 0x54555657;
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CHECKREG r7, 0x74757677;
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pass
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// Pre-load memory with known data
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// More data is defined than will actually be used
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.data
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DATA_ADDR_3:
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.dd 0x00010203
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.dd 0x04050607
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.dd 0x08090A0B
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.dd 0x0C0D0E0F
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.dd 0x10111213
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.dd 0x14151617
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.dd 0x18191A1B
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.dd 0x1C1D1E1F
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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DATA_ADDR_4:
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.dd 0x20212223
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.dd 0x24252627
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.dd 0x28292A2B
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.dd 0x2C2D2E2F
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.dd 0x30313233
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.dd 0x34353637
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.dd 0x38393A3B
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.dd 0x3C3D3E3F
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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DATA_ADDR_5:
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.dd 0x40414243
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.dd 0x44454647
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.dd 0x48494A4B
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.dd 0x4C4D4E4F
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.dd 0x50515253
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.dd 0x54555657
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.dd 0x58595A5B
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.dd 0x5C5D5E5F
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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DATA_ADDR_6:
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.dd 0x60616263
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.dd 0x64656667
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.dd 0x68696A6B
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.dd 0x6C6D6E6F
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.dd 0x70717273
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.dd 0x74757677
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.dd 0x78797A7B
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.dd 0x7C7D7E7F
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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DATA_ADDR_7:
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.dd 0x80818283
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.dd 0x84858687
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.dd 0x88898A8B
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.dd 0x8C8D8E8F
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.dd 0x90919293
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.dd 0x94959697
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.dd 0x98999A9B
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.dd 0x9C9D9E9F
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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.dd 0x00000000
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DATA_ADDR_8:
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.dd 0xA0A1A2A3
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.dd 0xA4A5A6A7
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.dd 0xA8A9AAAB
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.dd 0xACADAEAF
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.dd 0xB0B1B2B3
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.dd 0xB4B5B6B7
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.dd 0xB8B9BABB
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.dd 0xBCBDBEBF
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.dd 0xC0C1C2C3
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.dd 0xC4C5C6C7
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.dd 0xC8C9CACB
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.dd 0xCCCDCECF
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.dd 0xD0D1D2D3
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.dd 0xD4D5D6D7
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.dd 0xD8D9DADB
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.dd 0xDCDDDEDF
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.dd 0xE0E1E2E3
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.dd 0xE4E5E6E7
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.dd 0xE8E9EAEB
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.dd 0xECEDEEEF
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.dd 0xF0F1F2F3
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.dd 0xF4F5F6F7
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.dd 0xF8F9FAFB
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.dd 0xFCFDFEFF
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