mirror of
https://sourceware.org/git/binutils-gdb.git
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213 lines
4.7 KiB
ArmAsm
213 lines
4.7 KiB
ArmAsm
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//Original:/testcases/core/c_dsp32mult_dr_m_u/c_dsp32mult_dr_m_u.dsp
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// Spec Reference: dsp32mult single dr munop u
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# mach: bfin
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.include "testutils.inc"
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start
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imm32 r0, 0xfb235625;
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imm32 r1, 0x9fba5127;
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imm32 r2, 0xa3ff6725;
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imm32 r3, 0x0006f027;
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imm32 r4, 0xb0abcd29;
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imm32 r5, 0x1facef2b;
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imm32 r6, 0xc0fc002d;
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imm32 r7, 0xd24f702f;
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R4.L = R0.H * R0.L (FU);
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R5.H = R0.L * R1.L (FU);
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R6.L = R1.L * R0.H (FU);
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R7.L = R1.L * R1.L (FU);
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R0.H = R0.L * R0.L (FU);
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R1.L = R0.L * R1.L (FU);
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R2.L = R1.H * R0.L (FU);
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R3.H = R1.L * R1.L (FU);
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CHECKREG r0, 0x1CFD5625;
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CHECKREG r1, 0x9FBA1B4F;
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CHECKREG r2, 0xA3FF35C0;
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CHECKREG r3, 0x02EAF027;
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CHECKREG r4, 0xB0AB5482;
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CHECKREG r5, 0x1B4FEF2B;
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CHECKREG r6, 0xC0FC4F9C;
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CHECKREG r7, 0xD24F19BA;
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imm32 r0, 0xbb23a635;
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imm32 r1, 0x6bba5137;
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imm32 r2, 0x13b4b7e5;
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imm32 r3, 0x9e0b0037;
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imm32 r4, 0x80ebbd39;
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imm32 r5, 0xb0aeef3b;
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imm32 r6, 0xa00ceb3d;
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imm32 r7, 0x12467eb3;
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R4.H = R2.L * R2.L (FU);
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R5.L = R2.L * R3.H (FU);
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R6.L = R3.H * R2.L (FU);
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R7.H = R3.L * R3.L (FU);
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R2.H = R2.L * R2.H (FU);
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R3.L = R2.H * R3.H (FU);
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R0.H = R3.L * R2.L (FU);
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R1.L = R3.L * R3.L (FU);
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CHECKREG r0, 0x0647A635;
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CHECKREG r1, 0x6BBA004C;
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CHECKREG r2, 0x0E27B7E5;
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CHECKREG r3, 0x9E0B08BD;
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CHECKREG r4, 0x8419BD39;
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CHECKREG r5, 0xB0AE7187;
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CHECKREG r6, 0xA00C7187;
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CHECKREG r7, 0x00007EB3;
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imm32 r0, 0xbd235655;
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imm32 r1, 0xc4dd5157;
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imm32 r2, 0x6b24d755;
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imm32 r3, 0x00b60055;
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imm32 r4, 0x90dbc509;
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imm32 r5, 0x10adbf5b;
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imm32 r6, 0xb00cdb5d;
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imm32 r7, 0x12467dbf;
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R0.L = R4.L * R4.H (FU);
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R1.H = R4.H * R5.L (FU);
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R2.L = R5.H * R4.L (FU);
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R3.L = R5.L * R5.L (FU);
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R4.H = R4.L * R4.H (FU);
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R5.L = R4.L * R5.H (FU);
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R6.H = R5.H * R4.H (FU);
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R7.L = R5.H * R5.H (FU);
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CHECKREG r0, 0xBD236F7E;
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CHECKREG r1, 0x6C475157;
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CHECKREG r2, 0x6B240CD6;
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CHECKREG r3, 0x00B68F09;
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CHECKREG r4, 0x6F7EC509;
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CHECKREG r5, 0x10AD0CD6;
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CHECKREG r6, 0x0743DB5D;
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CHECKREG r7, 0x12460116;
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imm32 r0, 0xcb235666;
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imm32 r1, 0xefba5166;
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imm32 r2, 0x1c248766;
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imm32 r3, 0xf0060066;
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imm32 r4, 0x90cb9d69;
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imm32 r5, 0x10acef6b;
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imm32 r6, 0x800cc06d;
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imm32 r7, 0x12467c6f;
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// test the unsigned U=1
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R0.L = R6.L * R6.L (FU);
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R1.H = R6.H * R7.L (FU);
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R2.L = R7.L * R6.L (FU);
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R3.L = R7.L * R7.L (FU);
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R6.L = R6.L * R6.L (FU);
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R7.L = R6.L * R7.L (FU);
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R4.L = R7.L * R6.L (FU);
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R5.L = R7.L * R7.L (FU);
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CHECKREG r0, 0xCB2390A4;
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CHECKREG r1, 0x3E3D5166;
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CHECKREG r2, 0x1C245D88;
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CHECKREG r3, 0xF0063C7C;
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CHECKREG r4, 0x90CB27B9;
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CHECKREG r5, 0x10AC134F;
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CHECKREG r6, 0x800C90A4;
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CHECKREG r7, 0x1246464E;
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// mix order
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imm32 r0, 0x8b23a675;
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imm32 r1, 0xc8ba5127;
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imm32 r2, 0x13846705;
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imm32 r3, 0xe0088807;
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imm32 r4, 0x9eabcd09;
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imm32 r5, 0x10ecdfdb;
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imm32 r6, 0x000e008d;
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imm32 r7, 0x1246e008;
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R0.H = R0.L * R7.H (FU);
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R1.L = R1.H * R6.H (FU);
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R2.L = R2.L * R5.L (FU);
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R3.H = R3.H * R4.H (FU);
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R4.L = R4.L * R3.H (FU);
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R5.L = R5.H * R2.H (FU);
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R6.H = R6.H * R1.L (FU);
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R7.L = R7.L * R0.H (FU);
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CHECKREG r0, 0x0BE2A675;
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CHECKREG r1, 0xC8BA000B;
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CHECKREG r2, 0x13845A15;
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CHECKREG r3, 0x8ADB8807;
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CHECKREG r4, 0x9EAB6F36;
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CHECKREG r5, 0x10EC014A;
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CHECKREG r6, 0x0000008D;
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CHECKREG r7, 0x12460A66;
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imm32 r0, 0x9b235a75;
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imm32 r1, 0x7fba5127;
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imm32 r2, 0x97246905;
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imm32 r3, 0x09777007;
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imm32 r4, 0x909bc779;
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imm32 r5, 0x10a9e9d7;
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imm32 r6, 0x000c9d0d;
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imm32 r7, 0x1246790f;
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R0.L = R7.L * R0.H (FU);
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R1.L = R6.L * R1.L (FU);
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R2.H = R5.L * R2.L (FU);
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R3.L = R4.H * R3.L (FU);
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R4.L = R3.H * R4.H (FU);
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R5.H = R2.H * R5.L (FU);
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R6.L = R1.H * R6.L (FU);
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R7.L = R0.L * R7.L (FU);
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CHECKREG r0, 0x9B23495D;
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CHECKREG r1, 0x7FBA31C9;
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CHECKREG r2, 0x5FEE6905;
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CHECKREG r3, 0x09773F48;
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CHECKREG r4, 0x909B0559;
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CHECKREG r5, 0x57A0E9D7;
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CHECKREG r6, 0x000C4E5C;
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CHECKREG r7, 0x124622B1;
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imm32 r0, 0xa9235675;
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imm32 r1, 0xc8ba5127;
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imm32 r2, 0x13246705;
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imm32 r3, 0x08060007;
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imm32 r4, 0x908bcd09;
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imm32 r5, 0x10a88fdb;
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imm32 r6, 0x000c080d;
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imm32 r7, 0x1246708f;
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R2.L = R0.L * R6.L (FU);
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R3.L = R1.H * R7.H (FU);
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R0.H = R2.L * R0.L, R0.L = R2.H * R0.L (FU);
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R1.H = R3.L * R4.L (FU);
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R4.L = R1.H * R2.L (FU);
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R5.L = R5.L * R3.L (FU);
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R6.L = R6.L * R4.L (FU);
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R7.H = R7.H * R5.L (FU);
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CHECKREG r0, 0x00EB0677;
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CHECKREG r1, 0x0B7A5127;
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CHECKREG r2, 0x132402B8;
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CHECKREG r3, 0x08060E54;
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CHECKREG r4, 0x908B001F;
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CHECKREG r5, 0x10A8080D;
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CHECKREG r6, 0x000C0001;
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CHECKREG r7, 0x0093708F;
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imm32 r0, 0x7b235675;
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imm32 r1, 0xcfba5127;
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imm32 r2, 0x17246705;
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imm32 r3, 0x00760007;
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imm32 r4, 0x907bcd09;
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imm32 r5, 0x10a7efdb;
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imm32 r6, 0x000c700d;
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imm32 r7, 0x1246770f;
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R4.L = R5.L * R2.L (FU);
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R6.L = R6.L * R3.H (FU);
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R0.H = R7.L * R4.H (FU);
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R1.L = R0.H * R5.L (FU);
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R2.L = R1.L * R6.L (FU);
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R5.L = R2.L * R7.H (FU);
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R3.H = R3.H * R0.L (FU);
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R7.L = R4.H * R1.H (FU);
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CHECKREG r0, 0x43325675;
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CHECKREG r1, 0xCFBA3EF5;
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CHECKREG r2, 0x1724000D;
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CHECKREG r3, 0x00280007;
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CHECKREG r4, 0x907B6086;
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CHECKREG r5, 0x10A70001;
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CHECKREG r6, 0x000C0034;
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CHECKREG r7, 0x1246753C;
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pass
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