mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2025-01-06 12:09:26 +08:00
244 lines
6.0 KiB
ArmAsm
244 lines
6.0 KiB
ArmAsm
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//Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1_u/c_dsp32mac_pair_a1_u.dsp
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// Spec Reference: dsp32mac pair a1 U
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# mach: bfin
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.include "testutils.inc"
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start
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A1 = A0 = 0;
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// The result accumulated in A1 , and stored to a reg half
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imm32 r0, 0x93545abd;
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imm32 r1, 0x89bcfec7;
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imm32 r2, 0xa8945679;
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imm32 r3, 0x00890007;
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imm32 r4, 0xefb89569;
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imm32 r5, 0x1235890b;
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imm32 r6, 0x000c089d;
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imm32 r7, 0x678e0089;
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R7 = ( A1 += R1.L * R0.L ), A0 = R1.L * R0.L (FU);
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P1 = A1.w;
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R1 = ( A1 = R2.L * R3.L ), A0 = R2.H * R3.L (FU);
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P2 = A1.w;
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R3 = ( A1 = R7.L * R4.L ), A0 += R7.H * R4.H (FU);
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P3 = A1.w;
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R5 = ( A1 += R6.L * R5.L ), A0 += R6.L * R5.H (FU);
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P4 = A1.w;
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CHECKREG r0, 0x93545ABD;
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CHECKREG r1, 0x00025D4F;
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CHECKREG r2, 0xA8945679;
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CHECKREG r3, 0x08B4E563;
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CHECKREG r4, 0xEFB89569;
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CHECKREG r5, 0x0D514922;
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CHECKREG r6, 0x000C089D;
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CHECKREG r7, 0x5A4E0EEB;
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CHECKREG p1, 0x5A4E0EEB;
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CHECKREG p2, 0x00025D4F;
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CHECKREG p3, 0x08B4E563;
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CHECKREG p4, 0x0D514922;
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imm32 r0, 0x98464abd;
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imm32 r1, 0xa1b5f4c7;
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imm32 r2, 0xa1146649;
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imm32 r3, 0x00010805;
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imm32 r4, 0xefbc1599;
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imm32 r5, 0x12350100;
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imm32 r6, 0x200c001d;
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imm32 r7, 0x628e0001;
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R5 = ( A1 += R1.L * R0.H ), A0 = R1.L * R0.L (FU);
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P1 = A1.w;
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R1 = ( A1 = R2.L * R3.H ), A0 = R2.H * R3.L (FU);
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P2 = A1.w;
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R3 = ( A1 = R4.L * R5.H ), A0 += R4.H * R5.H (FU);
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P3 = A1.w;
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R1 = ( A1 += R6.L * R7.H ), A0 += R6.L * R7.H (FU);
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P4 = A1.w;
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CHECKREG r0, 0x98464ABD;
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CHECKREG r1, 0x0D7355F0;
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CHECKREG r2, 0xA1146649;
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CHECKREG r3, 0x0D682BDA;
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CHECKREG r4, 0xEFBC1599;
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CHECKREG r5, 0x9EEA5F8C;
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CHECKREG r6, 0x200C001D;
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CHECKREG r7, 0x628E0001;
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CHECKREG p1, 0x9EEA5F8C;
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CHECKREG p2, 0x00006649;
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CHECKREG p3, 0x0D682BDA;
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CHECKREG p4, 0x0D7355F0;
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imm32 r0, 0x713a459d;
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imm32 r1, 0xabd6aec7;
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imm32 r2, 0x7a145a79;
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imm32 r3, 0x08a100a7;
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imm32 r4, 0xef9a156a;
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imm32 r5, 0x1225a10b;
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imm32 r6, 0x0003401d;
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imm32 r7, 0x678e0a61;
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R5 = ( A1 += R7.H * R3.L ), A0 = R7.L * R3.L (FU);
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P1 = A1.w;
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R7 = ( A1 = R2.H * R4.L ), A0 -= R2.H * R4.L (FU);
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P2 = A1.w;
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R1 = ( A1 -= R0.H * R5.L ), A0 += R0.H * R5.H (FU);
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P3 = A1.w;
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R5 = ( A1 += R6.H * R1.L ), A0 += R6.L * R1.H (FU);
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P4 = A1.w;
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CHECKREG r0, 0x713A459D;
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CHECKREG r1, 0x00000000;
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CHECKREG r2, 0x7A145A79;
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CHECKREG r3, 0x08A100A7;
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CHECKREG r4, 0xEF9A156A;
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CHECKREG r5, 0x00000000;
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CHECKREG r6, 0x0003401D;
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CHECKREG r7, 0x0A363048;
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CHECKREG p1, 0x0DB6E392;
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CHECKREG p2, 0x0A363048;
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CHECKREG p3, 0x00000000;
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CHECKREG p4, 0x00000000;
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imm32 r0, 0x773489bd;
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imm32 r1, 0x917cfec7;
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imm32 r2, 0xa9177679;
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imm32 r3, 0xd0910777;
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imm32 r4, 0xedb91579;
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imm32 r5, 0xd235910b;
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imm32 r6, 0x0d077999;
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imm32 r7, 0x677e0709;
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R1 = ( A1 += R5.H * R3.H ), A0 -= R5.L * R3.L (FU);
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P1 = A1.w;
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R3 = ( A1 = R2.H * R1.H ), A0 -= R2.H * R1.L (FU);
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P2 = A1.w;
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R5 = ( A1 = R7.H * R0.H ), A0 += R7.H * R0.H (FU);
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P3 = A1.w;
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R7 = ( A1 += R4.H * R6.H ), A0 += R4.L * R6.H (FU);
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P4 = A1.w;
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CHECKREG r0, 0x773489BD;
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CHECKREG r1, 0xAB422005;
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CHECKREG r2, 0xA9177679;
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CHECKREG r3, 0x711DF4EE;
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CHECKREG r4, 0xEDB91579;
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CHECKREG r5, 0x30309798;
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CHECKREG r6, 0x0D077999;
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CHECKREG r7, 0x3C497CA7;
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CHECKREG p1, 0xAB422005;
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CHECKREG p2, 0x711DF4EE;
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CHECKREG p3, 0x30309798;
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CHECKREG p4, 0x3C497CA7;
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imm32 r0, 0x83547abd;
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imm32 r1, 0x88bc8ec7;
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imm32 r2, 0xa8895679;
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imm32 r3, 0x00080007;
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imm32 r4, 0xe6b86569;
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imm32 r5, 0x1A35860b;
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imm32 r6, 0x000c896d;
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imm32 r7, 0x67Be0096;
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R7 = ( A1 += R1.L * R0.L ) (FU);
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P1 = A1.w;
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R1 = ( A1 = R2.H * R3.L ) (FU);
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P2 = A1.w;
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R3 = ( A1 -= R7.L * R4.H ) (FU);
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P3 = A1.w;
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R5 = ( A1 += R6.H * R5.H ) (FU);
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P4 = A1.w;
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CHECKREG r0, 0x83547ABD;
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CHECKREG r1, 0x00049BBF;
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CHECKREG r2, 0xA8895679;
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CHECKREG r3, 0x00000000;
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CHECKREG r4, 0xE6B86569;
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CHECKREG r5, 0x00013A7C;
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CHECKREG r6, 0x000C896D;
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CHECKREG r7, 0x80BDBB92;
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CHECKREG p1, 0x80BDBB92;
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CHECKREG p2, 0x00049BBF;
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CHECKREG p3, 0x00000000;
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CHECKREG p4, 0x00013A7C;
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imm32 r0, 0x9aa64abd;
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imm32 r1, 0xa1baf4c7;
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imm32 r2, 0xb114a649;
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imm32 r3, 0x0b010005;
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imm32 r4, 0xefbcdb69;
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imm32 r5, 0x123501bb;
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imm32 r6, 0x000c0d1b;
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imm32 r7, 0x678e0d01;
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R5 = ( A1 += R5.L * R0.H ) (M), A0 = R5.L * R0.L (FU);
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P1 = A1.w;
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R1 = ( A1 = R1.L * R3.H ) (M), A0 = R1.H * R3.L (FU);
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P2 = A1.w;
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R3 = ( A1 -= R2.L * R6.H ) (M), A0 += R2.H * R6.H (FU);
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P3 = A1.w;
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R1 = ( A1 += R4.L * R7.H ) (M), A0 += R4.L * R7.H (FU);
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P4 = A1.w;
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CHECKREG r0, 0x9AA64ABD;
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CHECKREG r1, 0xF0BBA999;
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CHECKREG r2, 0xB114A649;
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CHECKREG r3, 0xFF88B65B;
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CHECKREG r4, 0xEFBCDB69;
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CHECKREG r5, 0x010CD7BE;
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CHECKREG r6, 0x000C0D1B;
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CHECKREG r7, 0x678E0D01;
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CHECKREG p1, 0x010CD7BE;
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CHECKREG p2, 0xFF8481C7;
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CHECKREG p3, 0xFF88B65B;
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CHECKREG p4, 0xF0BBA999;
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imm32 r0, 0xd136459d;
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imm32 r1, 0xabd69ec7;
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imm32 r2, 0x71145679;
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imm32 r3, 0xdd010007;
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imm32 r4, 0xeddc1569;
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imm32 r5, 0x122d010b;
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imm32 r6, 0x00e3d01d;
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imm32 r7, 0x678e0d61;
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R5 = A1 , A0 = R1.L * R0.L (FU);
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P1 = A1.w;
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R7 = A1 , A0 = R2.H * R3.L (FU);
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P2 = A1.w;
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R1 = A1 , A0 += R4.H * R5.H (FU);
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P3 = A1.w;
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R5 = A1 , A0 += R6.L * R7.H (FU);
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P4 = A1.w;
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CHECKREG r0, 0xD136459D;
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CHECKREG r1, 0xFFFFFFFF;
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CHECKREG r2, 0x71145679;
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CHECKREG r3, 0xDD010007;
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CHECKREG r4, 0xEDDC1569;
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CHECKREG r5, 0xFFFFFFFF;
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CHECKREG r6, 0x00E3D01D;
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CHECKREG r7, 0xFFFFFFFF;
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CHECKREG p1, 0xF0BBA999;
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CHECKREG p2, 0xF0BBA999;
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CHECKREG p3, 0xF0BBA999;
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CHECKREG p4, 0xF0BBA999;
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imm32 r0, 0x125489bd;
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imm32 r1, 0x91b5fec7;
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imm32 r2, 0xa9145679;
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imm32 r3, 0xd0910507;
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imm32 r4, 0x34567859;
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imm32 r5, 0xd2359105;
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imm32 r6, 0x0d0c0999;
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imm32 r7, 0x67de0009;
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R1 = ( A1 += R5.H * R3.H ) (M,FU);
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P1 = A1.w;
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R3 = ( A1 -= R2.H * R1.H ) (M,FU);
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P2 = A1.w;
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R5 = ( A1 = R7.H * R0.H ) (M,FU);
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P3 = A1.w;
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R7 = ( A1 += R4.H * R6.H ) (M,FU);
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P4 = A1.w;
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CHECKREG r0, 0x125489BD;
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CHECKREG r1, 0xCB6CC99E;
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CHECKREG r2, 0xA9145679;
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CHECKREG r3, 0x107E992E;
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CHECKREG r4, 0x34567859;
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CHECKREG r5, 0x076FB0D8;
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CHECKREG r6, 0x0D0C0999;
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CHECKREG r7, 0x0A1A82E0;
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CHECKREG p1, 0xCB6CC99E;
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CHECKREG p2, 0x107E992E;
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CHECKREG p3, 0x076FB0D8;
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CHECKREG p4, 0x0A1A82E0;
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pass
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