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79 lines
2.0 KiB
ArmAsm
79 lines
2.0 KiB
ArmAsm
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# mach: bfin
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// GENERIC PN SEQUENCE GENERATOR
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// Linear Feedback Shift Register
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// -------------------------------
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// This solution implements an LFSR by applying an XOR reduction
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// function to the 40 bit accumulator, XORing the contents of the
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// CC bit, shifting by one the accumulator, and inserting the
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// resulting bit on the open bit slot.
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// CC --> ----- XOR--------------------------
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// | | | | | |
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// | | | | | |
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// +------------------------------+ v
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// | b0 b1 b2 b3 b38 b39 | in <-- by one
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// +------------------------------+
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// after:
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// +------------------------------+
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// | b1 b2 b3 b38 b39 in |
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// +------------------------------+
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// The program shown here is a PN sequence generator, and hence
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// does not take any input other than the initial state. However,
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// in order to accept an input, one simply needs to rotate the
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// input sequence via CC prior to applying the XOR reduction.
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.include "testutils.inc"
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start
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loadsym P1, output;
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init_r_regs 0;
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ASTAT = R0;
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// load Polynomial into A1
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A1 = A0 = 0;
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R0.L = 0x1cd4;
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R0.H = 0xab18;
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A1.w = R0;
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R0.L = 0x008d;
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A1.x = R0.L;
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// load InitState into A0
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R0.L = 0x0001;
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R0.H = 0x0000;
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A0.w = R0;
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R0.L = 0x0000;
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A0.x = R0.L;
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P4 = 4;
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LSETUP ( l$0 , l$0end ) LC0 = P4;
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l$0: // **** START l-LOOP *****
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P4 = 32;
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LSETUP ( m$1 , m$1 ) LC1 = P4; // **** START m-LOOP *****
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m$1:
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A0 = BXORSHIFT( A0 , A1, CC );
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// store 16 bits of outdata RL1
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R1 = A0.w;
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l$0end:
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[ P1 ++ ] = R1;
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// Check results
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loadsym I2, output;
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R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x5adf );
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R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x2fc9 );
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R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0xbd91 );
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R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x5520 );
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R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x80d5 );
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R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x7fef );
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R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x34d1 );
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R0.L = W [ I2 ++ ]; DBGA ( R0.L , 0x915c );
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pass
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.data;
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output:
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.dw 0x0000
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.dw 0x0000
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.dw 0x0000
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.dw 0x0000
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