binutils-gdb/ld/ChangeLog

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PowerPC64 __tls_get_addr_desc This implements register saving and restoring in the __tls_get_addr call stub, so that when glibc supports the optimized tls call stub gcc can generate code that assumes only r0, r12 and of course r3 are changed on a __tls_get_addr call. When gcc expects __tls_get_addr calls to preserve registers the call will be to __tls_get_addr_desc, which will be translated by the linker to a call to __tls_get_addr_opt. bfd/ * elf64-ppc.h (struct ppc64_elf_params): Add no_tls_get_addr_regsave. * elf64-ppc.c (struct ppc_link_hash_table): Add tga_desc and tga_desc_fd. (is_tls_get_addr): Match tga_desc and tga_desc_df too. (STDU_R1_0R1, ADDI_R1_R1): Define. (tls_get_addr_prologue, tls_get_addr_epilogue): New functions. (ppc64_elf_tls_setup): Set up tga_desc and tga_desc_fd. Indirect tga_desc_fd to opt_fd, and tga_desc to opt. Set no_tls_get_addr_regsave. (branch_reloc_hash_match): Add hash3 and hash4. (ppc64_elf_tls_optimize): Handle tga_desc_fd and tga_desc too. (ppc64_elf_size_dynamic_sections): Likewise. (ppc64_elf_relocate_section): Likewise. (plt_stub_size, build_plt_stub): Likewise. Size regsave __tls_get_addr stub. (build_tls_get_addr_stub): Build regsave __tls_get_addr stub and eh_frame. (ppc_size_one_stub): Handle tga_desc_fd and tga_desc too. Size eh_frame for regsave __tls_get_addr. gas/ * config/tc-ppc.c (parse_tls_arg): Handle tls arg for __tls_get_addr_desc and __tls_get_addr_opt. ld/ * emultempl/ppc64elf.em (ppc64_opt, PARSE_AND_LIST_LONGOPTS), (PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Support --tls-get-addr-regsave and --no-tls-get-addr-regsave. (params): Init new field. * ld.texi (--tls-get-addr-regsave, --no-tls-get-addr-regsave): Document. * testsuite/ld-powerpc/tlsdesc.s, * testsuite/ld-powerpc/tlsdesc.d, * testsuite/ld-powerpc/tlsdesc.wf, * testsuite/ld-powerpc/tlsdesc2.d, * testsuite/ld-powerpc/tlsdesc2.wf, * testsuite/ld-powerpc/tlsexenors.d, * testsuite/ld-powerpc/tlsexenors.r, * testsuite/ld-powerpc/tlsexers.d, * testsuite/ld-powerpc/tlsexers.r, * testsuite/ld-powerpc/tlsexetocnors.d, * testsuite/ld-powerpc/tlsexetocrs.d, * testsuite/ld-powerpc/tlsexetocrs.r, * testsuite/ld-powerpc/tlsopt6.d, * testsuite/ld-powerpc/tlsopt6.wf: New. * testsuite/ld-powerpc/powerpc.exp: Run new tests.
2020-01-20 10:08:00 +08:00
2020-01-22 Alan Modra <amodra@gmail.com>
* emultempl/ppc64elf.em (ppc64_opt, PARSE_AND_LIST_LONGOPTS),
(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Support
--tls-get-addr-regsave and --no-tls-get-addr-regsave.
(params): Init new field.
* ld.texi (--tls-get-addr-regsave, --no-tls-get-addr-regsave):
Document.
* testsuite/ld-powerpc/tlsdesc.s,
* testsuite/ld-powerpc/tlsdesc.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsexenors.d,
* testsuite/ld-powerpc/tlsexenors.r,
* testsuite/ld-powerpc/tlsexers.d,
* testsuite/ld-powerpc/tlsexers.r,
* testsuite/ld-powerpc/tlsexetocnors.d,
* testsuite/ld-powerpc/tlsexetocrs.d,
* testsuite/ld-powerpc/tlsexetocrs.r,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: New.
* testsuite/ld-powerpc/powerpc.exp: Run new tests.
2020-01-22 Yuri Chornoivan <yurchor@mageia.org>
PR 25417
* ldlang.c (ldlang_open_ctf): Fix error message typo.
* emultempl/z80elf.em (z80_elf_after_open): Likewise.
2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-elf/pr23900-1.d: Adjusted.
2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
* testsuite/ld-elf/pr23900-1.d: Also pass -l to readelf.
2020-01-20 Nick Clifton <nickc@redhat.com>
* po/pt_BR.po: Updated Brazilian Portuguese translation.
* po/uk.po: Updated Ukranian translation.
x86-64: Fix TLSDESC relaxation for x32 For x32, we must encode "lea x@TLSDESC(%rip), %reg" with a REX prefix even if it isn't required. Otherwise linker can’t safely perform GDesc -> IE/LE optimization. X32 TLSDESC sequences can be: 40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg ... 67 ff 10 call *x@TLSCALL(%eax) or the same sequence as LP64: 48 8d 05 00 00 00 00 lea foo@TLSDESC(%rip), %reg ... ff 10 call *foo@TLSCALL(%rax) We need to support both sequences for x32. For both GDesc -> IE/LE transitions, 67 ff 10 call *x@TLSCALL(%eax) should relaxed to 0f 1f 00 nopl (%rax) For GDesc -> LE transition, 40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg should relaxed to 40 c7 c0 fc ff ff ff rex movl $x@tpoff, %reg For GDesc -> IE transition, 40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg should relaxed to 40 8b 05 00 00 00 00 rex movl x@gottpoff(%rip), %eax bfd/ PR ld/25416 * elf64-x86-64.c (elf_x86_64_check_tls_transition): Support "rex leal x@tlsdesc(%rip), %reg" and "call *x@tlsdesc(%eax)" in X32 mode. (elf_x86_64_relocate_section): In x32 mode, for GDesc -> LE transition, relax "rex leal x@tlsdesc(%rip), %reg" to "rex movl $x@tpoff, %reg", for GDesc -> IE transition, relax "rex leal x@tlsdesc(%rip), %reg" to "rex movl x@gottpoff(%rip), %eax". For both transitions, relax "call *(%eax)" to "nopl (%rax)". gas/ PR ld/25416 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating x32 object. * testsuite/gas/i386/ilp32/x32-tls.d: Updated. * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with R_X86_64_GOTPC32_TLSDESC relocation. ld/ PR ld/25416 * testsuite/ld-x86-64/pr25416-1.s: New file * testsuite/ld-x86-64/pr25416-1a.d: Likewise. * testsuite/ld-x86-64/pr25416-1b.d: Likewise. * testsuite/ld-x86-64/pr25416-1.s: Likewise. * testsuite/ld-x86-64/pr25416-2.s: Likewise. * testsuite/ld-x86-64/pr25416-2a.d: Likewise. * testsuite/ld-x86-64/pr25416-2b.d: Likewise. * testsuite/ld-x86-64/pr25416-3.d: Likewise. * testsuite/ld-x86-64/pr25416-3.s: Likewise. * testsuite/ld-x86-64/pr25416-4.d: Likewise. * testsuite/ld-x86-64/pr25416-4.s: Likewise. * testsuite/ld-x86-64/pr25416-5a.c: Likewise. * testsuite/ld-x86-64/pr25416-5b.s: Likewise. * testsuite/ld-x86-64/pr25416-5c.s: Likewise. * testsuite/ld-x86-64/pr25416-5d.s: Likewise. * testsuite/ld-x86-64/pr25416-5e.s: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run PR ld/25416 tests.
2020-01-20 22:58:51 +08:00
2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
PR ld/25416
* testsuite/ld-x86-64/pr25416-1.s: New file
* testsuite/ld-x86-64/pr25416-1a.d: Likewise.
* testsuite/ld-x86-64/pr25416-1b.d: Likewise.
* testsuite/ld-x86-64/pr25416-1.s: Likewise.
* testsuite/ld-x86-64/pr25416-2.s: Likewise.
* testsuite/ld-x86-64/pr25416-2a.d: Likewise.
* testsuite/ld-x86-64/pr25416-2b.d: Likewise.
* testsuite/ld-x86-64/pr25416-3.d: Likewise.
* testsuite/ld-x86-64/pr25416-3.s: Likewise.
* testsuite/ld-x86-64/pr25416-4.d: Likewise.
* testsuite/ld-x86-64/pr25416-4.s: Likewise.
* testsuite/ld-x86-64/pr25416-5a.c: Likewise.
* testsuite/ld-x86-64/pr25416-5b.s: Likewise.
* testsuite/ld-x86-64/pr25416-5c.s: Likewise.
* testsuite/ld-x86-64/pr25416-5d.s: Likewise.
* testsuite/ld-x86-64/pr25416-5e.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/25416 tests.
2020-01-20 Alan Modra <amodra@gmail.com>
* testsuite/ld-powerpc/tlsexe.d: Match new __tls_get_addr stub.
* testsuite/ld-powerpc/tlsexeno.d: Likewise.
* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
* testsuite/ld-powerpc/tlsexetocno.d: Likewise.
* testsuite/ld-powerpc/tlsopt5.d: Likewise.
2020-01-18 Roland McGrath <mcgrathr@google.com>
* testsuite/ld-x86-64/align-branch-1.d: Loosen instruction regexps
to admit whatever absolute address. The label-relative address is
what the test needs to verify.
2020-01-18 Nick Clifton <nickc@redhat.com>
* configure: Regenerate.
* po/ld.pot: Regenerate.
2020-01-18 Nick Clifton <nickc@redhat.com>
Binutils 2.34 branch created.
2020-01-16 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* scripttempl/elf32msp430_3.sc: Remove.
2020-01-16 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* scripttempl/elf32msp430.sc: Add input section rules for
.upper.{text,data,rodata,bss}.
* testsuite/ld-msp430-elf/msp430-elf.exp: Run new test.
* testsuite/ld-msp430-elf/upper-input-sections.s: New test.
2020-01-15 Lars Brinkhoff <lars@nocrew.org>
PR 20694
* temulparams/pdp11.sh (TARGET_PAGE_SIZE): Set to 8192.
2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* testsuite/ld-msp430-elf/msp430-elf.exp: Run new test.
* testsuite/ld-msp430-elf/reloc-lo-430x.s: New test.
2020-01-15 Alan Modra <amodra@gmail.com>
* testsuite/ld-powerpc/ambiguousv1b.d: Adjust expected output.
* testsuite/ld-powerpc/funref.s: Align func_tab.
* testsuite/ld-powerpc/funref2.s: Likewise.
* testsuite/ld-powerpc/funv1.s: Add dot symbols.
x86: Updated align branch tests for Darwin and i686-pc-elf 1. Update align branch assembler tests to match Darwin disassembler outputs. 2. Skip unsupported "call *foo" tests in 64-bit mode on Darwin. 3. Update align branch linker test to match any addresses for i686-pc-elf. gas/ * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin. * testsuite/gas/i386/align-branch-1b.d: Likewise. * testsuite/gas/i386/align-branch-1c.d: Likewise. * testsuite/gas/i386/align-branch-1d.d: Likewise. * testsuite/gas/i386/align-branch-1e.d: Likewise. * testsuite/gas/i386/align-branch-1f.d: Likewise. * testsuite/gas/i386/align-branch-1g.d: Likewise. * testsuite/gas/i386/align-branch-1h.d: Likewise. * testsuite/gas/i386/align-branch-1i.d: Likewise. * testsuite/gas/i386/align-branch-5.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise. * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise. * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a, x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin. ld/ * testsuite/ld-i386/align-branch-1.d: Updated for i686-pc-elf.
2020-01-15 00:59:37 +08:00
2020-01-14 Lili Cui <lili.cui@intel.com>
* testsuite/ld-i386/align-branch-1.d: Updated for i686-pc-elf.
2020-01-13 Alan Modra <amodra@gmail.com>
* po/BLD-POTFILES.in: Regenerate.
2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
* testsuite/ld-arc/relax-local-pic.d: Improve matching patterns.
2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
* Makefile.am: Remove earcelf_prof.c and earclinux_prof.c
emulations.
* configure.tgt: Likewise.
* Makefile.in: Regenerate.
* emulparams/arcelf_prof.sh: Remove file.
* emulparams/arclinux_prof.sh: Likewise.
2020-01-13 Claudiu Zissulescu <claziss@gmail.com>
* scripttempl/elfarcv2.sc : Allow interrupt vector table to be
located at an arbitrary address. Use DWARF.sc file.
* scripttempl/elfarc.sc: Use DWARF.sc file.
2020-01-07 Alan Modra <amodra@gmail.com>
* testsuite/ld-mips-elf/eh-frame5.s,
* testsuite/ld-mips-elf/ehdr_start-new.s,
* testsuite/ld-mips-elf/ehdr_start-o32.s,
* testsuite/ld-mips-elf/mips16-call-global-1.s,
* testsuite/ld-mips-elf/mips16-intermix-1.s,
* testsuite/ld-mips-elf/mips16-pic-1b.s,
* testsuite/ld-mips-elf/mips16-pic-4c.s,
* testsuite/ld-mips-elf/no-shared-1-n64.s,
* testsuite/ld-mips-elf/no-shared-1-o32.s,
* testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s,
* testsuite/ld-mips-elf/pic-and-nonpic-1b.s,
* testsuite/ld-mips-elf/pic-and-nonpic-2a.s,
* testsuite/ld-mips-elf/pic-and-nonpic-3b.s,
* testsuite/ld-mips-elf/pic-and-nonpic-4b.s,
* testsuite/ld-mips-elf/pic-and-nonpic-5a.s,
* testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s,
* testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s,
* testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s,
* testsuite/ld-mips-elf/pie.s,
* testsuite/ld-mips-elf/relax-jalr.s: Revert 2019-12-17 change.
2020-01-06 Nick Clifton <nickc@redhat.com>
PR 25327
* testsuite/ld-elf/shared.exp: Add -fcommon option to compiler
command line when building libcomm1.o and pr13250 tests.
* testsuite/ld-plugin/lto.exp: Likewise for pr20267 tests.
2020-01-06 Nick Clifton <nickc@redhat.com>
PR 25326
* testsuite/ld-elf/shared.exp: Add -fcommon option to compiler
command line when building pr19579 binaries.
2020-01-03 Hannes Domani <ssbssa@yahoo.de>
* emultempl/pe.em: Add new option --enable-reloc-section.
* emultempl/pep.em: Likewise.
* ld.texi: Document --enable-reloc-section.
* pe-dll.c (pe_dll_build_sections): Use pe_dll_enable_reloc_section.
(pe_dll_fill_sections): Simplify by calling pe_exe_fill_sections.
* pe-dll.h: Add extern declaration of option flag.
* pep-dll.c (pe_dll_enable_reloc_section):
Add alias define for pep_dll_enable_reloc_section.
* pep-dll.h: Add extern declaration of option flag.
Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. Add an ELF based target for these as well. PR 25224 bfd * Makefile.am: Add z80-elf target support. * configure.ac: Likewise. * targets.c: Likewise. * config.bfd: Add z80-elf target support and new arches: ez80 and z180. * elf32-z80.c: New file. * archures.c: Add new z80 architectures: eZ80 and Z180. * coffcode.h: Likewise. * cpu-z80.c: Likewise. * bfd-in2.h: Likewise plus additional Z80 relocations. * coff-z80.c: Add new relocations for Z80 target and local label check. gas * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add support for assembler code generated by SDCC. Add new relocation types. Add z80-elf target support. * config/tc-z80.h: Add z80-elf target support. Enable dollar local labels. Local labels starts from ".L". * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict. * testsuite/gas/all/fwdexp.s: Likewise. * testsuite/gas/z80/suffix.d: Fix failure on ELF target. * testsuite/gas/z80/z80.exp: Add new tests * testsuite/gas/z80/dollar.d: New file. * testsuite/gas/z80/dollar.s: New file. * testsuite/gas/z80/ez80_adl_all.d: New file. * testsuite/gas/z80/ez80_adl_all.s: New file. * testsuite/gas/z80/ez80_adl_suf.d: New file. * testsuite/gas/z80/ez80_isuf.s: New file. * testsuite/gas/z80/ez80_z80_all.d: New file. * testsuite/gas/z80/ez80_z80_all.s: New file. * testsuite/gas/z80/ez80_z80_suf.d: New file. * testsuite/gas/z80/r800_extra.d: New file. * testsuite/gas/z80/r800_extra.s: New file. * testsuite/gas/z80/r800_ii8.d: New file. * testsuite/gas/z80/r800_z80_doc.d: New file. * testsuite/gas/z80/z180.d: New file. * testsuite/gas/z80/z180.s: New file. * testsuite/gas/z80/z180_z80_doc.d: New file. * testsuite/gas/z80/z80_doc.d: New file. * testsuite/gas/z80/z80_doc.s: New file. * testsuite/gas/z80/z80_ii8.d: New file. * testsuite/gas/z80/z80_ii8.s: New file. * testsuite/gas/z80/z80_in_f_c.d: New file. * testsuite/gas/z80/z80_in_f_c.s: New file. * testsuite/gas/z80/z80_op_ii_ld.d: New file. * testsuite/gas/z80/z80_op_ii_ld.s: New file. * testsuite/gas/z80/z80_out_c_0.d: New file. * testsuite/gas/z80/z80_out_c_0.s: New file. * testsuite/gas/z80/z80_reloc.d: New file. * testsuite/gas/z80/z80_reloc.s: New file. * testsuite/gas/z80/z80_sli.d: New file. * testsuite/gas/z80/z80_sli.s: New file. ld * Makefile.am: Add new target z80-elf * configure.tgt: Likewise. * emultempl/z80.em: Add support for eZ80 and Z180 architectures. * emulparams/elf32z80.sh: New file. * emultempl/z80elf.em: Likewise. * testsuite/ld-z80/arch_ez80_adl.d: Likewise. * testsuite/ld-z80/arch_ez80_z80.d: Likewise. * testsuite/ld-z80/arch_r800.d: Likewise. * testsuite/ld-z80/arch_z180.d: Likewise. * testsuite/ld-z80/arch_z80.d: Likewise. * testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise. * testsuite/ld-z80/comb_arch_z180.d: Likewise. * testsuite/ld-z80/labels.s: Likewise. * testsuite/ld-z80/relocs.s: Likewise. * testsuite/ld-z80/relocs_b_ez80.d: Likewise. * testsuite/ld-z80/relocs_b_z80.d: Likewise. * testsuite/ld-z80/relocs_f_z80.d: Likewise. * testsuite/ld-z80/z80.exp: Likewise. opcodes * z80-dis.c: Add support for eZ80 and Z80 instructions.
2020-01-02 22:10:40 +08:00
2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
* Makefile.am: Add new target z80-elf
* configure.tgt: Likewise.
* Makefile.in: Regenerate.
* emultempl/z80.em: Add support for eZ80 and Z180 architectures.
* emulparams/elf32z80.sh: New file.
* emultempl/z80elf.em: Likewise.
* testsuite/ld-elf/comm-data4.s: Fix for Z80.
* testsuite/ld-elf/comm-data5.s: Fix for Z80.
* testsuite/ld-scripts/fill16.d: Fix for Z80.
* testsuite/ld-z80/arch_ez80_adl.d: Likewise.
* testsuite/ld-z80/arch_ez80_z80.d: Likewise.
* testsuite/ld-z80/arch_r800.d: Likewise.
* testsuite/ld-z80/arch_z180.d: Likewise.
* testsuite/ld-z80/arch_z80.d: Likewise.
* testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise.
* testsuite/ld-z80/comb_arch_z180.d: Likewise.
* testsuite/ld-z80/labels.s: Likewise.
* testsuite/ld-z80/relocs.s: Likewise.
* testsuite/ld-z80/relocs_b_ez80.d: Likewise.
* testsuite/ld-z80/relocs_b_z80.d: Likewise.
* testsuite/ld-z80/relocs_f_z80.d: Likewise.
* testsuite/ld-z80/z80.exp: Likewise.
* NEWS: Mention the new support.
2020-01-02 Tamar Christina <tamar.christina@arm.com>
PR 25210
PR 24753
* emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section):
Remove SEC_LINKER_CREATED.
* testsuite/ld-aarch64/aarch64-elf.exp: Add erratum835769-843419.
* testsuite/ld-aarch64/erratum835769-843419.d: New test.
2020-01-01 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
2020-01-01 15:37:11 +08:00
For older changes see ChangeLog-2019
2020-01-01 15:37:11 +08:00
Copyright (C) 2020 Free Software Foundation, Inc.
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.
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