binutils-gdb/gdbserver/linux-aarch64-low.cc

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/* GNU/Linux/AArch64 specific low level interface, for the remote server for
GDB.
Copyright (C) 2009-2020 Free Software Foundation, Inc.
Contributed by ARM Ltd.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "server.h"
#include "linux-low.h"
#include "nat/aarch64-linux.h"
Move common aarch64 HW breakpoint/watchpoint code to nat/ When I look at test fails related to watchpoint on aarch64-linux, I find there are some code duplicates between GDB and GDBserver. This patch is to move some of them to a nat/aarch64-linux-hw-point.{h,c}. The only change I do is about the dr_changed_t typedef, which was ULONGEST in GDB and 'unsigned long long' in GDBserver. Each bit of dr_changed_t represents a status of each HW breakpoint or watchpoint register, and the max number of HW breakpoint or watchpoint registers is 16, so the width of 'unsigned long long' is sufficient. gdb: 2015-07-17 Yao Qi <yao.qi@linaro.org> * Makefile.in (HFILES_NO_SRCDIR): Add nat/aarch64-linux-hw-point.h. (aarch64-linux-hw-point.o): New rule. * nat/aarch64-linux-hw-point.h: New file. * nat/aarch64-linux-hw-point.c: New file. * aarch64-linux-nat.c: Include nat/aarch64-linux-hw-point.h. (AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h. (AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise. (AARCH64_HWP_ALIGNMENT): Likewise. (AARCH64_HWP_MAX_LEN_PER_REG): Likewise. (AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise. (AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise. (DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise. (DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise. (aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise. (struct aarch64_debug_reg_state): Likewise. (struct arch_lwp_info): Likewise. (aarch64_linux_set_debug_regs): Likewise. (aarch64_notify_debug_reg_change): Remove static. (aarch64_align_watchpoint): Likewise. (DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise. (aarch64_watchpoint_length): Likewise. (aarch64_point_encode_ctrl_reg): Likewise (aarch64_point_is_aligned): Likewise. (aarch64_dr_state_insert_one_point): Likewise. (aarch64_dr_state_remove_one_point): Likewise. (aarch64_handle_breakpoint): Likewise. (aarch64_handle_aligned_watchpoint): Likewise. (aarch64_handle_unaligned_watchpoint): Likewise. (aarch64_handle_watchpoint): Likewise. * config/aarch64/linux.mh (NAT_FILE): Add aarch64-linux-hw-point.o. gdb/gdbserver: 2015-07-17 Yao Qi <yao.qi@linaro.org> * Makefile.in (aarch64-linux-hw-point.o): New rule. * configure.srv (srv_tgtobj): Append aarch64-linux-hw-point.o. * linux-aarch64-low.c: Include nat/aarch64-linux-hw-point.h. (AARCH64_HBP_MAX_NUM): Move to nat/aarch64-linux-hw-point.h. (AARCH64_HWP_MAX_NUM, AARCH64_HBP_ALIGNMENT): Likewise. (AARCH64_HWP_ALIGNMENT): Likewise. (AARCH64_HWP_MAX_LEN_PER_REG): Likewise. (AARCH64_DEBUG_NUM_SLOTS, AARCH64_DEBUG_ARCH): Likewise. (aarch64_num_bp_regs, aarch64_num_wp_regs): Likewise. (AARCH64_DEBUG_ARCH_V8, DR_MARK_ALL_CHANGED): Likewise. (DR_MARK_N_CHANGED, DR_CLEAR_CHANGED): Likewise. (DR_HAS_CHANGED, DR_N_HAS_CHANGE): Likewise. (struct aarch64_debug_reg_state): Likewise. (struct arch_lwp_info): Likewise. (aarch64_align_watchpoint): Likewise. (DR_CONTROL_ENABLED, DR_CONTROL_LENGTH): Likewise. (aarch64_watchpoint_length): Likewise. (aarch64_point_encode_ctrl_reg): Likewise (aarch64_point_is_aligned): Likewise. (aarch64_align_watchpoint): Likewise. (aarch64_linux_set_debug_regs): (aarch64_dr_state_insert_one_point): Likewise. (aarch64_dr_state_remove_one_point): Likewise. (aarch64_handle_breakpoint): Likewise. (aarch64_handle_aligned_watchpoint): Likewise. (aarch64_handle_unaligned_watchpoint): Likewise. (aarch64_handle_watchpoint): Likewise.
2015-07-17 21:32:40 +08:00
#include "nat/aarch64-linux-hw-point.h"
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
#include "arch/aarch64-insn.h"
#include "linux-aarch32-low.h"
#include "elf/common.h"
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
#include "ax.h"
#include "tracepoint.h"
#include "debug.h"
#include <signal.h>
#include <sys/user.h>
#include "nat/gdb_ptrace.h"
#include <asm/ptrace.h>
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
#include <inttypes.h>
#include <endian.h>
#include <sys/uio.h>
#include "gdb_proc_service.h"
#include "arch/aarch64.h"
#include "linux-aarch32-tdesc.h"
#include "linux-aarch64-tdesc.h"
#include "nat/aarch64-sve-linux-ptrace.h"
#include "tdesc.h"
#ifdef HAVE_SYS_REG_H
#include <sys/reg.h>
#endif
/* Per-process arch-specific data we want to keep. */
struct arch_process_info
{
/* Hardware breakpoint/watchpoint data.
The reason for them to be per-process rather than per-thread is
due to the lack of information in the gdbserver environment;
gdbserver is not told that whether a requested hardware
breakpoint/watchpoint is thread specific or not, so it has to set
each hw bp/wp for every thread in the current process. The
higher level bp/wp management in gdb will resume a thread if a hw
bp/wp trap is not expected for it. Since the hw bp/wp setting is
same for each thread, it is reasonable for the data to live here.
*/
struct aarch64_debug_reg_state debug_reg_state;
};
/* Return true if the size of register 0 is 8 byte. */
static int
is_64bit_tdesc (void)
{
struct regcache *regcache = get_thread_regcache (current_thread, 0);
return register_size (regcache->tdesc, 0) == 8;
}
/* Return true if the regcache contains the number of SVE registers. */
static bool
is_sve_tdesc (void)
{
struct regcache *regcache = get_thread_regcache (current_thread, 0);
return tdesc_contains_feature (regcache->tdesc, "org.gnu.gdb.aarch64.sve");
}
static void
aarch64_fill_gregset (struct regcache *regcache, void *buf)
{
struct user_pt_regs *regset = (struct user_pt_regs *) buf;
int i;
for (i = 0; i < AARCH64_X_REGS_NUM; i++)
collect_register (regcache, AARCH64_X0_REGNUM + i, &regset->regs[i]);
collect_register (regcache, AARCH64_SP_REGNUM, &regset->sp);
collect_register (regcache, AARCH64_PC_REGNUM, &regset->pc);
collect_register (regcache, AARCH64_CPSR_REGNUM, &regset->pstate);
}
static void
aarch64_store_gregset (struct regcache *regcache, const void *buf)
{
const struct user_pt_regs *regset = (const struct user_pt_regs *) buf;
int i;
for (i = 0; i < AARCH64_X_REGS_NUM; i++)
supply_register (regcache, AARCH64_X0_REGNUM + i, &regset->regs[i]);
supply_register (regcache, AARCH64_SP_REGNUM, &regset->sp);
supply_register (regcache, AARCH64_PC_REGNUM, &regset->pc);
supply_register (regcache, AARCH64_CPSR_REGNUM, &regset->pstate);
}
static void
aarch64_fill_fpregset (struct regcache *regcache, void *buf)
{
struct user_fpsimd_state *regset = (struct user_fpsimd_state *) buf;
int i;
for (i = 0; i < AARCH64_V_REGS_NUM; i++)
collect_register (regcache, AARCH64_V0_REGNUM + i, &regset->vregs[i]);
collect_register (regcache, AARCH64_FPSR_REGNUM, &regset->fpsr);
collect_register (regcache, AARCH64_FPCR_REGNUM, &regset->fpcr);
}
static void
aarch64_store_fpregset (struct regcache *regcache, const void *buf)
{
const struct user_fpsimd_state *regset
= (const struct user_fpsimd_state *) buf;
int i;
for (i = 0; i < AARCH64_V_REGS_NUM; i++)
supply_register (regcache, AARCH64_V0_REGNUM + i, &regset->vregs[i]);
supply_register (regcache, AARCH64_FPSR_REGNUM, &regset->fpsr);
supply_register (regcache, AARCH64_FPCR_REGNUM, &regset->fpcr);
}
/* Store the pauth registers to regcache. */
static void
aarch64_store_pauthregset (struct regcache *regcache, const void *buf)
{
uint64_t *pauth_regset = (uint64_t *) buf;
int pauth_base = find_regno (regcache->tdesc, "pauth_dmask");
if (pauth_base == 0)
return;
supply_register (regcache, AARCH64_PAUTH_DMASK_REGNUM (pauth_base),
&pauth_regset[0]);
supply_register (regcache, AARCH64_PAUTH_CMASK_REGNUM (pauth_base),
&pauth_regset[1]);
}
/* Implementation of linux_target_ops method "get_pc". */
static CORE_ADDR
aarch64_get_pc (struct regcache *regcache)
{
if (register_size (regcache->tdesc, 0) == 8)
return linux_get_pc_64bit (regcache);
else
return linux_get_pc_32bit (regcache);
}
/* Implementation of linux_target_ops method "set_pc". */
static void
aarch64_set_pc (struct regcache *regcache, CORE_ADDR pc)
{
if (register_size (regcache->tdesc, 0) == 8)
linux_set_pc_64bit (regcache, pc);
else
linux_set_pc_32bit (regcache, pc);
}
#define aarch64_breakpoint_len 4
/* AArch64 BRK software debug mode instruction.
This instruction needs to match gdb/aarch64-tdep.c
(aarch64_default_breakpoint). */
static const gdb_byte aarch64_breakpoint[] = {0x00, 0x00, 0x20, 0xd4};
/* Implementation of linux_target_ops method "breakpoint_at". */
static int
aarch64_breakpoint_at (CORE_ADDR where)
{
if (is_64bit_tdesc ())
{
gdb_byte insn[aarch64_breakpoint_len];
gdbserver: turn target ops 'read_memory' and 'write_memory' into methods gdbserver/ChangeLog: 2020-02-20 Tankut Baris Aktemur <tankut.baris.aktemur@intel.com> Turn process_stratum_target's read_memory and write_memory ops into methods of process_target. * target.h (struct process_stratum_target): Remove the target ops. (class process_target): Add the target ops. Update the derived classes and callers below. * linux-aarch32-low.cc (arm_breakpoint_at): Update. * linux-aarch64-low.cc (aarch64_breakpoint_at): Update. * linux-arm-low.cc (arm_sigreturn_next_pc): Update. (arm_get_syscall_trapinfo): Update. * linux-cris-low.cc (cris_breakpoint_at): Update. * linux-crisv32-low.cc (cris_breakpoint_at): Update. * linux-m32r-low.cc (m32r_breakpoint_at): Update. * linux-mips-low.cc (mips_breakpoint_at): Update. * linux-nios2-low.cc (nios2_breakpoint_at): Update. * linux-ppc-low.cc (ppc_breakpoint_at): Update. * linux-sh-low.cc (sh_breakpoint_at): Update. * linux-sparc-low.cc (sparc_fill_gregset_to_stack): Update. (sparc_store_gregset_from_stack): Update. (sparc_breakpoint_at): Update. * linux-tic6x-low.cc (tic6x_breakpoint_at): Update. * linux-tile-low.cc (tile_breakpoint_at): Update. * linux-x86-low.cc (x86_breakpoint_at): Update. * linux-xtensa-low.cc (xtensa_breakpoint_at): Update. * mem-brea.cc (insert_memory_breakpoint): Update. (validate_inserted_breakpoint): Update. * target.cc (read_inferior_memory): Update. (target_write_memory): Update. * linux-low.cc (linux_target_ops): Update. (linux_read_memory): Make a wrapper around the read_memory target op call. (linux_process_target::read_memory): Rename from linux_read_memory. (linux_write_memory): Turn into ... (linux_process_target::write_memory): ... this. * linux-low.h (class linux_process_target): Update. * lynx-low.cc (lynx_target_ops): Update. (lynx_read_memory): Turn into ... (lynx_process_target::read_memory): ... this. (lynx_write_memory): Turn into ... (lynx_process_target::write_memory): ... this. * lynx-low.h (class lynx_process_target): Update. * nto-low.cc (nto_target_ops): Update. (nto_read_memory): Turn into ... (nto_process_target::read_memory): ... this. (nto_write_memory): Turn into ... (nto_process_target::write_memory): ... this. * nto-low.h (class nto_process_target): Update. * win32-low.cc (win32_target_ops): Update. (win32_read_inferior_memory): Turn into ... (win32_process_target::read_memory): ... this. (win32_write_inferior_memory): Turn into ... (win32_process_target::write_memory): ... this. * win32-low.h (class win32_process_target): Update.
2020-02-17 23:11:53 +08:00
the_target->pt->read_memory (where, (unsigned char *) &insn,
aarch64_breakpoint_len);
if (memcmp (insn, aarch64_breakpoint, aarch64_breakpoint_len) == 0)
return 1;
return 0;
}
else
return arm_breakpoint_at (where);
}
static void
aarch64_init_debug_reg_state (struct aarch64_debug_reg_state *state)
{
int i;
for (i = 0; i < AARCH64_HBP_MAX_NUM; ++i)
{
state->dr_addr_bp[i] = 0;
state->dr_ctrl_bp[i] = 0;
state->dr_ref_count_bp[i] = 0;
}
for (i = 0; i < AARCH64_HWP_MAX_NUM; ++i)
{
state->dr_addr_wp[i] = 0;
state->dr_ctrl_wp[i] = 0;
state->dr_ref_count_wp[i] = 0;
}
}
/* Return the pointer to the debug register state structure in the
current process' arch-specific data area. */
struct aarch64_debug_reg_state *
aarch64_get_debug_reg_state (pid_t pid)
{
struct process_info *proc = find_process_pid (pid);
return &proc->priv->arch_private->debug_reg_state;
}
/* Implementation of linux_target_ops method "supports_z_point_type". */
static int
aarch64_supports_z_point_type (char z_type)
{
switch (z_type)
{
case Z_PACKET_SW_BP:
case Z_PACKET_HW_BP:
case Z_PACKET_WRITE_WP:
case Z_PACKET_READ_WP:
case Z_PACKET_ACCESS_WP:
return 1;
default:
return 0;
}
}
/* Implementation of linux_target_ops method "insert_point".
It actually only records the info of the to-be-inserted bp/wp;
the actual insertion will happen when threads are resumed. */
static int
[GDBserver] Make Zx/zx packet handling idempotent. This patch fixes hardware breakpoint regressions exposed by my fix for "PR breakpoints/7143 - Watchpoint does not trigger when first set", at https://sourceware.org/ml/gdb-patches/2014-03/msg00167.html The testsuite caught them on Linux/x86_64, at least. gdb.sum: gdb.sum: FAIL: gdb.base/hbreak2.exp: next over recursive call FAIL: gdb.base/hbreak2.exp: backtrace from factorial(5.1) FAIL: gdb.base/hbreak2.exp: continue until exit at recursive next test gdb.log: (gdb) next Program received signal SIGTRAP, Trace/breakpoint trap. factorial (value=4) at ../../../src/gdb/testsuite/gdb.base/break.c:113 113 if (value > 1) { /* set breakpoint 7 here */ (gdb) FAIL: gdb.base/hbreak2.exp: next over recursive call Actually, that patch just exposed a latent issue to "breakpoints always-inserted off" mode, not really caused it. After that patch, GDB no longer removes breakpoints at each internal event, thus making some scenarios behave like breakpoint always-inserted on. The bug is easy to trigger with always-inserted on. The issue is that since the target-side breakpoint conditions support, if the stub/server supports evaluating breakpoint conditions on the target side, then GDB is sending duplicate Zx packets to the target without removing them before, and GDBserver is not really expecting that for Z packets other than Z0/z0. E.g., with "set breakpoint always-inserted on" and "set debug remote 1": (gdb) b main Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $z0,410943,1#68...Packet received: OK And for Z1, similarly: (gdb) hbreak main Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Packet Z1 (hardware-breakpoint) is supported (gdb) hbreak main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) hbreak main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $z1,410943,1#69...Packet received: OK ^^^^^^^^^^^^ So GDB sent a bunch of Z1 packets, and then when finally removing the breakpoint, only one z1 packet was sent. On the GDBserver side (with monitor set debug-hw-points 1), in the Z1 case, we see: $ ./gdbserver :9999 ./gdbserver Process ./gdbserver created; pid = 8629 Listening on port 9999 Remote debugging from host 127.0.0.1 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=1 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=2 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=3 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=5 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 remove_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 That's one insert_watchpoint call for each Z1 packet, and then one remove_watchpoint call for the z1 packet. Notice how ref.count increased for each insert_watchpoint call, and then in the end, after GDB told GDBserver to forget about the hardware breakpoint, GDBserver ends with the the first debug register still with ref.count=4! IOW, the hardware breakpoint is left armed on the target, while on the GDB end it's gone. If the program happens to execute 0x410943 afterwards, then the CPU traps, GDBserver reports the trap to GDB, and GDB not having a breakpoint set at that address anymore, reports to the user a spurious SIGTRAP. This is exactly what is happening in the hbreak2.exp test, though in that case, it's a shared library event that triggers a breakpoint_re_set, when breakpoints are still inserted (because nowadays GDB doesn't remove breakpoints while handling internal events), and that recreates breakpoint locations, which likewise forces breakpoint reinsertion and Zx packet resends... That is a lot of bogus Zx duplication that should possibly be addressed on the GDB side. GDB resends Zx packets because the way to change the target-side condition, is to resend the breakpoint to the server with the new condition. (That's an option in the packet: e.g., "Z1,410943,1;X3,220027" for "hbreak main if 0". The packets in the examples above are shorter because the breakpoints don't have conditions attached). GDB doesn't remove the breakpoint first before reinserting it because that'd be bad for non-stop, as it'd open a window where the inferior could miss the breakpoint. The conditions actually haven't changed between the resends, but GDB isn't smart enough to realize that. (TBC, if the target doesn't support target-side conditions, then GDB doesn't trigger these resends (init_bp_location calls mark_breakpoint_location_modified, and that does nothing if condition evaluation is on the host side. The resends are caused by the 'loc->condition_changed = condition_modified.' line.) But, even if GDB was made smarter, GDBserver should really still handle the resends anyway. So target-side conditions also aren't really to blame. The documentation of the Z/z packets says: "To avoid potential problems with duplicate packets, the operations should be implemented in an idempotent way." As such, we may want to fix GDB, but we should definitely fix GDBserver. The fix is a prerequisite for target-side conditions on hardware breakpoints anyway (and while at it, on watchpoints too). GDBserver indeed already treats duplicate Z0 packets in an idempotent way. mem-break.c has the concept of high-level and low-level breakpoints, somewhat similar to GDB's split of breakpoints vs breakpoint locations, and keeps track of multiple breakpoints referencing the same address/location, for the case of an internal GDBserver breakpoint or a tracepoint being set at the same address as a GDB breakpoint. But, it only allows GDB to ever contribute one reference to a software breakpoint location. IOW, if gdbserver sees a Z0 packet for the same address where it already had a GDB breakpoint set, then GDBserver won't create another high-level GDB breakpoint. However, mem-break.c only tracks GDB Z0 breakpoints. The same logic should apply to all kinds of Zx packets. Currently, gdbserver passes down each duplicate Zx (other than Z0) request directly to the target->insert_point routine. The x86 watchpoint support itself refcounts watchpoint / hw breakpoint requests, to handle overlapping watchpoints, and save debug registers. But that code doesn't (and really shouldn't) handle the duplicate requests, assuming that for each insert there will be a corresponding remove. So the fix is to generalize mem-break.c to track all kinds of Zx breakpoints, and filter out duplicates. As mentioned, this ends up adding support for target-side conditions on hardware breakpoints and watchpoints too (though GDB itself doesn't support the latter yet). Probably the least obvious change in the patch is that it kind of turns the breakpoint insert/remove APIs inside out. Before, the target methods were only called for GDB breakpoints. The internal breakpoint set/delete methods inserted memory breakpoints directly bypassing the insert/remove target methods. That's not good when the target should use a debug API to set software breakpoints, instead of relying on GDBserver patching memory with breakpoint instructions, as is the case of NTO. Now removal/insertion of all kinds of breakpoints/watchpoints, either internal, or from GDB, always go through the target methods. The insert_point/remove_point methods no longer get passed a Z packet type, but an internal/raw breakpoint type. They're also passed a pointer to the raw breakpoint itself (note that's still opaque outside mem-break.c), so that insert_memory_breakpoint / remove_memory_breakpoint have access to the breakpoint's shadow buffer. I first tried passing down a new structure based on GDB's "struct bp_target_info" (actually with that name exactly), but then decided against it as unnecessary complication. As software/memory breakpoints work by poking at memory, when setting a GDB Z0 breakpoint (but not internal breakpoints, as those can assume the conditions are already right), we need to tell the target to prepare to access memory (which on Linux means stop threads). If that operation fails, we need to return error to GDB. Seeing an error, if this is the first breakpoint of that type that GDB tries to insert, GDB would then assume the breakpoint type is supported, but it may actually not be. So we need to check whether the type is supported at all before preparing to access memory. And to solve that, the patch adds a new target->supports_z_point_type method that is called before actually trying to insert the breakpoint. Other than that, hopefully the change is more or less obvious. New test added that exercises the hbreak2.exp regression in a more direct way, without relying on a breakpoint re-set happening before main is reached. Tested by building GDBserver for: aarch64-linux-gnu arm-linux-gnueabihf i686-pc-linux-gnu i686-w64-mingw32 m68k-linux-gnu mips-linux-gnu mips-uclinux nios2-linux-gnu powerpc-linux-gnu sh-linux-gnu tilegx-unknown-linux-gnu x86_64-redhat-linux x86_64-w64-mingw32 And also regression tested on x86_64 Fedora 20. gdb/gdbserver/ 2014-05-20 Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_insert_point) (aarch64_remove_point): No longer check whether the type is supported here. Adjust to new interface. (the_low_target): Install aarch64_supports_z_point_type as supports_z_point_type method. * linux-arm-low.c (raw_bkpt_type_to_arm_hwbp_type): New function. (arm_linux_hw_point_initialize): Take an enum raw_bkpt_type instead of a Z packet char. Adjust. (arm_supports_z_point_type): New function. (arm_insert_point, arm_remove_point): Adjust to new interface. (the_low_target): Install arm_supports_z_point_type. * linux-crisv32-low.c (cris_supports_z_point_type): New function. (cris_insert_point, cris_remove_point): Adjust to new interface. Don't check whether the type is supported here. (the_low_target): Install cris_supports_z_point_type. * linux-low.c (linux_supports_z_point_type): New function. (linux_insert_point, linux_remove_point): Adjust to new interface. * linux-low.h (struct linux_target_ops) <insert_point, remove_point>: Take an enum raw_bkpt_type instead of a char. Add raw_breakpoint pointer parameter. <supports_z_point_type>: New method. * linux-mips-low.c (mips_supports_z_point_type): New function. (mips_insert_point, mips_remove_point): Adjust to new interface. Use mips_supports_z_point_type. (the_low_target): Install mips_supports_z_point_type. * linux-ppc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-s390-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-sparc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-x86-low.c (x86_supports_z_point_type): New function. (x86_insert_point): Adjust to new insert_point interface. Use insert_memory_breakpoint. Adjust to new i386_low_insert_watchpoint interface. (x86_remove_point): Adjust to remove_point interface. Use remove_memory_breakpoint. Adjust to new i386_low_remove_watchpoint interface. (the_low_target): Install x86_supports_z_point_type. * lynx-low.c (lynx_target_ops): Install NULL as supports_z_point_type callback. * nto-low.c (nto_supports_z_point_type): New. (nto_insert_point, nto_remove_point): Adjust to new interface. (nto_target_ops): Install nto_supports_z_point_type. * mem-break.c: Adjust intro comment. (struct raw_breakpoint) <raw_type, size>: New fields. <inserted>: Update comment. <shlib_disabled>: Delete field. (enum bkpt_type) <gdb_breakpoint>: Delete value. <gdb_breakpoint_Z0, gdb_breakpoint_Z1, gdb_breakpoint_Z2, gdb_breakpoint_Z3, gdb_breakpoint_Z4>: New values. (raw_bkpt_type_to_target_hw_bp_type): New function. (find_enabled_raw_code_breakpoint_at): New function. (find_raw_breakpoint_at): New type and size parameters. Use them. (insert_memory_breakpoint): New function, based off set_raw_breakpoint_at. (remove_memory_breakpoint): New function. (set_raw_breakpoint_at): Reimplement. (set_breakpoint): New, based on set_breakpoint_at. (set_breakpoint_at): Reimplement. (delete_raw_breakpoint): Go through the_target->remove_point instead of assuming memory breakpoints. (find_gdb_breakpoint_at): Delete. (Z_packet_to_bkpt_type, Z_packet_to_raw_bkpt_type): New functions. (find_gdb_breakpoint): New function. (set_gdb_breakpoint_at): Delete. (z_type_supported): New function. (set_gdb_breakpoint_1): New function, loosely based off set_gdb_breakpoint_at. (check_gdb_bp_preconditions, set_gdb_breakpoint): New functions. (delete_gdb_breakpoint_at): Delete. (delete_gdb_breakpoint_1): New function, loosely based off delete_gdb_breakpoint_at. (delete_gdb_breakpoint): New function. (clear_gdb_breakpoint_conditions): Rename to ... (clear_breakpoint_conditions): ... this. Don't handle a NULL breakpoint. (add_condition_to_breakpoint): Make static. (add_breakpoint_condition): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_condition_true_at_breakpoint): Rename to ... (gdb_condition_true_at_breakpoint_z_type): ... this, and add z_type parameter. (gdb_condition_true_at_breakpoint): Reimplement. (add_breakpoint_commands): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_no_commands_at_breakpoint): Rename to ... (gdb_no_commands_at_breakpoint_z_type): ... this. Add z_type parameter. Return true if no breakpoint was found. Change debug output. (gdb_no_commands_at_breakpoint): Reimplement. (run_breakpoint_commands): Rename to ... (run_breakpoint_commands_z_type): ... this. Add z_type parameter, and change return type to boolean. (run_breakpoint_commands): New function. (gdb_breakpoint_here): Also check for Z1 breakpoints. (uninsert_raw_breakpoint): Don't try to reinsert a disabled breakpoint. Go through the_target->remove_point instead of assuming memory breakpoint. (uninsert_breakpoints_at, uninsert_all_breakpoints): Uninsert software and hardware breakpoints. (reinsert_raw_breakpoint): Go through the_target->insert_point instead of assuming memory breakpoint. (reinsert_breakpoints_at, reinsert_all_breakpoints): Reinsert software and hardware breakpoints. (check_breakpoints, breakpoint_here, breakpoint_inserted_here): Check both software and hardware breakpoints. (validate_inserted_breakpoint): Assert the breakpoint is a software breakpoint. Set the inserted flag to -1 instead of setting shlib_disabled. (delete_disabled_breakpoints): Adjust. (validate_breakpoints): Only validate software breakpoints. Adjust to inserted flag change. (check_mem_read, check_mem_write): Skip breakpoint types other than software breakpoints. Adjust to inserted flag change. * mem-break.h (enum raw_bkpt_type): New enum. (raw_breakpoint, struct process_info): Forward declare. (Z_packet_to_target_hw_bp_type): Delete declaration. (raw_bkpt_type_to_target_hw_bp_type, Z_packet_to_raw_bkpt_type) (set_gdb_breakpoint, delete_gdb_breakpoint) (clear_breakpoint_conditions): New declarations. (set_gdb_breakpoint_at, clear_gdb_breakpoint_conditions): Delete. (breakpoint_inserted_here): Update comment. (add_breakpoint_condition, add_breakpoint_commands): Replace address parameter with a breakpoint pointer parameter. (gdb_breakpoint_here): Update comment. (delete_gdb_breakpoint_at): Delete. (insert_memory_breakpoint, remove_memory_breakpoint): Declare. * server.c (process_point_options): Take a struct breakpoint pointer instead of an address. Adjust. (process_serial_event) <Z/z packets>: Use set_gdb_breakpoint and delete_gdb_breakpoint. * spu-low.c (spu_target_ops): Install NULL as supports_z_point_type method. * target.h: Include mem-break.h. (struct target_ops) <prepare_to_access_memory>: Update comment. <supports_z_point_type>: New field. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. * win32-arm-low.c (the_low_target): Install NULL as supports_z_point_type. * win32-i386-low.c (i386_supports_z_point_type): New function. (i386_insert_point, i386_remove_point): Adjust to new interface. (the_low_target): Install i386_supports_z_point_type. * win32-low.c (win32_supports_z_point_type): New function. (win32_insert_point, win32_remove_point): Adjust to new interface. (win32_target_ops): Install win32_supports_z_point_type. * win32-low.h (struct win32_target_ops): <supports_z_point_type>: New method. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. gdb/testsuite/ 2014-05-20 Pedro Alves <palves@redhat.com> * gdb.base/break-idempotent.c: New file. * gdb.base/break-idempotent.exp: New file.
2014-05-21 01:24:28 +08:00
aarch64_insert_point (enum raw_bkpt_type type, CORE_ADDR addr,
int len, struct raw_breakpoint *bp)
{
int ret;
enum target_hw_bp_type targ_type;
struct aarch64_debug_reg_state *state
= aarch64_get_debug_reg_state (pid_of (current_thread));
if (show_debug_regs)
fprintf (stderr, "insert_point on entry (addr=0x%08lx, len=%d)\n",
(unsigned long) addr, len);
[GDBserver] Make Zx/zx packet handling idempotent. This patch fixes hardware breakpoint regressions exposed by my fix for "PR breakpoints/7143 - Watchpoint does not trigger when first set", at https://sourceware.org/ml/gdb-patches/2014-03/msg00167.html The testsuite caught them on Linux/x86_64, at least. gdb.sum: gdb.sum: FAIL: gdb.base/hbreak2.exp: next over recursive call FAIL: gdb.base/hbreak2.exp: backtrace from factorial(5.1) FAIL: gdb.base/hbreak2.exp: continue until exit at recursive next test gdb.log: (gdb) next Program received signal SIGTRAP, Trace/breakpoint trap. factorial (value=4) at ../../../src/gdb/testsuite/gdb.base/break.c:113 113 if (value > 1) { /* set breakpoint 7 here */ (gdb) FAIL: gdb.base/hbreak2.exp: next over recursive call Actually, that patch just exposed a latent issue to "breakpoints always-inserted off" mode, not really caused it. After that patch, GDB no longer removes breakpoints at each internal event, thus making some scenarios behave like breakpoint always-inserted on. The bug is easy to trigger with always-inserted on. The issue is that since the target-side breakpoint conditions support, if the stub/server supports evaluating breakpoint conditions on the target side, then GDB is sending duplicate Zx packets to the target without removing them before, and GDBserver is not really expecting that for Z packets other than Z0/z0. E.g., with "set breakpoint always-inserted on" and "set debug remote 1": (gdb) b main Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $z0,410943,1#68...Packet received: OK And for Z1, similarly: (gdb) hbreak main Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Packet Z1 (hardware-breakpoint) is supported (gdb) hbreak main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) hbreak main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $z1,410943,1#69...Packet received: OK ^^^^^^^^^^^^ So GDB sent a bunch of Z1 packets, and then when finally removing the breakpoint, only one z1 packet was sent. On the GDBserver side (with monitor set debug-hw-points 1), in the Z1 case, we see: $ ./gdbserver :9999 ./gdbserver Process ./gdbserver created; pid = 8629 Listening on port 9999 Remote debugging from host 127.0.0.1 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=1 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=2 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=3 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=5 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 remove_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 That's one insert_watchpoint call for each Z1 packet, and then one remove_watchpoint call for the z1 packet. Notice how ref.count increased for each insert_watchpoint call, and then in the end, after GDB told GDBserver to forget about the hardware breakpoint, GDBserver ends with the the first debug register still with ref.count=4! IOW, the hardware breakpoint is left armed on the target, while on the GDB end it's gone. If the program happens to execute 0x410943 afterwards, then the CPU traps, GDBserver reports the trap to GDB, and GDB not having a breakpoint set at that address anymore, reports to the user a spurious SIGTRAP. This is exactly what is happening in the hbreak2.exp test, though in that case, it's a shared library event that triggers a breakpoint_re_set, when breakpoints are still inserted (because nowadays GDB doesn't remove breakpoints while handling internal events), and that recreates breakpoint locations, which likewise forces breakpoint reinsertion and Zx packet resends... That is a lot of bogus Zx duplication that should possibly be addressed on the GDB side. GDB resends Zx packets because the way to change the target-side condition, is to resend the breakpoint to the server with the new condition. (That's an option in the packet: e.g., "Z1,410943,1;X3,220027" for "hbreak main if 0". The packets in the examples above are shorter because the breakpoints don't have conditions attached). GDB doesn't remove the breakpoint first before reinserting it because that'd be bad for non-stop, as it'd open a window where the inferior could miss the breakpoint. The conditions actually haven't changed between the resends, but GDB isn't smart enough to realize that. (TBC, if the target doesn't support target-side conditions, then GDB doesn't trigger these resends (init_bp_location calls mark_breakpoint_location_modified, and that does nothing if condition evaluation is on the host side. The resends are caused by the 'loc->condition_changed = condition_modified.' line.) But, even if GDB was made smarter, GDBserver should really still handle the resends anyway. So target-side conditions also aren't really to blame. The documentation of the Z/z packets says: "To avoid potential problems with duplicate packets, the operations should be implemented in an idempotent way." As such, we may want to fix GDB, but we should definitely fix GDBserver. The fix is a prerequisite for target-side conditions on hardware breakpoints anyway (and while at it, on watchpoints too). GDBserver indeed already treats duplicate Z0 packets in an idempotent way. mem-break.c has the concept of high-level and low-level breakpoints, somewhat similar to GDB's split of breakpoints vs breakpoint locations, and keeps track of multiple breakpoints referencing the same address/location, for the case of an internal GDBserver breakpoint or a tracepoint being set at the same address as a GDB breakpoint. But, it only allows GDB to ever contribute one reference to a software breakpoint location. IOW, if gdbserver sees a Z0 packet for the same address where it already had a GDB breakpoint set, then GDBserver won't create another high-level GDB breakpoint. However, mem-break.c only tracks GDB Z0 breakpoints. The same logic should apply to all kinds of Zx packets. Currently, gdbserver passes down each duplicate Zx (other than Z0) request directly to the target->insert_point routine. The x86 watchpoint support itself refcounts watchpoint / hw breakpoint requests, to handle overlapping watchpoints, and save debug registers. But that code doesn't (and really shouldn't) handle the duplicate requests, assuming that for each insert there will be a corresponding remove. So the fix is to generalize mem-break.c to track all kinds of Zx breakpoints, and filter out duplicates. As mentioned, this ends up adding support for target-side conditions on hardware breakpoints and watchpoints too (though GDB itself doesn't support the latter yet). Probably the least obvious change in the patch is that it kind of turns the breakpoint insert/remove APIs inside out. Before, the target methods were only called for GDB breakpoints. The internal breakpoint set/delete methods inserted memory breakpoints directly bypassing the insert/remove target methods. That's not good when the target should use a debug API to set software breakpoints, instead of relying on GDBserver patching memory with breakpoint instructions, as is the case of NTO. Now removal/insertion of all kinds of breakpoints/watchpoints, either internal, or from GDB, always go through the target methods. The insert_point/remove_point methods no longer get passed a Z packet type, but an internal/raw breakpoint type. They're also passed a pointer to the raw breakpoint itself (note that's still opaque outside mem-break.c), so that insert_memory_breakpoint / remove_memory_breakpoint have access to the breakpoint's shadow buffer. I first tried passing down a new structure based on GDB's "struct bp_target_info" (actually with that name exactly), but then decided against it as unnecessary complication. As software/memory breakpoints work by poking at memory, when setting a GDB Z0 breakpoint (but not internal breakpoints, as those can assume the conditions are already right), we need to tell the target to prepare to access memory (which on Linux means stop threads). If that operation fails, we need to return error to GDB. Seeing an error, if this is the first breakpoint of that type that GDB tries to insert, GDB would then assume the breakpoint type is supported, but it may actually not be. So we need to check whether the type is supported at all before preparing to access memory. And to solve that, the patch adds a new target->supports_z_point_type method that is called before actually trying to insert the breakpoint. Other than that, hopefully the change is more or less obvious. New test added that exercises the hbreak2.exp regression in a more direct way, without relying on a breakpoint re-set happening before main is reached. Tested by building GDBserver for: aarch64-linux-gnu arm-linux-gnueabihf i686-pc-linux-gnu i686-w64-mingw32 m68k-linux-gnu mips-linux-gnu mips-uclinux nios2-linux-gnu powerpc-linux-gnu sh-linux-gnu tilegx-unknown-linux-gnu x86_64-redhat-linux x86_64-w64-mingw32 And also regression tested on x86_64 Fedora 20. gdb/gdbserver/ 2014-05-20 Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_insert_point) (aarch64_remove_point): No longer check whether the type is supported here. Adjust to new interface. (the_low_target): Install aarch64_supports_z_point_type as supports_z_point_type method. * linux-arm-low.c (raw_bkpt_type_to_arm_hwbp_type): New function. (arm_linux_hw_point_initialize): Take an enum raw_bkpt_type instead of a Z packet char. Adjust. (arm_supports_z_point_type): New function. (arm_insert_point, arm_remove_point): Adjust to new interface. (the_low_target): Install arm_supports_z_point_type. * linux-crisv32-low.c (cris_supports_z_point_type): New function. (cris_insert_point, cris_remove_point): Adjust to new interface. Don't check whether the type is supported here. (the_low_target): Install cris_supports_z_point_type. * linux-low.c (linux_supports_z_point_type): New function. (linux_insert_point, linux_remove_point): Adjust to new interface. * linux-low.h (struct linux_target_ops) <insert_point, remove_point>: Take an enum raw_bkpt_type instead of a char. Add raw_breakpoint pointer parameter. <supports_z_point_type>: New method. * linux-mips-low.c (mips_supports_z_point_type): New function. (mips_insert_point, mips_remove_point): Adjust to new interface. Use mips_supports_z_point_type. (the_low_target): Install mips_supports_z_point_type. * linux-ppc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-s390-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-sparc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-x86-low.c (x86_supports_z_point_type): New function. (x86_insert_point): Adjust to new insert_point interface. Use insert_memory_breakpoint. Adjust to new i386_low_insert_watchpoint interface. (x86_remove_point): Adjust to remove_point interface. Use remove_memory_breakpoint. Adjust to new i386_low_remove_watchpoint interface. (the_low_target): Install x86_supports_z_point_type. * lynx-low.c (lynx_target_ops): Install NULL as supports_z_point_type callback. * nto-low.c (nto_supports_z_point_type): New. (nto_insert_point, nto_remove_point): Adjust to new interface. (nto_target_ops): Install nto_supports_z_point_type. * mem-break.c: Adjust intro comment. (struct raw_breakpoint) <raw_type, size>: New fields. <inserted>: Update comment. <shlib_disabled>: Delete field. (enum bkpt_type) <gdb_breakpoint>: Delete value. <gdb_breakpoint_Z0, gdb_breakpoint_Z1, gdb_breakpoint_Z2, gdb_breakpoint_Z3, gdb_breakpoint_Z4>: New values. (raw_bkpt_type_to_target_hw_bp_type): New function. (find_enabled_raw_code_breakpoint_at): New function. (find_raw_breakpoint_at): New type and size parameters. Use them. (insert_memory_breakpoint): New function, based off set_raw_breakpoint_at. (remove_memory_breakpoint): New function. (set_raw_breakpoint_at): Reimplement. (set_breakpoint): New, based on set_breakpoint_at. (set_breakpoint_at): Reimplement. (delete_raw_breakpoint): Go through the_target->remove_point instead of assuming memory breakpoints. (find_gdb_breakpoint_at): Delete. (Z_packet_to_bkpt_type, Z_packet_to_raw_bkpt_type): New functions. (find_gdb_breakpoint): New function. (set_gdb_breakpoint_at): Delete. (z_type_supported): New function. (set_gdb_breakpoint_1): New function, loosely based off set_gdb_breakpoint_at. (check_gdb_bp_preconditions, set_gdb_breakpoint): New functions. (delete_gdb_breakpoint_at): Delete. (delete_gdb_breakpoint_1): New function, loosely based off delete_gdb_breakpoint_at. (delete_gdb_breakpoint): New function. (clear_gdb_breakpoint_conditions): Rename to ... (clear_breakpoint_conditions): ... this. Don't handle a NULL breakpoint. (add_condition_to_breakpoint): Make static. (add_breakpoint_condition): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_condition_true_at_breakpoint): Rename to ... (gdb_condition_true_at_breakpoint_z_type): ... this, and add z_type parameter. (gdb_condition_true_at_breakpoint): Reimplement. (add_breakpoint_commands): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_no_commands_at_breakpoint): Rename to ... (gdb_no_commands_at_breakpoint_z_type): ... this. Add z_type parameter. Return true if no breakpoint was found. Change debug output. (gdb_no_commands_at_breakpoint): Reimplement. (run_breakpoint_commands): Rename to ... (run_breakpoint_commands_z_type): ... this. Add z_type parameter, and change return type to boolean. (run_breakpoint_commands): New function. (gdb_breakpoint_here): Also check for Z1 breakpoints. (uninsert_raw_breakpoint): Don't try to reinsert a disabled breakpoint. Go through the_target->remove_point instead of assuming memory breakpoint. (uninsert_breakpoints_at, uninsert_all_breakpoints): Uninsert software and hardware breakpoints. (reinsert_raw_breakpoint): Go through the_target->insert_point instead of assuming memory breakpoint. (reinsert_breakpoints_at, reinsert_all_breakpoints): Reinsert software and hardware breakpoints. (check_breakpoints, breakpoint_here, breakpoint_inserted_here): Check both software and hardware breakpoints. (validate_inserted_breakpoint): Assert the breakpoint is a software breakpoint. Set the inserted flag to -1 instead of setting shlib_disabled. (delete_disabled_breakpoints): Adjust. (validate_breakpoints): Only validate software breakpoints. Adjust to inserted flag change. (check_mem_read, check_mem_write): Skip breakpoint types other than software breakpoints. Adjust to inserted flag change. * mem-break.h (enum raw_bkpt_type): New enum. (raw_breakpoint, struct process_info): Forward declare. (Z_packet_to_target_hw_bp_type): Delete declaration. (raw_bkpt_type_to_target_hw_bp_type, Z_packet_to_raw_bkpt_type) (set_gdb_breakpoint, delete_gdb_breakpoint) (clear_breakpoint_conditions): New declarations. (set_gdb_breakpoint_at, clear_gdb_breakpoint_conditions): Delete. (breakpoint_inserted_here): Update comment. (add_breakpoint_condition, add_breakpoint_commands): Replace address parameter with a breakpoint pointer parameter. (gdb_breakpoint_here): Update comment. (delete_gdb_breakpoint_at): Delete. (insert_memory_breakpoint, remove_memory_breakpoint): Declare. * server.c (process_point_options): Take a struct breakpoint pointer instead of an address. Adjust. (process_serial_event) <Z/z packets>: Use set_gdb_breakpoint and delete_gdb_breakpoint. * spu-low.c (spu_target_ops): Install NULL as supports_z_point_type method. * target.h: Include mem-break.h. (struct target_ops) <prepare_to_access_memory>: Update comment. <supports_z_point_type>: New field. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. * win32-arm-low.c (the_low_target): Install NULL as supports_z_point_type. * win32-i386-low.c (i386_supports_z_point_type): New function. (i386_insert_point, i386_remove_point): Adjust to new interface. (the_low_target): Install i386_supports_z_point_type. * win32-low.c (win32_supports_z_point_type): New function. (win32_insert_point, win32_remove_point): Adjust to new interface. (win32_target_ops): Install win32_supports_z_point_type. * win32-low.h (struct win32_target_ops): <supports_z_point_type>: New method. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. gdb/testsuite/ 2014-05-20 Pedro Alves <palves@redhat.com> * gdb.base/break-idempotent.c: New file. * gdb.base/break-idempotent.exp: New file.
2014-05-21 01:24:28 +08:00
/* Determine the type from the raw breakpoint type. */
targ_type = raw_bkpt_type_to_target_hw_bp_type (type);
if (targ_type != hw_execute)
[aarch64] Check region OK for HW watchpoint in GDBserver Nowadays, if user requests HW watchpoint to monitor a large memory area or unaligned area, aarch64 GDB will split into multiple aligned areas, and use multiple debugging registers to watch them. However, the registers are not updated in a transaction way. GDBserver doesn't revert updates in previous iterations if some debugging registers fail to update due to some reason, like no free debugging registers available, in the latter iteration. For example, if we have a char buf[34], and watch buf in gdb, (gdb) watch buf Hardware watchpoint 2: buf (gdb) c Continuing. infrun: clear_proceed_status_thread (Thread 13466) infrun: proceed (addr=0xffffffffffffffff, signal=GDB_SIGNAL_DEFAULT) infrun: step-over queue now empty infrun: resuming [Thread 13466] for step-over Sending packet: $m410838,22#35...Packet received: 00000000000000000000000000000000000000000000000000000000000000000000 infrun: skipping breakpoint: stepping past insn at: 0x400524 infrun: skipping breakpoint: stepping past insn at: 0x400524 Sending packet: $Z2,410838,22#80...Packet received: E01 <----- [1] Packet Z2 (write-watchpoint) is supported Sending packet: $Z0,7fb7fe0a8c,4#43...Packet received: OK Warning: Could not insert hardware watchpoint 2. Could not insert hardware breakpoints: You may have requested too many hardware breakpoints/watchpoints. GDB receives E01 for Z2 packet [1] but GDBserver updates the debugging register status, insert_point (addr=0x00410838, len=34, type=hw-write-watchpoint): BREAKPOINTs: BP0: addr=0x0, ctrl=0x00000000, ref.count=0 BP1: addr=0x0, ctrl=0x00000000, ref.count=0 BP2: addr=0x0, ctrl=0x00000000, ref.count=0 BP3: addr=0x0, ctrl=0x00000000, ref.count=0 BP4: addr=0x0, ctrl=0x00000000, ref.count=0 BP5: addr=0x0, ctrl=0x00000000, ref.count=0 WATCHPOINTs: WP0: addr=0x410850, ctrl=0x00001ff5, ref.count=1 WP1: addr=0x410848, ctrl=0x00001ff5, ref.count=1 WP2: addr=0x410840, ctrl=0x00001ff5, ref.count=1 WP3: addr=0x410838, ctrl=0x00001ff5, ref.count=1 four debugging registers can not monitor 34-byte long area, so the last iteration of updating debugging register state fails but previous iterations succeed. This makes GDB think no HW watchpoint is inserted but some debugging registers are used. This problem was exposed by "watch buf" gdb.base/watchpoint.exp with aarch64 GDBserver debugging arm 32-bit program. The buf is 30-byte long but 4-byte aligned, and four debugging registers can't cover 34-byte (extend 4 bytes to be 8-byte aligned) area. However, this problem does exist on non-multi-arch debugging scenario as well. This patch moves code in aarch64_linux_region_ok_for_hw_watchpoint to aarch64_linux_region_ok_for_watchpoint in nat/aarch64-linux-hw-point.c. Then, checks with aarch64_linux_region_ok_for_watchpoint, like what we are doing in GDB. If the region is OK, call aarch64_handle_watchpoint. Regression tested on aarch64 with both 64-bit program and 32-bit program. Some fails in gdb.base/watchpoint.exp are fixed. gdb: 2015-09-03 Yao Qi <yao.qi@linaro.org> * aarch64-linux-nat.c (aarch64_linux_region_ok_for_hw_watchpoint): Move code to aarch64_linux_region_ok_for_watchpoint. Call aarch64_linux_region_ok_for_watchpoint. * nat/aarch64-linux-hw-point.c (aarch64_linux_region_ok_for_watchpoint): New function. * nat/aarch64-linux-hw-point.h (aarch64_linux_region_ok_for_watchpoint): Declare it. gdb/gdbserver: 2015-09-03 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (aarch64_insert_point): Call aarch64_handle_watchpoint if aarch64_linux_region_ok_for_watchpoint returns true.
2015-09-03 21:01:49 +08:00
{
if (aarch64_linux_region_ok_for_watchpoint (addr, len))
ret = aarch64_handle_watchpoint (targ_type, addr, len,
1 /* is_insert */, state);
else
ret = -1;
}
else
aarch64 multi-arch part 6: HW breakpoint on unaligned address Nowadays, both aarch64 GDB and linux kernel assumes that address for setting breakpoint should be 4-byte aligned. However that is not true after we support multi-arch, because thumb instruction can be at 2-byte aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html to linux kernel is to teach kernel to handle 2-byte aligned address for HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte aligned address. First of all, we call gdbarch_breakpoint_from_pc to get the instruction length rather than using hard-coded 4. Secondly, in GDBserver, we set length back to 2 if it is 3, because GDB encode 3 in it to indicate it is a 32-bit thumb breakpoint. Then we relax the address alignment check from 4-byte aligned to 2-byte aligned. This patch enables some tests (such as gdb.base/break-idempotent.exp, gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and fixes many fails (such as gdb.base/hbreak2.exp) when the program is compiled in thumb mode on aarch64. Regression tested on aarch64-linux, both native and gdbserver. This is the last patch of multi-arch work. gdb: 2015-10-15 Yao Qi <yao.qi@linaro.org> * aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint): Call gdbarch_breakpoint_from_pc to instruction length. (aarch64_linux_remove_hw_breakpoint): Likewise. * common/common-regcache.h (regcache_register_size): Declare. * nat/aarch64-linux-hw-point.c: Include "common-regcache.h". (aarch64_point_is_aligned): Set alignment to 2 for breakpoint if the process is 32bit, otherwise set alignment to 4. (aarch64_handle_breakpoint): Update comments. * regcache.c (regcache_register_size): New function. gdb/gdbserver: 2015-10-15 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (aarch64_insert_point): Set len to 2 if it is 3. (aarch64_remove_point): Likewise. * regcache.c (regcache_register_size): New function.
2015-10-15 22:05:10 +08:00
{
if (len == 3)
{
/* LEN is 3 means the breakpoint is set on a 32-bit thumb
instruction. Set it to 2 to correctly encode length bit
mask in hardware/watchpoint control register. */
len = 2;
}
ret = aarch64_handle_breakpoint (targ_type, addr, len,
1 /* is_insert */, state);
}
if (show_debug_regs)
aarch64_show_debug_reg_state (state, "insert_point", addr, len,
targ_type);
return ret;
}
/* Implementation of linux_target_ops method "remove_point".
It actually only records the info of the to-be-removed bp/wp,
the actual removal will be done when threads are resumed. */
static int
[GDBserver] Make Zx/zx packet handling idempotent. This patch fixes hardware breakpoint regressions exposed by my fix for "PR breakpoints/7143 - Watchpoint does not trigger when first set", at https://sourceware.org/ml/gdb-patches/2014-03/msg00167.html The testsuite caught them on Linux/x86_64, at least. gdb.sum: gdb.sum: FAIL: gdb.base/hbreak2.exp: next over recursive call FAIL: gdb.base/hbreak2.exp: backtrace from factorial(5.1) FAIL: gdb.base/hbreak2.exp: continue until exit at recursive next test gdb.log: (gdb) next Program received signal SIGTRAP, Trace/breakpoint trap. factorial (value=4) at ../../../src/gdb/testsuite/gdb.base/break.c:113 113 if (value > 1) { /* set breakpoint 7 here */ (gdb) FAIL: gdb.base/hbreak2.exp: next over recursive call Actually, that patch just exposed a latent issue to "breakpoints always-inserted off" mode, not really caused it. After that patch, GDB no longer removes breakpoints at each internal event, thus making some scenarios behave like breakpoint always-inserted on. The bug is easy to trigger with always-inserted on. The issue is that since the target-side breakpoint conditions support, if the stub/server supports evaluating breakpoint conditions on the target side, then GDB is sending duplicate Zx packets to the target without removing them before, and GDBserver is not really expecting that for Z packets other than Z0/z0. E.g., with "set breakpoint always-inserted on" and "set debug remote 1": (gdb) b main Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $z0,410943,1#68...Packet received: OK And for Z1, similarly: (gdb) hbreak main Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Packet Z1 (hardware-breakpoint) is supported (gdb) hbreak main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) hbreak main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $z1,410943,1#69...Packet received: OK ^^^^^^^^^^^^ So GDB sent a bunch of Z1 packets, and then when finally removing the breakpoint, only one z1 packet was sent. On the GDBserver side (with monitor set debug-hw-points 1), in the Z1 case, we see: $ ./gdbserver :9999 ./gdbserver Process ./gdbserver created; pid = 8629 Listening on port 9999 Remote debugging from host 127.0.0.1 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=1 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=2 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=3 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=5 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 remove_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 That's one insert_watchpoint call for each Z1 packet, and then one remove_watchpoint call for the z1 packet. Notice how ref.count increased for each insert_watchpoint call, and then in the end, after GDB told GDBserver to forget about the hardware breakpoint, GDBserver ends with the the first debug register still with ref.count=4! IOW, the hardware breakpoint is left armed on the target, while on the GDB end it's gone. If the program happens to execute 0x410943 afterwards, then the CPU traps, GDBserver reports the trap to GDB, and GDB not having a breakpoint set at that address anymore, reports to the user a spurious SIGTRAP. This is exactly what is happening in the hbreak2.exp test, though in that case, it's a shared library event that triggers a breakpoint_re_set, when breakpoints are still inserted (because nowadays GDB doesn't remove breakpoints while handling internal events), and that recreates breakpoint locations, which likewise forces breakpoint reinsertion and Zx packet resends... That is a lot of bogus Zx duplication that should possibly be addressed on the GDB side. GDB resends Zx packets because the way to change the target-side condition, is to resend the breakpoint to the server with the new condition. (That's an option in the packet: e.g., "Z1,410943,1;X3,220027" for "hbreak main if 0". The packets in the examples above are shorter because the breakpoints don't have conditions attached). GDB doesn't remove the breakpoint first before reinserting it because that'd be bad for non-stop, as it'd open a window where the inferior could miss the breakpoint. The conditions actually haven't changed between the resends, but GDB isn't smart enough to realize that. (TBC, if the target doesn't support target-side conditions, then GDB doesn't trigger these resends (init_bp_location calls mark_breakpoint_location_modified, and that does nothing if condition evaluation is on the host side. The resends are caused by the 'loc->condition_changed = condition_modified.' line.) But, even if GDB was made smarter, GDBserver should really still handle the resends anyway. So target-side conditions also aren't really to blame. The documentation of the Z/z packets says: "To avoid potential problems with duplicate packets, the operations should be implemented in an idempotent way." As such, we may want to fix GDB, but we should definitely fix GDBserver. The fix is a prerequisite for target-side conditions on hardware breakpoints anyway (and while at it, on watchpoints too). GDBserver indeed already treats duplicate Z0 packets in an idempotent way. mem-break.c has the concept of high-level and low-level breakpoints, somewhat similar to GDB's split of breakpoints vs breakpoint locations, and keeps track of multiple breakpoints referencing the same address/location, for the case of an internal GDBserver breakpoint or a tracepoint being set at the same address as a GDB breakpoint. But, it only allows GDB to ever contribute one reference to a software breakpoint location. IOW, if gdbserver sees a Z0 packet for the same address where it already had a GDB breakpoint set, then GDBserver won't create another high-level GDB breakpoint. However, mem-break.c only tracks GDB Z0 breakpoints. The same logic should apply to all kinds of Zx packets. Currently, gdbserver passes down each duplicate Zx (other than Z0) request directly to the target->insert_point routine. The x86 watchpoint support itself refcounts watchpoint / hw breakpoint requests, to handle overlapping watchpoints, and save debug registers. But that code doesn't (and really shouldn't) handle the duplicate requests, assuming that for each insert there will be a corresponding remove. So the fix is to generalize mem-break.c to track all kinds of Zx breakpoints, and filter out duplicates. As mentioned, this ends up adding support for target-side conditions on hardware breakpoints and watchpoints too (though GDB itself doesn't support the latter yet). Probably the least obvious change in the patch is that it kind of turns the breakpoint insert/remove APIs inside out. Before, the target methods were only called for GDB breakpoints. The internal breakpoint set/delete methods inserted memory breakpoints directly bypassing the insert/remove target methods. That's not good when the target should use a debug API to set software breakpoints, instead of relying on GDBserver patching memory with breakpoint instructions, as is the case of NTO. Now removal/insertion of all kinds of breakpoints/watchpoints, either internal, or from GDB, always go through the target methods. The insert_point/remove_point methods no longer get passed a Z packet type, but an internal/raw breakpoint type. They're also passed a pointer to the raw breakpoint itself (note that's still opaque outside mem-break.c), so that insert_memory_breakpoint / remove_memory_breakpoint have access to the breakpoint's shadow buffer. I first tried passing down a new structure based on GDB's "struct bp_target_info" (actually with that name exactly), but then decided against it as unnecessary complication. As software/memory breakpoints work by poking at memory, when setting a GDB Z0 breakpoint (but not internal breakpoints, as those can assume the conditions are already right), we need to tell the target to prepare to access memory (which on Linux means stop threads). If that operation fails, we need to return error to GDB. Seeing an error, if this is the first breakpoint of that type that GDB tries to insert, GDB would then assume the breakpoint type is supported, but it may actually not be. So we need to check whether the type is supported at all before preparing to access memory. And to solve that, the patch adds a new target->supports_z_point_type method that is called before actually trying to insert the breakpoint. Other than that, hopefully the change is more or less obvious. New test added that exercises the hbreak2.exp regression in a more direct way, without relying on a breakpoint re-set happening before main is reached. Tested by building GDBserver for: aarch64-linux-gnu arm-linux-gnueabihf i686-pc-linux-gnu i686-w64-mingw32 m68k-linux-gnu mips-linux-gnu mips-uclinux nios2-linux-gnu powerpc-linux-gnu sh-linux-gnu tilegx-unknown-linux-gnu x86_64-redhat-linux x86_64-w64-mingw32 And also regression tested on x86_64 Fedora 20. gdb/gdbserver/ 2014-05-20 Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_insert_point) (aarch64_remove_point): No longer check whether the type is supported here. Adjust to new interface. (the_low_target): Install aarch64_supports_z_point_type as supports_z_point_type method. * linux-arm-low.c (raw_bkpt_type_to_arm_hwbp_type): New function. (arm_linux_hw_point_initialize): Take an enum raw_bkpt_type instead of a Z packet char. Adjust. (arm_supports_z_point_type): New function. (arm_insert_point, arm_remove_point): Adjust to new interface. (the_low_target): Install arm_supports_z_point_type. * linux-crisv32-low.c (cris_supports_z_point_type): New function. (cris_insert_point, cris_remove_point): Adjust to new interface. Don't check whether the type is supported here. (the_low_target): Install cris_supports_z_point_type. * linux-low.c (linux_supports_z_point_type): New function. (linux_insert_point, linux_remove_point): Adjust to new interface. * linux-low.h (struct linux_target_ops) <insert_point, remove_point>: Take an enum raw_bkpt_type instead of a char. Add raw_breakpoint pointer parameter. <supports_z_point_type>: New method. * linux-mips-low.c (mips_supports_z_point_type): New function. (mips_insert_point, mips_remove_point): Adjust to new interface. Use mips_supports_z_point_type. (the_low_target): Install mips_supports_z_point_type. * linux-ppc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-s390-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-sparc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-x86-low.c (x86_supports_z_point_type): New function. (x86_insert_point): Adjust to new insert_point interface. Use insert_memory_breakpoint. Adjust to new i386_low_insert_watchpoint interface. (x86_remove_point): Adjust to remove_point interface. Use remove_memory_breakpoint. Adjust to new i386_low_remove_watchpoint interface. (the_low_target): Install x86_supports_z_point_type. * lynx-low.c (lynx_target_ops): Install NULL as supports_z_point_type callback. * nto-low.c (nto_supports_z_point_type): New. (nto_insert_point, nto_remove_point): Adjust to new interface. (nto_target_ops): Install nto_supports_z_point_type. * mem-break.c: Adjust intro comment. (struct raw_breakpoint) <raw_type, size>: New fields. <inserted>: Update comment. <shlib_disabled>: Delete field. (enum bkpt_type) <gdb_breakpoint>: Delete value. <gdb_breakpoint_Z0, gdb_breakpoint_Z1, gdb_breakpoint_Z2, gdb_breakpoint_Z3, gdb_breakpoint_Z4>: New values. (raw_bkpt_type_to_target_hw_bp_type): New function. (find_enabled_raw_code_breakpoint_at): New function. (find_raw_breakpoint_at): New type and size parameters. Use them. (insert_memory_breakpoint): New function, based off set_raw_breakpoint_at. (remove_memory_breakpoint): New function. (set_raw_breakpoint_at): Reimplement. (set_breakpoint): New, based on set_breakpoint_at. (set_breakpoint_at): Reimplement. (delete_raw_breakpoint): Go through the_target->remove_point instead of assuming memory breakpoints. (find_gdb_breakpoint_at): Delete. (Z_packet_to_bkpt_type, Z_packet_to_raw_bkpt_type): New functions. (find_gdb_breakpoint): New function. (set_gdb_breakpoint_at): Delete. (z_type_supported): New function. (set_gdb_breakpoint_1): New function, loosely based off set_gdb_breakpoint_at. (check_gdb_bp_preconditions, set_gdb_breakpoint): New functions. (delete_gdb_breakpoint_at): Delete. (delete_gdb_breakpoint_1): New function, loosely based off delete_gdb_breakpoint_at. (delete_gdb_breakpoint): New function. (clear_gdb_breakpoint_conditions): Rename to ... (clear_breakpoint_conditions): ... this. Don't handle a NULL breakpoint. (add_condition_to_breakpoint): Make static. (add_breakpoint_condition): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_condition_true_at_breakpoint): Rename to ... (gdb_condition_true_at_breakpoint_z_type): ... this, and add z_type parameter. (gdb_condition_true_at_breakpoint): Reimplement. (add_breakpoint_commands): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_no_commands_at_breakpoint): Rename to ... (gdb_no_commands_at_breakpoint_z_type): ... this. Add z_type parameter. Return true if no breakpoint was found. Change debug output. (gdb_no_commands_at_breakpoint): Reimplement. (run_breakpoint_commands): Rename to ... (run_breakpoint_commands_z_type): ... this. Add z_type parameter, and change return type to boolean. (run_breakpoint_commands): New function. (gdb_breakpoint_here): Also check for Z1 breakpoints. (uninsert_raw_breakpoint): Don't try to reinsert a disabled breakpoint. Go through the_target->remove_point instead of assuming memory breakpoint. (uninsert_breakpoints_at, uninsert_all_breakpoints): Uninsert software and hardware breakpoints. (reinsert_raw_breakpoint): Go through the_target->insert_point instead of assuming memory breakpoint. (reinsert_breakpoints_at, reinsert_all_breakpoints): Reinsert software and hardware breakpoints. (check_breakpoints, breakpoint_here, breakpoint_inserted_here): Check both software and hardware breakpoints. (validate_inserted_breakpoint): Assert the breakpoint is a software breakpoint. Set the inserted flag to -1 instead of setting shlib_disabled. (delete_disabled_breakpoints): Adjust. (validate_breakpoints): Only validate software breakpoints. Adjust to inserted flag change. (check_mem_read, check_mem_write): Skip breakpoint types other than software breakpoints. Adjust to inserted flag change. * mem-break.h (enum raw_bkpt_type): New enum. (raw_breakpoint, struct process_info): Forward declare. (Z_packet_to_target_hw_bp_type): Delete declaration. (raw_bkpt_type_to_target_hw_bp_type, Z_packet_to_raw_bkpt_type) (set_gdb_breakpoint, delete_gdb_breakpoint) (clear_breakpoint_conditions): New declarations. (set_gdb_breakpoint_at, clear_gdb_breakpoint_conditions): Delete. (breakpoint_inserted_here): Update comment. (add_breakpoint_condition, add_breakpoint_commands): Replace address parameter with a breakpoint pointer parameter. (gdb_breakpoint_here): Update comment. (delete_gdb_breakpoint_at): Delete. (insert_memory_breakpoint, remove_memory_breakpoint): Declare. * server.c (process_point_options): Take a struct breakpoint pointer instead of an address. Adjust. (process_serial_event) <Z/z packets>: Use set_gdb_breakpoint and delete_gdb_breakpoint. * spu-low.c (spu_target_ops): Install NULL as supports_z_point_type method. * target.h: Include mem-break.h. (struct target_ops) <prepare_to_access_memory>: Update comment. <supports_z_point_type>: New field. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. * win32-arm-low.c (the_low_target): Install NULL as supports_z_point_type. * win32-i386-low.c (i386_supports_z_point_type): New function. (i386_insert_point, i386_remove_point): Adjust to new interface. (the_low_target): Install i386_supports_z_point_type. * win32-low.c (win32_supports_z_point_type): New function. (win32_insert_point, win32_remove_point): Adjust to new interface. (win32_target_ops): Install win32_supports_z_point_type. * win32-low.h (struct win32_target_ops): <supports_z_point_type>: New method. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. gdb/testsuite/ 2014-05-20 Pedro Alves <palves@redhat.com> * gdb.base/break-idempotent.c: New file. * gdb.base/break-idempotent.exp: New file.
2014-05-21 01:24:28 +08:00
aarch64_remove_point (enum raw_bkpt_type type, CORE_ADDR addr,
int len, struct raw_breakpoint *bp)
{
int ret;
enum target_hw_bp_type targ_type;
struct aarch64_debug_reg_state *state
= aarch64_get_debug_reg_state (pid_of (current_thread));
if (show_debug_regs)
fprintf (stderr, "remove_point on entry (addr=0x%08lx, len=%d)\n",
(unsigned long) addr, len);
[GDBserver] Make Zx/zx packet handling idempotent. This patch fixes hardware breakpoint regressions exposed by my fix for "PR breakpoints/7143 - Watchpoint does not trigger when first set", at https://sourceware.org/ml/gdb-patches/2014-03/msg00167.html The testsuite caught them on Linux/x86_64, at least. gdb.sum: gdb.sum: FAIL: gdb.base/hbreak2.exp: next over recursive call FAIL: gdb.base/hbreak2.exp: backtrace from factorial(5.1) FAIL: gdb.base/hbreak2.exp: continue until exit at recursive next test gdb.log: (gdb) next Program received signal SIGTRAP, Trace/breakpoint trap. factorial (value=4) at ../../../src/gdb/testsuite/gdb.base/break.c:113 113 if (value > 1) { /* set breakpoint 7 here */ (gdb) FAIL: gdb.base/hbreak2.exp: next over recursive call Actually, that patch just exposed a latent issue to "breakpoints always-inserted off" mode, not really caused it. After that patch, GDB no longer removes breakpoints at each internal event, thus making some scenarios behave like breakpoint always-inserted on. The bug is easy to trigger with always-inserted on. The issue is that since the target-side breakpoint conditions support, if the stub/server supports evaluating breakpoint conditions on the target side, then GDB is sending duplicate Zx packets to the target without removing them before, and GDBserver is not really expecting that for Z packets other than Z0/z0. E.g., with "set breakpoint always-inserted on" and "set debug remote 1": (gdb) b main Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $z0,410943,1#68...Packet received: OK And for Z1, similarly: (gdb) hbreak main Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Packet Z1 (hardware-breakpoint) is supported (gdb) hbreak main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) hbreak main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $z1,410943,1#69...Packet received: OK ^^^^^^^^^^^^ So GDB sent a bunch of Z1 packets, and then when finally removing the breakpoint, only one z1 packet was sent. On the GDBserver side (with monitor set debug-hw-points 1), in the Z1 case, we see: $ ./gdbserver :9999 ./gdbserver Process ./gdbserver created; pid = 8629 Listening on port 9999 Remote debugging from host 127.0.0.1 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=1 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=2 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=3 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=5 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 remove_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 That's one insert_watchpoint call for each Z1 packet, and then one remove_watchpoint call for the z1 packet. Notice how ref.count increased for each insert_watchpoint call, and then in the end, after GDB told GDBserver to forget about the hardware breakpoint, GDBserver ends with the the first debug register still with ref.count=4! IOW, the hardware breakpoint is left armed on the target, while on the GDB end it's gone. If the program happens to execute 0x410943 afterwards, then the CPU traps, GDBserver reports the trap to GDB, and GDB not having a breakpoint set at that address anymore, reports to the user a spurious SIGTRAP. This is exactly what is happening in the hbreak2.exp test, though in that case, it's a shared library event that triggers a breakpoint_re_set, when breakpoints are still inserted (because nowadays GDB doesn't remove breakpoints while handling internal events), and that recreates breakpoint locations, which likewise forces breakpoint reinsertion and Zx packet resends... That is a lot of bogus Zx duplication that should possibly be addressed on the GDB side. GDB resends Zx packets because the way to change the target-side condition, is to resend the breakpoint to the server with the new condition. (That's an option in the packet: e.g., "Z1,410943,1;X3,220027" for "hbreak main if 0". The packets in the examples above are shorter because the breakpoints don't have conditions attached). GDB doesn't remove the breakpoint first before reinserting it because that'd be bad for non-stop, as it'd open a window where the inferior could miss the breakpoint. The conditions actually haven't changed between the resends, but GDB isn't smart enough to realize that. (TBC, if the target doesn't support target-side conditions, then GDB doesn't trigger these resends (init_bp_location calls mark_breakpoint_location_modified, and that does nothing if condition evaluation is on the host side. The resends are caused by the 'loc->condition_changed = condition_modified.' line.) But, even if GDB was made smarter, GDBserver should really still handle the resends anyway. So target-side conditions also aren't really to blame. The documentation of the Z/z packets says: "To avoid potential problems with duplicate packets, the operations should be implemented in an idempotent way." As such, we may want to fix GDB, but we should definitely fix GDBserver. The fix is a prerequisite for target-side conditions on hardware breakpoints anyway (and while at it, on watchpoints too). GDBserver indeed already treats duplicate Z0 packets in an idempotent way. mem-break.c has the concept of high-level and low-level breakpoints, somewhat similar to GDB's split of breakpoints vs breakpoint locations, and keeps track of multiple breakpoints referencing the same address/location, for the case of an internal GDBserver breakpoint or a tracepoint being set at the same address as a GDB breakpoint. But, it only allows GDB to ever contribute one reference to a software breakpoint location. IOW, if gdbserver sees a Z0 packet for the same address where it already had a GDB breakpoint set, then GDBserver won't create another high-level GDB breakpoint. However, mem-break.c only tracks GDB Z0 breakpoints. The same logic should apply to all kinds of Zx packets. Currently, gdbserver passes down each duplicate Zx (other than Z0) request directly to the target->insert_point routine. The x86 watchpoint support itself refcounts watchpoint / hw breakpoint requests, to handle overlapping watchpoints, and save debug registers. But that code doesn't (and really shouldn't) handle the duplicate requests, assuming that for each insert there will be a corresponding remove. So the fix is to generalize mem-break.c to track all kinds of Zx breakpoints, and filter out duplicates. As mentioned, this ends up adding support for target-side conditions on hardware breakpoints and watchpoints too (though GDB itself doesn't support the latter yet). Probably the least obvious change in the patch is that it kind of turns the breakpoint insert/remove APIs inside out. Before, the target methods were only called for GDB breakpoints. The internal breakpoint set/delete methods inserted memory breakpoints directly bypassing the insert/remove target methods. That's not good when the target should use a debug API to set software breakpoints, instead of relying on GDBserver patching memory with breakpoint instructions, as is the case of NTO. Now removal/insertion of all kinds of breakpoints/watchpoints, either internal, or from GDB, always go through the target methods. The insert_point/remove_point methods no longer get passed a Z packet type, but an internal/raw breakpoint type. They're also passed a pointer to the raw breakpoint itself (note that's still opaque outside mem-break.c), so that insert_memory_breakpoint / remove_memory_breakpoint have access to the breakpoint's shadow buffer. I first tried passing down a new structure based on GDB's "struct bp_target_info" (actually with that name exactly), but then decided against it as unnecessary complication. As software/memory breakpoints work by poking at memory, when setting a GDB Z0 breakpoint (but not internal breakpoints, as those can assume the conditions are already right), we need to tell the target to prepare to access memory (which on Linux means stop threads). If that operation fails, we need to return error to GDB. Seeing an error, if this is the first breakpoint of that type that GDB tries to insert, GDB would then assume the breakpoint type is supported, but it may actually not be. So we need to check whether the type is supported at all before preparing to access memory. And to solve that, the patch adds a new target->supports_z_point_type method that is called before actually trying to insert the breakpoint. Other than that, hopefully the change is more or less obvious. New test added that exercises the hbreak2.exp regression in a more direct way, without relying on a breakpoint re-set happening before main is reached. Tested by building GDBserver for: aarch64-linux-gnu arm-linux-gnueabihf i686-pc-linux-gnu i686-w64-mingw32 m68k-linux-gnu mips-linux-gnu mips-uclinux nios2-linux-gnu powerpc-linux-gnu sh-linux-gnu tilegx-unknown-linux-gnu x86_64-redhat-linux x86_64-w64-mingw32 And also regression tested on x86_64 Fedora 20. gdb/gdbserver/ 2014-05-20 Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_insert_point) (aarch64_remove_point): No longer check whether the type is supported here. Adjust to new interface. (the_low_target): Install aarch64_supports_z_point_type as supports_z_point_type method. * linux-arm-low.c (raw_bkpt_type_to_arm_hwbp_type): New function. (arm_linux_hw_point_initialize): Take an enum raw_bkpt_type instead of a Z packet char. Adjust. (arm_supports_z_point_type): New function. (arm_insert_point, arm_remove_point): Adjust to new interface. (the_low_target): Install arm_supports_z_point_type. * linux-crisv32-low.c (cris_supports_z_point_type): New function. (cris_insert_point, cris_remove_point): Adjust to new interface. Don't check whether the type is supported here. (the_low_target): Install cris_supports_z_point_type. * linux-low.c (linux_supports_z_point_type): New function. (linux_insert_point, linux_remove_point): Adjust to new interface. * linux-low.h (struct linux_target_ops) <insert_point, remove_point>: Take an enum raw_bkpt_type instead of a char. Add raw_breakpoint pointer parameter. <supports_z_point_type>: New method. * linux-mips-low.c (mips_supports_z_point_type): New function. (mips_insert_point, mips_remove_point): Adjust to new interface. Use mips_supports_z_point_type. (the_low_target): Install mips_supports_z_point_type. * linux-ppc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-s390-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-sparc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-x86-low.c (x86_supports_z_point_type): New function. (x86_insert_point): Adjust to new insert_point interface. Use insert_memory_breakpoint. Adjust to new i386_low_insert_watchpoint interface. (x86_remove_point): Adjust to remove_point interface. Use remove_memory_breakpoint. Adjust to new i386_low_remove_watchpoint interface. (the_low_target): Install x86_supports_z_point_type. * lynx-low.c (lynx_target_ops): Install NULL as supports_z_point_type callback. * nto-low.c (nto_supports_z_point_type): New. (nto_insert_point, nto_remove_point): Adjust to new interface. (nto_target_ops): Install nto_supports_z_point_type. * mem-break.c: Adjust intro comment. (struct raw_breakpoint) <raw_type, size>: New fields. <inserted>: Update comment. <shlib_disabled>: Delete field. (enum bkpt_type) <gdb_breakpoint>: Delete value. <gdb_breakpoint_Z0, gdb_breakpoint_Z1, gdb_breakpoint_Z2, gdb_breakpoint_Z3, gdb_breakpoint_Z4>: New values. (raw_bkpt_type_to_target_hw_bp_type): New function. (find_enabled_raw_code_breakpoint_at): New function. (find_raw_breakpoint_at): New type and size parameters. Use them. (insert_memory_breakpoint): New function, based off set_raw_breakpoint_at. (remove_memory_breakpoint): New function. (set_raw_breakpoint_at): Reimplement. (set_breakpoint): New, based on set_breakpoint_at. (set_breakpoint_at): Reimplement. (delete_raw_breakpoint): Go through the_target->remove_point instead of assuming memory breakpoints. (find_gdb_breakpoint_at): Delete. (Z_packet_to_bkpt_type, Z_packet_to_raw_bkpt_type): New functions. (find_gdb_breakpoint): New function. (set_gdb_breakpoint_at): Delete. (z_type_supported): New function. (set_gdb_breakpoint_1): New function, loosely based off set_gdb_breakpoint_at. (check_gdb_bp_preconditions, set_gdb_breakpoint): New functions. (delete_gdb_breakpoint_at): Delete. (delete_gdb_breakpoint_1): New function, loosely based off delete_gdb_breakpoint_at. (delete_gdb_breakpoint): New function. (clear_gdb_breakpoint_conditions): Rename to ... (clear_breakpoint_conditions): ... this. Don't handle a NULL breakpoint. (add_condition_to_breakpoint): Make static. (add_breakpoint_condition): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_condition_true_at_breakpoint): Rename to ... (gdb_condition_true_at_breakpoint_z_type): ... this, and add z_type parameter. (gdb_condition_true_at_breakpoint): Reimplement. (add_breakpoint_commands): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_no_commands_at_breakpoint): Rename to ... (gdb_no_commands_at_breakpoint_z_type): ... this. Add z_type parameter. Return true if no breakpoint was found. Change debug output. (gdb_no_commands_at_breakpoint): Reimplement. (run_breakpoint_commands): Rename to ... (run_breakpoint_commands_z_type): ... this. Add z_type parameter, and change return type to boolean. (run_breakpoint_commands): New function. (gdb_breakpoint_here): Also check for Z1 breakpoints. (uninsert_raw_breakpoint): Don't try to reinsert a disabled breakpoint. Go through the_target->remove_point instead of assuming memory breakpoint. (uninsert_breakpoints_at, uninsert_all_breakpoints): Uninsert software and hardware breakpoints. (reinsert_raw_breakpoint): Go through the_target->insert_point instead of assuming memory breakpoint. (reinsert_breakpoints_at, reinsert_all_breakpoints): Reinsert software and hardware breakpoints. (check_breakpoints, breakpoint_here, breakpoint_inserted_here): Check both software and hardware breakpoints. (validate_inserted_breakpoint): Assert the breakpoint is a software breakpoint. Set the inserted flag to -1 instead of setting shlib_disabled. (delete_disabled_breakpoints): Adjust. (validate_breakpoints): Only validate software breakpoints. Adjust to inserted flag change. (check_mem_read, check_mem_write): Skip breakpoint types other than software breakpoints. Adjust to inserted flag change. * mem-break.h (enum raw_bkpt_type): New enum. (raw_breakpoint, struct process_info): Forward declare. (Z_packet_to_target_hw_bp_type): Delete declaration. (raw_bkpt_type_to_target_hw_bp_type, Z_packet_to_raw_bkpt_type) (set_gdb_breakpoint, delete_gdb_breakpoint) (clear_breakpoint_conditions): New declarations. (set_gdb_breakpoint_at, clear_gdb_breakpoint_conditions): Delete. (breakpoint_inserted_here): Update comment. (add_breakpoint_condition, add_breakpoint_commands): Replace address parameter with a breakpoint pointer parameter. (gdb_breakpoint_here): Update comment. (delete_gdb_breakpoint_at): Delete. (insert_memory_breakpoint, remove_memory_breakpoint): Declare. * server.c (process_point_options): Take a struct breakpoint pointer instead of an address. Adjust. (process_serial_event) <Z/z packets>: Use set_gdb_breakpoint and delete_gdb_breakpoint. * spu-low.c (spu_target_ops): Install NULL as supports_z_point_type method. * target.h: Include mem-break.h. (struct target_ops) <prepare_to_access_memory>: Update comment. <supports_z_point_type>: New field. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. * win32-arm-low.c (the_low_target): Install NULL as supports_z_point_type. * win32-i386-low.c (i386_supports_z_point_type): New function. (i386_insert_point, i386_remove_point): Adjust to new interface. (the_low_target): Install i386_supports_z_point_type. * win32-low.c (win32_supports_z_point_type): New function. (win32_insert_point, win32_remove_point): Adjust to new interface. (win32_target_ops): Install win32_supports_z_point_type. * win32-low.h (struct win32_target_ops): <supports_z_point_type>: New method. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. gdb/testsuite/ 2014-05-20 Pedro Alves <palves@redhat.com> * gdb.base/break-idempotent.c: New file. * gdb.base/break-idempotent.exp: New file.
2014-05-21 01:24:28 +08:00
/* Determine the type from the raw breakpoint type. */
targ_type = raw_bkpt_type_to_target_hw_bp_type (type);
/* Set up state pointers. */
if (targ_type != hw_execute)
ret =
Pass aarch64_debug_reg_state to functions Some functions on handling HW watchpoint in GDB and GDBserver looks the same except the code getting debug register state from current inferior. In GDB, we get debug register state like this: state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid)); while in GDBserver, we get debug register state like this: state = aarch64_get_debug_reg_state (); This patch is to move two lines above out of some functions, and pass aarch64_debug_reg_state to these functions, in this way, these functions are the same, and can be moved to a common place. gdb: 2015-07-17 Yao Qi <yao.qi@linaro.org> * aarch64-linux-nat.c (aarch64_handle_breakpoint): Add argument state and don't call aarch64_get_debug_reg_state. All callers update. (aarch64_linux_insert_hw_breakpoint): Call aarch64_get_debug_reg_state earlier. (aarch64_linux_remove_hw_breakpoint): Likewise. (aarch64_handle_aligned_watchpoint): Add argument state and don't call aarch64_get_debug_reg_state. All callers update. (aarch64_handle_unaligned_watchpoint): Likewise. (aarch64_handle_watchpoint): Add argument state. (aarch64_linux_insert_watchpoint): Call aarch64_get_debug_reg_state earlier. (aarch64_linux_remove_watchpoint): Likewise. gdb/gdbserver: 2015-07-17 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (aarch64_handle_breakpoint): Add argument state and don't aarch64_get_debug_reg_state. All callers update. (aarch64_handle_aligned_watchpoint): Likewise. (aarch64_handle_unaligned_watchpoint): Likewise. (aarch64_handle_watchpoint): Likewise. (aarch64_insert_point): Call aarch64_get_debug_reg_state earlier. (aarch64_remove_point): Likewise.
2015-07-17 21:32:40 +08:00
aarch64_handle_watchpoint (targ_type, addr, len, 0 /* is_insert */,
state);
else
aarch64 multi-arch part 6: HW breakpoint on unaligned address Nowadays, both aarch64 GDB and linux kernel assumes that address for setting breakpoint should be 4-byte aligned. However that is not true after we support multi-arch, because thumb instruction can be at 2-byte aligned address. Patch http://lists.infradead.org/pipermail/linux-arm-kernel/2015-October/375141.html to linux kernel is to teach kernel to handle 2-byte aligned address for HW breakpoint, while this patch is to teach aarch64 GDB handle 2-byte aligned address. First of all, we call gdbarch_breakpoint_from_pc to get the instruction length rather than using hard-coded 4. Secondly, in GDBserver, we set length back to 2 if it is 3, because GDB encode 3 in it to indicate it is a 32-bit thumb breakpoint. Then we relax the address alignment check from 4-byte aligned to 2-byte aligned. This patch enables some tests (such as gdb.base/break-idempotent.exp, gdb.base/cond-eval-mode.exp, gdb.base/watchpoint-reuse-slot.exp,) and fixes many fails (such as gdb.base/hbreak2.exp) when the program is compiled in thumb mode on aarch64. Regression tested on aarch64-linux, both native and gdbserver. This is the last patch of multi-arch work. gdb: 2015-10-15 Yao Qi <yao.qi@linaro.org> * aarch64-linux-nat.c (aarch64_linux_insert_hw_breakpoint): Call gdbarch_breakpoint_from_pc to instruction length. (aarch64_linux_remove_hw_breakpoint): Likewise. * common/common-regcache.h (regcache_register_size): Declare. * nat/aarch64-linux-hw-point.c: Include "common-regcache.h". (aarch64_point_is_aligned): Set alignment to 2 for breakpoint if the process is 32bit, otherwise set alignment to 4. (aarch64_handle_breakpoint): Update comments. * regcache.c (regcache_register_size): New function. gdb/gdbserver: 2015-10-15 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (aarch64_insert_point): Set len to 2 if it is 3. (aarch64_remove_point): Likewise. * regcache.c (regcache_register_size): New function.
2015-10-15 22:05:10 +08:00
{
if (len == 3)
{
/* LEN is 3 means the breakpoint is set on a 32-bit thumb
instruction. Set it to 2 to correctly encode length bit
mask in hardware/watchpoint control register. */
len = 2;
}
ret = aarch64_handle_breakpoint (targ_type, addr, len,
0 /* is_insert */, state);
}
if (show_debug_regs)
aarch64_show_debug_reg_state (state, "remove_point", addr, len,
targ_type);
return ret;
}
/* Implementation of linux_target_ops method "stopped_data_address". */
static CORE_ADDR
aarch64_stopped_data_address (void)
{
siginfo_t siginfo;
int pid, i;
struct aarch64_debug_reg_state *state;
Rename current_inferior as current_thread in gdbserver GDB has a function named "current_inferior" and gdbserver has a global variable named "current_inferior", but the two are not equivalent; indeed, gdbserver does not have any real equivalent of what GDB calls an inferior. What gdbserver's "current_inferior" is actually pointing to is a structure describing the current thread. This commit renames current_inferior as current_thread in gdbserver to clarify this. It also renames the function "set_desired_inferior" to "set_desired_thread" and renames various local variables from foo_inferior to foo_thread. gdb/gdbserver/ChangeLog: * inferiors.h (current_inferior): Renamed as... (current_thread): New variable. All uses updated. * linux-low.c (get_pc): Renamed saved_inferior as saved_thread. (maybe_move_out_of_jump_pad): Likewise. (cancel_breakpoint): Likewise. (linux_low_filter_event): Likewise. (wait_for_sigstop): Likewise. (linux_resume_one_lwp): Likewise. (need_step_over_p): Likewise. (start_step_over): Likewise. (linux_stabilize_threads): Renamed save_inferior as saved_thread. * linux-x86-low.c (x86_linux_update_xmltarget): Likewise. * proc-service.c (ps_lgetregs): Renamed reg_inferior as reg_thread and save_inferior as saved_thread. * regcache.c (get_thread_regcache): Renamed saved_inferior as saved_thread. (regcache_invalidate_thread): Likewise. * remote-utils.c (prepare_resume_reply): Likewise. * thread-db.c (thread_db_get_tls_address): Likewise. (disable_thread_event_reporting): Likewise. (remove_thread_event_breakpoints): Likewise. * tracepoint.c (gdb_agent_about_to_close): Renamed save_inferior as saved_thread. * target.h (set_desired_inferior): Renamed as... (set_desired_thread): New declaration. All uses updated. * server.c (myresume): Updated comment to reference thread instead of inferior. (handle_serial_event): Likewise. (handle_target_event): Likewise.
2014-09-10 17:37:11 +08:00
pid = lwpid_of (current_thread);
/* Get the siginfo. */
if (ptrace (PTRACE_GETSIGINFO, pid, NULL, &siginfo) != 0)
return (CORE_ADDR) 0;
/* Need to be a hardware breakpoint/watchpoint trap. */
if (siginfo.si_signo != SIGTRAP
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
return (CORE_ADDR) 0;
/* Check if the address matches any watched address. */
state = aarch64_get_debug_reg_state (pid_of (current_thread));
for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
{
aarch64: PR 19806: watchpoints: false negatives + PR 20207 contiguous ones Some unaligned watchpoints were currently missed. On old kernels as specified in kernel RFE: aarch64: ptrace: BAS: Support any contiguous range (edit) https://sourceware.org/bugzilla/show_bug.cgi?id=20207 after this patch some other unaligned watchpoints will get reported as false positives. With new kernels all the watchpoints should work exactly. There may be a regresion that it now less merges watchpoints so that with multiple overlapping watchpoints it may run out of the 4 hardware watchpoint registers. But as discussed in the original thread GDB needs some generic watchpoints merging framework to be used by all the target specific code. Even current FSF GDB code does not merge it perfectly. Also with the more precise watchpoints one can technically merge them less. And I do not think it matters too much to improve mergeability only for old kernels. Still even on new kernels some better merging logic would make sense. There remains one issue: kernel-4.15.14-300.fc27.armv7hl FAIL: gdb.base/watchpoint-unaligned.exp: continue FAIL: gdb.base/watchpoint-unaligned.exp: continue (gdb) continue Continuing. Unexpected error setting watchpoint: Invalid argument. (gdb) FAIL: gdb.base/watchpoint-unaligned.exp: continue But that looks as a kernel bug to me. (1) It is not a regression by this patch. (2) It is unrelated to this patch. gdb/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> PR breakpoints/19806 and support for PR external/20207. * NEWS: Mention Aarch64 watchpoint improvements. * aarch64-linux-nat.c (aarch64_linux_stopped_data_address): Fix missed watchpoints and PR external/20207 watchpoints. * nat/aarch64-linux-hw-point.c (kernel_supports_any_contiguous_range): New. (aarch64_watchpoint_offset): New. (aarch64_watchpoint_length): Support PR external/20207 watchpoints. (aarch64_point_encode_ctrl_reg): New parameter offset, new asserts. (aarch64_point_is_aligned): Support PR external/20207 watchpoints. (aarch64_align_watchpoint): New parameters aligned_offset_p and next_addr_orig_p. Support PR external/20207 watchpoints. (aarch64_downgrade_regs): New. (aarch64_dr_state_insert_one_point): New parameters offset and addr_orig. (aarch64_dr_state_remove_one_point): Likewise. (aarch64_handle_breakpoint): Update caller. (aarch64_handle_aligned_watchpoint): Likewise. (aarch64_handle_unaligned_watchpoint): Support addr_orig and aligned_offset. (aarch64_linux_set_debug_regs): Remove const from state. Call aarch64_downgrade_regs. (aarch64_show_debug_reg_state): Print also dr_addr_orig_wp. * nat/aarch64-linux-hw-point.h (DR_CONTROL_LENGTH): Rename to ... (DR_CONTROL_MASK): ... this. (struct aarch64_debug_reg_state): New field dr_addr_orig_wp. (unsigned int aarch64_watchpoint_offset): New prototype. (aarch64_linux_set_debug_regs): Remove const from state. * utils.c (align_up, align_down): Move to ... * common/common-utils.c (align_up, align_down): ... here. * utils.h (align_up, align_down): Move to ... * common/common-utils.h (align_up, align_down): ... here. gdb/gdbserver/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_stopped_data_address): Likewise. gdb/testsuite/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> PR breakpoints/19806 and support for PR external/20207. * gdb.base/watchpoint-unaligned.c: New file. * gdb.base/watchpoint-unaligned.exp: New file.
2018-05-05 04:22:04 +08:00
const unsigned int offset
= aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
aarch64: PR 19806: watchpoints: false negatives + PR 20207 contiguous ones Some unaligned watchpoints were currently missed. On old kernels as specified in kernel RFE: aarch64: ptrace: BAS: Support any contiguous range (edit) https://sourceware.org/bugzilla/show_bug.cgi?id=20207 after this patch some other unaligned watchpoints will get reported as false positives. With new kernels all the watchpoints should work exactly. There may be a regresion that it now less merges watchpoints so that with multiple overlapping watchpoints it may run out of the 4 hardware watchpoint registers. But as discussed in the original thread GDB needs some generic watchpoints merging framework to be used by all the target specific code. Even current FSF GDB code does not merge it perfectly. Also with the more precise watchpoints one can technically merge them less. And I do not think it matters too much to improve mergeability only for old kernels. Still even on new kernels some better merging logic would make sense. There remains one issue: kernel-4.15.14-300.fc27.armv7hl FAIL: gdb.base/watchpoint-unaligned.exp: continue FAIL: gdb.base/watchpoint-unaligned.exp: continue (gdb) continue Continuing. Unexpected error setting watchpoint: Invalid argument. (gdb) FAIL: gdb.base/watchpoint-unaligned.exp: continue But that looks as a kernel bug to me. (1) It is not a regression by this patch. (2) It is unrelated to this patch. gdb/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> PR breakpoints/19806 and support for PR external/20207. * NEWS: Mention Aarch64 watchpoint improvements. * aarch64-linux-nat.c (aarch64_linux_stopped_data_address): Fix missed watchpoints and PR external/20207 watchpoints. * nat/aarch64-linux-hw-point.c (kernel_supports_any_contiguous_range): New. (aarch64_watchpoint_offset): New. (aarch64_watchpoint_length): Support PR external/20207 watchpoints. (aarch64_point_encode_ctrl_reg): New parameter offset, new asserts. (aarch64_point_is_aligned): Support PR external/20207 watchpoints. (aarch64_align_watchpoint): New parameters aligned_offset_p and next_addr_orig_p. Support PR external/20207 watchpoints. (aarch64_downgrade_regs): New. (aarch64_dr_state_insert_one_point): New parameters offset and addr_orig. (aarch64_dr_state_remove_one_point): Likewise. (aarch64_handle_breakpoint): Update caller. (aarch64_handle_aligned_watchpoint): Likewise. (aarch64_handle_unaligned_watchpoint): Support addr_orig and aligned_offset. (aarch64_linux_set_debug_regs): Remove const from state. Call aarch64_downgrade_regs. (aarch64_show_debug_reg_state): Print also dr_addr_orig_wp. * nat/aarch64-linux-hw-point.h (DR_CONTROL_LENGTH): Rename to ... (DR_CONTROL_MASK): ... this. (struct aarch64_debug_reg_state): New field dr_addr_orig_wp. (unsigned int aarch64_watchpoint_offset): New prototype. (aarch64_linux_set_debug_regs): Remove const from state. * utils.c (align_up, align_down): Move to ... * common/common-utils.c (align_up, align_down): ... here. * utils.h (align_up, align_down): Move to ... * common/common-utils.h (align_up, align_down): ... here. gdb/gdbserver/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_stopped_data_address): Likewise. gdb/testsuite/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> PR breakpoints/19806 and support for PR external/20207. * gdb.base/watchpoint-unaligned.c: New file. * gdb.base/watchpoint-unaligned.exp: New file.
2018-05-05 04:22:04 +08:00
const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
if (state->dr_ref_count_wp[i]
&& DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
aarch64: PR 19806: watchpoints: false negatives + PR 20207 contiguous ones Some unaligned watchpoints were currently missed. On old kernels as specified in kernel RFE: aarch64: ptrace: BAS: Support any contiguous range (edit) https://sourceware.org/bugzilla/show_bug.cgi?id=20207 after this patch some other unaligned watchpoints will get reported as false positives. With new kernels all the watchpoints should work exactly. There may be a regresion that it now less merges watchpoints so that with multiple overlapping watchpoints it may run out of the 4 hardware watchpoint registers. But as discussed in the original thread GDB needs some generic watchpoints merging framework to be used by all the target specific code. Even current FSF GDB code does not merge it perfectly. Also with the more precise watchpoints one can technically merge them less. And I do not think it matters too much to improve mergeability only for old kernels. Still even on new kernels some better merging logic would make sense. There remains one issue: kernel-4.15.14-300.fc27.armv7hl FAIL: gdb.base/watchpoint-unaligned.exp: continue FAIL: gdb.base/watchpoint-unaligned.exp: continue (gdb) continue Continuing. Unexpected error setting watchpoint: Invalid argument. (gdb) FAIL: gdb.base/watchpoint-unaligned.exp: continue But that looks as a kernel bug to me. (1) It is not a regression by this patch. (2) It is unrelated to this patch. gdb/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> PR breakpoints/19806 and support for PR external/20207. * NEWS: Mention Aarch64 watchpoint improvements. * aarch64-linux-nat.c (aarch64_linux_stopped_data_address): Fix missed watchpoints and PR external/20207 watchpoints. * nat/aarch64-linux-hw-point.c (kernel_supports_any_contiguous_range): New. (aarch64_watchpoint_offset): New. (aarch64_watchpoint_length): Support PR external/20207 watchpoints. (aarch64_point_encode_ctrl_reg): New parameter offset, new asserts. (aarch64_point_is_aligned): Support PR external/20207 watchpoints. (aarch64_align_watchpoint): New parameters aligned_offset_p and next_addr_orig_p. Support PR external/20207 watchpoints. (aarch64_downgrade_regs): New. (aarch64_dr_state_insert_one_point): New parameters offset and addr_orig. (aarch64_dr_state_remove_one_point): Likewise. (aarch64_handle_breakpoint): Update caller. (aarch64_handle_aligned_watchpoint): Likewise. (aarch64_handle_unaligned_watchpoint): Support addr_orig and aligned_offset. (aarch64_linux_set_debug_regs): Remove const from state. Call aarch64_downgrade_regs. (aarch64_show_debug_reg_state): Print also dr_addr_orig_wp. * nat/aarch64-linux-hw-point.h (DR_CONTROL_LENGTH): Rename to ... (DR_CONTROL_MASK): ... this. (struct aarch64_debug_reg_state): New field dr_addr_orig_wp. (unsigned int aarch64_watchpoint_offset): New prototype. (aarch64_linux_set_debug_regs): Remove const from state. * utils.c (align_up, align_down): Move to ... * common/common-utils.c (align_up, align_down): ... here. * utils.h (align_up, align_down): Move to ... * common/common-utils.h (align_up, align_down): ... here. gdb/gdbserver/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_stopped_data_address): Likewise. gdb/testsuite/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> PR breakpoints/19806 and support for PR external/20207. * gdb.base/watchpoint-unaligned.c: New file. * gdb.base/watchpoint-unaligned.exp: New file.
2018-05-05 04:22:04 +08:00
&& addr_trap >= addr_watch_aligned
&& addr_trap < addr_watch + len)
aarch64: PR 19806: watchpoints: false negatives + PR 20207 contiguous ones Some unaligned watchpoints were currently missed. On old kernels as specified in kernel RFE: aarch64: ptrace: BAS: Support any contiguous range (edit) https://sourceware.org/bugzilla/show_bug.cgi?id=20207 after this patch some other unaligned watchpoints will get reported as false positives. With new kernels all the watchpoints should work exactly. There may be a regresion that it now less merges watchpoints so that with multiple overlapping watchpoints it may run out of the 4 hardware watchpoint registers. But as discussed in the original thread GDB needs some generic watchpoints merging framework to be used by all the target specific code. Even current FSF GDB code does not merge it perfectly. Also with the more precise watchpoints one can technically merge them less. And I do not think it matters too much to improve mergeability only for old kernels. Still even on new kernels some better merging logic would make sense. There remains one issue: kernel-4.15.14-300.fc27.armv7hl FAIL: gdb.base/watchpoint-unaligned.exp: continue FAIL: gdb.base/watchpoint-unaligned.exp: continue (gdb) continue Continuing. Unexpected error setting watchpoint: Invalid argument. (gdb) FAIL: gdb.base/watchpoint-unaligned.exp: continue But that looks as a kernel bug to me. (1) It is not a regression by this patch. (2) It is unrelated to this patch. gdb/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> PR breakpoints/19806 and support for PR external/20207. * NEWS: Mention Aarch64 watchpoint improvements. * aarch64-linux-nat.c (aarch64_linux_stopped_data_address): Fix missed watchpoints and PR external/20207 watchpoints. * nat/aarch64-linux-hw-point.c (kernel_supports_any_contiguous_range): New. (aarch64_watchpoint_offset): New. (aarch64_watchpoint_length): Support PR external/20207 watchpoints. (aarch64_point_encode_ctrl_reg): New parameter offset, new asserts. (aarch64_point_is_aligned): Support PR external/20207 watchpoints. (aarch64_align_watchpoint): New parameters aligned_offset_p and next_addr_orig_p. Support PR external/20207 watchpoints. (aarch64_downgrade_regs): New. (aarch64_dr_state_insert_one_point): New parameters offset and addr_orig. (aarch64_dr_state_remove_one_point): Likewise. (aarch64_handle_breakpoint): Update caller. (aarch64_handle_aligned_watchpoint): Likewise. (aarch64_handle_unaligned_watchpoint): Support addr_orig and aligned_offset. (aarch64_linux_set_debug_regs): Remove const from state. Call aarch64_downgrade_regs. (aarch64_show_debug_reg_state): Print also dr_addr_orig_wp. * nat/aarch64-linux-hw-point.h (DR_CONTROL_LENGTH): Rename to ... (DR_CONTROL_MASK): ... this. (struct aarch64_debug_reg_state): New field dr_addr_orig_wp. (unsigned int aarch64_watchpoint_offset): New prototype. (aarch64_linux_set_debug_regs): Remove const from state. * utils.c (align_up, align_down): Move to ... * common/common-utils.c (align_up, align_down): ... here. * utils.h (align_up, align_down): Move to ... * common/common-utils.h (align_up, align_down): ... here. gdb/gdbserver/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_stopped_data_address): Likewise. gdb/testsuite/ChangeLog 2018-05-04 Jan Kratochvil <jan.kratochvil@redhat.com> Pedro Alves <palves@redhat.com> PR breakpoints/19806 and support for PR external/20207. * gdb.base/watchpoint-unaligned.c: New file. * gdb.base/watchpoint-unaligned.exp: New file.
2018-05-05 04:22:04 +08:00
{
/* ADDR_TRAP reports the first address of the memory range
accessed by the CPU, regardless of what was the memory
range watched. Thus, a large CPU access that straddles
the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
ADDR_TRAP that is lower than the
ADDR_WATCH..ADDR_WATCH+LEN range. E.g.:
addr: | 4 | 5 | 6 | 7 | 8 |
|---- range watched ----|
|----------- range accessed ------------|
In this case, ADDR_TRAP will be 4.
To match a watchpoint known to GDB core, we must never
report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
range. ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
positive on kernels older than 4.10. See PR
external/20207. */
return addr_orig;
}
}
return (CORE_ADDR) 0;
}
/* Implementation of linux_target_ops method "stopped_by_watchpoint". */
static int
aarch64_stopped_by_watchpoint (void)
{
if (aarch64_stopped_data_address () != 0)
return 1;
else
return 0;
}
/* Fetch the thread-local storage pointer for libthread_db. */
ps_err_e
Sync proc_service definition with GLIBC GLIBC BZ#20311 [1] proc_service.h install patch also remove 'const' attributes from ps_get_thread_area and comment #15 discuss why to remove the const attribute (basically since it a callback with the struct ps_prochandle owned by the client it should be able to modify it if it the case). On default build this is not the issue and current g++ does not trigger any issue with this mismatch declaration. However, on some bootstrap build configuration where gdbserver is build with gcc instead this triggers: error: conflicting types for 'ps_get_thread_area' This patch fixes it by syncing the declaration with GLIBC. [1] https://sourceware.org/bugzilla/show_bug.cgi?id=20311 gdb/ChangeLog: 2016-08-25 Adhemerval Zanella <adhemerval.zanella@linaro.org> * aarch64-linux-nat.c (ps_get_thread_area): Remove const from struct ps_prochandle. * amd64-linux-nat.c (ps_get_thread_area): Likewise. * arm-linux-nat.c (ps_get_thread_area): Likewise. * gdb_proc_service.h (ps_get_thread_area): Likewise. * i386-linux-nat.c (ps_get_thread_area): Likewise. * m68klinux-nat.c (ps_get_thread_area): Likewise. * mips-linux-nat.c (ps_get_thread_area): Likewise. * nat/aarch64-linux.c (aarch64_ps_get_thread_area): Likewise. * nat/aarch64-linux.h (aarch64_ps_get_thread_area): Likewise. * xtensa-linux-nat.c (ps_get_thread_area): Likewise. gdb/gdbserver/ChangeLog: 2016-08-25 Adhemerval Zanella <adhemerval.zanella@linaro.org> PR server/20491 * gdb_proc_service.h (ps_get_thread_area): Remove const from struct ps_prochandle. * linux-aarch64-low.c (ps_get_thread_area): Likewise. * linux-arm-low.c (ps_get_thread_area): Likewise. * linux-crisv32-low.c (ps_get_thread_area): Likewise. * linux-m68k-low.c (ps_get_thread_area): Likewise. * linux-mips-low.c (ps_get_thread_area): Likewise. * linux-nios2-low.c (ps_get_thread_area): Likewise. * linux-tic6x-low.c (ps_get_thread_area): Likewise. * linux-x86-low.c (ps_get_thread_area): Likewise. * linux-xtensa-low.c (ps_get_thread_area): Likewise.
2016-08-25 15:42:03 +08:00
ps_get_thread_area (struct ps_prochandle *ph,
lwpid_t lwpid, int idx, void **base)
{
aarch64 multi-arch (part 3): get thread area With the kernle fix <http://lists.infradead.org/pipermail/linux-arm-kernel/2015-July/356511.html>, aarch64 GDB is able to read the base of thread area of 32-bit arm program through NT_ARM_TLS. This patch is to teach both GDB and GDBserver to read the base of thread area correctly in the multi-arch case. A new function aarch64_ps_get_thread_area is added, and is shared between GDB and GDBserver. With this patch applied, the following fails in multi-arch testing (GDB is aarch64 but the test cases are arm) are fixed, -FAIL: gdb.threads/tls-nodebug.exp: thread local storage -FAIL: gdb.threads/tls-shared.exp: print thread local storage variable -FAIL: gdb.threads/tls-so_extern.exp: print thread local storage variable -FAIL: gdb.threads/tls-var.exp: print tls_var -FAIL: gdb.threads/tls.exp: first thread local storage -FAIL: gdb.threads/tls.exp: first another thread local storage -FAIL: gdb.threads/tls.exp: p a_thread_local -FAIL: gdb.threads/tls.exp: p file2_thread_local -FAIL: gdb.threads/tls.exp: p a_thread_local second time gdb: 2015-09-18 Yao Qi <yao.qi@linaro.org> * nat/aarch64-linux.c: Include elf/common.h, nat/gdb_ptrace.h, asm/ptrace.h and sys/uio.h. (aarch64_ps_get_thread_area): New function. * nat/aarch64-linux.h: Include gdb_proc_service.h. (aarch64_ps_get_thread_area): Declare. * aarch64-linux-nat.c (ps_get_thread_area): Call aarch64_ps_get_thread_area. gdb/gdbserver: 2015-09-18 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c: Don't include sys/uio.h. (ps_get_thread_area): Call aarch64_ps_get_thread_area.
2015-09-18 20:59:42 +08:00
return aarch64_ps_get_thread_area (ph, lwpid, idx, base,
is_64bit_tdesc ());
}
/* Implementation of linux_target_ops method "siginfo_fixup". */
static int
Fix siginfo C++ build error Change the signature of gdbserver's siginfo_fixup functions so that it's in line with gdb's. This gets rid of the following build error in C++: /home/emaisin/src/binutils-gdb/gdb/gdbserver/linux-x86-low.c: In function ‘int x86_siginfo_fixup(siginfo_t*, void*, int)’: /home/emaisin/src/binutils-gdb/gdb/gdbserver/linux-x86-low.c:694:21: error: invalid conversion from ‘void*’ to ‘gdb_byte* {aka unsigned char*}’ [-fpermissive] FIXUP_32); ^ In file included from /home/emaisin/src/binutils-gdb/gdb/gdbserver/linux-x86-low.c:31:0: /home/emaisin/src/binutils-gdb/gdb/gdbserver/../nat/amd64-linux-siginfo.h:52:5: error: initializing argument 2 of ‘int amd64_linux_siginfo_fixup_common(siginfo_t*, gdb_byte*, int, amd64_siginfo_fixup_mode)’ [-fpermissive] int amd64_linux_siginfo_fixup_common (siginfo_t *native, gdb_byte *inf, ^ /home/emaisin/src/binutils-gdb/gdb/gdbserver/linux-x86-low.c:698:20: error: invalid conversion from ‘void*’ to ‘gdb_byte* {aka unsigned char*}’ [-fpermissive] FIXUP_X32); ^ In file included from /home/emaisin/src/binutils-gdb/gdb/gdbserver/linux-x86-low.c:31:0: /home/emaisin/src/binutils-gdb/gdb/gdbserver/../nat/amd64-linux-siginfo.h:52:5: error: initializing argument 2 of ‘int amd64_linux_siginfo_fixup_common(siginfo_t*, gdb_byte*, int, amd64_siginfo_fixup_mode)’ [-fpermissive] int amd64_linux_siginfo_fixup_common (siginfo_t *native, gdb_byte *inf, ^ gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_linux_siginfo_fixup): Change void * to gdb_byte *. * linux-low.c (siginfo_fixup): Likewise. (linux_xfer_siginfo): Likewise. * linux-low.h (struct linux_target_ops) <siginfo_fixup>: Likewise. * linux-x86-low.c (x86_siginfo_fixup): Likewise.
2016-02-09 19:18:15 +08:00
aarch64_linux_siginfo_fixup (siginfo_t *native, gdb_byte *inf, int direction)
{
/* Is the inferior 32-bit? If so, then fixup the siginfo object. */
if (!is_64bit_tdesc ())
{
if (direction == 0)
aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
native);
else
aarch64_siginfo_from_compat_siginfo (native,
(struct compat_siginfo *) inf);
return 1;
}
return 0;
}
/* Implementation of linux_target_ops method "new_process". */
static struct arch_process_info *
aarch64_linux_new_process (void)
{
Replace some xmalloc-family functions with XNEW-family ones This patch is part of the make-gdb-buildable-in-C++ effort. The idea is to change some calls to the xmalloc family of functions to calls to the equivalents in the XNEW family. This avoids adding an explicit cast, so it keeps the code a bit more readable. Some of them also map relatively well to a C++ equivalent (XNEW (struct foo) -> new foo), so it will be possible to do scripted replacements if needed. I only changed calls that were obviously allocating memory for one or multiple "objects". Allocation of variable sizes (such as strings or buffer handling) will be for later (and won't use XNEW). - xmalloc (sizeof (struct foo)) -> XNEW (struct foo) - xmalloc (num * sizeof (struct foo)) -> XNEWVEC (struct foo, num) - xcalloc (1, sizeof (struct foo)) -> XCNEW (struct foo) - xcalloc (num, sizeof (struct foo)) -> XCNEWVEC (struct foo, num) - xrealloc (p, num * sizeof (struct foo) -> XRESIZEVEC (struct foo, p, num) - obstack_alloc (ob, sizeof (struct foo)) -> XOBNEW (ob, struct foo) - obstack_alloc (ob, num * sizeof (struct foo)) -> XOBNEWVEC (ob, struct foo, num) - alloca (sizeof (struct foo)) -> XALLOCA (struct foo) - alloca (num * sizeof (struct foo)) -> XALLOCAVEC (struct foo, num) Some instances of xmalloc followed by memset to zero the buffer were replaced by XCNEW or XCNEWVEC. I regtested on x86-64, Ubuntu 14.04, but the patch touches many architecture-specific files. For those I'll have to rely on the buildbot or people complaining that I broke their gdb. gdb/ChangeLog: * aarch64-linux-nat.c (aarch64_add_process): Likewise. * aarch64-tdep.c (aarch64_gdbarch_init): Likewise. * ada-exp.y (write_ambiguous_var): Likewise. * ada-lang.c (resolve_subexp): Likewise. (user_select_syms): Likewise. (assign_aggregate): Likewise. (ada_evaluate_subexp): Likewise. (cache_symbol): Likewise. * addrmap.c (allocate_key): Likewise. (addrmap_create_mutable): Likewise. * aix-thread.c (sync_threadlists): Likewise. * alpha-tdep.c (alpha_push_dummy_call): Likewise. (alpha_gdbarch_init): Likewise. * amd64-windows-tdep.c (amd64_windows_push_arguments): Likewise. * arm-linux-nat.c (arm_linux_add_process): Likewise. * arm-linux-tdep.c (arm_linux_displaced_step_copy_insn): Likewise. * arm-tdep.c (push_stack_item): Likewise. (arm_displaced_step_copy_insn): Likewise. (arm_gdbarch_init): Likewise. (_initialize_arm_tdep): Likewise. * avr-tdep.c (push_stack_item): Likewise. * ax-general.c (new_agent_expr): Likewise. * block.c (block_initialize_namespace): Likewise. * breakpoint.c (alloc_counted_command_line): Likewise. (update_dprintf_command_list): Likewise. (parse_breakpoint_sals): Likewise. (decode_static_tracepoint_spec): Likewise. (until_break_command): Likewise. (clear_command): Likewise. (update_global_location_list): Likewise. (get_breakpoint_objfile_data) Likewise. * btrace.c (ftrace_new_function): Likewise. (btrace_set_insn_history): Likewise. (btrace_set_call_history): Likewise. * buildsym.c (add_symbol_to_list): Likewise. (record_pending_block): Likewise. (start_subfile): Likewise. (start_buildsym_compunit): Likewise. (push_subfile): Likewise. (end_symtab_get_static_block): Likewise. (buildsym_init): Likewise. * cli/cli-cmds.c (source_command): Likewise. * cli/cli-decode.c (add_cmd): Likewise. * cli/cli-script.c (build_command_line): Likewise. (setup_user_args): Likewise. (realloc_body_list): Likewise. (process_next_line): Likewise. (copy_command_lines): Likewise. * cli/cli-setshow.c (do_set_command): Likewise. * coff-pe-read.c (read_pe_exported_syms): Likewise. * coffread.c (coff_locate_sections): Likewise. (coff_symtab_read): Likewise. (coff_read_struct_type): Likewise. * common/cleanups.c (make_my_cleanup2): Likewise. * common/common-exceptions.c (throw_it): Likewise. * common/filestuff.c (make_cleanup_close): Likewise. * common/format.c (parse_format_string): Likewise. * common/queue.h (DEFINE_QUEUE_P): Likewise. * compile/compile-object-load.c (munmap_list_add): Likewise. (compile_object_load): Likewise. * compile/compile-object-run.c (compile_object_run): Likewise. * compile/compile.c (append_args): Likewise. * corefile.c (specify_exec_file_hook): Likewise. * cp-support.c (make_symbol_overload_list): Likewise. * cris-tdep.c (push_stack_item): Likewise. (cris_gdbarch_init): Likewise. * ctf.c (ctf_trace_file_writer_new): Likewise. * dbxread.c (init_header_files): Likewise. (add_new_header_file): Likewise. (init_bincl_list): Likewise. (dbx_end_psymtab): Likewise. (start_psymtab): Likewise. (dbx_end_psymtab): Likewise. * dcache.c (dcache_init): Likewise. * dictionary.c (dict_create_hashed): Likewise. (dict_create_hashed_expandable): Likewise. (dict_create_linear): Likewise. (dict_create_linear_expandable): Likewise. * dtrace-probe.c (dtrace_process_dof_probe): Likewise. * dummy-frame.c (register_dummy_frame_dtor): Likewise. * dwarf2-frame-tailcall.c (cache_new_ref1): Likewise. * dwarf2-frame.c (dwarf2_build_frame_info): Likewise. (decode_frame_entry_1): Likewise. * dwarf2expr.c (new_dwarf_expr_context): Likewise. * dwarf2loc.c (dwarf2_compile_expr_to_ax): Likewise. * dwarf2read.c (dwarf2_has_info): Likewise. (create_signatured_type_table_from_index): Likewise. (dwarf2_read_index): Likewise. (dw2_get_file_names_reader): Likewise. (create_all_type_units): Likewise. (read_cutu_die_from_dwo): Likewise. (init_tu_and_read_dwo_dies): Likewise. (init_cutu_and_read_dies): Likewise. (create_all_comp_units): Likewise. (queue_comp_unit): Likewise. (inherit_abstract_dies): Likewise. (read_call_site_scope): Likewise. (dwarf2_add_field): Likewise. (dwarf2_add_typedef): Likewise. (dwarf2_add_member_fn): Likewise. (attr_to_dynamic_prop): Likewise. (abbrev_table_alloc_abbrev): Likewise. (abbrev_table_read_table): Likewise. (add_include_dir): Likewise. (add_file_name): Likewise. (dwarf_decode_line_header): Likewise. (dwarf2_const_value_attr): Likewise. (dwarf_alloc_block): Likewise. (parse_macro_definition): Likewise. (set_die_type): Likewise. (write_psymtabs_to_index): Likewise. (create_cus_from_index): Likewise. (dwarf2_create_include_psymtab): Likewise. (process_psymtab_comp_unit_reader): Likewise. (build_type_psymtab_dependencies): Likewise. (read_comp_units_from_section): Likewise. (compute_compunit_symtab_includes): Likewise. (create_dwo_unit_in_dwp_v1): Likewise. (create_dwo_unit_in_dwp_v2): Likewise. (read_func_scope): Likewise. (process_structure_scope): Likewise. (mark_common_block_symbol_computed): Likewise. (load_partial_dies): Likewise. (dwarf2_symbol_mark_computed): Likewise. * elfread.c (elf_symfile_segments): Likewise. (elf_read_minimal_symbols): Likewise. * environ.c (make_environ): Likewise. * eval.c (evaluate_subexp_standard): Likewise. * event-loop.c (create_file_handler): Likewise. (create_async_signal_handler): Likewise. (create_async_event_handler): Likewise. (create_timer): Likewise. * exec.c (build_section_table): Likewise. * fbsd-nat.c (fbsd_remember_child): Likewise. * fork-child.c (fork_inferior): Likewise. * frv-tdep.c (new_variant): Likewise. * gdbarch.sh (gdbarch_alloc): Likewise. (append_name): Likewise. * gdbtypes.c (rank_function): Likewise. (copy_type_recursive): Likewise. (add_dyn_prop): Likewise. * gnu-nat.c (make_proc): Likewise. (make_inf): Likewise. (gnu_write_inferior): Likewise. * gnu-v3-abi.c (build_gdb_vtable_type): Likewise. (build_std_type_info_type): Likewise. * guile/scm-param.c (compute_enum_list): Likewise. * guile/scm-utils.c (gdbscm_parse_function_args): Likewise. * guile/scm-value.c (gdbscm_value_call): Likewise. * h8300-tdep.c (h8300_gdbarch_init): Likewise. * hppa-tdep.c (hppa_init_objfile_priv_data): Likewise. (read_unwind_info): Likewise. * ia64-tdep.c (ia64_gdbarch_init): Likewise. * infcall.c (dummy_frame_context_saver_setup): Likewise. (call_function_by_hand_dummy): Likewise. * infcmd.c (step_once): Likewise. (finish_forward): Likewise. (attach_command): Likewise. (notice_new_inferior): Likewise. * inferior.c (add_inferior_silent): Likewise. * infrun.c (add_displaced_stepping_state): Likewise. (save_infcall_control_state): Likewise. (save_inferior_ptid): Likewise. (_initialize_infrun): Likewise. * jit.c (bfd_open_from_target_memory): Likewise. (jit_gdbarch_data_init): Likewise. * language.c (add_language): Likewise. * linespec.c (decode_line_2): Likewise. * linux-nat.c (add_to_pid_list): Likewise. (add_initial_lwp): Likewise. * linux-thread-db.c (add_thread_db_info): Likewise. (record_thread): Likewise. (info_auto_load_libthread_db): Likewise. * m32c-tdep.c (m32c_gdbarch_init): Likewise. * m68hc11-tdep.c (m68hc11_gdbarch_init): Likewise. * m68k-tdep.c (m68k_gdbarch_init): Likewise. * m88k-tdep.c (m88k_analyze_prologue): Likewise. * macrocmd.c (macro_define_command): Likewise. * macroexp.c (gather_arguments): Likewise. * macroscope.c (sal_macro_scope): Likewise. * macrotab.c (new_macro_table): Likewise. * mdebugread.c (push_parse_stack): Likewise. (parse_partial_symbols): Likewise. (parse_symbol): Likewise. (psymtab_to_symtab_1): Likewise. (new_block): Likewise. (new_psymtab): Likewise. (mdebug_build_psymtabs): Likewise. (add_pending): Likewise. (elfmdebug_build_psymtabs): Likewise. * mep-tdep.c (mep_gdbarch_init): Likewise. * mi/mi-main.c (mi_execute_command): Likewise. * mi/mi-parse.c (mi_parse_argv): Likewise. * minidebug.c (lzma_open): Likewise. * minsyms.c (terminate_minimal_symbol_table): Likewise. * mips-linux-nat.c (mips_linux_insert_watchpoint): Likewise. * mips-tdep.c (mips_gdbarch_init): Likewise. * mn10300-tdep.c (mn10300_gdbarch_init): Likewise. * msp430-tdep.c (msp430_gdbarch_init): Likewise. * mt-tdep.c (mt_registers_info): Likewise. * nat/aarch64-linux.c (aarch64_linux_new_thread): Likewise. * nat/linux-btrace.c (linux_enable_bts): Likewise. (linux_enable_pt): Likewise. * nat/linux-osdata.c (linux_xfer_osdata_processes): Likewise. (linux_xfer_osdata_processgroups): Likewise. * nios2-tdep.c (nios2_gdbarch_init): Likewise. * nto-procfs.c (procfs_meminfo): Likewise. * objc-lang.c (start_msglist): Likewise. (selectors_info): Likewise. (classes_info): Likewise. (find_methods): Likewise. * objfiles.c (allocate_objfile): Likewise. (update_section_map): Likewise. * osabi.c (gdbarch_register_osabi): Likewise. (gdbarch_register_osabi_sniffer): Likewise. * parse.c (start_arglist): Likewise. * ppc-linux-nat.c (hwdebug_find_thread_points_by_tid): Likewise. (hwdebug_insert_point): Likewise. * printcmd.c (display_command): Likewise. (ui_printf): Likewise. * procfs.c (create_procinfo): Likewise. (load_syscalls): Likewise. (proc_get_LDT_entry): Likewise. (proc_update_threads): Likewise. * prologue-value.c (make_pv_area): Likewise. (pv_area_store): Likewise. * psymtab.c (extend_psymbol_list): Likewise. (init_psymbol_list): Likewise. (allocate_psymtab): Likewise. * python/py-inferior.c (add_thread_object): Likewise. * python/py-param.c (compute_enum_values): Likewise. * python/py-value.c (valpy_call): Likewise. * python/py-varobj.c (py_varobj_iter_next): Likewise. * python/python.c (ensure_python_env): Likewise. * record-btrace.c (record_btrace_start_replaying): Likewise. * record-full.c (record_full_reg_alloc): Likewise. (record_full_mem_alloc): Likewise. (record_full_end_alloc): Likewise. (record_full_core_xfer_partial): Likewise. * regcache.c (get_thread_arch_aspace_regcache): Likewise. * remote-fileio.c (remote_fileio_init_fd_map): Likewise. * remote-notif.c (remote_notif_state_allocate): Likewise. * remote.c (demand_private_info): Likewise. (remote_notif_stop_alloc_reply): Likewise. (remote_enable_btrace): Likewise. * reverse.c (save_bookmark_command): Likewise. * rl78-tdep.c (rl78_gdbarch_init): Likewise. * rx-tdep.c (rx_gdbarch_init): Likewise. * s390-linux-nat.c (s390_insert_watchpoint): Likewise. * ser-go32.c (dos_get_tty_state): Likewise. (dos_copy_tty_state): Likewise. * ser-mingw.c (ser_windows_open): Likewise. (ser_console_wait_handle): Likewise. (ser_console_get_tty_state): Likewise. (make_pipe_state): Likewise. (net_windows_open): Likewise. * ser-unix.c (hardwire_get_tty_state): Likewise. (hardwire_copy_tty_state): Likewise. * solib-aix.c (solib_aix_new_lm_info): Likewise. * solib-dsbt.c (dsbt_current_sos): Likewise. (dsbt_relocate_main_executable): Likewise. * solib-frv.c (frv_current_sos): Likewise. (frv_relocate_main_executable): Likewise. * solib-spu.c (spu_bfd_fopen): Likewise. * solib-svr4.c (lm_info_read): Likewise. (svr4_copy_library_list): Likewise. (svr4_default_sos): Likewise. * source.c (find_source_lines): Likewise. (line_info): Likewise. (add_substitute_path_rule): Likewise. * spu-linux-nat.c (spu_bfd_open): Likewise. * spu-tdep.c (info_spu_dma_cmdlist): Likewise. * stabsread.c (dbx_lookup_type): Likewise. (read_type): Likewise. (read_member_functions): Likewise. (read_struct_fields): Likewise. (read_baseclasses): Likewise. (read_args): Likewise. (_initialize_stabsread): Likewise. * stack.c (func_command): Likewise. * stap-probe.c (handle_stap_probe): Likewise. * symfile.c (addrs_section_sort): Likewise. (addr_info_make_relative): Likewise. (load_section_callback): Likewise. (add_symbol_file_command): Likewise. (init_filename_language_table): Likewise. * symtab.c (create_filename_seen_cache): Likewise. (sort_search_symbols_remove_dups): Likewise. (search_symbols): Likewise. * target.c (make_cleanup_restore_target_terminal): Likewise. * thread.c (new_thread): Likewise. (enable_thread_stack_temporaries): Likewise. (make_cleanup_restore_current_thread): Likewise. (thread_apply_all_command): Likewise. * tic6x-tdep.c (tic6x_gdbarch_init): Likewise. * top.c (gdb_readline_wrapper): Likewise. * tracefile-tfile.c (tfile_trace_file_writer_new): Likewise. * tracepoint.c (trace_find_line_command): Likewise. (all_tracepoint_actions_and_cleanup): Likewise. (make_cleanup_restore_current_traceframe): Likewise. (get_uploaded_tp): Likewise. (get_uploaded_tsv): Likewise. * tui/tui-data.c (tui_alloc_generic_win_info): Likewise. (tui_alloc_win_info): Likewise. (tui_alloc_content): Likewise. (tui_add_content_elements): Likewise. * tui/tui-disasm.c (tui_find_disassembly_address): Likewise. (tui_set_disassem_content): Likewise. * ui-file.c (ui_file_new): Likewise. (stdio_file_new): Likewise. (tee_file_new): Likewise. * utils.c (make_cleanup_restore_integer): Likewise. (add_internal_problem_command): Likewise. * v850-tdep.c (v850_gdbarch_init): Likewise. * valops.c (find_oload_champ): Likewise. * value.c (allocate_value_lazy): Likewise. (record_latest_value): Likewise. (create_internalvar): Likewise. * varobj.c (install_variable): Likewise. (new_variable): Likewise. (new_root_variable): Likewise. (cppush): Likewise. (_initialize_varobj): Likewise. * windows-nat.c (windows_make_so): Likewise. * x86-nat.c (x86_add_process): Likewise. * xcoffread.c (arrange_linetable): Likewise. (allocate_include_entry): Likewise. (process_linenos): Likewise. (SYMBOL_DUP): Likewise. (xcoff_start_psymtab): Likewise. (xcoff_end_psymtab): Likewise. * xml-support.c (gdb_xml_parse_attr_ulongest): Likewise. * xtensa-tdep.c (xtensa_register_type): Likewise. * gdbarch.c: Regenerate. * gdbarch.h: Regenerate. gdb/gdbserver/ChangeLog: * ax.c (gdb_parse_agent_expr): Likewise. (compile_bytecodes): Likewise. * dll.c (loaded_dll): Likewise. * event-loop.c (append_callback_event): Likewise. (create_file_handler): Likewise. (create_file_event): Likewise. * hostio.c (handle_open): Likewise. * inferiors.c (add_thread): Likewise. (add_process): Likewise. * linux-aarch64-low.c (aarch64_linux_new_process): Likewise. * linux-arm-low.c (arm_new_process): Likewise. (arm_new_thread): Likewise. * linux-low.c (add_to_pid_list): Likewise. (linux_add_process): Likewise. (handle_extended_wait): Likewise. (add_lwp): Likewise. (enqueue_one_deferred_signal): Likewise. (enqueue_pending_signal): Likewise. (linux_resume_one_lwp_throw): Likewise. (linux_resume_one_thread): Likewise. (linux_read_memory): Likewise. (linux_write_memory): Likewise. * linux-mips-low.c (mips_linux_new_process): Likewise. (mips_linux_new_thread): Likewise. (mips_add_watchpoint): Likewise. * linux-x86-low.c (initialize_low_arch): Likewise. * lynx-low.c (lynx_add_process): Likewise. * mem-break.c (set_raw_breakpoint_at): Likewise. (set_breakpoint): Likewise. (add_condition_to_breakpoint): Likewise. (add_commands_to_breakpoint): Likewise. (clone_agent_expr): Likewise. (clone_one_breakpoint): Likewise. * regcache.c (new_register_cache): Likewise. * remote-utils.c (look_up_one_symbol): Likewise. * server.c (queue_stop_reply): Likewise. (start_inferior): Likewise. (queue_stop_reply_callback): Likewise. (handle_target_event): Likewise. * spu-low.c (fetch_ppc_memory): Likewise. (store_ppc_memory): Likewise. * target.c (set_target_ops): Likewise. * thread-db.c (thread_db_load_search): Likewise. (try_thread_db_load_1): Likewise. * tracepoint.c (add_tracepoint): Likewise. (add_tracepoint_action): Likewise. (create_trace_state_variable): Likewise. (cmd_qtdpsrc): Likewise. (cmd_qtro): Likewise. (add_while_stepping_state): Likewise. * win32-low.c (child_add_thread): Likewise. (get_image_name): Likewise.
2015-08-27 05:16:07 +08:00
struct arch_process_info *info = XCNEW (struct arch_process_info);
aarch64_init_debug_reg_state (&info->debug_reg_state);
return info;
}
/* Implementation of linux_target_ops method "delete_process". */
static void
aarch64_linux_delete_process (struct arch_process_info *info)
{
xfree (info);
}
/* Implementation of linux_target_ops method "linux_new_fork". */
Arch-specific remote follow fork This patch implements the architecture-specific pieces of follow-fork for remote and extended-remote Linux targets, which in the current implementation copyies the parent's debug register state into the new child's data structures. This is required for x86, arm, aarch64, and mips. This follows the native implementation as closely as possible by implementing a new linux_target_ops function 'new_fork', which is analogous to 'linux_nat_new_fork' in linux-nat.c. In gdbserver, the debug registers are stored in the process list, instead of an architecture-specific list, so the function arguments are process_info pointers instead of an lwp_info and a pid as in the native implementation. In the MIPS implementation the debug register mirror is stored differently from x86, ARM, and aarch64, so instead of doing a simple structure assignment I had to clone the list of watchpoint structures. Tested using gdb.threads/watchpoint-fork.exp on x86, and ran manual tests on a MIPS board and an ARM board. Aarch64 hasn't been tested. gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_linux_new_fork): New function. (the_low_target) <new_fork>: Initialize new member. * linux-arm-low.c (arm_new_fork): New function. (the_low_target) <new_fork>: Initialize new member. * linux-low.c (handle_extended_wait): Call new target function new_fork. * linux-low.h (struct linux_target_ops) <new_fork>: New member. * linux-mips-low.c (mips_add_watchpoint): New function extracted from mips_insert_point. (the_low_target) <new_fork>: Initialize new member. (mips_linux_new_fork): New function. (mips_insert_point): Call mips_add_watchpoint. * linux-x86-low.c (x86_linux_new_fork): New function. (the_low_target) <new_fork>: Initialize new member.
2015-05-13 00:52:44 +08:00
static void
aarch64_linux_new_fork (struct process_info *parent,
struct process_info *child)
{
/* These are allocated by linux_add_process. */
gdb_assert (parent->priv != NULL
&& parent->priv->arch_private != NULL);
gdb_assert (child->priv != NULL
&& child->priv->arch_private != NULL);
Arch-specific remote follow fork This patch implements the architecture-specific pieces of follow-fork for remote and extended-remote Linux targets, which in the current implementation copyies the parent's debug register state into the new child's data structures. This is required for x86, arm, aarch64, and mips. This follows the native implementation as closely as possible by implementing a new linux_target_ops function 'new_fork', which is analogous to 'linux_nat_new_fork' in linux-nat.c. In gdbserver, the debug registers are stored in the process list, instead of an architecture-specific list, so the function arguments are process_info pointers instead of an lwp_info and a pid as in the native implementation. In the MIPS implementation the debug register mirror is stored differently from x86, ARM, and aarch64, so instead of doing a simple structure assignment I had to clone the list of watchpoint structures. Tested using gdb.threads/watchpoint-fork.exp on x86, and ran manual tests on a MIPS board and an ARM board. Aarch64 hasn't been tested. gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_linux_new_fork): New function. (the_low_target) <new_fork>: Initialize new member. * linux-arm-low.c (arm_new_fork): New function. (the_low_target) <new_fork>: Initialize new member. * linux-low.c (handle_extended_wait): Call new target function new_fork. * linux-low.h (struct linux_target_ops) <new_fork>: New member. * linux-mips-low.c (mips_add_watchpoint): New function extracted from mips_insert_point. (the_low_target) <new_fork>: Initialize new member. (mips_linux_new_fork): New function. (mips_insert_point): Call mips_add_watchpoint. * linux-x86-low.c (x86_linux_new_fork): New function. (the_low_target) <new_fork>: Initialize new member.
2015-05-13 00:52:44 +08:00
/* Linux kernel before 2.6.33 commit
72f674d203cd230426437cdcf7dd6f681dad8b0d
will inherit hardware debug registers from parent
on fork/vfork/clone. Newer Linux kernels create such tasks with
zeroed debug registers.
GDB core assumes the child inherits the watchpoints/hw
breakpoints of the parent, and will remove them all from the
forked off process. Copy the debug registers mirrors into the
new process so that all breakpoints and watchpoints can be
removed together. The debug registers mirror will become zeroed
in the end before detaching the forked off process, thus making
this compatible with older Linux kernels too. */
*child->priv->arch_private = *parent->priv->arch_private;
Arch-specific remote follow fork This patch implements the architecture-specific pieces of follow-fork for remote and extended-remote Linux targets, which in the current implementation copyies the parent's debug register state into the new child's data structures. This is required for x86, arm, aarch64, and mips. This follows the native implementation as closely as possible by implementing a new linux_target_ops function 'new_fork', which is analogous to 'linux_nat_new_fork' in linux-nat.c. In gdbserver, the debug registers are stored in the process list, instead of an architecture-specific list, so the function arguments are process_info pointers instead of an lwp_info and a pid as in the native implementation. In the MIPS implementation the debug register mirror is stored differently from x86, ARM, and aarch64, so instead of doing a simple structure assignment I had to clone the list of watchpoint structures. Tested using gdb.threads/watchpoint-fork.exp on x86, and ran manual tests on a MIPS board and an ARM board. Aarch64 hasn't been tested. gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_linux_new_fork): New function. (the_low_target) <new_fork>: Initialize new member. * linux-arm-low.c (arm_new_fork): New function. (the_low_target) <new_fork>: Initialize new member. * linux-low.c (handle_extended_wait): Call new target function new_fork. * linux-low.h (struct linux_target_ops) <new_fork>: New member. * linux-mips-low.c (mips_add_watchpoint): New function extracted from mips_insert_point. (the_low_target) <new_fork>: Initialize new member. (mips_linux_new_fork): New function. (mips_insert_point): Call mips_add_watchpoint. * linux-x86-low.c (x86_linux_new_fork): New function. (the_low_target) <new_fork>: Initialize new member.
2015-05-13 00:52:44 +08:00
}
/* Matches HWCAP_PACA in kernel header arch/arm64/include/uapi/asm/hwcap.h. */
#define AARCH64_HWCAP_PACA (1 << 30)
/* Implementation of linux_target_ops method "arch_setup". */
static void
aarch64_arch_setup (void)
{
unsigned int machine;
int is_elf64;
int tid;
tid = lwpid_of (current_thread);
is_elf64 = linux_pid_exe_is_elf_64_file (tid, &machine);
if (is_elf64)
{
uint64_t vq = aarch64_sve_get_vq (tid);
unsigned long hwcap = linux_get_hwcap (8);
bool pauth_p = hwcap & AARCH64_HWCAP_PACA;
current_process ()->tdesc = aarch64_linux_read_description (vq, pauth_p);
}
else
current_process ()->tdesc = aarch32_linux_read_description ();
aarch64_linux_get_debug_reg_capacity (lwpid_of (current_thread));
}
/* Wrapper for aarch64_sve_regs_copy_to_reg_buf. */
static void
aarch64_sve_regs_copy_to_regcache (struct regcache *regcache, const void *buf)
{
return aarch64_sve_regs_copy_to_reg_buf (regcache, buf);
}
/* Wrapper for aarch64_sve_regs_copy_from_reg_buf. */
static void
aarch64_sve_regs_copy_from_regcache (struct regcache *regcache, void *buf)
{
return aarch64_sve_regs_copy_from_reg_buf (regcache, buf);
}
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
static struct regset_info aarch64_regsets[] =
{
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS,
sizeof (struct user_pt_regs), GENERAL_REGS,
aarch64_fill_gregset, aarch64_store_gregset },
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_FPREGSET,
sizeof (struct user_fpsimd_state), FP_REGS,
aarch64_fill_fpregset, aarch64_store_fpregset
},
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_PAC_MASK,
AARCH64_PAUTH_REGS_SIZE, OPTIONAL_REGS,
NULL, aarch64_store_pauthregset },
NULL_REGSET
};
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
static struct regsets_info aarch64_regsets_info =
{
aarch64_regsets, /* regsets */
0, /* num_regsets */
NULL, /* disabled_regsets */
};
static struct regs_info regs_info_aarch64 =
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
{
NULL, /* regset_bitmap */
NULL, /* usrregs */
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
&aarch64_regsets_info,
};
static struct regset_info aarch64_sve_regsets[] =
{
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PRSTATUS,
sizeof (struct user_pt_regs), GENERAL_REGS,
aarch64_fill_gregset, aarch64_store_gregset },
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_SVE,
SVE_PT_SIZE (AARCH64_MAX_SVE_VQ, SVE_PT_REGS_SVE), EXTENDED_REGS,
aarch64_sve_regs_copy_from_regcache, aarch64_sve_regs_copy_to_regcache
},
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_PAC_MASK,
AARCH64_PAUTH_REGS_SIZE, OPTIONAL_REGS,
NULL, aarch64_store_pauthregset },
NULL_REGSET
};
static struct regsets_info aarch64_sve_regsets_info =
{
aarch64_sve_regsets, /* regsets. */
0, /* num_regsets. */
NULL, /* disabled_regsets. */
};
static struct regs_info regs_info_aarch64_sve =
{
NULL, /* regset_bitmap. */
NULL, /* usrregs. */
&aarch64_sve_regsets_info,
};
/* Implementation of linux_target_ops method "regs_info". */
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
static const struct regs_info *
aarch64_regs_info (void)
{
if (!is_64bit_tdesc ())
return &regs_info_aarch32;
if (is_sve_tdesc ())
return &regs_info_aarch64_sve;
return &regs_info_aarch64;
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
}
/* Implementation of linux_target_ops method "supports_tracepoints". */
static int
aarch64_supports_tracepoints (void)
{
if (current_thread == NULL)
return 1;
else
{
/* We don't support tracepoints on aarch32 now. */
return is_64bit_tdesc ();
}
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Implementation of linux_target_ops method "get_thread_area". */
static int
aarch64_get_thread_area (int lwpid, CORE_ADDR *addrp)
{
struct iovec iovec;
uint64_t reg;
iovec.iov_base = &reg;
iovec.iov_len = sizeof (reg);
if (ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec) != 0)
return -1;
*addrp = reg;
return 0;
}
/* Implementation of linux_target_ops method "get_syscall_trapinfo". */
static void
aarch64_get_syscall_trapinfo (struct regcache *regcache, int *sysno)
{
int use_64bit = register_size (regcache->tdesc, 0) == 8;
if (use_64bit)
{
long l_sysno;
collect_register_by_name (regcache, "x8", &l_sysno);
*sysno = (int) l_sysno;
}
else
collect_register_by_name (regcache, "r7", sysno);
}
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
/* List of condition codes that we need. */
enum aarch64_condition_codes
{
EQ = 0x0,
NE = 0x1,
LO = 0x3,
GE = 0xa,
LT = 0xb,
GT = 0xc,
LE = 0xd,
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
};
enum aarch64_operand_type
{
OPERAND_IMMEDIATE,
OPERAND_REGISTER,
};
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Representation of an operand. At this time, it only supports register
and immediate types. */
struct aarch64_operand
{
/* Type of the operand. */
enum aarch64_operand_type type;
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Value of the operand according to the type. */
union
{
uint32_t imm;
struct aarch64_register reg;
};
};
/* List of registers that we are currently using, we can add more here as
we need to use them. */
/* General purpose scratch registers (64 bit). */
static const struct aarch64_register x0 = { 0, 1 };
static const struct aarch64_register x1 = { 1, 1 };
static const struct aarch64_register x2 = { 2, 1 };
static const struct aarch64_register x3 = { 3, 1 };
static const struct aarch64_register x4 = { 4, 1 };
/* General purpose scratch registers (32 bit). */
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
static const struct aarch64_register w0 = { 0, 0 };
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
static const struct aarch64_register w2 = { 2, 0 };
/* Intra-procedure scratch registers. */
static const struct aarch64_register ip0 = { 16, 1 };
/* Special purpose registers. */
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
static const struct aarch64_register fp = { 29, 1 };
static const struct aarch64_register lr = { 30, 1 };
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
static const struct aarch64_register sp = { 31, 1 };
static const struct aarch64_register xzr = { 31, 1 };
/* Dynamically allocate a new register. If we know the register
statically, we should make it a global as above instead of using this
helper function. */
static struct aarch64_register
aarch64_register (unsigned num, int is64)
{
return (struct aarch64_register) { num, is64 };
}
/* Helper function to create a register operand, for instructions with
different types of operands.
For example:
p += emit_mov (p, x0, register_operand (x1)); */
static struct aarch64_operand
register_operand (struct aarch64_register reg)
{
struct aarch64_operand operand;
operand.type = OPERAND_REGISTER;
operand.reg = reg;
return operand;
}
/* Helper function to create an immediate operand, for instructions with
different types of operands.
For example:
p += emit_mov (p, x0, immediate_operand (12)); */
static struct aarch64_operand
immediate_operand (uint32_t imm)
{
struct aarch64_operand operand;
operand.type = OPERAND_IMMEDIATE;
operand.imm = imm;
return operand;
}
/* Helper function to create an offset memory operand.
For example:
p += emit_ldr (p, x0, sp, offset_memory_operand (16)); */
static struct aarch64_memory_operand
offset_memory_operand (int32_t offset)
{
return (struct aarch64_memory_operand) { MEMORY_OPERAND_OFFSET, offset };
}
/* Helper function to create a pre-index memory operand.
For example:
p += emit_ldr (p, x0, sp, preindex_memory_operand (16)); */
static struct aarch64_memory_operand
preindex_memory_operand (int32_t index)
{
return (struct aarch64_memory_operand) { MEMORY_OPERAND_PREINDEX, index };
}
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
/* Helper function to create a post-index memory operand.
For example:
p += emit_ldr (p, x0, sp, postindex_memory_operand (16)); */
static struct aarch64_memory_operand
postindex_memory_operand (int32_t index)
{
return (struct aarch64_memory_operand) { MEMORY_OPERAND_POSTINDEX, index };
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* System control registers. These special registers can be written and
read with the MRS and MSR instructions.
- NZCV: Condition flags. GDB refers to this register under the CPSR
name.
- FPSR: Floating-point status register.
- FPCR: Floating-point control registers.
- TPIDR_EL0: Software thread ID register. */
enum aarch64_system_control_registers
{
/* op0 op1 crn crm op2 */
NZCV = (0x1 << 14) | (0x3 << 11) | (0x4 << 7) | (0x2 << 3) | 0x0,
FPSR = (0x1 << 14) | (0x3 << 11) | (0x4 << 7) | (0x4 << 3) | 0x1,
FPCR = (0x1 << 14) | (0x3 << 11) | (0x4 << 7) | (0x4 << 3) | 0x0,
TPIDR_EL0 = (0x1 << 14) | (0x3 << 11) | (0xd << 7) | (0x0 << 3) | 0x2
};
/* Write a BLR instruction into *BUF.
BLR rn
RN is the register to branch to. */
static int
emit_blr (uint32_t *buf, struct aarch64_register rn)
{
return aarch64_emit_insn (buf, BLR | ENCODE (rn.num, 5, 5));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
/* Write a RET instruction into *BUF.
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
RET xn
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
RN is the register to branch to. */
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
static int
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
emit_ret (uint32_t *buf, struct aarch64_register rn)
{
return aarch64_emit_insn (buf, RET | ENCODE (rn.num, 5, 5));
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
}
static int
emit_load_store_pair (uint32_t *buf, enum aarch64_opcodes opcode,
struct aarch64_register rt,
struct aarch64_register rt2,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
{
uint32_t opc;
uint32_t pre_index;
uint32_t write_back;
if (rt.is64)
opc = ENCODE (2, 2, 30);
else
opc = ENCODE (0, 2, 30);
switch (operand.type)
{
case MEMORY_OPERAND_OFFSET:
{
pre_index = ENCODE (1, 1, 24);
write_back = ENCODE (0, 1, 23);
break;
}
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
case MEMORY_OPERAND_POSTINDEX:
{
pre_index = ENCODE (0, 1, 24);
write_back = ENCODE (1, 1, 23);
break;
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
case MEMORY_OPERAND_PREINDEX:
{
pre_index = ENCODE (1, 1, 24);
write_back = ENCODE (1, 1, 23);
break;
}
default:
return 0;
}
return aarch64_emit_insn (buf, opcode | opc | pre_index | write_back
| ENCODE (operand.index >> 3, 7, 15)
| ENCODE (rt2.num, 5, 10)
| ENCODE (rn.num, 5, 5) | ENCODE (rt.num, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
/* Write a STP instruction into *BUF.
STP rt, rt2, [rn, #offset]
STP rt, rt2, [rn, #index]!
STP rt, rt2, [rn], #index
RT and RT2 are the registers to store.
RN is the base address register.
OFFSET is the immediate to add to the base address. It is limited to a
-512 .. 504 range (7 bits << 3). */
static int
emit_stp (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rt2, struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
return emit_load_store_pair (buf, STP, rt, rt2, rn, operand);
}
/* Write a LDP instruction into *BUF.
LDP rt, rt2, [rn, #offset]
LDP rt, rt2, [rn, #index]!
LDP rt, rt2, [rn], #index
RT and RT2 are the registers to store.
RN is the base address register.
OFFSET is the immediate to add to the base address. It is limited to a
-512 .. 504 range (7 bits << 3). */
static int
emit_ldp (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rt2, struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
return emit_load_store_pair (buf, LDP, rt, rt2, rn, operand);
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Write a LDP (SIMD&VFP) instruction using Q registers into *BUF.
LDP qt, qt2, [rn, #offset]
RT and RT2 are the Q registers to store.
RN is the base address register.
OFFSET is the immediate to add to the base address. It is limited to
-1024 .. 1008 range (7 bits << 4). */
static int
emit_ldp_q_offset (uint32_t *buf, unsigned rt, unsigned rt2,
struct aarch64_register rn, int32_t offset)
{
uint32_t opc = ENCODE (2, 2, 30);
uint32_t pre_index = ENCODE (1, 1, 24);
return aarch64_emit_insn (buf, LDP_SIMD_VFP | opc | pre_index
| ENCODE (offset >> 4, 7, 15)
| ENCODE (rt2, 5, 10)
| ENCODE (rn.num, 5, 5) | ENCODE (rt, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
/* Write a STP (SIMD&VFP) instruction using Q registers into *BUF.
STP qt, qt2, [rn, #offset]
RT and RT2 are the Q registers to store.
RN is the base address register.
OFFSET is the immediate to add to the base address. It is limited to
-1024 .. 1008 range (7 bits << 4). */
static int
emit_stp_q_offset (uint32_t *buf, unsigned rt, unsigned rt2,
struct aarch64_register rn, int32_t offset)
{
uint32_t opc = ENCODE (2, 2, 30);
uint32_t pre_index = ENCODE (1, 1, 24);
return aarch64_emit_insn (buf, STP_SIMD_VFP | opc | pre_index
Support displaced stepping in aarch64-linux This patch is to support displaced stepping in aarch64-linux. A visitor is implemented for displaced stepping, and used to record information to fixup pc after displaced stepping if needed. Some emit_* functions are converted to macros, and moved to arch/aarch64-insn.{c,h} so that they can be shared. gdb: 2015-10-12 Yao Qi <yao.qi@linaro.org> * aarch64-linux-tdep.c: Include arch-utils.h. (aarch64_linux_init_abi): Call set_gdbarch_max_insn_length, set_gdbarch_displaced_step_copy_insn, set_gdbarch_displaced_step_fixup, set_gdbarch_displaced_step_free_closure, set_gdbarch_displaced_step_location, and set_gdbarch_displaced_step_hw_singlestep. * aarch64-tdep.c (struct displaced_step_closure): New. (struct aarch64_displaced_step_data): New. (aarch64_displaced_step_b): New function. (aarch64_displaced_step_b_cond): Likewise. (aarch64_register): Likewise. (aarch64_displaced_step_cb): Likewise. (aarch64_displaced_step_tb): Likewise. (aarch64_displaced_step_adr): Likewise. (aarch64_displaced_step_ldr_literal): Likewise. (aarch64_displaced_step_others): Likewise. (aarch64_displaced_step_copy_insn): Likewise. (aarch64_displaced_step_fixup): Likewise. (aarch64_displaced_step_hw_singlestep): Likewise. * aarch64-tdep.h (DISPLACED_MODIFIED_INSNS): New macro. (aarch64_displaced_step_copy_insn): Declare. (aarch64_displaced_step_fixup): Declare. (aarch64_displaced_step_hw_singlestep): Declare. * arch/aarch64-insn.c (emit_insn): Moved from gdbserver/linux-aarch64-low.c. (emit_load_store): Likewise. * arch/aarch64-insn.h (enum aarch64_opcodes): Moved from gdbserver/linux-aarch64-low.c. (struct aarch64_register): Likewise. (struct aarch64_memory_operand): Likewise. (ENCODE): Likewise. (can_encode_int32): New macro. (emit_b, emit_bcond, emit_cb, emit_ldr, emit_ldrsw): Likewise. (emit_tb, emit_nop): Likewise. (emit_insn): Declare. (emit_load_store): Declare. gdb/gdbserver: 2015-10-12 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (enum aarch64_opcodes): Move to arch/aarch64-insn.h. (struct aarch64_memory_operand): Likewise. (ENCODE): Likewise. (emit_insn): Move to arch/aarch64-insn.c. (emit_b, emit_bcond, emit_cb, emit_tb): Remove. (emit_load_store): Move to arch/aarch64-insn.c. (emit_ldr, emit_ldrb, emit_ldrsw, emit_nop): Remove. (can_encode_int32): Remove.
2015-10-12 18:28:38 +08:00
| ENCODE (offset >> 4, 7, 15)
| ENCODE (rt2, 5, 10)
| ENCODE (rn.num, 5, 5) | ENCODE (rt, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
/* Write a LDRH instruction into *BUF.
LDRH wt, [xn, #offset]
LDRH wt, [xn, #index]!
LDRH wt, [xn], #index
RT is the register to store.
RN is the base address register.
OFFSET is the immediate to add to the base address. It is limited to
0 .. 32760 range (12 bits << 3). */
static int
emit_ldrh (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
return aarch64_emit_load_store (buf, 1, LDR, rt, rn, operand);
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
}
/* Write a LDRB instruction into *BUF.
LDRB wt, [xn, #offset]
LDRB wt, [xn, #index]!
LDRB wt, [xn], #index
RT is the register to store.
RN is the base address register.
OFFSET is the immediate to add to the base address. It is limited to
0 .. 32760 range (12 bits << 3). */
static int
emit_ldrb (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
return aarch64_emit_load_store (buf, 0, LDR, rt, rn, operand);
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Write a STR instruction into *BUF.
STR rt, [rn, #offset]
STR rt, [rn, #index]!
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
STR rt, [rn], #index
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
RT is the register to store.
RN is the base address register.
OFFSET is the immediate to add to the base address. It is limited to
0 .. 32760 range (12 bits << 3). */
static int
emit_str (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn,
struct aarch64_memory_operand operand)
{
return aarch64_emit_load_store (buf, rt.is64 ? 3 : 2, STR, rt, rn, operand);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
/* Helper function emitting an exclusive load or store instruction. */
static int
emit_load_store_exclusive (uint32_t *buf, uint32_t size,
enum aarch64_opcodes opcode,
struct aarch64_register rs,
struct aarch64_register rt,
struct aarch64_register rt2,
struct aarch64_register rn)
{
return aarch64_emit_insn (buf, opcode | ENCODE (size, 2, 30)
| ENCODE (rs.num, 5, 16) | ENCODE (rt2.num, 5, 10)
| ENCODE (rn.num, 5, 5) | ENCODE (rt.num, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
/* Write a LAXR instruction into *BUF.
LDAXR rt, [xn]
RT is the destination register.
RN is the base address register. */
static int
emit_ldaxr (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn)
{
return emit_load_store_exclusive (buf, rt.is64 ? 3 : 2, LDAXR, xzr, rt,
xzr, rn);
}
/* Write a STXR instruction into *BUF.
STXR ws, rt, [xn]
RS is the result register, it indicates if the store succeeded or not.
RT is the destination register.
RN is the base address register. */
static int
emit_stxr (uint32_t *buf, struct aarch64_register rs,
struct aarch64_register rt, struct aarch64_register rn)
{
return emit_load_store_exclusive (buf, rt.is64 ? 3 : 2, STXR, rs, rt,
xzr, rn);
}
/* Write a STLR instruction into *BUF.
STLR rt, [xn]
RT is the register to store.
RN is the base address register. */
static int
emit_stlr (uint32_t *buf, struct aarch64_register rt,
struct aarch64_register rn)
{
return emit_load_store_exclusive (buf, rt.is64 ? 3 : 2, STLR, xzr, rt,
xzr, rn);
}
/* Helper function for data processing instructions with register sources. */
static int
emit_data_processing_reg (uint32_t *buf, uint32_t opcode,
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
struct aarch64_register rd,
struct aarch64_register rn,
struct aarch64_register rm)
{
uint32_t size = ENCODE (rd.is64, 1, 31);
return aarch64_emit_insn (buf, opcode | size | ENCODE (rm.num, 5, 16)
| ENCODE (rn.num, 5, 5) | ENCODE (rd.num, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
/* Helper function for data processing instructions taking either a register
or an immediate. */
static int
emit_data_processing (uint32_t *buf, enum aarch64_opcodes opcode,
struct aarch64_register rd,
struct aarch64_register rn,
struct aarch64_operand operand)
{
uint32_t size = ENCODE (rd.is64, 1, 31);
/* The opcode is different for register and immediate source operands. */
uint32_t operand_opcode;
if (operand.type == OPERAND_IMMEDIATE)
{
/* xxx1 000x xxxx xxxx xxxx xxxx xxxx xxxx */
operand_opcode = ENCODE (8, 4, 25);
return aarch64_emit_insn (buf, opcode | operand_opcode | size
| ENCODE (operand.imm, 12, 10)
| ENCODE (rn.num, 5, 5)
| ENCODE (rd.num, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
else
{
/* xxx0 101x xxxx xxxx xxxx xxxx xxxx xxxx */
operand_opcode = ENCODE (5, 4, 25);
return emit_data_processing_reg (buf, opcode | operand_opcode, rd,
rn, operand.reg);
}
}
/* Write an ADD instruction into *BUF.
ADD rd, rn, #imm
ADD rd, rn, rm
This function handles both an immediate and register add.
RD is the destination register.
RN is the input register.
OPERAND is the source operand, either of type OPERAND_IMMEDIATE or
OPERAND_REGISTER. */
static int
emit_add (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_operand operand)
{
return emit_data_processing (buf, ADD, rd, rn, operand);
}
/* Write a SUB instruction into *BUF.
SUB rd, rn, #imm
SUB rd, rn, rm
This function handles both an immediate and register sub.
RD is the destination register.
RN is the input register.
IMM is the immediate to substract to RN. */
static int
emit_sub (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_operand operand)
{
return emit_data_processing (buf, SUB, rd, rn, operand);
}
/* Write a MOV instruction into *BUF.
MOV rd, #imm
MOV rd, rm
This function handles both a wide immediate move and a register move,
with the condition that the source register is not xzr. xzr and the
stack pointer share the same encoding and this function only supports
the stack pointer.
RD is the destination register.
OPERAND is the source operand, either of type OPERAND_IMMEDIATE or
OPERAND_REGISTER. */
static int
emit_mov (uint32_t *buf, struct aarch64_register rd,
struct aarch64_operand operand)
{
if (operand.type == OPERAND_IMMEDIATE)
{
uint32_t size = ENCODE (rd.is64, 1, 31);
/* Do not shift the immediate. */
uint32_t shift = ENCODE (0, 2, 21);
return aarch64_emit_insn (buf, MOV | size | shift
| ENCODE (operand.imm, 16, 5)
| ENCODE (rd.num, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
else
return emit_add (buf, rd, operand.reg, immediate_operand (0));
}
/* Write a MOVK instruction into *BUF.
MOVK rd, #imm, lsl #shift
RD is the destination register.
IMM is the immediate.
SHIFT is the logical shift left to apply to IMM. */
static int
emit_movk (uint32_t *buf, struct aarch64_register rd, uint32_t imm,
unsigned shift)
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
{
uint32_t size = ENCODE (rd.is64, 1, 31);
return aarch64_emit_insn (buf, MOVK | size | ENCODE (shift, 2, 21) |
ENCODE (imm, 16, 5) | ENCODE (rd.num, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
/* Write instructions into *BUF in order to move ADDR into a register.
ADDR can be a 64-bit value.
This function will emit a series of MOV and MOVK instructions, such as:
MOV xd, #(addr)
MOVK xd, #(addr >> 16), lsl #16
MOVK xd, #(addr >> 32), lsl #32
MOVK xd, #(addr >> 48), lsl #48 */
static int
emit_mov_addr (uint32_t *buf, struct aarch64_register rd, CORE_ADDR addr)
{
uint32_t *p = buf;
/* The MOV (wide immediate) instruction clears to top bits of the
register. */
p += emit_mov (p, rd, immediate_operand (addr & 0xffff));
if ((addr >> 16) != 0)
p += emit_movk (p, rd, (addr >> 16) & 0xffff, 1);
else
return p - buf;
if ((addr >> 32) != 0)
p += emit_movk (p, rd, (addr >> 32) & 0xffff, 2);
else
return p - buf;
if ((addr >> 48) != 0)
p += emit_movk (p, rd, (addr >> 48) & 0xffff, 3);
return p - buf;
}
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
/* Write a SUBS instruction into *BUF.
SUBS rd, rn, rm
This instruction update the condition flags.
RD is the destination register.
RN and RM are the source registers. */
static int
emit_subs (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_operand operand)
{
return emit_data_processing (buf, SUBS, rd, rn, operand);
}
/* Write a CMP instruction into *BUF.
CMP rn, rm
This instruction is an alias of SUBS xzr, rn, rm.
RN and RM are the registers to compare. */
static int
emit_cmp (uint32_t *buf, struct aarch64_register rn,
struct aarch64_operand operand)
{
return emit_subs (buf, xzr, rn, operand);
}
/* Write a AND instruction into *BUF.
AND rd, rn, rm
RD is the destination register.
RN and RM are the source registers. */
static int
emit_and (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_register rm)
{
return emit_data_processing_reg (buf, AND, rd, rn, rm);
}
/* Write a ORR instruction into *BUF.
ORR rd, rn, rm
RD is the destination register.
RN and RM are the source registers. */
static int
emit_orr (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_register rm)
{
return emit_data_processing_reg (buf, ORR, rd, rn, rm);
}
/* Write a ORN instruction into *BUF.
ORN rd, rn, rm
RD is the destination register.
RN and RM are the source registers. */
static int
emit_orn (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_register rm)
{
return emit_data_processing_reg (buf, ORN, rd, rn, rm);
}
/* Write a EOR instruction into *BUF.
EOR rd, rn, rm
RD is the destination register.
RN and RM are the source registers. */
static int
emit_eor (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_register rm)
{
return emit_data_processing_reg (buf, EOR, rd, rn, rm);
}
/* Write a MVN instruction into *BUF.
MVN rd, rm
This is an alias for ORN rd, xzr, rm.
RD is the destination register.
RM is the source register. */
static int
emit_mvn (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rm)
{
return emit_orn (buf, rd, xzr, rm);
}
/* Write a LSLV instruction into *BUF.
LSLV rd, rn, rm
RD is the destination register.
RN and RM are the source registers. */
static int
emit_lslv (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_register rm)
{
return emit_data_processing_reg (buf, LSLV, rd, rn, rm);
}
/* Write a LSRV instruction into *BUF.
LSRV rd, rn, rm
RD is the destination register.
RN and RM are the source registers. */
static int
emit_lsrv (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_register rm)
{
return emit_data_processing_reg (buf, LSRV, rd, rn, rm);
}
/* Write a ASRV instruction into *BUF.
ASRV rd, rn, rm
RD is the destination register.
RN and RM are the source registers. */
static int
emit_asrv (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_register rm)
{
return emit_data_processing_reg (buf, ASRV, rd, rn, rm);
}
/* Write a MUL instruction into *BUF.
MUL rd, rn, rm
RD is the destination register.
RN and RM are the source registers. */
static int
emit_mul (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_register rm)
{
return emit_data_processing_reg (buf, MUL, rd, rn, rm);
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Write a MRS instruction into *BUF. The register size is 64-bit.
MRS xt, system_reg
RT is the destination register.
SYSTEM_REG is special purpose register to read. */
static int
emit_mrs (uint32_t *buf, struct aarch64_register rt,
enum aarch64_system_control_registers system_reg)
{
return aarch64_emit_insn (buf, MRS | ENCODE (system_reg, 15, 5)
| ENCODE (rt.num, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
/* Write a MSR instruction into *BUF. The register size is 64-bit.
MSR system_reg, xt
SYSTEM_REG is special purpose register to write.
RT is the input register. */
static int
emit_msr (uint32_t *buf, enum aarch64_system_control_registers system_reg,
struct aarch64_register rt)
{
return aarch64_emit_insn (buf, MSR | ENCODE (system_reg, 15, 5)
| ENCODE (rt.num, 5, 0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
/* Write a SEVL instruction into *BUF.
This is a hint instruction telling the hardware to trigger an event. */
static int
emit_sevl (uint32_t *buf)
{
return aarch64_emit_insn (buf, SEVL);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
/* Write a WFE instruction into *BUF.
This is a hint instruction telling the hardware to wait for an event. */
static int
emit_wfe (uint32_t *buf)
{
return aarch64_emit_insn (buf, WFE);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
/* Write a SBFM instruction into *BUF.
SBFM rd, rn, #immr, #imms
This instruction moves the bits from #immr to #imms into the
destination, sign extending the result.
RD is the destination register.
RN is the source register.
IMMR is the bit number to start at (least significant bit).
IMMS is the bit number to stop at (most significant bit). */
static int
emit_sbfm (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, uint32_t immr, uint32_t imms)
{
uint32_t size = ENCODE (rd.is64, 1, 31);
uint32_t n = ENCODE (rd.is64, 1, 22);
return aarch64_emit_insn (buf, SBFM | size | n | ENCODE (immr, 6, 16)
| ENCODE (imms, 6, 10) | ENCODE (rn.num, 5, 5)
| ENCODE (rd.num, 5, 0));
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
}
/* Write a SBFX instruction into *BUF.
SBFX rd, rn, #lsb, #width
This instruction moves #width bits from #lsb into the destination, sign
extending the result. This is an alias for:
SBFM rd, rn, #lsb, #(lsb + width - 1)
RD is the destination register.
RN is the source register.
LSB is the bit number to start at (least significant bit).
WIDTH is the number of bits to move. */
static int
emit_sbfx (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, uint32_t lsb, uint32_t width)
{
return emit_sbfm (buf, rd, rn, lsb, lsb + width - 1);
}
/* Write a UBFM instruction into *BUF.
UBFM rd, rn, #immr, #imms
This instruction moves the bits from #immr to #imms into the
destination, extending the result with zeros.
RD is the destination register.
RN is the source register.
IMMR is the bit number to start at (least significant bit).
IMMS is the bit number to stop at (most significant bit). */
static int
emit_ubfm (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, uint32_t immr, uint32_t imms)
{
uint32_t size = ENCODE (rd.is64, 1, 31);
uint32_t n = ENCODE (rd.is64, 1, 22);
return aarch64_emit_insn (buf, UBFM | size | n | ENCODE (immr, 6, 16)
| ENCODE (imms, 6, 10) | ENCODE (rn.num, 5, 5)
| ENCODE (rd.num, 5, 0));
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
}
/* Write a UBFX instruction into *BUF.
UBFX rd, rn, #lsb, #width
This instruction moves #width bits from #lsb into the destination,
extending the result with zeros. This is an alias for:
UBFM rd, rn, #lsb, #(lsb + width - 1)
RD is the destination register.
RN is the source register.
LSB is the bit number to start at (least significant bit).
WIDTH is the number of bits to move. */
static int
emit_ubfx (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, uint32_t lsb, uint32_t width)
{
return emit_ubfm (buf, rd, rn, lsb, lsb + width - 1);
}
/* Write a CSINC instruction into *BUF.
CSINC rd, rn, rm, cond
This instruction conditionally increments rn or rm and places the result
in rd. rn is chosen is the condition is true.
RD is the destination register.
RN and RM are the source registers.
COND is the encoded condition. */
static int
emit_csinc (uint32_t *buf, struct aarch64_register rd,
struct aarch64_register rn, struct aarch64_register rm,
unsigned cond)
{
uint32_t size = ENCODE (rd.is64, 1, 31);
return aarch64_emit_insn (buf, CSINC | size | ENCODE (rm.num, 5, 16)
| ENCODE (cond, 4, 12) | ENCODE (rn.num, 5, 5)
| ENCODE (rd.num, 5, 0));
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
}
/* Write a CSET instruction into *BUF.
CSET rd, cond
This instruction conditionally write 1 or 0 in the destination register.
1 is written if the condition is true. This is an alias for:
CSINC rd, xzr, xzr, !cond
Note that the condition needs to be inverted.
RD is the destination register.
RN and RM are the source registers.
COND is the encoded condition. */
static int
emit_cset (uint32_t *buf, struct aarch64_register rd, unsigned cond)
{
/* The least significant bit of the condition needs toggling in order to
invert it. */
return emit_csinc (buf, rd, xzr, xzr, cond ^ 0x1);
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Write LEN instructions from BUF into the inferior memory at *TO.
Note instructions are always little endian on AArch64, unlike data. */
static void
append_insns (CORE_ADDR *to, size_t len, const uint32_t *buf)
{
size_t byte_len = len * sizeof (uint32_t);
#if (__BYTE_ORDER == __BIG_ENDIAN)
uint32_t *le_buf = (uint32_t *) xmalloc (byte_len);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
size_t i;
for (i = 0; i < len; i++)
le_buf[i] = htole32 (buf[i]);
Replace write_inferior_memory with target_write_memory target_write_memory is just a simple wrapper for write_inferior_memory. Because target_write_memory is needed for gdbsupport, and because gdb uses the name "target_write_memory" everywhere, this patch renames write_inferior_memory and removes the wrapper. I think this brings gdb and gdbserver slightly more in sync. gdb/gdbserver/ChangeLog 2019-08-15 Tom Tromey <tromey@adacore.com> * tracepoint.c (write_inferior_data_pointer) (write_inferior_integer, write_inferior_int8) (write_inferior_uinteger, m_tracepoint_action_download) (r_tracepoint_action_download, x_tracepoint_action_download) (l_tracepoint_action_download, clear_inferior_trace_buffer) (download_agent_expr, download_tracepoint_1) (download_trace_state_variables, upload_fast_traceframes): Update. * server.c (gdb_write_memory): Update. * remote-utils.c (relocate_instruction): Update. * proc-service.c (ps_pdwrite): Update. * mem-break.c (remove_memory_breakpoint) (delete_fast_tracepoint_jump, set_fast_tracepoint_jump) (uninsert_fast_tracepoint_jumps_at) (reinsert_fast_tracepoint_jumps_at): Update. * linux-x86-low.c (append_insns) (i386_install_fast_tracepoint_jump_pad) (amd64_write_goto_address, i386_write_goto_address): Update. * linux-s390-low.c (append_insns, s390_write_goto_address): Update. * linux-ppc-low.c (ppc_relocate_instruction) (ppc_install_fast_tracepoint_jump_pad, emit_insns) (ppc_write_goto_address): Update. * linux-aarch64-low.c (append_insns): Update. * target.h (struct target_ops): Update. (write_inferior_memory): Don't declare. * target.c (target_write_memory): Rename from write_inferior_memory. Remove old target_write_memory.
2019-08-14 23:18:21 +08:00
target_write_memory (*to, (const unsigned char *) le_buf, byte_len);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
xfree (le_buf);
#else
Replace write_inferior_memory with target_write_memory target_write_memory is just a simple wrapper for write_inferior_memory. Because target_write_memory is needed for gdbsupport, and because gdb uses the name "target_write_memory" everywhere, this patch renames write_inferior_memory and removes the wrapper. I think this brings gdb and gdbserver slightly more in sync. gdb/gdbserver/ChangeLog 2019-08-15 Tom Tromey <tromey@adacore.com> * tracepoint.c (write_inferior_data_pointer) (write_inferior_integer, write_inferior_int8) (write_inferior_uinteger, m_tracepoint_action_download) (r_tracepoint_action_download, x_tracepoint_action_download) (l_tracepoint_action_download, clear_inferior_trace_buffer) (download_agent_expr, download_tracepoint_1) (download_trace_state_variables, upload_fast_traceframes): Update. * server.c (gdb_write_memory): Update. * remote-utils.c (relocate_instruction): Update. * proc-service.c (ps_pdwrite): Update. * mem-break.c (remove_memory_breakpoint) (delete_fast_tracepoint_jump, set_fast_tracepoint_jump) (uninsert_fast_tracepoint_jumps_at) (reinsert_fast_tracepoint_jumps_at): Update. * linux-x86-low.c (append_insns) (i386_install_fast_tracepoint_jump_pad) (amd64_write_goto_address, i386_write_goto_address): Update. * linux-s390-low.c (append_insns, s390_write_goto_address): Update. * linux-ppc-low.c (ppc_relocate_instruction) (ppc_install_fast_tracepoint_jump_pad, emit_insns) (ppc_write_goto_address): Update. * linux-aarch64-low.c (append_insns): Update. * target.h (struct target_ops): Update. (write_inferior_memory): Don't declare. * target.c (target_write_memory): Rename from write_inferior_memory. Remove old target_write_memory.
2019-08-14 23:18:21 +08:00
target_write_memory (*to, (const unsigned char *) buf, byte_len);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
#endif
*to += byte_len;
}
/* Sub-class of struct aarch64_insn_data, store information of
instruction relocation for fast tracepoint. Visitor can
relocate an instruction from BASE.INSN_ADDR to NEW_ADDR and save
the relocated instructions in buffer pointed by INSN_PTR. */
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
struct aarch64_insn_relocation_data
{
struct aarch64_insn_data base;
/* The new address the instruction is relocated to. */
CORE_ADDR new_addr;
/* Pointer to the buffer of relocated instruction(s). */
uint32_t *insn_ptr;
};
/* Implementation of aarch64_insn_visitor method "b". */
static void
aarch64_ftrace_insn_reloc_b (const int is_bl, const int32_t offset,
struct aarch64_insn_data *data)
{
struct aarch64_insn_relocation_data *insn_reloc
= (struct aarch64_insn_relocation_data *) data;
int64_t new_offset
= insn_reloc->base.insn_addr - insn_reloc->new_addr + offset;
if (can_encode_int32 (new_offset, 28))
insn_reloc->insn_ptr += emit_b (insn_reloc->insn_ptr, is_bl, new_offset);
}
/* Implementation of aarch64_insn_visitor method "b_cond". */
static void
aarch64_ftrace_insn_reloc_b_cond (const unsigned cond, const int32_t offset,
struct aarch64_insn_data *data)
{
struct aarch64_insn_relocation_data *insn_reloc
= (struct aarch64_insn_relocation_data *) data;
int64_t new_offset
= insn_reloc->base.insn_addr - insn_reloc->new_addr + offset;
if (can_encode_int32 (new_offset, 21))
{
insn_reloc->insn_ptr += emit_bcond (insn_reloc->insn_ptr, cond,
new_offset);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
else if (can_encode_int32 (new_offset, 28))
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
{
/* The offset is out of range for a conditional branch
instruction but not for a unconditional branch. We can use
the following instructions instead:
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
B.COND TAKEN ; If cond is true, then jump to TAKEN.
B NOT_TAKEN ; Else jump over TAKEN and continue.
TAKEN:
B #(offset - 8)
NOT_TAKEN:
*/
insn_reloc->insn_ptr += emit_bcond (insn_reloc->insn_ptr, cond, 8);
insn_reloc->insn_ptr += emit_b (insn_reloc->insn_ptr, 0, 8);
insn_reloc->insn_ptr += emit_b (insn_reloc->insn_ptr, 0, new_offset - 8);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Implementation of aarch64_insn_visitor method "cb". */
static void
aarch64_ftrace_insn_reloc_cb (const int32_t offset, const int is_cbnz,
const unsigned rn, int is64,
struct aarch64_insn_data *data)
{
struct aarch64_insn_relocation_data *insn_reloc
= (struct aarch64_insn_relocation_data *) data;
int64_t new_offset
= insn_reloc->base.insn_addr - insn_reloc->new_addr + offset;
if (can_encode_int32 (new_offset, 21))
{
insn_reloc->insn_ptr += emit_cb (insn_reloc->insn_ptr, is_cbnz,
aarch64_register (rn, is64), new_offset);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
else if (can_encode_int32 (new_offset, 28))
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
{
/* The offset is out of range for a compare and branch
instruction but not for a unconditional branch. We can use
the following instructions instead:
CBZ xn, TAKEN ; xn == 0, then jump to TAKEN.
B NOT_TAKEN ; Else jump over TAKEN and continue.
TAKEN:
B #(offset - 8)
NOT_TAKEN:
*/
insn_reloc->insn_ptr += emit_cb (insn_reloc->insn_ptr, is_cbnz,
aarch64_register (rn, is64), 8);
insn_reloc->insn_ptr += emit_b (insn_reloc->insn_ptr, 0, 8);
insn_reloc->insn_ptr += emit_b (insn_reloc->insn_ptr, 0, new_offset - 8);
}
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Implementation of aarch64_insn_visitor method "tb". */
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
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static void
aarch64_ftrace_insn_reloc_tb (const int32_t offset, int is_tbnz,
const unsigned rt, unsigned bit,
struct aarch64_insn_data *data)
{
struct aarch64_insn_relocation_data *insn_reloc
= (struct aarch64_insn_relocation_data *) data;
int64_t new_offset
= insn_reloc->base.insn_addr - insn_reloc->new_addr + offset;
if (can_encode_int32 (new_offset, 16))
{
insn_reloc->insn_ptr += emit_tb (insn_reloc->insn_ptr, is_tbnz, bit,
aarch64_register (rt, 1), new_offset);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
}
else if (can_encode_int32 (new_offset, 28))
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
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{
/* The offset is out of range for a test bit and branch
instruction but not for a unconditional branch. We can use
the following instructions instead:
TBZ xn, #bit, TAKEN ; xn[bit] == 0, then jump to TAKEN.
B NOT_TAKEN ; Else jump over TAKEN and continue.
TAKEN:
B #(offset - 8)
NOT_TAKEN:
*/
insn_reloc->insn_ptr += emit_tb (insn_reloc->insn_ptr, is_tbnz, bit,
aarch64_register (rt, 1), 8);
insn_reloc->insn_ptr += emit_b (insn_reloc->insn_ptr, 0, 8);
insn_reloc->insn_ptr += emit_b (insn_reloc->insn_ptr, 0,
new_offset - 8);
}
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Implementation of aarch64_insn_visitor method "adr". */
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
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static void
aarch64_ftrace_insn_reloc_adr (const int32_t offset, const unsigned rd,
const int is_adrp,
struct aarch64_insn_data *data)
{
struct aarch64_insn_relocation_data *insn_reloc
= (struct aarch64_insn_relocation_data *) data;
/* We know exactly the address the ADR{P,} instruction will compute.
We can just write it to the destination register. */
CORE_ADDR address = data->insn_addr + offset;
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
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if (is_adrp)
{
/* Clear the lower 12 bits of the offset to get the 4K page. */
insn_reloc->insn_ptr += emit_mov_addr (insn_reloc->insn_ptr,
aarch64_register (rd, 1),
address & ~0xfff);
}
else
insn_reloc->insn_ptr += emit_mov_addr (insn_reloc->insn_ptr,
aarch64_register (rd, 1), address);
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Implementation of aarch64_insn_visitor method "ldr_literal". */
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
static void
aarch64_ftrace_insn_reloc_ldr_literal (const int32_t offset, const int is_sw,
const unsigned rt, const int is64,
struct aarch64_insn_data *data)
{
struct aarch64_insn_relocation_data *insn_reloc
= (struct aarch64_insn_relocation_data *) data;
CORE_ADDR address = data->insn_addr + offset;
insn_reloc->insn_ptr += emit_mov_addr (insn_reloc->insn_ptr,
aarch64_register (rt, 1), address);
/* We know exactly what address to load from, and what register we
can use:
MOV xd, #(oldloc + offset)
MOVK xd, #((oldloc + offset) >> 16), lsl #16
...
LDR xd, [xd] ; or LDRSW xd, [xd]
*/
if (is_sw)
insn_reloc->insn_ptr += emit_ldrsw (insn_reloc->insn_ptr,
aarch64_register (rt, 1),
aarch64_register (rt, 1),
offset_memory_operand (0));
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
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else
insn_reloc->insn_ptr += emit_ldr (insn_reloc->insn_ptr,
aarch64_register (rt, is64),
aarch64_register (rt, 1),
offset_memory_operand (0));
}
/* Implementation of aarch64_insn_visitor method "others". */
static void
aarch64_ftrace_insn_reloc_others (const uint32_t insn,
struct aarch64_insn_data *data)
{
struct aarch64_insn_relocation_data *insn_reloc
= (struct aarch64_insn_relocation_data *) data;
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* The instruction is not PC relative. Just re-emit it at the new
location. */
insn_reloc->insn_ptr += aarch64_emit_insn (insn_reloc->insn_ptr, insn);
}
static const struct aarch64_insn_visitor visitor =
{
aarch64_ftrace_insn_reloc_b,
aarch64_ftrace_insn_reloc_b_cond,
aarch64_ftrace_insn_reloc_cb,
aarch64_ftrace_insn_reloc_tb,
aarch64_ftrace_insn_reloc_adr,
aarch64_ftrace_insn_reloc_ldr_literal,
aarch64_ftrace_insn_reloc_others,
};
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Implementation of linux_target_ops method
"install_fast_tracepoint_jump_pad". */
static int
aarch64_install_fast_tracepoint_jump_pad (CORE_ADDR tpoint,
CORE_ADDR tpaddr,
CORE_ADDR collector,
CORE_ADDR lockaddr,
ULONGEST orig_size,
CORE_ADDR *jump_entry,
CORE_ADDR *trampoline,
ULONGEST *trampoline_size,
unsigned char *jjump_pad_insn,
ULONGEST *jjump_pad_insn_size,
CORE_ADDR *adjusted_insn_addr,
CORE_ADDR *adjusted_insn_addr_end,
char *err)
{
uint32_t buf[256];
uint32_t *p = buf;
int64_t offset;
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
int i;
uint32_t insn;
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
CORE_ADDR buildaddr = *jump_entry;
struct aarch64_insn_relocation_data insn_data;
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* We need to save the current state on the stack both to restore it
later and to collect register values when the tracepoint is hit.
The saved registers are pushed in a layout that needs to be in sync
with aarch64_ft_collect_regmap (see linux-aarch64-ipa.c). Later on
the supply_fast_tracepoint_registers function will fill in the
register cache from a pointer to saved registers on the stack we build
here.
For simplicity, we set the size of each cell on the stack to 16 bytes.
This way one cell can hold any register type, from system registers
to the 128 bit SIMD&FP registers. Furthermore, the stack pointer
has to be 16 bytes aligned anyway.
Note that the CPSR register does not exist on AArch64. Instead we
can access system bits describing the process state with the
MRS/MSR instructions, namely the condition flags. We save them as
if they are part of a CPSR register because that's how GDB
interprets these system bits. At the moment, only the condition
flags are saved in CPSR (NZCV).
Stack layout, each cell is 16 bytes (descending):
High *-------- SIMD&FP registers from 31 down to 0. --------*
| q31 |
. .
. . 32 cells
. .
| q0 |
*---- General purpose registers from 30 down to 0. ----*
| x30 |
. .
. . 31 cells
. .
| x0 |
*------------- Special purpose registers. -------------*
| SP |
| PC |
| CPSR (NZCV) | 5 cells
| FPSR |
| FPCR | <- SP + 16
*------------- collecting_t object --------------------*
| TPIDR_EL0 | struct tracepoint * |
Low *------------------------------------------------------*
After this stack is set up, we issue a call to the collector, passing
it the saved registers at (SP + 16). */
/* Push SIMD&FP registers on the stack:
SUB sp, sp, #(32 * 16)
STP q30, q31, [sp, #(30 * 16)]
...
STP q0, q1, [sp]
*/
p += emit_sub (p, sp, sp, immediate_operand (32 * 16));
for (i = 30; i >= 0; i -= 2)
p += emit_stp_q_offset (p, i, i + 1, sp, i * 16);
[gdb] Fix more typos in comments (2) Fix typos in comments. NFC. Tested on x86_64-linux. gdb/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * aarch64-linux-tdep.c: Fix typos in comments. * aarch64-tdep.c: Same. * ada-lang.c: Same. * amd64-nat.c: Same. * arc-tdep.c: Same. * arch/aarch64-insn.c: Same. * block.c: Same. * breakpoint.h: Same. * btrace.h: Same. * c-varobj.c: Same. * cli/cli-decode.c: Same. * cli/cli-script.c: Same. * cli/cli-utils.h: Same. * coff-pe-read.c: Same. * coffread.c: Same. * compile/compile-cplus-symbols.c: Same. * compile/compile-object-run.c: Same. * completer.c: Same. * corelow.c: Same. * cp-support.c: Same. * demangle.c: Same. * dwarf-index-write.c: Same. * dwarf2-frame.c: Same. * dwarf2-frame.h: Same. * eval.c: Same. * frame-base.h: Same. * frame.h: Same. * gdbcmd.h: Same. * gdbtypes.h: Same. * gnu-nat.c: Same. * guile/scm-objfile.c: Same. * i386-tdep.c: Same. * i386-tdep.h: Same. * infcall.c: Same. * infcall.h: Same. * linux-nat.c: Same. * m68k-tdep.c: Same. * macroexp.c: Same. * memattr.c: Same. * mi/mi-cmd-disas.c: Same. * mi/mi-getopt.h: Same. * mi/mi-main.c: Same. * minsyms.c: Same. * nat/aarch64-sve-linux-sigcontext.h: Same. * objfiles.h: Same. * ppc-linux-nat.c: Same. * ppc-linux-tdep.c: Same. * ppc-tdep.h: Same. * progspace.h: Same. * prologue-value.h: Same. * python/py-evtregistry.c: Same. * python/py-instruction.h: Same. * record-btrace.c: Same. * record-full.c: Same. * remote.c: Same. * rs6000-tdep.c: Same. * ser-tcp.c: Same. * sol-thread.c: Same. * sparc-sol2-tdep.c: Same. * sparc64-tdep.c: Same. * stabsread.c: Same. * symfile.c: Same. * symtab.h: Same. * target.c: Same. * tracepoint.c: Same. * tui/tui-data.h: Same. * tui/tui-io.c: Same. * tui/tui-win.c: Same. * tui/tui.c: Same. * unittests/rsp-low-selftests.c: Same. * user-regs.h: Same. * utils.c: Same. * utils.h: Same. * valarith.c: Same. * valops.c: Same. * valprint.c: Same. * valprint.h: Same. * value.c: Same. * value.h: Same. * varobj.c: Same. * x86-nat.h: Same. * xtensa-tdep.c: Same. gdb/gdbserver/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * linux-aarch64-low.c: Fix typos in comments. * linux-arm-low.c: Same. * linux-low.c: Same. * linux-ppc-low.c: Same. * proc-service.c: Same. * regcache.h: Same. * server.c: Same. * tracepoint.c: Same. * win32-low.c: Same. gdb/stubs/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * ia64vms-stub.c: Fix typos in comments. * m32r-stub.c: Same. * m68k-stub.c: Same. * sh-stub.c: Same. gdb/testsuite/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * gdb.base/bigcore.c: Fix typos in comments. * gdb.base/ctf-ptype.c: Same. * gdb.base/long_long.c: Same. * gdb.dwarf2/dw2-op-out-param.S: Same. * gdb.python/py-evthreads.c: Same. * gdb.reverse/i387-stack-reverse.c: Same. * gdb.trace/tfile.c: Same. * lib/compiler.c: Same. * lib/compiler.cc: Same. Change-Id: I8573d84a577894270179ae30f46c48d806fc1beb
2019-10-26 15:55:32 +08:00
/* Push general purpose registers on the stack. Note that we do not need
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
to push x31 as it represents the xzr register and not the stack
pointer in a STR instruction.
SUB sp, sp, #(31 * 16)
STR x30, [sp, #(30 * 16)]
...
STR x0, [sp]
*/
p += emit_sub (p, sp, sp, immediate_operand (31 * 16));
for (i = 30; i >= 0; i -= 1)
p += emit_str (p, aarch64_register (i, 1), sp,
offset_memory_operand (i * 16));
/* Make space for 5 more cells.
SUB sp, sp, #(5 * 16)
*/
p += emit_sub (p, sp, sp, immediate_operand (5 * 16));
/* Save SP:
ADD x4, sp, #((32 + 31 + 5) * 16)
STR x4, [sp, #(4 * 16)]
*/
p += emit_add (p, x4, sp, immediate_operand ((32 + 31 + 5) * 16));
p += emit_str (p, x4, sp, offset_memory_operand (4 * 16));
/* Save PC (tracepoint address):
MOV x3, #(tpaddr)
...
STR x3, [sp, #(3 * 16)]
*/
p += emit_mov_addr (p, x3, tpaddr);
p += emit_str (p, x3, sp, offset_memory_operand (3 * 16));
/* Save CPSR (NZCV), FPSR and FPCR:
MRS x2, nzcv
MRS x1, fpsr
MRS x0, fpcr
STR x2, [sp, #(2 * 16)]
STR x1, [sp, #(1 * 16)]
STR x0, [sp, #(0 * 16)]
*/
p += emit_mrs (p, x2, NZCV);
p += emit_mrs (p, x1, FPSR);
p += emit_mrs (p, x0, FPCR);
p += emit_str (p, x2, sp, offset_memory_operand (2 * 16));
p += emit_str (p, x1, sp, offset_memory_operand (1 * 16));
p += emit_str (p, x0, sp, offset_memory_operand (0 * 16));
/* Push the collecting_t object. It consist of the address of the
tracepoint and an ID for the current thread. We get the latter by
reading the tpidr_el0 system register. It corresponds to the
NT_ARM_TLS register accessible with ptrace.
MOV x0, #(tpoint)
...
MRS x1, tpidr_el0
STP x0, x1, [sp, #-16]!
*/
p += emit_mov_addr (p, x0, tpoint);
p += emit_mrs (p, x1, TPIDR_EL0);
p += emit_stp (p, x0, x1, sp, preindex_memory_operand (-16));
/* Spin-lock:
The shared memory for the lock is at lockaddr. It will hold zero
if no-one is holding the lock, otherwise it contains the address of
the collecting_t object on the stack of the thread which acquired it.
At this stage, the stack pointer points to this thread's collecting_t
object.
We use the following registers:
- x0: Address of the lock.
- x1: Pointer to collecting_t object.
- x2: Scratch register.
MOV x0, #(lockaddr)
...
MOV x1, sp
; Trigger an event local to this core. So the following WFE
; instruction is ignored.
SEVL
again:
; Wait for an event. The event is triggered by either the SEVL
; or STLR instructions (store release).
WFE
; Atomically read at lockaddr. This marks the memory location as
; exclusive. This instruction also has memory constraints which
; make sure all previous data reads and writes are done before
; executing it.
LDAXR x2, [x0]
; Try again if another thread holds the lock.
CBNZ x2, again
; We can lock it! Write the address of the collecting_t object.
; This instruction will fail if the memory location is not marked
; as exclusive anymore. If it succeeds, it will remove the
; exclusive mark on the memory location. This way, if another
; thread executes this instruction before us, we will fail and try
; all over again.
STXR w2, x1, [x0]
CBNZ w2, again
*/
p += emit_mov_addr (p, x0, lockaddr);
p += emit_mov (p, x1, register_operand (sp));
p += emit_sevl (p);
p += emit_wfe (p);
p += emit_ldaxr (p, x2, x0);
p += emit_cb (p, 1, w2, -2 * 4);
p += emit_stxr (p, w2, x1, x0);
p += emit_cb (p, 1, x2, -4 * 4);
/* Call collector (struct tracepoint *, unsigned char *):
MOV x0, #(tpoint)
...
; Saved registers start after the collecting_t object.
ADD x1, sp, #16
; We use an intra-procedure-call scratch register.
MOV ip0, #(collector)
...
; And call back to C!
BLR ip0
*/
p += emit_mov_addr (p, x0, tpoint);
p += emit_add (p, x1, sp, immediate_operand (16));
p += emit_mov_addr (p, ip0, collector);
p += emit_blr (p, ip0);
/* Release the lock.
MOV x0, #(lockaddr)
...
; This instruction is a normal store with memory ordering
; constraints. Thanks to this we do not have to put a data
; barrier instruction to make sure all data read and writes are done
[gdb] Fix more typos in comments (2) Fix typos in comments. NFC. Tested on x86_64-linux. gdb/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * aarch64-linux-tdep.c: Fix typos in comments. * aarch64-tdep.c: Same. * ada-lang.c: Same. * amd64-nat.c: Same. * arc-tdep.c: Same. * arch/aarch64-insn.c: Same. * block.c: Same. * breakpoint.h: Same. * btrace.h: Same. * c-varobj.c: Same. * cli/cli-decode.c: Same. * cli/cli-script.c: Same. * cli/cli-utils.h: Same. * coff-pe-read.c: Same. * coffread.c: Same. * compile/compile-cplus-symbols.c: Same. * compile/compile-object-run.c: Same. * completer.c: Same. * corelow.c: Same. * cp-support.c: Same. * demangle.c: Same. * dwarf-index-write.c: Same. * dwarf2-frame.c: Same. * dwarf2-frame.h: Same. * eval.c: Same. * frame-base.h: Same. * frame.h: Same. * gdbcmd.h: Same. * gdbtypes.h: Same. * gnu-nat.c: Same. * guile/scm-objfile.c: Same. * i386-tdep.c: Same. * i386-tdep.h: Same. * infcall.c: Same. * infcall.h: Same. * linux-nat.c: Same. * m68k-tdep.c: Same. * macroexp.c: Same. * memattr.c: Same. * mi/mi-cmd-disas.c: Same. * mi/mi-getopt.h: Same. * mi/mi-main.c: Same. * minsyms.c: Same. * nat/aarch64-sve-linux-sigcontext.h: Same. * objfiles.h: Same. * ppc-linux-nat.c: Same. * ppc-linux-tdep.c: Same. * ppc-tdep.h: Same. * progspace.h: Same. * prologue-value.h: Same. * python/py-evtregistry.c: Same. * python/py-instruction.h: Same. * record-btrace.c: Same. * record-full.c: Same. * remote.c: Same. * rs6000-tdep.c: Same. * ser-tcp.c: Same. * sol-thread.c: Same. * sparc-sol2-tdep.c: Same. * sparc64-tdep.c: Same. * stabsread.c: Same. * symfile.c: Same. * symtab.h: Same. * target.c: Same. * tracepoint.c: Same. * tui/tui-data.h: Same. * tui/tui-io.c: Same. * tui/tui-win.c: Same. * tui/tui.c: Same. * unittests/rsp-low-selftests.c: Same. * user-regs.h: Same. * utils.c: Same. * utils.h: Same. * valarith.c: Same. * valops.c: Same. * valprint.c: Same. * valprint.h: Same. * value.c: Same. * value.h: Same. * varobj.c: Same. * x86-nat.h: Same. * xtensa-tdep.c: Same. gdb/gdbserver/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * linux-aarch64-low.c: Fix typos in comments. * linux-arm-low.c: Same. * linux-low.c: Same. * linux-ppc-low.c: Same. * proc-service.c: Same. * regcache.h: Same. * server.c: Same. * tracepoint.c: Same. * win32-low.c: Same. gdb/stubs/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * ia64vms-stub.c: Fix typos in comments. * m32r-stub.c: Same. * m68k-stub.c: Same. * sh-stub.c: Same. gdb/testsuite/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * gdb.base/bigcore.c: Fix typos in comments. * gdb.base/ctf-ptype.c: Same. * gdb.base/long_long.c: Same. * gdb.dwarf2/dw2-op-out-param.S: Same. * gdb.python/py-evthreads.c: Same. * gdb.reverse/i387-stack-reverse.c: Same. * gdb.trace/tfile.c: Same. * lib/compiler.c: Same. * lib/compiler.cc: Same. Change-Id: I8573d84a577894270179ae30f46c48d806fc1beb
2019-10-26 15:55:32 +08:00
; before this instruction is executed. Furthermore, this instruction
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
; will trigger an event, letting other threads know they can grab
; the lock.
STLR xzr, [x0]
*/
p += emit_mov_addr (p, x0, lockaddr);
p += emit_stlr (p, xzr, x0);
/* Free collecting_t object:
ADD sp, sp, #16
*/
p += emit_add (p, sp, sp, immediate_operand (16));
/* Restore CPSR (NZCV), FPSR and FPCR. And free all special purpose
registers from the stack.
LDR x2, [sp, #(2 * 16)]
LDR x1, [sp, #(1 * 16)]
LDR x0, [sp, #(0 * 16)]
MSR NZCV, x2
MSR FPSR, x1
MSR FPCR, x0
ADD sp, sp #(5 * 16)
*/
p += emit_ldr (p, x2, sp, offset_memory_operand (2 * 16));
p += emit_ldr (p, x1, sp, offset_memory_operand (1 * 16));
p += emit_ldr (p, x0, sp, offset_memory_operand (0 * 16));
p += emit_msr (p, NZCV, x2);
p += emit_msr (p, FPSR, x1);
p += emit_msr (p, FPCR, x0);
p += emit_add (p, sp, sp, immediate_operand (5 * 16));
/* Pop general purpose registers:
LDR x0, [sp]
...
LDR x30, [sp, #(30 * 16)]
ADD sp, sp, #(31 * 16)
*/
for (i = 0; i <= 30; i += 1)
p += emit_ldr (p, aarch64_register (i, 1), sp,
offset_memory_operand (i * 16));
p += emit_add (p, sp, sp, immediate_operand (31 * 16));
/* Pop SIMD&FP registers:
LDP q0, q1, [sp]
...
LDP q30, q31, [sp, #(30 * 16)]
ADD sp, sp, #(32 * 16)
*/
for (i = 0; i <= 30; i += 2)
p += emit_ldp_q_offset (p, i, i + 1, sp, i * 16);
p += emit_add (p, sp, sp, immediate_operand (32 * 16));
/* Write the code into the inferior memory. */
append_insns (&buildaddr, p - buf, buf);
/* Now emit the relocated instruction. */
*adjusted_insn_addr = buildaddr;
target_read_uint32 (tpaddr, &insn);
insn_data.base.insn_addr = tpaddr;
insn_data.new_addr = buildaddr;
insn_data.insn_ptr = buf;
aarch64_relocate_instruction (insn, &visitor,
(struct aarch64_insn_data *) &insn_data);
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* We may not have been able to relocate the instruction. */
if (insn_data.insn_ptr == buf)
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
{
sprintf (err,
"E.Could not relocate instruction from %s to %s.",
core_addr_to_string_nz (tpaddr),
core_addr_to_string_nz (buildaddr));
return 1;
}
else
append_insns (&buildaddr, insn_data.insn_ptr - buf, buf);
*adjusted_insn_addr_end = buildaddr;
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Go back to the start of the buffer. */
p = buf;
/* Emit a branch back from the jump pad. */
offset = (tpaddr + orig_size - buildaddr);
if (!can_encode_int32 (offset, 28))
{
sprintf (err,
"E.Jump back from jump pad too far from tracepoint "
"(offset 0x%" PRIx64 " cannot be encoded in 28 bits).",
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
offset);
return 1;
}
p += emit_b (p, 0, offset);
append_insns (&buildaddr, p - buf, buf);
/* Give the caller a branch instruction into the jump pad. */
offset = (*jump_entry - tpaddr);
if (!can_encode_int32 (offset, 28))
{
sprintf (err,
"E.Jump pad too far from tracepoint "
"(offset 0x%" PRIx64 " cannot be encoded in 28 bits).",
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
offset);
return 1;
}
emit_b ((uint32_t *) jjump_pad_insn, 0, offset);
*jjump_pad_insn_size = 4;
/* Return the end address of our pad. */
*jump_entry = buildaddr;
return 0;
}
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
/* Helper function writing LEN instructions from START into
current_insn_ptr. */
static void
emit_ops_insns (const uint32_t *start, int len)
{
CORE_ADDR buildaddr = current_insn_ptr;
if (debug_threads)
debug_printf ("Adding %d instrucions at %s\n",
len, paddress (buildaddr));
append_insns (&buildaddr, len, start);
current_insn_ptr = buildaddr;
}
/* Pop a register from the stack. */
static int
emit_pop (uint32_t *buf, struct aarch64_register rt)
{
return emit_ldr (buf, rt, sp, postindex_memory_operand (1 * 16));
}
/* Push a register on the stack. */
static int
emit_push (uint32_t *buf, struct aarch64_register rt)
{
return emit_str (buf, rt, sp, preindex_memory_operand (-1 * 16));
}
/* Implementation of emit_ops method "emit_prologue". */
static void
aarch64_emit_prologue (void)
{
uint32_t buf[16];
uint32_t *p = buf;
/* This function emit a prologue for the following function prototype:
enum eval_result_type f (unsigned char *regs,
ULONGEST *value);
The first argument is a buffer of raw registers. The second
argument is the result of
evaluating the expression, which will be set to whatever is on top of
the stack at the end.
The stack set up by the prologue is as such:
High *------------------------------------------------------*
| LR |
| FP | <- FP
| x1 (ULONGEST *value) |
| x0 (unsigned char *regs) |
Low *------------------------------------------------------*
As we are implementing a stack machine, each opcode can expand the
stack so we never know how far we are from the data saved by this
prologue. In order to be able refer to value and regs later, we save
the current stack pointer in the frame pointer. This way, it is not
clobbered when calling C functions.
[gdb] Fix more typos in comments (2) Fix typos in comments. NFC. Tested on x86_64-linux. gdb/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * aarch64-linux-tdep.c: Fix typos in comments. * aarch64-tdep.c: Same. * ada-lang.c: Same. * amd64-nat.c: Same. * arc-tdep.c: Same. * arch/aarch64-insn.c: Same. * block.c: Same. * breakpoint.h: Same. * btrace.h: Same. * c-varobj.c: Same. * cli/cli-decode.c: Same. * cli/cli-script.c: Same. * cli/cli-utils.h: Same. * coff-pe-read.c: Same. * coffread.c: Same. * compile/compile-cplus-symbols.c: Same. * compile/compile-object-run.c: Same. * completer.c: Same. * corelow.c: Same. * cp-support.c: Same. * demangle.c: Same. * dwarf-index-write.c: Same. * dwarf2-frame.c: Same. * dwarf2-frame.h: Same. * eval.c: Same. * frame-base.h: Same. * frame.h: Same. * gdbcmd.h: Same. * gdbtypes.h: Same. * gnu-nat.c: Same. * guile/scm-objfile.c: Same. * i386-tdep.c: Same. * i386-tdep.h: Same. * infcall.c: Same. * infcall.h: Same. * linux-nat.c: Same. * m68k-tdep.c: Same. * macroexp.c: Same. * memattr.c: Same. * mi/mi-cmd-disas.c: Same. * mi/mi-getopt.h: Same. * mi/mi-main.c: Same. * minsyms.c: Same. * nat/aarch64-sve-linux-sigcontext.h: Same. * objfiles.h: Same. * ppc-linux-nat.c: Same. * ppc-linux-tdep.c: Same. * ppc-tdep.h: Same. * progspace.h: Same. * prologue-value.h: Same. * python/py-evtregistry.c: Same. * python/py-instruction.h: Same. * record-btrace.c: Same. * record-full.c: Same. * remote.c: Same. * rs6000-tdep.c: Same. * ser-tcp.c: Same. * sol-thread.c: Same. * sparc-sol2-tdep.c: Same. * sparc64-tdep.c: Same. * stabsread.c: Same. * symfile.c: Same. * symtab.h: Same. * target.c: Same. * tracepoint.c: Same. * tui/tui-data.h: Same. * tui/tui-io.c: Same. * tui/tui-win.c: Same. * tui/tui.c: Same. * unittests/rsp-low-selftests.c: Same. * user-regs.h: Same. * utils.c: Same. * utils.h: Same. * valarith.c: Same. * valops.c: Same. * valprint.c: Same. * valprint.h: Same. * value.c: Same. * value.h: Same. * varobj.c: Same. * x86-nat.h: Same. * xtensa-tdep.c: Same. gdb/gdbserver/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * linux-aarch64-low.c: Fix typos in comments. * linux-arm-low.c: Same. * linux-low.c: Same. * linux-ppc-low.c: Same. * proc-service.c: Same. * regcache.h: Same. * server.c: Same. * tracepoint.c: Same. * win32-low.c: Same. gdb/stubs/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * ia64vms-stub.c: Fix typos in comments. * m32r-stub.c: Same. * m68k-stub.c: Same. * sh-stub.c: Same. gdb/testsuite/ChangeLog: 2019-10-26 Tom de Vries <tdevries@suse.de> * gdb.base/bigcore.c: Fix typos in comments. * gdb.base/ctf-ptype.c: Same. * gdb.base/long_long.c: Same. * gdb.dwarf2/dw2-op-out-param.S: Same. * gdb.python/py-evthreads.c: Same. * gdb.reverse/i387-stack-reverse.c: Same. * gdb.trace/tfile.c: Same. * lib/compiler.c: Same. * lib/compiler.cc: Same. Change-Id: I8573d84a577894270179ae30f46c48d806fc1beb
2019-10-26 15:55:32 +08:00
Finally, throughout every operation, we are using register x0 as the
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
top of the stack, and x1 as a scratch register. */
p += emit_stp (p, x0, x1, sp, preindex_memory_operand (-2 * 16));
p += emit_str (p, lr, sp, offset_memory_operand (3 * 8));
p += emit_str (p, fp, sp, offset_memory_operand (2 * 8));
p += emit_add (p, fp, sp, immediate_operand (2 * 8));
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_epilogue". */
static void
aarch64_emit_epilogue (void)
{
uint32_t buf[16];
uint32_t *p = buf;
/* Store the result of the expression (x0) in *value. */
p += emit_sub (p, x1, fp, immediate_operand (1 * 8));
p += emit_ldr (p, x1, x1, offset_memory_operand (0));
p += emit_str (p, x0, x1, offset_memory_operand (0));
/* Restore the previous state. */
p += emit_add (p, sp, fp, immediate_operand (2 * 8));
p += emit_ldp (p, fp, lr, fp, offset_memory_operand (0));
/* Return expr_eval_no_error. */
p += emit_mov (p, x0, immediate_operand (expr_eval_no_error));
p += emit_ret (p, lr);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_add". */
static void
aarch64_emit_add (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_add (p, x0, x1, register_operand (x0));
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_sub". */
static void
aarch64_emit_sub (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_sub (p, x0, x1, register_operand (x0));
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_mul". */
static void
aarch64_emit_mul (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_mul (p, x0, x1, x0);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_lsh". */
static void
aarch64_emit_lsh (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_lslv (p, x0, x1, x0);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_rsh_signed". */
static void
aarch64_emit_rsh_signed (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_asrv (p, x0, x1, x0);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_rsh_unsigned". */
static void
aarch64_emit_rsh_unsigned (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_lsrv (p, x0, x1, x0);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_ext". */
static void
aarch64_emit_ext (int arg)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_sbfx (p, x0, x0, 0, arg);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_log_not". */
static void
aarch64_emit_log_not (void)
{
uint32_t buf[16];
uint32_t *p = buf;
/* If the top of the stack is 0, replace it with 1. Else replace it with
0. */
p += emit_cmp (p, x0, immediate_operand (0));
p += emit_cset (p, x0, EQ);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_bit_and". */
static void
aarch64_emit_bit_and (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_and (p, x0, x0, x1);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_bit_or". */
static void
aarch64_emit_bit_or (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_orr (p, x0, x0, x1);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_bit_xor". */
static void
aarch64_emit_bit_xor (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_eor (p, x0, x0, x1);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_bit_not". */
static void
aarch64_emit_bit_not (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_mvn (p, x0, x0);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_equal". */
static void
aarch64_emit_equal (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_cmp (p, x0, register_operand (x1));
p += emit_cset (p, x0, EQ);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_less_signed". */
static void
aarch64_emit_less_signed (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_cmp (p, x1, register_operand (x0));
p += emit_cset (p, x0, LT);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_less_unsigned". */
static void
aarch64_emit_less_unsigned (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_cmp (p, x1, register_operand (x0));
p += emit_cset (p, x0, LO);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_ref". */
static void
aarch64_emit_ref (int size)
{
uint32_t buf[16];
uint32_t *p = buf;
switch (size)
{
case 1:
p += emit_ldrb (p, w0, x0, offset_memory_operand (0));
break;
case 2:
p += emit_ldrh (p, w0, x0, offset_memory_operand (0));
break;
case 4:
p += emit_ldr (p, w0, x0, offset_memory_operand (0));
break;
case 8:
p += emit_ldr (p, x0, x0, offset_memory_operand (0));
break;
default:
/* Unknown size, bail on compilation. */
emit_error = 1;
break;
}
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_if_goto". */
static void
aarch64_emit_if_goto (int *offset_p, int *size_p)
{
uint32_t buf[16];
uint32_t *p = buf;
/* The Z flag is set or cleared here. */
p += emit_cmp (p, x0, immediate_operand (0));
/* This instruction must not change the Z flag. */
p += emit_pop (p, x0);
/* Branch over the next instruction if x0 == 0. */
p += emit_bcond (p, EQ, 8);
/* The NOP instruction will be patched with an unconditional branch. */
if (offset_p)
*offset_p = (p - buf) * 4;
if (size_p)
*size_p = 4;
p += emit_nop (p);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_goto". */
static void
aarch64_emit_goto (int *offset_p, int *size_p)
{
uint32_t buf[16];
uint32_t *p = buf;
/* The NOP instruction will be patched with an unconditional branch. */
if (offset_p)
*offset_p = 0;
if (size_p)
*size_p = 4;
p += emit_nop (p);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "write_goto_address". */
static void
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
aarch64_write_goto_address (CORE_ADDR from, CORE_ADDR to, int size)
{
uint32_t insn;
emit_b (&insn, 0, to - from);
append_insns (&from, 1, &insn);
}
/* Implementation of emit_ops method "emit_const". */
static void
aarch64_emit_const (LONGEST num)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_mov_addr (p, x0, num);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_call". */
static void
aarch64_emit_call (CORE_ADDR fn)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_mov_addr (p, ip0, fn);
p += emit_blr (p, ip0);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_reg". */
static void
aarch64_emit_reg (int reg)
{
uint32_t buf[16];
uint32_t *p = buf;
/* Set x0 to unsigned char *regs. */
p += emit_sub (p, x0, fp, immediate_operand (2 * 8));
p += emit_ldr (p, x0, x0, offset_memory_operand (0));
p += emit_mov (p, x1, immediate_operand (reg));
emit_ops_insns (buf, p - buf);
aarch64_emit_call (get_raw_reg_func_addr ());
}
/* Implementation of emit_ops method "emit_pop". */
static void
aarch64_emit_pop (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x0);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_stack_flush". */
static void
aarch64_emit_stack_flush (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_push (p, x0);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_zero_ext". */
static void
aarch64_emit_zero_ext (int arg)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_ubfx (p, x0, x0, 0, arg);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_swap". */
static void
aarch64_emit_swap (void)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_ldr (p, x1, sp, offset_memory_operand (0 * 16));
p += emit_str (p, x0, sp, offset_memory_operand (0 * 16));
p += emit_mov (p, x0, register_operand (x1));
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_stack_adjust". */
static void
aarch64_emit_stack_adjust (int n)
{
/* This is not needed with our design. */
uint32_t buf[16];
uint32_t *p = buf;
p += emit_add (p, sp, sp, immediate_operand (n * 16));
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_int_call_1". */
static void
aarch64_emit_int_call_1 (CORE_ADDR fn, int arg1)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_mov (p, x0, immediate_operand (arg1));
emit_ops_insns (buf, p - buf);
aarch64_emit_call (fn);
}
/* Implementation of emit_ops method "emit_void_call_2". */
static void
aarch64_emit_void_call_2 (CORE_ADDR fn, int arg1)
{
uint32_t buf[16];
uint32_t *p = buf;
/* Push x0 on the stack. */
aarch64_emit_stack_flush ();
/* Setup arguments for the function call:
x0: arg1
x1: top of the stack
MOV x1, x0
MOV x0, #arg1 */
p += emit_mov (p, x1, register_operand (x0));
p += emit_mov (p, x0, immediate_operand (arg1));
emit_ops_insns (buf, p - buf);
aarch64_emit_call (fn);
/* Restore x0. */
aarch64_emit_pop ();
}
/* Implementation of emit_ops method "emit_eq_goto". */
static void
aarch64_emit_eq_goto (int *offset_p, int *size_p)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_cmp (p, x1, register_operand (x0));
/* Branch over the next instruction if x0 != x1. */
p += emit_bcond (p, NE, 8);
/* The NOP instruction will be patched with an unconditional branch. */
if (offset_p)
*offset_p = (p - buf) * 4;
if (size_p)
*size_p = 4;
p += emit_nop (p);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_ne_goto". */
static void
aarch64_emit_ne_goto (int *offset_p, int *size_p)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_cmp (p, x1, register_operand (x0));
/* Branch over the next instruction if x0 == x1. */
p += emit_bcond (p, EQ, 8);
/* The NOP instruction will be patched with an unconditional branch. */
if (offset_p)
*offset_p = (p - buf) * 4;
if (size_p)
*size_p = 4;
p += emit_nop (p);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_lt_goto". */
static void
aarch64_emit_lt_goto (int *offset_p, int *size_p)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_cmp (p, x1, register_operand (x0));
/* Branch over the next instruction if x0 >= x1. */
p += emit_bcond (p, GE, 8);
/* The NOP instruction will be patched with an unconditional branch. */
if (offset_p)
*offset_p = (p - buf) * 4;
if (size_p)
*size_p = 4;
p += emit_nop (p);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_le_goto". */
static void
aarch64_emit_le_goto (int *offset_p, int *size_p)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_cmp (p, x1, register_operand (x0));
/* Branch over the next instruction if x0 > x1. */
p += emit_bcond (p, GT, 8);
/* The NOP instruction will be patched with an unconditional branch. */
if (offset_p)
*offset_p = (p - buf) * 4;
if (size_p)
*size_p = 4;
p += emit_nop (p);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_gt_goto". */
static void
aarch64_emit_gt_goto (int *offset_p, int *size_p)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_cmp (p, x1, register_operand (x0));
/* Branch over the next instruction if x0 <= x1. */
p += emit_bcond (p, LE, 8);
/* The NOP instruction will be patched with an unconditional branch. */
if (offset_p)
*offset_p = (p - buf) * 4;
if (size_p)
*size_p = 4;
p += emit_nop (p);
emit_ops_insns (buf, p - buf);
}
/* Implementation of emit_ops method "emit_ge_got". */
static void
aarch64_emit_ge_got (int *offset_p, int *size_p)
{
uint32_t buf[16];
uint32_t *p = buf;
p += emit_pop (p, x1);
p += emit_cmp (p, x1, register_operand (x0));
/* Branch over the next instruction if x0 <= x1. */
p += emit_bcond (p, LT, 8);
/* The NOP instruction will be patched with an unconditional branch. */
if (offset_p)
*offset_p = (p - buf) * 4;
if (size_p)
*size_p = 4;
p += emit_nop (p);
emit_ops_insns (buf, p - buf);
}
static struct emit_ops aarch64_emit_ops_impl =
{
aarch64_emit_prologue,
aarch64_emit_epilogue,
aarch64_emit_add,
aarch64_emit_sub,
aarch64_emit_mul,
aarch64_emit_lsh,
aarch64_emit_rsh_signed,
aarch64_emit_rsh_unsigned,
aarch64_emit_ext,
aarch64_emit_log_not,
aarch64_emit_bit_and,
aarch64_emit_bit_or,
aarch64_emit_bit_xor,
aarch64_emit_bit_not,
aarch64_emit_equal,
aarch64_emit_less_signed,
aarch64_emit_less_unsigned,
aarch64_emit_ref,
aarch64_emit_if_goto,
aarch64_emit_goto,
aarch64_write_goto_address,
aarch64_emit_const,
aarch64_emit_call,
aarch64_emit_reg,
aarch64_emit_pop,
aarch64_emit_stack_flush,
aarch64_emit_zero_ext,
aarch64_emit_swap,
aarch64_emit_stack_adjust,
aarch64_emit_int_call_1,
aarch64_emit_void_call_2,
aarch64_emit_eq_goto,
aarch64_emit_ne_goto,
aarch64_emit_lt_goto,
aarch64_emit_le_goto,
aarch64_emit_gt_goto,
aarch64_emit_ge_got,
};
/* Implementation of linux_target_ops method "emit_ops". */
static struct emit_ops *
aarch64_emit_ops (void)
{
return &aarch64_emit_ops_impl;
}
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
/* Implementation of linux_target_ops method
"get_min_fast_tracepoint_insn_len". */
static int
aarch64_get_min_fast_tracepoint_insn_len (void)
{
return 4;
}
/* Implementation of linux_target_ops method "supports_range_stepping". */
static int
aarch64_supports_range_stepping (void)
{
return 1;
}
Add the target_ops needed for software breakpoints in GDBServer. This patch is in preparation for software breakpoints on ARM linux. It refactors breakpoint and breakpoint_len into breakpoint_kind_from_pc and sw_breakpoint_from kind to prepare the case where we have multiple types of breakpoints. Kind is the type of breakpoint (hardware or software) to be inserted, usually it is the lenght of the software breakpoint but can be something else depending on the target. This patch introduces the linux_target_ops breakpoint_kind_from_pc and sw_breakpoint_from_kind. breakpoint_kind_from_pc returns the breakpoint kind and adjusts the PC to the real memory location in case a flag was present in the PC. E.g the instruction mode on ARM. sw_breakpoint_from_kind returns the software breakpoint for this kind as a string of bytes, the length of the breakpoint is adjusted for the breakpoint's size in memory. For targets that have only one kind of breakpoint, the default value 0 is returned by linux_breakpoint_kind_from_pc so that not all targets need to implement the breakpoint_kind_from_pc operation. No regressions, tested on Ubuntu 14.04 on ARMv7 and x86 With gdbserver-{native,extended} / { -marm -mthumb } Also since the target_ops have been changed compilation was tested on affected archs namely : aarch64, arm, bfin, cris, crisv32, m32r, m68k, mips, nios2, ppc, s390, sparc, tic6x, tile, x86, steins. Not tested : sh gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-arm-low.c (arm_breakpoint_kind_from_pc): New function. (arm_sw_breakpoint_from_kind): New function. * linux-bfin-low.c (bfin_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-cris-low.c (cris_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-crisv32-low.c (cris_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-low.c (linux_wait_1): Call breakpoint_kind_from_pc and sw_breakpoint_from_kind to increment the pc. (linux_breakpoint_kind_from_pc): New function. (linux_sw_breakpoint_from_kind): New function. (struct target_ops) <sw_breakpoint_from_kind>: Initialize field. (initialize_low): Call breakpoint_kind_from_pc and sw_breakpoint_from_kind to replace breakpoint_data/len. * linux-low.h (struct linux_target_ops) <breakpoint_kind_from_pc>: New field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Likewise. * linux-m32r-low.c (m32r_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-m68k-low.c (m68k_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-mips-low.c (mips_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-nios2-low.c (nios2_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-ppc-low.c (ppc_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-s390-low.c (s390_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-sh-low.c (sh_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-sparc-low.c (sparc_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-tic6x-low.c (tic6x_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-tile-low.c (tile_sw_breakpoint_from_kind): New function. * linux-x86-low.c (x86_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-xtensa-low.c (xtensa_sw_breakpoint_from_kind) New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field.
2015-10-21 23:17:26 +08:00
/* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
static const gdb_byte *
aarch64_sw_breakpoint_from_kind (int kind, int *size)
{
Support Z0 packet in AArch64 multi-arch debugging In commit 6085d6f6, Z0 packet is disabled in aarch64 GDBserver if the inferior is 32-bit or there may be multiple inferiors, because Z0 packet isn't supported for arm then. Recently, Z0 packet is supported in arm target, so we don't have such limitation in aarch64 GDBserver, that is to say, aarch64 GDBserver can use Z0 packet in multi-arch/multi-inferior debugging when the inferior's arch is arm. Part of this patch is to revert 6085d6f6, and the rest of the patch is to move some breakpoint related arm_* functions into linux-aarch32-low.c in order to share them between arm and aarch64. This patch is regression tested on aarch64-linux for debugging both aarch64 programs and arm programs respectively. gdb/gdbserver: 2015-12-07 Yao Qi <yao.qi@linaro.org> * configure.srv: Append arm.o to srv_tgtobj for aarch64*-*-linux* target. * linux-aarch32-low.c (arm_abi_breakpoint): New macro. Moved from linux-arm-low.c. (arm_eabi_breakpoint, arm_breakpoint): Likewise. (arm_breakpoint_len, thumb_breakpoint): Likewise. (thumb_breakpoint_len, thumb2_breakpoint): Likewise. (thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode, arm_breakpoint_at): Likewise. (arm_breakpoint_kinds): Likewise. (arm_breakpoint_kind_from_pc): Likewise. (arm_sw_breakpoint_from_kind): Likewise. (arm_breakpoint_kind_from_current_state): Likewise. * linux-aarch32-low.h (arm_breakpoint_kind_from_pc): Declare. (arm_sw_breakpoint_from_kind): Declare. (arm_breakpoint_kind_from_current_state): Declare. (arm_breakpoint_at): Declare. * linux-aarch64-low.c (aarch64_sw_breakpoint_from_kind): Call arm_sw_breakpoint_from_kind if process is 32-bit. (aarch64_breakpoint_kind_from_pc): New function. (aarch64_breakpoint_kind_from_current_state): New function. (the_low_target): Initialize fields breakpoint_kind_from_pc and breakpoint_kind_from_current_state. * linux-arm-low.c (arm_breakpoint_kinds): Move to linux-aarch32-low.c. (arm_abi_breakpoint, arm_eabi_breakpoint): Likewise. (arm_breakpoint, arm_breakpoint_len): Likewise. (thumb_breakpoint, thumb_breakpoint_len): Likewise. (thumb2_breakpoint, thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode): Likewise. (arm_breakpoint_at): Likewise. (arm_breakpoint_kind_from_pc): Likewise. (arm_sw_breakpoint_from_kind): Likewise. (arm_breakpoint_kind_from_current_state): Likewise. Revert: 2015-08-04 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (aarch64_supports_z_point_type): Return 0 for Z_PACKET_SW_BP if it may be used in multi-arch debugging. * server.c (extended_protocol): Remove "static". * server.h (extended_protocol): Declare it.
2015-12-07 23:56:31 +08:00
if (is_64bit_tdesc ())
{
*size = aarch64_breakpoint_len;
return aarch64_breakpoint;
}
else
return arm_sw_breakpoint_from_kind (kind, size);
}
/* Implementation of linux_target_ops method "breakpoint_kind_from_pc". */
static int
aarch64_breakpoint_kind_from_pc (CORE_ADDR *pcptr)
{
if (is_64bit_tdesc ())
return aarch64_breakpoint_len;
else
return arm_breakpoint_kind_from_pc (pcptr);
}
/* Implementation of the linux_target_ops method
"breakpoint_kind_from_current_state". */
static int
aarch64_breakpoint_kind_from_current_state (CORE_ADDR *pcptr)
{
if (is_64bit_tdesc ())
return aarch64_breakpoint_len;
else
return arm_breakpoint_kind_from_current_state (pcptr);
Add the target_ops needed for software breakpoints in GDBServer. This patch is in preparation for software breakpoints on ARM linux. It refactors breakpoint and breakpoint_len into breakpoint_kind_from_pc and sw_breakpoint_from kind to prepare the case where we have multiple types of breakpoints. Kind is the type of breakpoint (hardware or software) to be inserted, usually it is the lenght of the software breakpoint but can be something else depending on the target. This patch introduces the linux_target_ops breakpoint_kind_from_pc and sw_breakpoint_from_kind. breakpoint_kind_from_pc returns the breakpoint kind and adjusts the PC to the real memory location in case a flag was present in the PC. E.g the instruction mode on ARM. sw_breakpoint_from_kind returns the software breakpoint for this kind as a string of bytes, the length of the breakpoint is adjusted for the breakpoint's size in memory. For targets that have only one kind of breakpoint, the default value 0 is returned by linux_breakpoint_kind_from_pc so that not all targets need to implement the breakpoint_kind_from_pc operation. No regressions, tested on Ubuntu 14.04 on ARMv7 and x86 With gdbserver-{native,extended} / { -marm -mthumb } Also since the target_ops have been changed compilation was tested on affected archs namely : aarch64, arm, bfin, cris, crisv32, m32r, m68k, mips, nios2, ppc, s390, sparc, tic6x, tile, x86, steins. Not tested : sh gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-arm-low.c (arm_breakpoint_kind_from_pc): New function. (arm_sw_breakpoint_from_kind): New function. * linux-bfin-low.c (bfin_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-cris-low.c (cris_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-crisv32-low.c (cris_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-low.c (linux_wait_1): Call breakpoint_kind_from_pc and sw_breakpoint_from_kind to increment the pc. (linux_breakpoint_kind_from_pc): New function. (linux_sw_breakpoint_from_kind): New function. (struct target_ops) <sw_breakpoint_from_kind>: Initialize field. (initialize_low): Call breakpoint_kind_from_pc and sw_breakpoint_from_kind to replace breakpoint_data/len. * linux-low.h (struct linux_target_ops) <breakpoint_kind_from_pc>: New field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Likewise. * linux-m32r-low.c (m32r_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-m68k-low.c (m68k_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-mips-low.c (mips_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-nios2-low.c (nios2_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-ppc-low.c (ppc_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-s390-low.c (s390_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-sh-low.c (sh_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-sparc-low.c (sparc_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-tic6x-low.c (tic6x_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-tile-low.c (tile_sw_breakpoint_from_kind): New function. * linux-x86-low.c (x86_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-xtensa-low.c (xtensa_sw_breakpoint_from_kind) New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field.
2015-10-21 23:17:26 +08:00
}
Refactor queries for hardware and software single stepping support in GDBServer. Before this patch there was only one call: can_hardware_single_step. Its implementation was a check on breakpoint_reinsert_addr if NULL it assumed that the target could hardware single step. This patch prepares for the case where this is not true anymore. In order to improve software single stepping in GDBServer the breakpoint_reinsert_addr operation of targets that had a very simple software implementation used only for stepping over thread creation events will be removed. This will create a case where a target does not support hardware single step and has the operation breakpoint_reinsert_addr set to NULL, thus can_hardware_single_step needs to be implemented another way. A new target operation supports_hardware_single_step is introduced and is to return true if the target does support such a feature, support for the feature is manually hardcoded. Note that the hardware single step support was enabled as per the current behavior, I did not check if tile for example really has ptrace singlestep support but since the current implementation assumed it had, I kept it that way. No regressions on Ubuntu 14.04 on ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } Compilation tested on: aarch64,arm,bfind,crisv32,m32r,ppc,s390,tic6x,tile, xtensa. Not tested : sh. gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-arm-low.c (arm_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-bfin-low.c (bfin_supports_hardware_single_step): New function. (struct linux_target_ops) <bfin_supports_hardware_single_step>: Initialize. * linux-crisv32-low.c (cris_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-low.c (can_hardware_single_step): Use supports_hardware_single_step. (can_software_single_step): New function. (start_step_over): Call can_software_single_step. (linux_supports_hardware_single_step): New function. (struct target_ops) <supports_software_single_step>: Initialize. * linux-low.h (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-m32r-low.c (m32r_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-ppc-low.c (ppc_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step> Initialize. * linux-s390-low.c (s390_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-sh-low.c (sh_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-tic6x-low.c (tic6x_supports_hardware_single_step): New function. (struct linux_target_ops) <tic6x_supports_hardware_single_step>: Initialize. * linux-tile-low.c (tile_supports_hardware_single_step): New function. (struct linux_target_ops) <tile_supports_hardware_single_step>: Initialize. * linux-x86-low.c (x86_supports_hardware_single_step) New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-xtensa-low.c (xtensa_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * target.h (struct target_ops): <supports_software_single_step>: New field. (target_supports_software_single_step): New macro.
2015-11-20 00:29:10 +08:00
/* Support for hardware single step. */
static int
aarch64_supports_hardware_single_step (void)
{
return 1;
}
struct linux_target_ops the_low_target =
{
aarch64_arch_setup,
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
aarch64_regs_info,
NULL, /* cannot_fetch_register */
NULL, /* cannot_store_register */
NULL, /* fetch_register */
aarch64_get_pc,
aarch64_set_pc,
Support Z0 packet in AArch64 multi-arch debugging In commit 6085d6f6, Z0 packet is disabled in aarch64 GDBserver if the inferior is 32-bit or there may be multiple inferiors, because Z0 packet isn't supported for arm then. Recently, Z0 packet is supported in arm target, so we don't have such limitation in aarch64 GDBserver, that is to say, aarch64 GDBserver can use Z0 packet in multi-arch/multi-inferior debugging when the inferior's arch is arm. Part of this patch is to revert 6085d6f6, and the rest of the patch is to move some breakpoint related arm_* functions into linux-aarch32-low.c in order to share them between arm and aarch64. This patch is regression tested on aarch64-linux for debugging both aarch64 programs and arm programs respectively. gdb/gdbserver: 2015-12-07 Yao Qi <yao.qi@linaro.org> * configure.srv: Append arm.o to srv_tgtobj for aarch64*-*-linux* target. * linux-aarch32-low.c (arm_abi_breakpoint): New macro. Moved from linux-arm-low.c. (arm_eabi_breakpoint, arm_breakpoint): Likewise. (arm_breakpoint_len, thumb_breakpoint): Likewise. (thumb_breakpoint_len, thumb2_breakpoint): Likewise. (thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode, arm_breakpoint_at): Likewise. (arm_breakpoint_kinds): Likewise. (arm_breakpoint_kind_from_pc): Likewise. (arm_sw_breakpoint_from_kind): Likewise. (arm_breakpoint_kind_from_current_state): Likewise. * linux-aarch32-low.h (arm_breakpoint_kind_from_pc): Declare. (arm_sw_breakpoint_from_kind): Declare. (arm_breakpoint_kind_from_current_state): Declare. (arm_breakpoint_at): Declare. * linux-aarch64-low.c (aarch64_sw_breakpoint_from_kind): Call arm_sw_breakpoint_from_kind if process is 32-bit. (aarch64_breakpoint_kind_from_pc): New function. (aarch64_breakpoint_kind_from_current_state): New function. (the_low_target): Initialize fields breakpoint_kind_from_pc and breakpoint_kind_from_current_state. * linux-arm-low.c (arm_breakpoint_kinds): Move to linux-aarch32-low.c. (arm_abi_breakpoint, arm_eabi_breakpoint): Likewise. (arm_breakpoint, arm_breakpoint_len): Likewise. (thumb_breakpoint, thumb_breakpoint_len): Likewise. (thumb2_breakpoint, thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode): Likewise. (arm_breakpoint_at): Likewise. (arm_breakpoint_kind_from_pc): Likewise. (arm_sw_breakpoint_from_kind): Likewise. (arm_breakpoint_kind_from_current_state): Likewise. Revert: 2015-08-04 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (aarch64_supports_z_point_type): Return 0 for Z_PACKET_SW_BP if it may be used in multi-arch debugging. * server.c (extended_protocol): Remove "static". * server.h (extended_protocol): Declare it.
2015-12-07 23:56:31 +08:00
aarch64_breakpoint_kind_from_pc,
Add the target_ops needed for software breakpoints in GDBServer. This patch is in preparation for software breakpoints on ARM linux. It refactors breakpoint and breakpoint_len into breakpoint_kind_from_pc and sw_breakpoint_from kind to prepare the case where we have multiple types of breakpoints. Kind is the type of breakpoint (hardware or software) to be inserted, usually it is the lenght of the software breakpoint but can be something else depending on the target. This patch introduces the linux_target_ops breakpoint_kind_from_pc and sw_breakpoint_from_kind. breakpoint_kind_from_pc returns the breakpoint kind and adjusts the PC to the real memory location in case a flag was present in the PC. E.g the instruction mode on ARM. sw_breakpoint_from_kind returns the software breakpoint for this kind as a string of bytes, the length of the breakpoint is adjusted for the breakpoint's size in memory. For targets that have only one kind of breakpoint, the default value 0 is returned by linux_breakpoint_kind_from_pc so that not all targets need to implement the breakpoint_kind_from_pc operation. No regressions, tested on Ubuntu 14.04 on ARMv7 and x86 With gdbserver-{native,extended} / { -marm -mthumb } Also since the target_ops have been changed compilation was tested on affected archs namely : aarch64, arm, bfin, cris, crisv32, m32r, m68k, mips, nios2, ppc, s390, sparc, tic6x, tile, x86, steins. Not tested : sh gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-arm-low.c (arm_breakpoint_kind_from_pc): New function. (arm_sw_breakpoint_from_kind): New function. * linux-bfin-low.c (bfin_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-cris-low.c (cris_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-crisv32-low.c (cris_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-low.c (linux_wait_1): Call breakpoint_kind_from_pc and sw_breakpoint_from_kind to increment the pc. (linux_breakpoint_kind_from_pc): New function. (linux_sw_breakpoint_from_kind): New function. (struct target_ops) <sw_breakpoint_from_kind>: Initialize field. (initialize_low): Call breakpoint_kind_from_pc and sw_breakpoint_from_kind to replace breakpoint_data/len. * linux-low.h (struct linux_target_ops) <breakpoint_kind_from_pc>: New field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Likewise. * linux-m32r-low.c (m32r_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-m68k-low.c (m68k_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-mips-low.c (mips_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-nios2-low.c (nios2_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-ppc-low.c (ppc_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-s390-low.c (s390_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-sh-low.c (sh_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-sparc-low.c (sparc_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-tic6x-low.c (tic6x_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-tile-low.c (tile_sw_breakpoint_from_kind): New function. * linux-x86-low.c (x86_sw_breakpoint_from_kind): New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field. * linux-xtensa-low.c (xtensa_sw_breakpoint_from_kind) New function. (struct linux_target_ops) <breakpoint>: Remove. (struct linux_target_ops) <breakpoint_len>: Remove. (struct linux_target_ops) <breakpoint_kind_from_pc>: Initialize field. (struct linux_target_ops) <sw_breakpoint_from_kind>: Initialize field.
2015-10-21 23:17:26 +08:00
aarch64_sw_breakpoint_from_kind,
NULL, /* get_next_pcs */
0, /* decr_pc_after_break */
aarch64_breakpoint_at,
[GDBserver] Make Zx/zx packet handling idempotent. This patch fixes hardware breakpoint regressions exposed by my fix for "PR breakpoints/7143 - Watchpoint does not trigger when first set", at https://sourceware.org/ml/gdb-patches/2014-03/msg00167.html The testsuite caught them on Linux/x86_64, at least. gdb.sum: gdb.sum: FAIL: gdb.base/hbreak2.exp: next over recursive call FAIL: gdb.base/hbreak2.exp: backtrace from factorial(5.1) FAIL: gdb.base/hbreak2.exp: continue until exit at recursive next test gdb.log: (gdb) next Program received signal SIGTRAP, Trace/breakpoint trap. factorial (value=4) at ../../../src/gdb/testsuite/gdb.base/break.c:113 113 if (value > 1) { /* set breakpoint 7 here */ (gdb) FAIL: gdb.base/hbreak2.exp: next over recursive call Actually, that patch just exposed a latent issue to "breakpoints always-inserted off" mode, not really caused it. After that patch, GDB no longer removes breakpoints at each internal event, thus making some scenarios behave like breakpoint always-inserted on. The bug is easy to trigger with always-inserted on. The issue is that since the target-side breakpoint conditions support, if the stub/server supports evaluating breakpoint conditions on the target side, then GDB is sending duplicate Zx packets to the target without removing them before, and GDBserver is not really expecting that for Z packets other than Z0/z0. E.g., with "set breakpoint always-inserted on" and "set debug remote 1": (gdb) b main Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $z0,410943,1#68...Packet received: OK And for Z1, similarly: (gdb) hbreak main Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Packet Z1 (hardware-breakpoint) is supported (gdb) hbreak main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) hbreak main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $z1,410943,1#69...Packet received: OK ^^^^^^^^^^^^ So GDB sent a bunch of Z1 packets, and then when finally removing the breakpoint, only one z1 packet was sent. On the GDBserver side (with monitor set debug-hw-points 1), in the Z1 case, we see: $ ./gdbserver :9999 ./gdbserver Process ./gdbserver created; pid = 8629 Listening on port 9999 Remote debugging from host 127.0.0.1 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=1 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=2 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=3 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=5 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 remove_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 That's one insert_watchpoint call for each Z1 packet, and then one remove_watchpoint call for the z1 packet. Notice how ref.count increased for each insert_watchpoint call, and then in the end, after GDB told GDBserver to forget about the hardware breakpoint, GDBserver ends with the the first debug register still with ref.count=4! IOW, the hardware breakpoint is left armed on the target, while on the GDB end it's gone. If the program happens to execute 0x410943 afterwards, then the CPU traps, GDBserver reports the trap to GDB, and GDB not having a breakpoint set at that address anymore, reports to the user a spurious SIGTRAP. This is exactly what is happening in the hbreak2.exp test, though in that case, it's a shared library event that triggers a breakpoint_re_set, when breakpoints are still inserted (because nowadays GDB doesn't remove breakpoints while handling internal events), and that recreates breakpoint locations, which likewise forces breakpoint reinsertion and Zx packet resends... That is a lot of bogus Zx duplication that should possibly be addressed on the GDB side. GDB resends Zx packets because the way to change the target-side condition, is to resend the breakpoint to the server with the new condition. (That's an option in the packet: e.g., "Z1,410943,1;X3,220027" for "hbreak main if 0". The packets in the examples above are shorter because the breakpoints don't have conditions attached). GDB doesn't remove the breakpoint first before reinserting it because that'd be bad for non-stop, as it'd open a window where the inferior could miss the breakpoint. The conditions actually haven't changed between the resends, but GDB isn't smart enough to realize that. (TBC, if the target doesn't support target-side conditions, then GDB doesn't trigger these resends (init_bp_location calls mark_breakpoint_location_modified, and that does nothing if condition evaluation is on the host side. The resends are caused by the 'loc->condition_changed = condition_modified.' line.) But, even if GDB was made smarter, GDBserver should really still handle the resends anyway. So target-side conditions also aren't really to blame. The documentation of the Z/z packets says: "To avoid potential problems with duplicate packets, the operations should be implemented in an idempotent way." As such, we may want to fix GDB, but we should definitely fix GDBserver. The fix is a prerequisite for target-side conditions on hardware breakpoints anyway (and while at it, on watchpoints too). GDBserver indeed already treats duplicate Z0 packets in an idempotent way. mem-break.c has the concept of high-level and low-level breakpoints, somewhat similar to GDB's split of breakpoints vs breakpoint locations, and keeps track of multiple breakpoints referencing the same address/location, for the case of an internal GDBserver breakpoint or a tracepoint being set at the same address as a GDB breakpoint. But, it only allows GDB to ever contribute one reference to a software breakpoint location. IOW, if gdbserver sees a Z0 packet for the same address where it already had a GDB breakpoint set, then GDBserver won't create another high-level GDB breakpoint. However, mem-break.c only tracks GDB Z0 breakpoints. The same logic should apply to all kinds of Zx packets. Currently, gdbserver passes down each duplicate Zx (other than Z0) request directly to the target->insert_point routine. The x86 watchpoint support itself refcounts watchpoint / hw breakpoint requests, to handle overlapping watchpoints, and save debug registers. But that code doesn't (and really shouldn't) handle the duplicate requests, assuming that for each insert there will be a corresponding remove. So the fix is to generalize mem-break.c to track all kinds of Zx breakpoints, and filter out duplicates. As mentioned, this ends up adding support for target-side conditions on hardware breakpoints and watchpoints too (though GDB itself doesn't support the latter yet). Probably the least obvious change in the patch is that it kind of turns the breakpoint insert/remove APIs inside out. Before, the target methods were only called for GDB breakpoints. The internal breakpoint set/delete methods inserted memory breakpoints directly bypassing the insert/remove target methods. That's not good when the target should use a debug API to set software breakpoints, instead of relying on GDBserver patching memory with breakpoint instructions, as is the case of NTO. Now removal/insertion of all kinds of breakpoints/watchpoints, either internal, or from GDB, always go through the target methods. The insert_point/remove_point methods no longer get passed a Z packet type, but an internal/raw breakpoint type. They're also passed a pointer to the raw breakpoint itself (note that's still opaque outside mem-break.c), so that insert_memory_breakpoint / remove_memory_breakpoint have access to the breakpoint's shadow buffer. I first tried passing down a new structure based on GDB's "struct bp_target_info" (actually with that name exactly), but then decided against it as unnecessary complication. As software/memory breakpoints work by poking at memory, when setting a GDB Z0 breakpoint (but not internal breakpoints, as those can assume the conditions are already right), we need to tell the target to prepare to access memory (which on Linux means stop threads). If that operation fails, we need to return error to GDB. Seeing an error, if this is the first breakpoint of that type that GDB tries to insert, GDB would then assume the breakpoint type is supported, but it may actually not be. So we need to check whether the type is supported at all before preparing to access memory. And to solve that, the patch adds a new target->supports_z_point_type method that is called before actually trying to insert the breakpoint. Other than that, hopefully the change is more or less obvious. New test added that exercises the hbreak2.exp regression in a more direct way, without relying on a breakpoint re-set happening before main is reached. Tested by building GDBserver for: aarch64-linux-gnu arm-linux-gnueabihf i686-pc-linux-gnu i686-w64-mingw32 m68k-linux-gnu mips-linux-gnu mips-uclinux nios2-linux-gnu powerpc-linux-gnu sh-linux-gnu tilegx-unknown-linux-gnu x86_64-redhat-linux x86_64-w64-mingw32 And also regression tested on x86_64 Fedora 20. gdb/gdbserver/ 2014-05-20 Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_insert_point) (aarch64_remove_point): No longer check whether the type is supported here. Adjust to new interface. (the_low_target): Install aarch64_supports_z_point_type as supports_z_point_type method. * linux-arm-low.c (raw_bkpt_type_to_arm_hwbp_type): New function. (arm_linux_hw_point_initialize): Take an enum raw_bkpt_type instead of a Z packet char. Adjust. (arm_supports_z_point_type): New function. (arm_insert_point, arm_remove_point): Adjust to new interface. (the_low_target): Install arm_supports_z_point_type. * linux-crisv32-low.c (cris_supports_z_point_type): New function. (cris_insert_point, cris_remove_point): Adjust to new interface. Don't check whether the type is supported here. (the_low_target): Install cris_supports_z_point_type. * linux-low.c (linux_supports_z_point_type): New function. (linux_insert_point, linux_remove_point): Adjust to new interface. * linux-low.h (struct linux_target_ops) <insert_point, remove_point>: Take an enum raw_bkpt_type instead of a char. Add raw_breakpoint pointer parameter. <supports_z_point_type>: New method. * linux-mips-low.c (mips_supports_z_point_type): New function. (mips_insert_point, mips_remove_point): Adjust to new interface. Use mips_supports_z_point_type. (the_low_target): Install mips_supports_z_point_type. * linux-ppc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-s390-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-sparc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-x86-low.c (x86_supports_z_point_type): New function. (x86_insert_point): Adjust to new insert_point interface. Use insert_memory_breakpoint. Adjust to new i386_low_insert_watchpoint interface. (x86_remove_point): Adjust to remove_point interface. Use remove_memory_breakpoint. Adjust to new i386_low_remove_watchpoint interface. (the_low_target): Install x86_supports_z_point_type. * lynx-low.c (lynx_target_ops): Install NULL as supports_z_point_type callback. * nto-low.c (nto_supports_z_point_type): New. (nto_insert_point, nto_remove_point): Adjust to new interface. (nto_target_ops): Install nto_supports_z_point_type. * mem-break.c: Adjust intro comment. (struct raw_breakpoint) <raw_type, size>: New fields. <inserted>: Update comment. <shlib_disabled>: Delete field. (enum bkpt_type) <gdb_breakpoint>: Delete value. <gdb_breakpoint_Z0, gdb_breakpoint_Z1, gdb_breakpoint_Z2, gdb_breakpoint_Z3, gdb_breakpoint_Z4>: New values. (raw_bkpt_type_to_target_hw_bp_type): New function. (find_enabled_raw_code_breakpoint_at): New function. (find_raw_breakpoint_at): New type and size parameters. Use them. (insert_memory_breakpoint): New function, based off set_raw_breakpoint_at. (remove_memory_breakpoint): New function. (set_raw_breakpoint_at): Reimplement. (set_breakpoint): New, based on set_breakpoint_at. (set_breakpoint_at): Reimplement. (delete_raw_breakpoint): Go through the_target->remove_point instead of assuming memory breakpoints. (find_gdb_breakpoint_at): Delete. (Z_packet_to_bkpt_type, Z_packet_to_raw_bkpt_type): New functions. (find_gdb_breakpoint): New function. (set_gdb_breakpoint_at): Delete. (z_type_supported): New function. (set_gdb_breakpoint_1): New function, loosely based off set_gdb_breakpoint_at. (check_gdb_bp_preconditions, set_gdb_breakpoint): New functions. (delete_gdb_breakpoint_at): Delete. (delete_gdb_breakpoint_1): New function, loosely based off delete_gdb_breakpoint_at. (delete_gdb_breakpoint): New function. (clear_gdb_breakpoint_conditions): Rename to ... (clear_breakpoint_conditions): ... this. Don't handle a NULL breakpoint. (add_condition_to_breakpoint): Make static. (add_breakpoint_condition): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_condition_true_at_breakpoint): Rename to ... (gdb_condition_true_at_breakpoint_z_type): ... this, and add z_type parameter. (gdb_condition_true_at_breakpoint): Reimplement. (add_breakpoint_commands): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_no_commands_at_breakpoint): Rename to ... (gdb_no_commands_at_breakpoint_z_type): ... this. Add z_type parameter. Return true if no breakpoint was found. Change debug output. (gdb_no_commands_at_breakpoint): Reimplement. (run_breakpoint_commands): Rename to ... (run_breakpoint_commands_z_type): ... this. Add z_type parameter, and change return type to boolean. (run_breakpoint_commands): New function. (gdb_breakpoint_here): Also check for Z1 breakpoints. (uninsert_raw_breakpoint): Don't try to reinsert a disabled breakpoint. Go through the_target->remove_point instead of assuming memory breakpoint. (uninsert_breakpoints_at, uninsert_all_breakpoints): Uninsert software and hardware breakpoints. (reinsert_raw_breakpoint): Go through the_target->insert_point instead of assuming memory breakpoint. (reinsert_breakpoints_at, reinsert_all_breakpoints): Reinsert software and hardware breakpoints. (check_breakpoints, breakpoint_here, breakpoint_inserted_here): Check both software and hardware breakpoints. (validate_inserted_breakpoint): Assert the breakpoint is a software breakpoint. Set the inserted flag to -1 instead of setting shlib_disabled. (delete_disabled_breakpoints): Adjust. (validate_breakpoints): Only validate software breakpoints. Adjust to inserted flag change. (check_mem_read, check_mem_write): Skip breakpoint types other than software breakpoints. Adjust to inserted flag change. * mem-break.h (enum raw_bkpt_type): New enum. (raw_breakpoint, struct process_info): Forward declare. (Z_packet_to_target_hw_bp_type): Delete declaration. (raw_bkpt_type_to_target_hw_bp_type, Z_packet_to_raw_bkpt_type) (set_gdb_breakpoint, delete_gdb_breakpoint) (clear_breakpoint_conditions): New declarations. (set_gdb_breakpoint_at, clear_gdb_breakpoint_conditions): Delete. (breakpoint_inserted_here): Update comment. (add_breakpoint_condition, add_breakpoint_commands): Replace address parameter with a breakpoint pointer parameter. (gdb_breakpoint_here): Update comment. (delete_gdb_breakpoint_at): Delete. (insert_memory_breakpoint, remove_memory_breakpoint): Declare. * server.c (process_point_options): Take a struct breakpoint pointer instead of an address. Adjust. (process_serial_event) <Z/z packets>: Use set_gdb_breakpoint and delete_gdb_breakpoint. * spu-low.c (spu_target_ops): Install NULL as supports_z_point_type method. * target.h: Include mem-break.h. (struct target_ops) <prepare_to_access_memory>: Update comment. <supports_z_point_type>: New field. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. * win32-arm-low.c (the_low_target): Install NULL as supports_z_point_type. * win32-i386-low.c (i386_supports_z_point_type): New function. (i386_insert_point, i386_remove_point): Adjust to new interface. (the_low_target): Install i386_supports_z_point_type. * win32-low.c (win32_supports_z_point_type): New function. (win32_insert_point, win32_remove_point): Adjust to new interface. (win32_target_ops): Install win32_supports_z_point_type. * win32-low.h (struct win32_target_ops): <supports_z_point_type>: New method. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. gdb/testsuite/ 2014-05-20 Pedro Alves <palves@redhat.com> * gdb.base/break-idempotent.c: New file. * gdb.base/break-idempotent.exp: New file.
2014-05-21 01:24:28 +08:00
aarch64_supports_z_point_type,
aarch64_insert_point,
aarch64_remove_point,
aarch64_stopped_by_watchpoint,
aarch64_stopped_data_address,
NULL, /* collect_ptrace_register */
NULL, /* supply_ptrace_register */
aarch64_linux_siginfo_fixup,
aarch64_linux_new_process,
aarch64_linux_delete_process,
aarch64_linux_new_thread,
lwp_info: Make the arch code free arch_lwp_info I have the goal of "poisoning" the XNEW/xfree-family of functions, so that we catch their usages with non-POD types. A few things need to be fixed in the mean time, this is one. The common lwp code in linux-nat.c and gdbserver/linux-low.c xfrees the private lwp data of type arch_lwp_info. However, that type is opaque from its point of view, as its defined differently in each arch-specific implementation. This trips on the std::is_pod<T> check, since the compiler can't tell whether the type is POD or not if it doesn't know about it. My initial patch [1] made a class hierarchy with a virtual destructor. However, as Pedro pointed out, we only have one native architecture at the time built in gdb and gdbserver, so that's overkill. Instead, we can move the responsibility of free'ing arch_lwp_info to the arch code (which is also the one that allocated it in the first place). This is what this patch does. Also, I had the concern that if we wanted to use C++ features in these structures, we would have a problem with the one-definition rule. However, since a build will only have one version of arch_lwp_info, that's not a problem. There are changes in arch-specific files, I was only able to built-test this patch with the following cross-compilers: aarch64-linux-gnu alpha-linux-gnu arm-linux-gnueabihf hppa-linux-gnu m68k-linux-gnu mips64el-linux-gnuabi64 powerpc64-linux-gnu s390x-linux-gnu sh4-linux-gnu sparc64-linux-gnu x86_64-linux-gnu x86_64-w64-mingw32 A buildbot run didn't find any regression. [1] https://sourceware.org/ml/gdb-patches/2017-08/msg00255.html gdb/ChangeLog: * linux-nat.h (linux_nat_set_delete_thread): New declaration. * linux-nat.c (linux_nat_delete_thread): New variable. (lwp_free): Invoke linux_nat_delete_thread if set. (linux_nat_set_delete_thread): New function. * aarch64-linux-nat.c (_initialize_aarch64_linux_nat): Assign thread delete callback. * arm-linux-nat.c (arm_linux_delete_thread): New function. (_initialize_arm_linux_nat): Assign thread delete callback. * s390-linux-nat.c (s390_delete_thread): New function. (_initialize_s390_nat): Assign thread delete callback. * x86-linux-nat.c (x86_linux_add_target): Likewise. * nat/aarch64-linux.c (aarch64_linux_delete_thread): New function. * nat/aarch64-linux.h (aarch64_linux_delete_thread): New declaration. * nat/x86-linux.c (x86_linux_delete_thread): New function. * nat/x86-linux.h (x86_linux_delete_thread): New declaration. gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (the_low_target): Add thread delete callback. * linux-arm-low.c (arm_delete_thread): New function. (the_low_target): Add thread delete callback. * linux-bfin-low.c (the_low_target): Likewise. * linux-crisv32-low.c (the_low_target): Likewise. * linux-low.c (delete_lwp): Invoke delete_thread callback if set. * linux-low.h (struct linux_target_ops) <delete_thread>: New field. * linux-m32r-low.c (the_low_target): Add thread delete callback. * linux-mips-low.c (mips_linux_delete_thread): New function. (the_low_target): Add thread delete callback. * linux-ppc-low.c (the_low_target): Likewise. * linux-s390-low.c (the_low_target): Likewise. * linux-sh-low.c (the_low_target): Likewise. * linux-tic6x-low.c (the_low_target): Likewise. * linux-tile-low.c (the_low_target): Likewise. * linux-x86-low.c (the_low_target): Likewise. * linux-xtensa-low.c (the_low_target): Likewise.
2017-10-13 04:48:22 +08:00
aarch64_linux_delete_thread,
Arch-specific remote follow fork This patch implements the architecture-specific pieces of follow-fork for remote and extended-remote Linux targets, which in the current implementation copyies the parent's debug register state into the new child's data structures. This is required for x86, arm, aarch64, and mips. This follows the native implementation as closely as possible by implementing a new linux_target_ops function 'new_fork', which is analogous to 'linux_nat_new_fork' in linux-nat.c. In gdbserver, the debug registers are stored in the process list, instead of an architecture-specific list, so the function arguments are process_info pointers instead of an lwp_info and a pid as in the native implementation. In the MIPS implementation the debug register mirror is stored differently from x86, ARM, and aarch64, so instead of doing a simple structure assignment I had to clone the list of watchpoint structures. Tested using gdb.threads/watchpoint-fork.exp on x86, and ran manual tests on a MIPS board and an ARM board. Aarch64 hasn't been tested. gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_linux_new_fork): New function. (the_low_target) <new_fork>: Initialize new member. * linux-arm-low.c (arm_new_fork): New function. (the_low_target) <new_fork>: Initialize new member. * linux-low.c (handle_extended_wait): Call new target function new_fork. * linux-low.h (struct linux_target_ops) <new_fork>: New member. * linux-mips-low.c (mips_add_watchpoint): New function extracted from mips_insert_point. (the_low_target) <new_fork>: Initialize new member. (mips_linux_new_fork): New function. (mips_insert_point): Call mips_add_watchpoint. * linux-x86-low.c (x86_linux_new_fork): New function. (the_low_target) <new_fork>: Initialize new member.
2015-05-13 00:52:44 +08:00
aarch64_linux_new_fork,
aarch64_linux_prepare_to_resume,
NULL, /* process_qsupported */
aarch64_supports_tracepoints,
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
aarch64_get_thread_area,
aarch64_install_fast_tracepoint_jump_pad,
Implement target_emit_ops This patch implements compiling agent expressions to native code for AArch64. This allows us to compile conditions set on fast tracepoints. The compiled function has the following prologue: High *------------------------------------------------------* | LR | | FP | <- FP | x1 (ULONGEST *value) | | x0 (unsigned char *regs) | Low *------------------------------------------------------* We save the function's argument on the stack as well as the return address and the frame pointer. We then set the current frame pointer to point to the previous one. The generated code for the expression will freely update the stack pointer so we use the frame pointer to refer to `*value' and `*regs'. `*value' needs to be accessed in the epilogue of the function, in order to set it to whatever is on top of the stack. `*regs' needs to be passed down to the `gdb_agent_get_raw_reg' function with the `reg' operation. gdb/gdbserver/ChangeLog: * linux-aarch64-low-.c: Include ax.h and tracepoint.h. (enum aarch64_opcodes) <RET>, <SUBS>, <AND>, <ORR>, <ORN>, <EOR>, <LSLV>, <LSRV>, <ASRV>, <SBFM>, <UBFM>, <CSINC>, <MUL>, <NOP>: New. (enum aarch64_condition_codes): New enum. (w0): New static global. (fp): Likewise. (lr): Likewise. (struct aarch64_memory_operand) <type>: New MEMORY_OPERAND_POSTINDEX type. (postindex_memory_operand): New helper function. (emit_ret): New function. (emit_load_store_pair): New function, factored out of emit_stp with support for MEMORY_OPERAND_POSTINDEX. (emit_stp): Rewrite using emit_load_store_pair. (emit_ldp): New function. (emit_load_store): Likewise. (emit_ldr): Mention post-index instruction in comment. (emit_ldrh): New function. (emit_ldrb): New function. (emit_ldrsw): Mention post-index instruction in comment. (emit_str): Likewise. (emit_subs): New function. (emit_cmp): Likewise. (emit_and): Likewise. (emit_orr): Likewise. (emit_orn): Likewise. (emit_eor): Likewise. (emit_mvn): Likewise. (emit_lslv): Likewise. (emit_lsrv): Likewise. (emit_asrv): Likewise. (emit_mul): Likewise. (emit_sbfm): Likewise. (emit_sbfx): Likewise. (emit_ubfm): Likewise. (emit_ubfx): Likewise. (emit_csinc): Likewise. (emit_cset): Likewise. (emit_nop): Likewise. (emit_ops_insns): New helper function. (emit_pop): Likewise. (emit_push): Likewise. (aarch64_emit_prologue): New function. (aarch64_emit_epilogue): Likewise. (aarch64_emit_add): Likewise. (aarch64_emit_sub): Likewise. (aarch64_emit_mul): Likewise. (aarch64_emit_lsh): Likewise. (aarch64_emit_rsh_signed): Likewise. (aarch64_emit_rsh_unsigned): Likewise. (aarch64_emit_ext): Likewise. (aarch64_emit_log_not): Likewise. (aarch64_emit_bit_and): Likewise. (aarch64_emit_bit_or): Likewise. (aarch64_emit_bit_xor): Likewise. (aarch64_emit_bit_not): Likewise. (aarch64_emit_equal): Likewise. (aarch64_emit_less_signed): Likewise. (aarch64_emit_less_unsigned): Likewise. (aarch64_emit_ref): Likewise. (aarch64_emit_if_goto): Likewise. (aarch64_emit_goto): Likewise. (aarch64_write_goto_address): Likewise. (aarch64_emit_const): Likewise. (aarch64_emit_call): Likewise. (aarch64_emit_reg): Likewise. (aarch64_emit_pop): Likewise. (aarch64_emit_stack_flush): Likewise. (aarch64_emit_zero_ext): Likewise. (aarch64_emit_swap): Likewise. (aarch64_emit_stack_adjust): Likewise. (aarch64_emit_int_call_1): Likewise. (aarch64_emit_void_call_2): Likewise. (aarch64_emit_eq_goto): Likewise. (aarch64_emit_ne_goto): Likewise. (aarch64_emit_lt_goto): Likewise. (aarch64_emit_le_goto): Likewise. (aarch64_emit_gt_goto): Likewise. (aarch64_emit_ge_got): Likewise. (aarch64_emit_ops_impl): New static global variable. (aarch64_emit_ops): New target function, return &aarch64_emit_ops_impl. (struct linux_target_ops): Install it.
2015-09-21 22:01:04 +08:00
aarch64_emit_ops,
Add support for fast tracepoints This patch adds support for fast tracepoints for aarch64-linux. With this implementation, a tracepoint can only be placed in a +/- 128MB range of the jump pad. This is due to the unconditional branch instruction being limited to a (26 bit << 2) offset from the current PC. Three target operations are implemented: - target_install_fast_tracepoint_jump_pad Building the jump pad the biggest change of this patch. We need to add functions to emit all instructions needed to save and restore the current state when the tracepoint is hit. As well as implementing a lock and creating a collecting_t object identifying the current thread. Steps performed by the jump pad: * Save the current state on the stack. * Push a collecting_t object on the stack. We read the special tpidr_el0 system register to get the thread ID. * Spin-lock on the shared memory location of all tracing threads. We write the address of our collecting_t object there once we have the lock. * Call gdb_collect. * Release the lock. * Restore the state. * Execute the replaced instruction which will have been relocated. * Jump back to the program. - target_get_thread_area As implemented in ps_get_thread_area, target_get_thread_area uses ptrace to fetch the NT_ARM_TLS register. At the architecture level, NT_ARM_TLS represents the tpidr_el0 system register. So this ptrace call (if lwpid is the current thread): ~~~ ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec); ~~~ Is equivalent to the following instruction: ~~~ msr x0, tpidr_el0 ~~~ This instruction is used when creating the collecting_t object that GDBserver can read to know if a given thread is currently tracing. So target_get_thread_area must get the same thread IDs as what the jump pad writes into its collecting_t object. - target_get_min_fast_tracepoint_insn_len This just returns 4. gdb/gdbserver/ChangeLog: * Makefile.in (linux-aarch64-ipa.o, aarch64-ipa.o): New rules. * configure.srv (aarch64*-*-linux*): Add linux-aarch64-ipa.o and aarch64-ipa.o. * linux-aarch64-ipa.c: New file. * linux-aarch64-low.c: Include arch/aarch64-insn.h, inttypes.h and endian.h. (aarch64_get_thread_area): New target method. (extract_signed_bitfield): New helper function. (aarch64_decode_ldr_literal): New function. (enum aarch64_opcodes): New enum. (struct aarch64_register): New struct. (struct aarch64_operand): New struct. (x0): New static global. (x1): Likewise. (x2): Likewise. (x3): Likewise. (x4): Likewise. (w2): Likewise. (ip0): Likewise. (sp): Likewise. (xzr): Likewise. (aarch64_register): New helper function. (register_operand): Likewise. (immediate_operand): Likewise. (struct aarch64_memory_operand): New struct. (offset_memory_operand): New helper function. (preindex_memory_operand): Likewise. (enum aarch64_system_control_registers): New enum. (ENCODE): New macro. (emit_insn): New helper function. (emit_b): New function. (emit_bcond): Likewise. (emit_cb): Likewise. (emit_tb): Likewise. (emit_blr): Likewise. (emit_stp): Likewise. (emit_ldp_q_offset): Likewise. (emit_stp_q_offset): Likewise. (emit_load_store): Likewise. (emit_ldr): Likewise. (emit_ldrsw): Likewise. (emit_str): Likewise. (emit_ldaxr): Likewise. (emit_stxr): Likewise. (emit_stlr): Likewise. (emit_data_processing_reg): Likewise. (emit_data_processing): Likewise. (emit_add): Likewise. (emit_sub): Likewise. (emit_mov): Likewise. (emit_movk): Likewise. (emit_mov_addr): Likewise. (emit_mrs): Likewise. (emit_msr): Likewise. (emit_sevl): Likewise. (emit_wfe): Likewise. (append_insns): Likewise. (can_encode_int32_in): New helper function. (aarch64_relocate_instruction): New function. (aarch64_install_fast_tracepoint_jump_pad): Likewise. (aarch64_get_min_fast_tracepoint_insn_len): Likewise. (struct linux_target_ops): Install aarch64_get_thread_area, aarch64_install_fast_tracepoint_jump_pad and aarch64_get_min_fast_tracepoint_insn_len.
2015-09-21 22:01:04 +08:00
aarch64_get_min_fast_tracepoint_insn_len,
aarch64_supports_range_stepping,
Support Z0 packet in AArch64 multi-arch debugging In commit 6085d6f6, Z0 packet is disabled in aarch64 GDBserver if the inferior is 32-bit or there may be multiple inferiors, because Z0 packet isn't supported for arm then. Recently, Z0 packet is supported in arm target, so we don't have such limitation in aarch64 GDBserver, that is to say, aarch64 GDBserver can use Z0 packet in multi-arch/multi-inferior debugging when the inferior's arch is arm. Part of this patch is to revert 6085d6f6, and the rest of the patch is to move some breakpoint related arm_* functions into linux-aarch32-low.c in order to share them between arm and aarch64. This patch is regression tested on aarch64-linux for debugging both aarch64 programs and arm programs respectively. gdb/gdbserver: 2015-12-07 Yao Qi <yao.qi@linaro.org> * configure.srv: Append arm.o to srv_tgtobj for aarch64*-*-linux* target. * linux-aarch32-low.c (arm_abi_breakpoint): New macro. Moved from linux-arm-low.c. (arm_eabi_breakpoint, arm_breakpoint): Likewise. (arm_breakpoint_len, thumb_breakpoint): Likewise. (thumb_breakpoint_len, thumb2_breakpoint): Likewise. (thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode, arm_breakpoint_at): Likewise. (arm_breakpoint_kinds): Likewise. (arm_breakpoint_kind_from_pc): Likewise. (arm_sw_breakpoint_from_kind): Likewise. (arm_breakpoint_kind_from_current_state): Likewise. * linux-aarch32-low.h (arm_breakpoint_kind_from_pc): Declare. (arm_sw_breakpoint_from_kind): Declare. (arm_breakpoint_kind_from_current_state): Declare. (arm_breakpoint_at): Declare. * linux-aarch64-low.c (aarch64_sw_breakpoint_from_kind): Call arm_sw_breakpoint_from_kind if process is 32-bit. (aarch64_breakpoint_kind_from_pc): New function. (aarch64_breakpoint_kind_from_current_state): New function. (the_low_target): Initialize fields breakpoint_kind_from_pc and breakpoint_kind_from_current_state. * linux-arm-low.c (arm_breakpoint_kinds): Move to linux-aarch32-low.c. (arm_abi_breakpoint, arm_eabi_breakpoint): Likewise. (arm_breakpoint, arm_breakpoint_len): Likewise. (thumb_breakpoint, thumb_breakpoint_len): Likewise. (thumb2_breakpoint, thumb2_breakpoint_len): Likewise. (arm_is_thumb_mode): Likewise. (arm_breakpoint_at): Likewise. (arm_breakpoint_kind_from_pc): Likewise. (arm_sw_breakpoint_from_kind): Likewise. (arm_breakpoint_kind_from_current_state): Likewise. Revert: 2015-08-04 Yao Qi <yao.qi@linaro.org> * linux-aarch64-low.c (aarch64_supports_z_point_type): Return 0 for Z_PACKET_SW_BP if it may be used in multi-arch debugging. * server.c (extended_protocol): Remove "static". * server.h (extended_protocol): Declare it.
2015-12-07 23:56:31 +08:00
aarch64_breakpoint_kind_from_current_state,
Refactor queries for hardware and software single stepping support in GDBServer. Before this patch there was only one call: can_hardware_single_step. Its implementation was a check on breakpoint_reinsert_addr if NULL it assumed that the target could hardware single step. This patch prepares for the case where this is not true anymore. In order to improve software single stepping in GDBServer the breakpoint_reinsert_addr operation of targets that had a very simple software implementation used only for stepping over thread creation events will be removed. This will create a case where a target does not support hardware single step and has the operation breakpoint_reinsert_addr set to NULL, thus can_hardware_single_step needs to be implemented another way. A new target operation supports_hardware_single_step is introduced and is to return true if the target does support such a feature, support for the feature is manually hardcoded. Note that the hardware single step support was enabled as per the current behavior, I did not check if tile for example really has ptrace singlestep support but since the current implementation assumed it had, I kept it that way. No regressions on Ubuntu 14.04 on ARMv7 and x86. With gdbserver-{native,extended} / { -marm -mthumb } Compilation tested on: aarch64,arm,bfind,crisv32,m32r,ppc,s390,tic6x,tile, xtensa. Not tested : sh. gdb/gdbserver/ChangeLog: * linux-aarch64-low.c (aarch64_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-arm-low.c (arm_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-bfin-low.c (bfin_supports_hardware_single_step): New function. (struct linux_target_ops) <bfin_supports_hardware_single_step>: Initialize. * linux-crisv32-low.c (cris_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-low.c (can_hardware_single_step): Use supports_hardware_single_step. (can_software_single_step): New function. (start_step_over): Call can_software_single_step. (linux_supports_hardware_single_step): New function. (struct target_ops) <supports_software_single_step>: Initialize. * linux-low.h (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-m32r-low.c (m32r_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-ppc-low.c (ppc_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step> Initialize. * linux-s390-low.c (s390_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-sh-low.c (sh_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-tic6x-low.c (tic6x_supports_hardware_single_step): New function. (struct linux_target_ops) <tic6x_supports_hardware_single_step>: Initialize. * linux-tile-low.c (tile_supports_hardware_single_step): New function. (struct linux_target_ops) <tile_supports_hardware_single_step>: Initialize. * linux-x86-low.c (x86_supports_hardware_single_step) New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * linux-xtensa-low.c (xtensa_supports_hardware_single_step): New function. (struct linux_target_ops) <supports_hardware_single_step>: Initialize. * target.h (struct target_ops): <supports_software_single_step>: New field. (target_supports_software_single_step): New macro.
2015-11-20 00:29:10 +08:00
aarch64_supports_hardware_single_step,
aarch64_get_syscall_trapinfo,
};
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
void
initialize_low_arch (void)
{
initialize_low_arch_aarch32 ();
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
initialize_regsets_info (&aarch64_regsets_info);
initialize_regsets_info (&aarch64_sve_regsets_info);
[GDBserver] Multi-process + multi-arch This patch makes GDBserver support multi-process + biarch. Currently, if you're debugging more than one process at once with a single gdbserver (in extended-remote mode), then all processes must have the same architecture (e.g., 64-bit vs 32-bit). Otherwise, you see this: Added inferior 2 [Switching to inferior 2 [<null>] (<noexec>)] Reading symbols from /home/pedro/gdb/tests/main32...done. Temporary breakpoint 2 at 0x4004cf: main. (2 locations) Starting program: /home/pedro/gdb/tests/main32 warning: Selected architecture i386 is not compatible with reported target architecture i386:x86-64 warning: Architecture rejected target-supplied description Remote 'g' packet reply is too long: 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000090cfffff0000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000000000000000000000000000000000000000000000b042f7460000000000020000230000002b0000002b0000002b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007f03000000000000ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000801f00003b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 ... etc, etc ... Even though the process was running a 32-bit program, GDBserver sent back to GDB a register set in 64-bit layout. A patch (http://sourceware.org/ml/gdb-patches/2012-11/msg00228.html) a while ago made GDB track a target_gdbarch per inferior, and as consequence, fetch a target description per-inferior. This patch is the GDBserver counterpart, that makes GDBserver keep track of each process'es XML target description and register layout. So in the example above, GDBserver will send the correct register set in 32-bit layout to GDB. A new "struct target_desc" object (tdesc for short) is added, that holds the target description and register layout information about each process. Each `struct process_info' holds a pointer to a target description. The regcache also gains a pointer to a target description, mainly for convenience, and parallel with GDB (and possible future support for programs that flip processor modes). The low target's arch_setup routines are responsible for setting the process'es correct tdesc. This isn't that much different to how things were done before, except that instead of detecting the inferior process'es architecture and calling the corresponding init_registers_FOO routine, which would change the regcache layout globals and recreate the threads' regcaches, the regcache.c globals are gone, and the init_registers_$BAR routines now each initialize a separate global struct target_desc object (one for each arch variant GDBserver supports), and so all the init_registers_$BAR routines that are built into GDBserver are called early at GDBserver startup time (similarly to how GDB handles its built-in target descriptions), and then the arch_setup routine is responsible for making process_info->tdesc point to one of these target description globals. The regcache module is all parameterized to get the regcache's layout from the tdesc object instead of the old register_bytes, etc. globals. The threads' regcaches are now created lazily. The old scheme where we created each of them when we added a new thread doesn't work anymore, because we add the main thread/lwp before we see it stop for the first time, and it is only when we see the thread stop for the first time that we have a chance of determining the inferior's architecture (through the_low_target.arch_setup). Therefore when we add the main thread we don't know which architecture/tdesc its regcache should have. This patch makes the gdb.multi/multi-arch.exp test now pass against (extended-remote) GDBserver. It currently fails, without this patch. The IPA also uses the regcache, so it gains a new global struct target_desc pointer, which points at the description of the process it is loaded in. Re. the linux-low.c & friends changes. Since the register map etc. may differ between processes (64-bit vs 32-bit) etc., the linux_target_ops num_regs, regmap and regset_bitmap data fields are no longer sufficient. A new method is added in their place that returns a pointer to a new struct that includes all info linux-low.c needs to access registers of the current inferior. The patch/discussion that originally introduced linux-low.c:disabled_regsets mentions that the disabled_regsets set may be different per mode (in a biarch setup), and indeed that is cleared whenever we start a new (first) inferior, so that global is moved as well behind the new `struct regs_info'. On the x86 side: I simply replaced the i387-fp.c:num_xmm_registers global with a check for 64-bit or 32-bit process, which is equivalent to how the global was set. This avoided coming up with some more general mechanism that would work for all targets that use this module (GNU/Linux, Windows, etc.). Tested: GNU/Linux IA64 GNU/Linux MIPS64 GNU/Linux PowerPC (Fedora 16) GNU/Linux s390x (Fedora 16) GNU/Linux sparc64 (Debian) GNU/Linux x86_64, -m64 and -m32 (Fedora 17) Cross built, and smoke tested: i686-w64-mingw32, under Wine. GNU/Linux TI C6x, by Yao Qi. Cross built but otherwise not tested: aarch64-linux-gnu arm-linux-gnu m68k-linux nios2-linux-gnu sh-linux-gnu spu tilegx-unknown-linux-gnu Completely untested: GNU/Linux Blackfin GNU/Linux CRIS GNU/Linux CRISv32 GNU/Linux TI Xtensa GNU/Linux M32R LynxOS QNX NTO gdb/gdbserver/ 2013-06-07 Pedro Alves <palves@redhat.com> * Makefile.in (OBS): Add tdesc.o. (IPA_OBJS): Add tdesc-ipa.o. (tdesc-ipa.o): New rule. * ax.c (gdb_eval_agent_expr): Adjust register_size call to new interface. * linux-low.c (new_inferior): Delete. (disabled_regsets, num_regsets): Delete. (linux_add_process): Adjust to set the new per-process new_inferior flag. (linux_detach_one_lwp): Adjust to call regcache_invalidate_thread. (linux_wait_for_lwp): Adjust. Only call arch_setup if the event was a stop. When calling arch_setup, switch the current inferior to the thread that got an event. (linux_resume_one_lwp): Adjust to call regcache_invalidate_thread. (regsets_fetch_inferior_registers) (regsets_store_inferior_registers): New regsets_info parameter. Adjust to use it. (linux_register_in_regsets): New regs_info parameter. Adjust to use it. (register_addr, fetch_register, store_register): New usrregs_info parameter. Adjust to use it. (usr_fetch_inferior_registers, usr_store_inferior_registers): New parameter regs_info. Adjust to use it. (linux_fetch_registers): Get the current inferior's regs_info, and adjust to use it. (linux_store_registers): Ditto. [HAVE_LINUX_REGSETS] (initialize_regsets_info): New. (initialize_low): Don't initialize the target_regsets here. Call initialize_low_arch. * linux-low.h (target_regsets): Delete declaration. (struct regsets_info): New. (struct usrregs_info): New. (struct regs_info): New. (struct process_info_private) <new_inferior>: New field. (struct linux_target_ops): Delete the num_regs, regmap, and regset_bitmap fields. New field regs_info. [HAVE_LINUX_REGSETS] (initialize_regsets_info): Declare. * i387-fp.c (num_xmm_registers): Delete. (i387_cache_to_fsave, i387_fsave_to_cache): Adjust find_regno calls to new interface. (i387_cache_to_fxsave, i387_cache_to_xsave, i387_fxsave_to_cache) (i387_xsave_to_cache): Adjust find_regno calls to new interface. Infer the number of xmm registers from the regcache's target description. * i387-fp.h (num_xmm_registers): Delete. * inferiors.c (add_thread): Don't install the thread's regcache here. * proc-service.c (gregset_info): Fetch the current inferior's regs_info. Adjust to use it. * regcache.c: Include tdesc.h. (register_bytes, reg_defs, num_registers) (gdbserver_expedite_regs): Delete. (get_thread_regcache): If the thread doesn't have a regcache yet, create one, instead of aborting gdbserver. (regcache_invalidate_one): Rename to ... (regcache_invalidate_thread): ... this. (regcache_invalidate_one): New. (regcache_invalidate): Only invalidate registers of the current process. (init_register_cache): Add target_desc parameter, and use it. (new_register_cache): Ditto. Assert the target description has a non zero registers_size. (regcache_cpy): Add assertions. Adjust. (realloc_register_cache, set_register_cache): Delete. (registers_to_string, registers_from_string): Adjust. (find_register_by_name, find_regno, find_register_by_number) (register_cache_size): Add target_desc parameter, and use it. (free_register_cache_thread, free_register_cache_thread_one) (regcache_release, register_cache_size): New. (register_size): Add target_desc parameter, and use it. (register_data, supply_register, supply_register_zeroed) (supply_regblock, supply_register_by_name, collect_register) (collect_register_as_string, collect_register_by_name): Adjust. * regcache.h (struct target_desc): Forward declare. (struct regcache) <tdesc>: New field. (init_register_cache, new_register_cache): Add target_desc parameter. (regcache_invalidate_thread): Declare. (regcache_invalidate_one): Delete declaration. (regcache_release): Declare. (find_register_by_number, register_cache_size, register_size) (find_regno): Add target_desc parameter. (gdbserver_expedite_regs, gdbserver_xmltarget): Delete declarations. * remote-utils.c: Include tdesc.h. (outreg, prepare_resume_reply): Adjust. * server.c: Include tdesc.h. (gdbserver_xmltarget): Delete declaration. (get_features_xml, process_serial_event): Adjust. * server.h [IN_PROCESS_AGENT] (struct target_desc): Forward declare. (struct process_info) <tdesc>: New field. (ipa_tdesc): Declare. * tdesc.c: New file. * tdesc.h: New file. * tracepoint.c: Include tdesc.h. [IN_PROCESS_AGENT] (ipa_tdesc): Define. (get_context_regcache): Adjust to pass ipa_tdesc down. (do_action_at_tracepoint): Adjust to get the register cache size from the context regcache's description. (traceframe_walk_blocks): Adjust to get the register cache size from the current trace frame's description. (traceframe_get_pc): Adjust to get current trace frame's description and pass it down. (gdb_collect): Adjust to get the register cache size from the IPA's description. * linux-amd64-ipa.c (tdesc_amd64_linux): Declare. (gdbserver_xmltarget): Delete. (initialize_low_tracepoint): Set the ipa's target description. * linux-i386-ipa.c (tdesc_i386_linux): Declare. (initialize_low_tracepoint): Set the ipa's target description. * linux-x86-low.c: Include tdesc.h. [__x86_64__] (is_64bit_tdesc): New. (ps_get_thread_area, x86_get_thread_area): Use it. (i386_cannot_store_register): Rename to ... (x86_cannot_store_register): ... this. Use is_64bit_tdesc. (i386_cannot_fetch_register): Rename to ... (x86_cannot_fetch_register): ... this. Use is_64bit_tdesc. (x86_fill_gregset, x86_store_gregset): Adjust register_size calls to new interface. (target_regsets): Rename to ... (x86_regsets): ... this. (x86_get_pc, x86_set_pc): Adjust register_size calls to new interface. (x86_siginfo_fixup): Use is_64bit_tdesc. [__x86_64__] (tdesc_amd64_linux, tdesc_amd64_avx_linux) (tdesc_x32_avx_linux, tdesc_x32_linux) (tdesc_i386_linux, tdesc_i386_mmx_linux, tdesc_i386_avx_linux): Declare. (x86_linux_update_xmltarget): Delete. (I386_LINUX_XSAVE_XCR0_OFFSET): Define. (have_ptrace_getfpxregs, have_ptrace_getregset): New. (AMD64_LINUX_USER64_CS): New. (x86_linux_read_description): New, based on x86_linux_update_xmltarget. (same_process_callback): New. (x86_arch_setup_process_callback): New. (x86_linux_update_xmltarget): New. (x86_regsets_info): New. (amd64_linux_regs_info): New. (i386_linux_usrregs_info): New. (i386_linux_regs_info): New. (x86_linux_regs_info): New. (x86_arch_setup): Reimplement. (x86_install_fast_tracepoint_jump_pad): Use is_64bit_tdesc. (x86_emit_ops): Ditto. (the_low_target): Adjust. Install x86_linux_regs_info, x86_cannot_fetch_register, and x86_cannot_store_register. (initialize_low_arch): New. * linux-ia64-low.c (tdesc_ia64): Declare. (ia64_fetch_register): Adjust. (ia64_usrregs_info, regs_info): New globals. (ia64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sparc-low.c (tdesc_sparc64): Declare. (sparc_fill_gregset_to_stack, sparc_store_gregset_from_stack): Adjust. (sparc_arch_setup): New function. (sparc_regsets_info, sparc_usrregs_info, regs_info): New globals. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-ppc-low.c (tdesc_powerpc_32l, tdesc_powerpc_altivec32l) (tdesc_powerpc_cell32l, tdesc_powerpc_vsx32l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_altivec32l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_e500l) (tdesc_powerpc_64l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell64l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_64l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx64l): Declare. (ppc_cannot_store_register, ppc_collect_ptrace_register) (ppc_supply_ptrace_register, parse_spufs_run, ppc_get_pc) (ppc_set_pc, ppc_get_hwcap): Adjust. (ppc_usrregs_info): Forward declare. (!__powerpc64__) ppc_regmap_adjusted: New global. (ppc_arch_setup): Adjust to the current process'es target description. (ppc_fill_vsxregset, ppc_store_vsxregset, ppc_fill_vrregset) (ppc_store_vrregset, ppc_fill_evrregset, ppc_store_evrregse) (ppc_store_evrregset): Adjust. (target_regsets): Rename to ... (ppc_regsets): ... this, and make static. (ppc_usrregs_info, ppc_regsets_info, regs_info): New globals. (ppc_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-s390-low.c (tdesc_s390_linux32, tdesc_s390_linux32v1) (tdesc_s390_linux32v2, tdesc_s390_linux64, tdesc_s390_linux64v1) (tdesc_s390_linux64v2, tdesc_s390x_linux64, tdesc_s390x_linux64v1) (tdesc_s390x_linux64v2): Declare. (s390_collect_ptrace_register, s390_supply_ptrace_register) (s390_fill_gregset, s390_store_last_break): Adjust. (target_regsets): Rename to ... (s390_regsets): ... this, and make static. (s390_get_pc, s390_set_pc): Adjust. (s390_get_hwcap): New target_desc parameter, and use it. [__s390x__] (have_hwcap_s390_high_gprs): New global. (s390_arch_setup): Adjust to set the current process'es target description. Don't adjust the regmap. (s390_usrregs_info, s390_regsets_info, regs_info): New globals. [__s390x__] (s390_usrregs_info_3264, s390_regsets_info_3264) (regs_info_3264): New globals. (s390_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-mips-low.c (tdesc_mips_linux, tdesc_mips_dsp_linux) (tdesc_mips64_linux, tdesc_mips64_dsp_linux): Declare. [__mips64] (init_registers_mips_linux) (init_registers_mips_dsp_linux): Delete defines. [__mips64] (tdesc_mips_linux, tdesc_mips_dsp_linux): New defines. (have_dsp): New global. (mips_read_description): New, based on mips_arch_setup. (mips_arch_setup): Reimplement. (get_usrregs_info): New function. (mips_cannot_fetch_register, mips_cannot_store_register) (mips_get_pc, mips_set_pc, mips_fill_gregset, mips_store_gregset) (mips_fill_fpregset, mips_store_fpregset): Adjust. (target_regsets): Rename to ... (mips_regsets): ... this, and make static. (mips_regsets_info, mips_dsp_usrregs_info, mips_usrregs_info) (dsp_regs_info, regs_info): New globals. (mips_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-arm-low.c (tdesc_arm, tdesc_arm_with_iwmmxt) (tdesc_arm_with_vfpv2, tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (arm_fill_vfpregset, arm_store_vfpregset): Adjust. (arm_read_description): New, with bits factored from arm_arch_setup. (arm_arch_setup): Reimplement. (target_regsets): Rename to ... (arm_regsets): ... this, and make static. (arm_regsets_info, arm_usrregs_info, regs_info): New globals. (arm_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m68k-low.c (tdesc_m68k): Declare. (target_regsets): Rename to ... (m68k_regsets): ... this, and make static. (m68k_regsets_info, m68k_usrregs_info, regs_info): New globals. (m68k_regs_info): New function. (m68k_arch_setup): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-sh-low.c (tdesc_sharch): Declare. (target_regsets): Rename to ... (sh_regsets): ... this, and make static. (sh_regsets_info, sh_usrregs_info, regs_info): New globals. (sh_regs_info, sh_arch_setup): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-bfin-low.c (tdesc_bfin): Declare. (bfin_arch_setup): New function. (bfin_usrregs_info, regs_info): New globals. (bfin_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_cris): Declare. (cris_arch_setup): New function. (cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-cris-low.c (tdesc_crisv32): Declare. (cris_arch_setup): New function. (cris_regsets_info, cris_usrregs_info, regs_info): New globals. (cris_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-m32r-low.c (tdesc_m32r): Declare. (m32r_arch_setup): New function. (m32r_usrregs_info, regs_info): New globals. (m32r_regs_info): Adjust. (initialize_low_arch): New function. * linux-tic6x-low.c (tdesc_tic6x_c64xp_linux) (tdesc_tic6x_c64x_linux, tdesc_tic6x_c62x_linux): Declare. (tic6x_usrregs_info): Forward declare. (tic6x_read_description): New function, based on ... (tic6x_arch_setup): ... this. Reimplement. (target_regsets): Rename to ... (tic6x_regsets): ... this, and make static. (tic6x_regsets_info, tic6x_usrregs_info, regs_info): New globals. (tic6x_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-xtensa-low.c (tdesc_xtensa): Declare. (xtensa_fill_gregset, xtensa_store_gregset): Adjust. (target_regsets): Rename to ... (xtensa_regsets): ... this, and make static. (xtensa_regsets_info, xtensa_usrregs_info, regs_info): New globals. (xtensa_arch_setup, xtensa_regs_info): New functions. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-nios2-low.c (tdesc_nios2_linux): Declare. (nios2_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (nios2_regsets): ... this. (nios2_regsets_info, nios2_usrregs_info, regs_info): New globals. (nios2_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-aarch64-low.c (tdesc_aarch64): Declare. (aarch64_arch_setup): Set the current process'es tdesc. (target_regsets): Rename to ... (aarch64_regsets): ... this. (aarch64_regsets_info, aarch64_usrregs_info, regs_info): New globals. (aarch64_regs_info): New function. (the_low_target): Adjust. (initialize_low_arch): New function. * linux-tile-low.c (tdesc_tilegx, tdesc_tilegx32): Declare globals. (target_regsets): Rename to ... (tile_regsets): ... this. (tile_regsets_info, tile_usrregs_info, regs_info): New globals. (tile_regs_info): New function. (tile_arch_setup): Set the current process'es tdesc. (the_low_target): Adjust. (initialize_low_arch): New function. * spu-low.c (tdesc_spu): Declare. (spu_create_inferior, spu_attach): Set the new process'es tdesc. * win32-arm-low.c (tdesc_arm): Declare. (arm_arch_setup): New function. (the_low_target): Install arm_arch_setup instead of init_registers_arm. * win32-i386-low.c (tdesc_i386, tdesc_amd64): Declare. (init_windows_x86): Rename to ... (i386_arch_setup): ... this. Set `win32_tdesc'. (the_low_target): Adjust. * win32-low.c (win32_tdesc): New global. (child_add_thread): Don't create the thread cache here. (do_initial_child_stuff): Set the new process'es tdesc. * win32-low.h (struct target_desc): Forward declare. (win32_tdesc): Declare. * lynx-i386-low.c (tdesc_i386): Declare global. (lynx_i386_arch_setup): Set `lynx_tdesc'. * lynx-low.c (lynx_tdesc): New global. (lynx_add_process): Set the new process'es tdesc. * lynx-low.h (struct target_desc): Forward declare. (lynx_tdesc): Declare global. * lynx-ppc-low.c (tdesc_powerpc_32): Declare global. (lynx_ppc_arch_setup): Set `lynx_tdesc'. * nto-low.c (nto_tdesc): New global. (do_attach): Set the new process'es tdesc. * nto-low.h (struct target_desc): Forward declare. (nto_tdesc): Declare. * nto-x86-low.c (tdesc_i386): Declare. (nto_x86_arch_setup): Set `nto_tdesc'. gdb/ 2013-06-07 Pedro Alves <palves@redhat.com> * regformats/regdat.sh: Output #include tdesc.h. Make globals static. Output a global target description pointer. (init_registers_${name}): Adjust to initialize a target description structure.
2013-06-07 18:46:59 +08:00
}