2021-06-07 18:03:32 +08:00
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2021-06-07 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (starts_memory_operand): New.
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(i386_att_operand): Use it.
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* testsuite/gas/i386/quoted.s, testsuite/gas/i386/quoted.d: New.
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* testsuite/gas/i386/i386.exp: Run new test.
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2021-06-07 18:02:15 +08:00
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2021-06-07 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (i386_att_operand): Flip checking for '*' and
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start-of-expression. Don't permit '*' when one was already seen.
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2021-06-07 18:01:45 +08:00
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2021-06-07 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (parse_operands): Don't check for matched
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square brackets.
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2021-06-07 18:01:14 +08:00
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2021-06-07 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (check_VecOperations): Remove 2nd parameter.
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(i386_att_operand): Adjust calls to check_VecOperations.
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* config/tc-i386-intel.c (i386_intel_operand): Likewise.
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2021-06-07 18:00:38 +08:00
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2021-06-07 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (i386_immediate): Don't call check_VecOperations.
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2021-06-07 14:49:33 +08:00
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2021-06-07 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (extend_to_32bit_address): New.
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(x86_cons, i386_finalize_immediate, md_apply_fix): Use it.
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(signed_cons): Use object_64bit.
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* testsuite/gas/i386/wrap32.s, testsuite/gas/i386/wrap32-data.d,
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testsuite/gas/i386/wrap32-text.d: New.
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* testsuite/gas/i386/i386.exp: Run new tests.
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2021-06-03 10:33:09 +08:00
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2021-06-03 Alan Modra <amodra@gmail.com>
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PR 1202
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* testsuite/gas/mcore/allinsn.d: Correct loopt expected output.
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2021-05-28 11:54:16 +08:00
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|
2021-05-29 Alan Modra <amodra@gmail.com>
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* testsuite/gas/ppc/raw.s,
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* testsuite/gas/ppc/raw.d: New test.
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* testsuite/gas/ppc/ppc.exp: Run it.
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|
2021-05-29 09:26:33 +08:00
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|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
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* testsuite/gas/mips/c0.d: New test.
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* testsuite/gas/mips/mips1@c0.d: New test.
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* testsuite/gas/mips/mips2@c0.d: New test.
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* testsuite/gas/mips/mips3@c0.d: New test.
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* testsuite/gas/mips/mips4@c0.d: New test.
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* testsuite/gas/mips/mips5@c0.d: New test.
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* testsuite/gas/mips/mips32@c0.d: New test.
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* testsuite/gas/mips/mips64@c0.d: New test.
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* testsuite/gas/mips/r3000@c0.d: New test.
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* testsuite/gas/mips/r3900@c0.d: New test.
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* testsuite/gas/mips/r4000@c0.d: New test.
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* testsuite/gas/mips/vr5400@c0.d: New test.
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|
* testsuite/gas/mips/r5900@c0.d: New test.
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|
* testsuite/gas/mips/sb1@c0.d: New test.
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|
* testsuite/gas/mips/interaptiv-mr2@c0.d: New test.
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* testsuite/gas/mips/octeon@c0.d: New test.
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|
* testsuite/gas/mips/xlr@c0.d: New test.
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* testsuite/gas/mips/c1.d: New test.
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|
* testsuite/gas/mips/mips1@c1.d: New test.
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* testsuite/gas/mips/mips2@c1.d: New test.
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* testsuite/gas/mips/mips3@c1.d: New test.
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* testsuite/gas/mips/mips4@c1.d: New test.
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* testsuite/gas/mips/mips5@c1.d: New test.
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* testsuite/gas/mips/mips32@c1.d: New test.
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|
* testsuite/gas/mips/mips64@c1.d: New test.
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|
* testsuite/gas/mips/mipsr6@c1.d: New test.
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|
* testsuite/gas/mips/r3000@c1.d: New test.
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|
* testsuite/gas/mips/r3900@c1.d: New test.
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|
* testsuite/gas/mips/r4000@c1.d: New test.
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|
* testsuite/gas/mips/vr5400@c1.d: New test.
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|
|
* testsuite/gas/mips/r5900@c1.d: New test.
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|
|
|
|
* testsuite/gas/mips/sb1@c1.d: New test.
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|
|
|
|
* testsuite/gas/mips/interaptiv-mr2@c1.d: New test.
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|
|
|
|
* testsuite/gas/mips/octeon@c1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/xlr@c1.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/c2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/vr5400@c2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r5900@c2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/octeon@c2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/c3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@c3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@c3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32@c3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@c3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@c3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/c0.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/c2.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/c3.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/c0.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/c1.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/c2.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/c3.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
2021-05-29 09:26:33 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run RFE test across all ISAs.
|
|
|
|
|
|
* testsuite/gas/mips/rfe.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@rfe.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@rfe.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@rfe.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@rfe.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/rfe.l: New test stderr output.
|
|
|
|
|
|
|
2021-05-29 09:26:33 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run coprocessor tests across all
|
|
|
|
|
|
ISAs.
|
|
|
|
|
|
* testsuite/gas/mips/cp0b.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/cp0bl.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/cp0c.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/cp0m.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/cp3.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/cp3b.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/cp3bl.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/cp3m.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/cp3d.d: Update for ISA exclusions.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@cp0b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@cp0b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips3@cp0b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@cp0b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@cp0b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r4000@cp0b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r5900@cp0b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@cp0bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips3@cp0bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@cp0bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r4000@cp0bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r5900@cp0bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips3@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips4@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips5@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r4000@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/vr5400@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r5900@cp0c.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@cp0m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@cp0m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/octeon@cp2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mipsr6@cp2b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/vr5400@cp2b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/octeon@cp2b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@cp2bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mipsr6@cp2bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@cp2bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/vr5400@cp2bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/octeon@cp2bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/vr5400@cp2m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r5900@cp2m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/octeon@cp2m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@cp2d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@cp2d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@cp2d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/vr5400@cp2d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r5900@cp2d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/octeon@cp2d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r2@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r3@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r5@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r6@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/interaptiv-mr2@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@cp3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@cp3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32@cp3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@cp3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@cp3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@cp3b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@cp3b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32@cp3b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@cp3b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@cp3b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@cp3bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips32@cp3bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@cp3bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips1@cp3m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@cp3m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3000@cp3m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/r3900@cp3m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips2@cp3d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp0b.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp0bl.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp0c.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp0m.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp2.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp2-64.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp2b.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp2bl.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp2m.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp2d.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp3.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp3b.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp3bl.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp3m.l: New test stderr output.
|
|
|
|
|
|
* testsuite/gas/mips/cp3d.l: New test stderr output.
|
|
|
|
|
|
|
MIPS/opcodes: Accurately record coprocessor opcode CPU/ISA membership
Adjust opcode table entries for coprocessor instructions that have been
removed from certain ISA levels or CPU implementations as follows:
- remove CP0 memory access instructions from MIPS II up as the LWC0 and
SWC0 opcodes have been reused for the LL and SC instructions
respectively[1]; strictly speaking LWC0 and SWC0 have never really
been defined in the first place[2], but let's keep them for now in
case an odd implementation did,
- remove CP0 branch instructions from MIPS IV[3] and MIPS32[4] up, as
they have been removed as from those ISAs,
- remove CP0 control register move instructions from MIPS32 up, as they
have been removed as from that ISA[5],
- remove the RFE instruction from MIPS III[6] and MIPS32[7] up, as it
has been removed as from those ISAs in favour to ERET,
- remove CP2 instructions from Vr5400 CPUs as their encodings have been
reused for the multimedia instruction set extensions[8] and no CP2
registers exist[9],
- remove CP3 memory access instructions from MIPS III up as coprocessor
3 has been removed as from that ISA[10][11] and from MIPS32 up as the
LWC3 opcode has been reused for the PREF instruction and consequently
all the four memory access instructions removed from the ISA (though
the COP3 opcode has been retained)[12].
Update the testsuite accordingly.
References:
[1] Charles Price, "MIPS IV Instruction Set", MIPS Technologies, Inc.,
Revision 3.2, September, 1995, Table A-38 "CPU Instruction Encoding
- MIPS II Architecture", p. A-178
[2] same, Section A.2.5.1 "Coprocessor Load and Store", p. A-12
[3] "MIPS R10000 Microprocessor User's Manual", Version 2.0, MIPS
Technologies, Inc., January 29, 1997, Section 14.25 "CP0
Instructions", Subsection "Branch on Coprocessor 0", p. 285
[4] "MIPS32 Architecture For Programmers, Volume II: The MIPS32
Instruction Set", MIPS Technologies, Inc., Document Number:
MD00086, Revision 1.00, June 9, 2003, Table A-9 "MIPS32 COP0
Encoding of rs Field", p. 242
[5] same
[6] Joe Heinrich, "MIPS R4000 Microprocessor User's Manual", Second
Edition, MIPS Technologies, Inc., April 1, 1994, Figure A-2 "R4000
Opcode Bit Encoding", p. A-182
[8] "Vr5432 64-bit MIPS RISC Microprocessor User's Manual, Volume 1",
NEC Electronics Inc., Document No. U13751EU5V0UM00, May 2000,
Section 1.2.3 "CPU Instruction Set Overview", p. 9
[9] "Vr5432 64-bit MIPS RISC Microprocessor User's Manual, Volume 2",
NEC Electronics Inc., Document No. U13751EU5V0UM00, May 2000,
Section 19.2 "Multimedia Instruction Format", p. 681
[10] Charles Price, "MIPS IV Instruction Set", MIPS Technologies, Inc.,
Revision 3.2, September, 1995, Section A 8.3.4 "Coprocessor 3 -
COP3 and CP3 load/store", p. A-176
[11] same, Table A-39 "CPU Instruction Encoding - MIPS III
Architecture", p. A-179
[12] "MIPS32 Architecture For Programmers, Volume II: The MIPS32
Instruction Set", MIPS Technologies, Inc., Document Number:
MD00086, Revision 1.00, August 29, 2002, Table A-2 "MIPS32 Encoding
of the Opcode Field", p. 241
opcodes/
* mips-opc.c (mips_builtin_opcodes): Update exclusion list for
"ldc2", "ldc3", "lwc0", "lwc2", "lwc3", "sdc2", "sdc3", "swc0",
"swc2", "swc3", "cfc0", "ctc0", "bc2f", "bc2fl", "bc2t",
"bc2tl", "cfc2", "ctc2", "dmfc2", "dmtc2", "mfc2", "mtc2",
"bc3f", "bc3fl", "bc3t", "bc3tl", "cfc3", "ctc3", "mfc3",
"mtc3", "bc0f", "bc0fl", "bc0t", "bc0tl", "rfe", "c2", "c3",
"cop2", and "cop3" entries.
gas/
* testsuite/gas/mips/mips32@isa-override-1.d: Update for LDC3
instruction removal.
* testsuite/gas/mips/mips32r2@isa-override-1.d: Likewise.
2021-05-29 09:26:32 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
|
|
|
|
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|
|
|
|
|
* testsuite/gas/mips/mips32@isa-override-1.d: Update for LDC3
|
|
|
|
|
|
instruction removal.
|
|
|
|
|
|
* testsuite/gas/mips/mips32r2@isa-override-1.d: Likewise.
|
|
|
|
|
|
|
2021-05-29 09:26:32 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/cp0b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp0bl.d: New test.
|
|
|
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|
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* testsuite/gas/mips/cp2b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@cp2b.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp2bl.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@cp2bl.d: New test.
|
|
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|
|
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* testsuite/gas/mips/cp3b.d: New test.
|
|
|
|
|
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* testsuite/gas/mips/cp3bl.d: New test.
|
|
|
|
|
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* testsuite/gas/mips/cp0b.s: New test source.
|
|
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|
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* testsuite/gas/mips/cp0bl.s: New test source.
|
|
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|
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* testsuite/gas/mips/cp2b.s: New test source.
|
|
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* testsuite/gas/mips/cp2bl.s: New test source.
|
|
|
|
|
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* testsuite/gas/mips/cp3b.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/cp3bl.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
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|
|
2021-05-29 09:26:32 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
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|
|
* testsuite/gas/mips/rfe.d: New test.
|
|
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* testsuite/gas/mips/rfe.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new test.
|
|
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|
MIPS/opcodes: Add legacy CP1 control register names
The two CP1 control registers defined by legacy ISAs used to be referred
to by various names, such as FCR0, FCR31, FSR, however their documented
full names have always been the Implementation and Revision, and Control
and Status respectively, so the FIR and FCSR acronyms coming from modern
ISA revisions will be just as unambiguous while improving the clarity of
disassembly. Do not update the TX39 though as it did not have an FPU.
opcodes/
* mips-dis.c (mips_cp1_names_mips): New variable.
(mips_arch_choices): Use it rather than `mips_cp1_names_numeric'
for "r3000", "r4000", "r4010", "vr4100", "vr4111", "vr4120",
"r4300", "r4400", "r4600", "r4650", "r5000", "vr5400", "vr5500",
"r5900", "r6000", "rm7000", "rm9000", "r8000", "r10000",
"r12000", "r14000", "r16000", "mips5", "loongson2e", and
"loongson2f".
gas/
* testsuite/gas/mips/cp1-names-r3900.d: New test.
* testsuite/gas/mips/mips.exp: Run the new test.
* testsuite/gas/mips/branch-misc-3.d: Update disassembly
according to changes to opcodes.
* testsuite/gas/mips/cp1-names-r3000.d: Likewise.
* testsuite/gas/mips/cp1-names-r4000.d: Likewise.
* testsuite/gas/mips/relax-swap1-mips1.d: Likewise.
* testsuite/gas/mips/relax-swap1-mips2.d: Likewise.
* testsuite/gas/mips/trunc.d: Likewise.
2021-05-29 09:26:32 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
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|
|
* testsuite/gas/mips/cp1-names-r3900.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new test.
|
|
|
|
|
|
* testsuite/gas/mips/branch-misc-3.d: Update disassembly
|
|
|
|
|
|
according to changes to opcodes.
|
|
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|
|
|
* testsuite/gas/mips/cp1-names-r3000.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/cp1-names-r4000.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/relax-swap1-mips1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/relax-swap1-mips2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/trunc.d: Likewise.
|
|
|
|
|
|
|
2021-05-29 09:26:32 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
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|
* testsuite/gas/mips/cp0c.d: New test.
|
|
|
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|
* testsuite/gas/mips/cp0m.d: New test.
|
|
|
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|
|
* testsuite/gas/mips/r3900@cp0m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@cp2.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp2m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mipsr6@cp2m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@cp2m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp2d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mipsr6@cp2d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@cp2d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@cp2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp3.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp3m.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp3d.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/cp0c.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/cp0m.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/cp2.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/cp2m.s: New test source.
|
|
|
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|
|
* testsuite/gas/mips/cp2d.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/cp2-64.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/cp3.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/cp3m.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/cp3d.s: New test source.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run the new tests.
|
|
|
|
|
|
|
MIPS/opcodes: Do not use CP0 register names for control registers
The CP0 control register set has never been defined, however encodings
for the CFC0 and CTC0 instructions remained available for implementers
up until the MIPS32 ISA declared them invalid and causing the Reserved
Instruction exception[1]. Therefore we handle them for both assembly
and disassembly, however in the latter case the names of CP0 registers
from the regular set are incorrectly printed if named registers are
requested. This is because we do not define separate operand classes
for coprocessor regular and control registers respectively, which means
the disassembler has no way to tell the two cases apart. Consequently
nonsensical disassembly is produced like:
cfc0 v0,c0_random
Later the MIPSr5 ISA reused the encodings for XPA ASE MFHC0 and MTHC0
instructions[2] although it failed to document them in the relevant
opcode table until MIPSr6 only.
Correct the issue then by defining a new register class, OP_REG_CONTROL,
and corresponding operand codes, `g' and `y' for the two positions in
the machine instruction a control register operand can take. Adjust the
test cases affected accordingly.
While at it swap the regular MIPS opcode table "cfc0" and "ctc0" entries
with each other so that they come in the alphabetical order.
References:
[1] "MIPS32 Architecture For Programmers, Volume II: The MIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
Revision 1.00, August 29, 2002, Table A-9 "MIPS32 COP0 Encoding of
rs Field", p. 242
[2] "MIPS Architecture For Programmers, Volume II-A: The MIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00086,
Revision 5.04, December 11, 2013, Section 3.2 "Alphabetical List of
Instructions", pp. 195, 216
include/
* opcode/mips.h: Document `g' and `y' operand codes.
(mips_reg_operand_type): Add OP_REG_CONTROL enumeration
constant.
gas/
* tc-mips.c (convert_reg_type) <OP_REG_CONTROL>: New case.
(macro) <M_TRUNCWS, M_TRUNCWD>: Use the `g' rather than `G'
operand code.
opcodes/
* mips-dis.c (print_reg) <OP_REG_COPRO>: Move control register
handling code over to...
<OP_REG_CONTROL>: ... this new case.
* mips-opc.c (decode_mips_operand) <'g', 'y'>: New cases.
(mips_builtin_opcodes): Update "cfc1", "ctc1", "cttc1", "cttc2",
"cfc0", "ctc0", "cfc2", "ctc2", "cfc3", and "ctc3" entries
replacing the `G' operand code with `g'. Update "cftc1" and
"cftc2" entries replacing the `E' operand code with `y'.
* micromips-opc.c (decode_micromips_operand) <'g'>: New case.
(micromips_opcodes): Update "cfc1", "cfc2", "ctc1", and "ctc2"
entries replacing the `G' operand code with `g'.
binutils/
* testsuite/binutils-all/mips/mips-xpa-virt-1.d: Correct CFC0
operand disassembly.
* testsuite/binutils-all/mips/mips-xpa-virt-3.d: Likewise.
2021-05-29 09:26:32 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* tc-mips.c (convert_reg_type) <OP_REG_CONTROL>: New case.
|
|
|
|
|
|
(macro) <M_TRUNCWS, M_TRUNCWD>: Use the `g' rather than `G'
|
|
|
|
|
|
operand code.
|
|
|
|
|
|
|
2021-05-29 09:26:32 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/cp0-names-r3900.d: New test.
|
|
|
|
|
|
* testsuite/gas/mips/mips.exp: Run it.
|
|
|
|
|
|
|
2021-05-29 09:26:32 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mips/micromips.d: Update disassembly according
|
|
|
|
|
|
to "dmtc1" entry fix with opcodes.
|
|
|
|
|
|
* testsuite/gas/mips/micromips-compact.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/micromips-insn32.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/micromips-trap.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/micromips@isa-override-1.d: Likewise.
|
|
|
|
|
|
|
2021-05-29 09:26:32 +08:00
|
|
|
|
2021-05-29 Maciej W. Rozycki <macro@orcam.me.uk>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-mips.c (FCSR): New macro.
|
|
|
|
|
|
(macro) <M_TRUNCWS, M_TRUNCWD>: Use it in place of RA.
|
|
|
|
|
|
|
2021-05-29 00:34:10 +08:00
|
|
|
|
2021-05-28 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR ld/27905
|
|
|
|
|
|
* config/tc-i386.c (set_code_flag): Revert commit 50c95a739c9.
|
|
|
|
|
|
(set_16bit_gcc_code_flag): Likewise.
|
|
|
|
|
|
(x86_cleanup): Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/code16-2.d: Updated.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-code16-2.d: Likewise.
|
|
|
|
|
|
|
2021-05-28 05:59:15 +08:00
|
|
|
|
2021-05-27 Peter Bergner <bergner@linux.ibm.com>
|
|
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|
|
|
|
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|
|
|
|
* testsuite/gas/ppc/vsx.d <xxmr, xxlnot>: Add tests.
|
|
|
|
|
|
* testsuite/gas/ppc/vsx.s: Likewise.
|
|
|
|
|
|
|
2021-05-26 20:53:44 +08:00
|
|
|
|
2021-05-27 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-nds32.c (do_pseudo_push_bhwd, do_pseudo_pop_bhwd),
|
|
|
|
|
|
(do_pseudo_pusha, do_pseudo_pushi): Avoid fortify strncpy bound
|
|
|
|
|
|
error.
|
|
|
|
|
|
|
2021-05-27 03:13:13 +08:00
|
|
|
|
2021-05-26 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR ld/27905
|
|
|
|
|
|
* config/tc-i386.c (set_code_flag): Update x86_feature_2_used
|
|
|
|
|
|
with GNU_PROPERTY_X86_FEATURE_2_CODE16 for .code16 in ELF
|
|
|
|
|
|
object.
|
|
|
|
|
|
(set_16bit_gcc_code_flag): Likewise.
|
|
|
|
|
|
(x86_cleanup): Always generate the GNU property note if
|
|
|
|
|
|
x86_feature_2_used isn't 0.
|
|
|
|
|
|
* testsuite/gas/i386/code16-2.d: New file.
|
|
|
|
|
|
* testsuite/gas/i386/code16-2.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-code16-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run code16-2 and x86-64-code16-2.
|
|
|
|
|
|
|
2021-05-26 20:53:23 +08:00
|
|
|
|
2021-05-26 Sebastien Villemot <sebastien@debian.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/27906
|
|
|
|
|
|
* doc/c-i386.texi: Replace movsb with movsxb as an alias for
|
|
|
|
|
|
movsbq.
|
|
|
|
|
|
|
2021-05-26 10:34:13 +08:00
|
|
|
|
2021-05-26 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_set_arch): Set
|
|
|
|
|
|
check_unknown_prefixed_ext to true for assembler.
|
|
|
|
|
|
|
2021-05-25 23:04:04 +08:00
|
|
|
|
2021-05-25 Tamar Christina <tamar.christina@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/25235
|
|
|
|
|
|
* config/tc-arm.c (md_convert_frag): Set LSB when Thumb symbol.
|
|
|
|
|
|
(relax_adr): Thumb symbols 4 bytes.
|
|
|
|
|
|
* testsuite/gas/arm/pr25235.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/pr25235.s: New test.
|
|
|
|
|
|
|
2021-05-21 15:40:33 +08:00
|
|
|
|
2021-05-24 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 25212
|
|
|
|
|
|
* config/tc-riscv.c (riscv_set_abi_by_arch): If -mabi isn't set, we
|
|
|
|
|
|
will choose ilp32e abi for rv32e. Besides, report errors for the
|
|
|
|
|
|
invalid march and mabi combinations.
|
|
|
|
|
|
* testsuite/gas/riscv/mabi-attr-rv32e.s: New testcase. Only accept
|
|
|
|
|
|
ilp32e abi for rve extension.
|
|
|
|
|
|
* testsuite/gas/riscv/mabi-fail-rv32e-lp64f.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/mabi-fail-rv32e-lp64d.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/mabi-fail-rv32e-lp64d.q: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/mabi-fail-rv32e-lp64d.q: Likewise.
|
|
|
|
|
|
Renamed all mabi testcases to their march-mabi settings.
|
|
|
|
|
|
|
2021-05-22 11:29:36 +08:00
|
|
|
|
2021-05-22 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 25599
|
|
|
|
|
|
* config/tc-ia64.c (emit_one_bundle): Expand comment for HP-UX
|
|
|
|
|
|
adjustment. Add assertion.
|
|
|
|
|
|
* testsuite/gas/ia64/reloc-mlx.d: Pass when slot 2 specified
|
|
|
|
|
|
for PCREL60B.
|
|
|
|
|
|
|
2021-05-20 23:14:10 +08:00
|
|
|
|
2021-05-20 Sergey Belyashov <sergey.belyashov@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-z80.c (emit_data_val): Warn on constant overflow.
|
|
|
|
|
|
(signed_overflow): New function.
|
|
|
|
|
|
(unsigned_overflow): New function.
|
|
|
|
|
|
(is_overflow): Use new functions.
|
|
|
|
|
|
(md_apply_fix): Use signed_overflow.
|
|
|
|
|
|
* testsuite/gas/z80/ez80_adl_suf.d: Fix test.
|
|
|
|
|
|
* testsuite/gas/z80/ez80_isuf.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/z80/ez80_z80_suf.d: Likewise.
|
|
|
|
|
|
|
2021-05-20 08:28:51 +08:00
|
|
|
|
2021-05-20 Nicolas Boulenguez <nicolas@debian.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27888
|
|
|
|
|
|
* Makefile.am (ZLIB): Define.
|
|
|
|
|
|
(as_new_LDADD): Add it.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
|
arm: Fix bugs with MVE vmov from two GPRs to vector lanes
The initial problem I wanted to fix here is that GAS was rejecting MVE
instructions such as:
vmov q3[2], q3[0], r2, r2
with:
Error: General purpose registers may not be the same -- `vmov q3[2],q3[0],r2,r2'
which is incorrect; such instructions are valid. Note that for moves in
the other direction, e.g.:
vmov r2, r2, q3[2], q3[0]
GAS is correct in rejecting this as it does not make sense to move both
lanes into the same register (the Arm ARM says this is CONSTRAINED
UNPREDICTABLE).
After fixing this issue, I added assembly/disassembly tests for these
vmovs. This revealed several disassembly issues, including incorrectly
marking the moves into vector lanes as UNPREDICTABLE, and disassembling
many of the vmovs as vector loads. These are now fixed.
gas/ChangeLog:
* config/tc-arm.c (do_mve_mov): Only reject vmov if we're moving
into the same GPR twice.
* testsuite/gas/arm/mve-vmov-bad-2.l: Tweak error message.
* testsuite/gas/arm/mve-vmov-3.d: New test.
* testsuite/gas/arm/mve-vmov-3.s: New test.
opcodes/ChangeLog:
* arm-dis.c (mve_opcodes): Fix disassembly of
MVE_VMOV2_GP_TO_VEC_LANE when idx == 1.
(is_mve_encoding_conflict): MVE vector loads should not match
when P = W = 0.
(is_mve_unpredictable): It's not unpredictable to use the same
source register twice (for MVE_VMOV2_GP_TO_VEC_LANE).
2021-05-17 22:12:39 +08:00
|
|
|
|
2021-05-17 Alex Coplan <alex.coplan@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (do_mve_mov): Only reject vmov if we're moving
|
|
|
|
|
|
into the same GPR twice.
|
|
|
|
|
|
* testsuite/gas/arm/mve-vmov-bad-2.l: Tweak error message.
|
|
|
|
|
|
* testsuite/gas/arm/mve-vmov-3.d: New test.
|
|
|
|
|
|
* testsuite/gas/arm/mve-vmov-3.s: New test.
|
|
|
|
|
|
|
SAFE_BYTE_GET64
Functions dealing with lack of a 64-bit integer type can disappear now
that we require C99. Printing using dwarf_vmatoa is better too.
binutils/
* dwarf.c (dwarf_vmatoa64, SAFE_BYTE_GET64, add64): Delete.
(skip_attr_bytes): Replace use of SAFE_BYTE_GET64 with
SAFE_BYTE_GET_AND_INC.
(read_and_display_attr_value): Likewise. Print using dwarf_vmatoa.
(process_debug_info, process_cu_tu_index): Likewise.
* elfcomm.c (byte_put, byte_put_little_endian, byte_put_big_endian),
(byte_get, byte_get_little_endian, byte_get_big_endian),
(byte_get_signed): Make size param unsigned. Remove code dealing
with 4-byte elf_vma.
(byte_get_64): Delete.
* elfcomm.h (byte_put, byte_put_little_endian, byte_put_big_endian),
(byte_get, byte_get_little_endian, byte_get_big_endian),
(byte_get_signed): Update prototypes.
(byte_get_64): Delete.
gas/
* testsuite/gas/elf/dwarf-5-file0.d: Update.
* testsuite/gas/i386/dwarf5-line-1.d: Update.
2021-05-12 16:18:13 +08:00
|
|
|
|
2021-05-12 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/elf/dwarf-5-file0.d: Update.
|
|
|
|
|
|
* testsuite/gas/i386/dwarf5-line-1.d: Update.
|
|
|
|
|
|
|
2021-05-11 17:57:04 +08:00
|
|
|
|
2021-05-11 Sergey Belyashov <sergey.belyashov@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27823
|
|
|
|
|
|
* config/tc-z80.c (emit_ld_r_m): Report an illegal load
|
|
|
|
|
|
instruction.
|
|
|
|
|
|
* testsuite/gas/z80/ill_ops.s: New test source file.
|
|
|
|
|
|
* testsuite/gas/z80/ill_ops.d: New test driver.
|
|
|
|
|
|
* testsuite/gas/z80/ill_ops.l: New test error output.
|
|
|
|
|
|
|
2021-05-10 20:36:08 +08:00
|
|
|
|
2021-05-10 Sergey Belyashov <sergey.belyashov@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27415
|
|
|
|
|
|
* config/tc-z80.c (emit_data_val): Add support for 8-bit and
|
|
|
|
|
|
24-bit shifts.
|
|
|
|
|
|
* testsuite/gas/z80/z80_reloc.a: Update tests.
|
|
|
|
|
|
* testsuite/gas/z80/z80_reloc.d: Update expected disassembly.
|
|
|
|
|
|
|
2021-05-03 00:50:39 +08:00
|
|
|
|
2021-05-08 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/Makefile.am (html-local, as/index.html): New targets.
|
|
|
|
|
|
* doc/Makefile.in: Regenerate.
|
|
|
|
|
|
|
2021-05-03 00:09:00 +08:00
|
|
|
|
2021-05-08 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/Makefile.am (AM_MAKEINFOFLAGS): Add --no-split.
|
|
|
|
|
|
* doc/Makefile.in: Regenerate.
|
|
|
|
|
|
|
2021-05-08 00:07:41 +08:00
|
|
|
|
2021-05-07 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 3136
|
|
|
|
|
|
* config/obj-elf.c (elf_pseudo_table): Add entry for .bss.
|
|
|
|
|
|
(obj_elf_bss): New function. Change to the .bss section.
|
|
|
|
|
|
Support an optional subsection number.
|
|
|
|
|
|
(obj_elf_change_section): Call obj_elf_section_change_hook.
|
|
|
|
|
|
(obj_elf_section): Likewise.
|
|
|
|
|
|
(obj_elf_data): Likewise.
|
|
|
|
|
|
(obj_elf_text): Likewise.
|
|
|
|
|
|
(obj_elf_struct): Likewise.
|
|
|
|
|
|
(obj_elf_subsection): Likewise.
|
|
|
|
|
|
(obj_elf_previous): Likewise.
|
|
|
|
|
|
* config/obj-elf.h (obj_elf_bss): Prototype.
|
|
|
|
|
|
* doc/as.texi (Bss): New node.
|
|
|
|
|
|
|
2021-05-07 22:29:49 +08:00
|
|
|
|
2021-05-07 Clément Chigot <clement.chigot@atos.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-coff.c (coff_frob_symbol): Don't skip C_DWARF.
|
|
|
|
|
|
(coff_adjust_section_syms): Use corrext auxent for C_DWARF.
|
|
|
|
|
|
(coff_frob_section): Likewise.
|
|
|
|
|
|
* config/obj-coff.h (SA_GET_SECT_SCNLEN,
|
|
|
|
|
|
SA_GET_SECT_NRELOC, SA_SET_SECT_SCNLEN,
|
|
|
|
|
|
SA_SET_SECT_NRELOC) New defines.
|
|
|
|
|
|
(SET_SECTION_RELOCS): Adjust for C_DWARF.
|
|
|
|
|
|
* config/tc-ppc.c (ppc_frob_symbol): Don't skip C_DWARF.
|
|
|
|
|
|
(ppc_adjust_symtab): Reorder C_DWARF symbols.
|
|
|
|
|
|
* testsuite/gas/ppc/aix.exp: New tests.
|
|
|
|
|
|
* testsuite/gas/ppc/xcoff-dwsect-2-32.d: New test.
|
|
|
|
|
|
* testsuite/gas/ppc/xcoff-dwsect-2-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/ppc/xcoff-dwsect-2.s: New test.
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (ppc_function): Update comment for
|
|
|
|
|
|
fifth argument.
|
|
|
|
|
|
(ppc_frob_symbol): Remove ppc_last_function check.
|
|
|
|
|
|
Make sure coff_last_function is reset.
|
|
|
|
|
|
Correctly set fsize when not provided in .function.
|
|
|
|
|
|
* testsuite/gas/ppc/aix.exp: New tests.
|
|
|
|
|
|
* testsuite/gas/ppc/xcoff-function-1-32.d: New test.
|
|
|
|
|
|
* testsuite/gas/ppc/xcoff-function-1-64.d: New test.
|
|
|
|
|
|
* testsuite/gas/ppc/xcoff-function-1.s: New test.
|
|
|
|
|
|
|
2021-05-07 18:05:12 +08:00
|
|
|
|
2021-05-07 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/rela.s, testsuite/gas/i386/rela.d: New.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new test.
|
|
|
|
|
|
|
2021-05-07 18:03:12 +08:00
|
|
|
|
2021-05-07 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (output_disp): Use disps field instead of
|
|
|
|
|
|
imms one.
|
|
|
|
|
|
|
2021-05-07 18:02:40 +08:00
|
|
|
|
2021-05-07 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_finalize_immediate): Move register
|
|
|
|
|
|
check ...
|
|
|
|
|
|
(i386_immediate): ... here.
|
|
|
|
|
|
|
2021-05-07 18:02:07 +08:00
|
|
|
|
2021-05-07 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (optimize_imm): Drop redundant masking.
|
|
|
|
|
|
Re-arrange operand type accumulation.
|
|
|
|
|
|
|
2021-05-06 19:51:24 +08:00
|
|
|
|
2021-05-06 Stafford Horne <shorne@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 21464
|
|
|
|
|
|
* testsuite/gas/or1k/reloc-1.s: Add test for new relocation.
|
|
|
|
|
|
* testsuite/gas/or1k/reloc-1.d: Add test result for new
|
|
|
|
|
|
relocation.
|
|
|
|
|
|
|
2021-05-04 07:19:17 +08:00
|
|
|
|
2021-05-03 Christoph Muellner <cmuellner@gcc.gnu.org>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27764
|
|
|
|
|
|
* testsuite/gas/riscv/a-ext-64.d: New testcase.
|
|
|
|
|
|
* testsuite/gas/riscv/a-ext-64.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/a-ext.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/a-ext.s: Likewise.
|
|
|
|
|
|
|
2021-05-03 19:28:30 +08:00
|
|
|
|
2021-05-03 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.h (TC_PARSE_CONS_EXPRESSION): Adjust surrounding
|
|
|
|
|
|
#if.
|
|
|
|
|
|
* testsuite/gas/i386/secrel.s: Convert some .secrel32 to .long.
|
|
|
|
|
|
Add two further .long and an .equ.
|
|
|
|
|
|
* testsuite/gas/i386/secrel.d: Adjust expecations.
|
|
|
|
|
|
|
2021-05-03 19:27:47 +08:00
|
|
|
|
2021-05-03 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/secrel.d, testsuite/gas/i386/secrel.s:
|
|
|
|
|
|
Convert Windows to UNIX EOL.
|
|
|
|
|
|
|
2021-05-03 19:26:41 +08:00
|
|
|
|
2021-05-03 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (lex_got): Adjust surrounding #if. Fold TE_PE
|
|
|
|
|
|
variant into ELF one.
|
|
|
|
|
|
|
2021-05-03 06:20:03 +08:00
|
|
|
|
2021-05-03 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/elf/section25.s: Don't start directives in first
|
|
|
|
|
|
column.
|
|
|
|
|
|
* testsuite/gas/elf/section26.s: Likewise.
|
|
|
|
|
|
|
2021-04-29 21:02:25 +08:00
|
|
|
|
2021-04-29 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Move x86-64-rip-2 invocation.
|
|
|
|
|
|
* testsuite/gas/i386/lea64.d,
|
|
|
|
|
|
testsuite/gas/i386/lea64-optimize.d: Allow for COFF relocs.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-rip-inval-1.s,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-rip-inval-2.s. Add .end.
|
|
|
|
|
|
|
2021-04-29 17:45:10 +08:00
|
|
|
|
2021-04-29 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_validate_fix): Change return type to
|
|
|
|
|
|
int. Short-circuit BFD_RELOC_SIZE* handling.
|
|
|
|
|
|
(tc_gen_reloc): New local variable sym. Extend logic when
|
|
|
|
|
|
processing BFD_RELOC_SIZE*.
|
|
|
|
|
|
* config/tc-i386.f (i386_validate_fix): Change return type to
|
|
|
|
|
|
int.
|
|
|
|
|
|
(TC_VALIDATE_FIX): Proceed to SKIP when i386_validate_fix()
|
|
|
|
|
|
returns zero.
|
|
|
|
|
|
* testsuite/gas/i386/size-5.s, testsuite/gas/i386/size-5a.d,
|
|
|
|
|
|
testsuite/gas/i386/size-5b.d: New.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new tests.
|
|
|
|
|
|
|
2021-04-29 17:43:53 +08:00
|
|
|
|
2021-04-29 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (tc_gen_reloc): Use section size for section
|
|
|
|
|
|
symbols when resolving BFD_RELOC_SIZE*.
|
|
|
|
|
|
* testsuite/gas/i386/size-2.s: Add section size cases.
|
|
|
|
|
|
* testsuite/gas/i386/size-2.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-size-2.d: Adjust expectations.
|
|
|
|
|
|
|
x86: honor signedness of PC-relative relocations
PR gas/27763
While the comment in output_jump() was basically correct prior to the
introduction of 64-bit mode, both that and the not-JMP-like behavior of
XBEGIN require adjustments: Branches with 32-bit displacement do not
wrap at 4G in 64-bit mode, and XBEGIN with 16-bit operand size doesn't
wrap at 64k. Similarly %rip-relative addressing doesn't wrap at 4G.
The new testcase points out that for PE/COFF object_64bit didn't get
set so far, preventing in particular the check at the end of
md_convert_frag() to take effect.
For Mach-O the new testcase fails (bogusly), in that only the first two
of the expected errors get raised. Since for Mach-O many testcases
already fail, and since an x86_64-darwin target can't even be configured
for, I didn't think I need to bother.
Note that there are further issues in this area, in particular for
branches with operand size overrides. Such branches, which truncate
%rip / %eip, can't be correctly expressed with ordinary PC-relative
relocations. It's not really clear what to do with them - perhaps the
best we can do is to carry through all associated relocations, leaving
it to the linker (or even loader) to decide (once the final address
layout is known). Same perhaps goes for relocations associated with
32-bit addressing in 64-bit mode.
2021-04-28 16:53:00 +08:00
|
|
|
|
2021-04-28 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
H.J. Lu <hjl.tools@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/27763
|
|
|
|
|
|
* config/tc-i386.c (output_jump): Also mark 2-byte relocs as
|
|
|
|
|
|
signed for XBEGIN. Also mark 4-byte relocs as signed for 64-bit.
|
|
|
|
|
|
(output_disp): Also mark 4-byte relocs as signed for 64-bit.
|
|
|
|
|
|
(md_estimate_size_before_relax): Move local variable fixP. Set
|
|
|
|
|
|
it from fix_new() return values. Mark 4-byte relocs as signed
|
|
|
|
|
|
for 64-bit.
|
|
|
|
|
|
* testsuite/gas/i386/pcrel64.s, testsuite/gas/i386/pcrel64.l,
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-rip-2.s,
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-rip-2.d,
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-rip-inval-1.s,
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-rip-inval-1.l,
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-rip-inval-2.s,
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-rip-inval-2.l: New.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new tests.
|
|
|
|
|
|
|
2021-04-27 23:16:55 +08:00
|
|
|
|
2021-04-27 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (optimize_encoding): Add () to silence GCC 5.
|
|
|
|
|
|
|
2021-04-26 16:39:45 +08:00
|
|
|
|
2021-04-26 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (tc_gen_reloc): Check IS_ELF for
|
|
|
|
|
|
BFD_RELOC_SIZE*.
|
|
|
|
|
|
|
2021-04-26 16:39:11 +08:00
|
|
|
|
2021-04-26 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (tc_gen_reloc): Limit BFD_RELOC_SIZE32
|
|
|
|
|
|
overflow check to 64-bit objects.
|
|
|
|
|
|
|
2021-04-26 16:37:30 +08:00
|
|
|
|
2021-04-26 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (want_disp32): Also check for SIZE32.
|
|
|
|
|
|
(optimize_encoding): Handle LEA.
|
|
|
|
|
|
* testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
|
|
|
|
|
|
testsuite/gas/i386/lea.e, testsuite/gas/i386/lea-optimize.d:
|
|
|
|
|
|
Add many more forms.
|
|
|
|
|
|
* testsuite/gas/i386/lea16.s, testsuite/gas/i386/lea16-optimize.d,
|
|
|
|
|
|
testsuite/gas/i386/lea64.s, testsuite/gas/i386/lea64.d,
|
|
|
|
|
|
testsuite/gas/i386/lea64.e, testsuite/gas/i386/lea64-optimize.d:
|
|
|
|
|
|
New.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new tests.
|
|
|
|
|
|
|
2021-04-26 16:35:51 +08:00
|
|
|
|
2021-04-26 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_apply_fix): Mark BFD_RELOC_X86_64_32S as
|
|
|
|
|
|
signed.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-addr32-bad.s,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-addr32-bad.l: New.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new test.
|
|
|
|
|
|
|
2021-04-24 01:07:59 +08:00
|
|
|
|
2021-04-23 Eric Botcazou<ebotcazou@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/elf/section25.d: Run it everywhere.
|
|
|
|
|
|
* testsuite/gas/elf/section26.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section26.s: Add test for .persistent.bss.
|
|
|
|
|
|
|
2021-04-23 23:33:47 +08:00
|
|
|
|
2021-04-23 Jérôme Gardou <jerome.gardou@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-coff-seh.c (obj_coff_seh_pushframe): Allow an
|
|
|
|
|
|
optional "code" argument.
|
|
|
|
|
|
|
2021-04-23 15:18:06 +08:00
|
|
|
|
2021-04-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (want_disp32): New.
|
|
|
|
|
|
(md_assemble): Use it.
|
|
|
|
|
|
(optimize_disp): Likewise.
|
|
|
|
|
|
(build_modrm_byte): Likewise.
|
|
|
|
|
|
|
2021-04-23 15:17:33 +08:00
|
|
|
|
2021-04-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_finalize_displacement): Move Disp32S
|
|
|
|
|
|
check ...
|
|
|
|
|
|
(md_assemble): ... here.
|
|
|
|
|
|
|
2021-04-23 15:16:57 +08:00
|
|
|
|
2021-04-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (optimize_disp): Move down BFD64 section.
|
|
|
|
|
|
Move up setting of disp32.
|
|
|
|
|
|
|
2021-04-23 15:15:45 +08:00
|
|
|
|
2021-04-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (pe): Don't truncate expression value.
|
|
|
|
|
|
(i386_finalize_displacement): Likewise.
|
|
|
|
|
|
|
2021-04-21 17:34:32 +08:00
|
|
|
|
2021-04-21 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/dwarf.d: Adjust expected output to allow
|
|
|
|
|
|
for named section symbols.
|
|
|
|
|
|
* testsuite/gas/arm/thumbver.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/bfin/loop_temps.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-arc: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-arm: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-csky: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-m32r: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-mips: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-msp430: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-riscv: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-rl78: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-rx: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-score: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-tic6x: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-unused: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-v850: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-xtensa: Likewise.
|
|
|
|
|
|
* testsuite/gas/ia64/alias-ilp32.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/ia64/alias.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/ia64/global.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/microblaze/relax_size.elf: Likewise.
|
|
|
|
|
|
* testsuite/gas/microblaze/relax_size2.elf: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/global-local-symtab-sort-n64t.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mips/global-local-symtab-sort-o32t.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mmix/bspec-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mmix/byte-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mmix/comment-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mmix/loc-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mmix/loc-2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mmix/loc-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mmix/loc-4.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/mmix/loc-5.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
|
|
|
|
|
|
|
2021-04-20 21:40:43 +08:00
|
|
|
|
2021-04-20 Clément Chigot <clement.chigot@atos.net>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/21700
|
|
|
|
|
|
* config/tc-ppc.c (ppc_get_csect_to_adjust): New function.
|
|
|
|
|
|
(ppc_fix_adjustable): Manage fx_subsy part.
|
|
|
|
|
|
(tc_gen_reloc): Create second relocation when both
|
|
|
|
|
|
fx_addsy and fx_subsy are provided.
|
|
|
|
|
|
* config/tc-ppc.h (RELOC_EXPANSION_POSSIBLE): New define.
|
|
|
|
|
|
(MAX_RELOC_EXPANSION): Likewise.
|
|
|
|
|
|
(TC_FORCE_RELOCATION_SUB_SAME): Likewise
|
|
|
|
|
|
(UNDEFINED_DIFFERENCE_OK): Likewise
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Skip difference between two
|
|
|
|
|
|
undefined symbols test.
|
|
|
|
|
|
|
2021-04-20 00:36:43 +08:00
|
|
|
|
2021-04-19 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Add rs6000*-*-aix* to the list of
|
|
|
|
|
|
targets which should skip the undefined symbols test.
|
|
|
|
|
|
|
2021-04-19 22:00:07 +08:00
|
|
|
|
2021-04-19 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Update news.
|
|
|
|
|
|
* testsuite/gas/aarch64/rme.d: Update test.
|
|
|
|
|
|
* testsuite/gas/aarch64/rme.s: Update test.
|
|
|
|
|
|
|
2021-04-19 21:54:46 +08:00
|
|
|
|
2021-04-19 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/rme.d: Update test.
|
|
|
|
|
|
* testsuite/gas/aarch64/rme.s: Update test.
|
|
|
|
|
|
|
2021-04-19 19:28:35 +08:00
|
|
|
|
2021-04-19 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* as.h (sprint_value): Delete.
|
|
|
|
|
|
* messages.c (sprint_value): Likewise.
|
|
|
|
|
|
* config/tc-i386.c (offset_in_range): Use bfd_sprintf_vma in
|
|
|
|
|
|
place of sprint_value.
|
|
|
|
|
|
* config/tc-s390.c (s390_insert_operand): Likewise.
|
|
|
|
|
|
* doc/internals.texi (sprint_value): Delete section.
|
|
|
|
|
|
* write.c (fixup_segment): Likewise.
|
|
|
|
|
|
(relax_segment): Likewise.
|
|
|
|
|
|
|
2021-04-16 22:33:38 +08:00
|
|
|
|
2021-04-16 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/rme-invalid.d: New test.
|
|
|
|
|
|
* testsuite/gas/aarch64/rme-invalid.l: New test.
|
|
|
|
|
|
* testsuite/gas/aarch64/rme-invalid.s: New test.
|
|
|
|
|
|
* testsuite/gas/aarch64/rme.d: New test.
|
|
|
|
|
|
* testsuite/gas/aarch64/rme.s: New test.
|
|
|
|
|
|
|
2021-04-16 14:50:32 +08:00
|
|
|
|
2021-04-16 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27436
|
|
|
|
|
|
* config/tc-riscv.c (riscv_ip): make operand C> work the same as >.
|
|
|
|
|
|
* testsuite/gas/riscv/shamt-32.d: New testcase.
|
|
|
|
|
|
* testsuite/gas/riscv/shamt-32.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/shamt-32.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/shamt-64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/shamt-64.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/shamt-64.s: Likewise.
|
|
|
|
|
|
|
2021-04-16 16:48:27 +08:00
|
|
|
|
2021-04-16 Lifang Xia <lifang_xia@c-sky.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/riscv/c-zero-imm.d: Compress addi a4,a4,0 to
|
|
|
|
|
|
c.mv a4,a4.
|
|
|
|
|
|
* testsuite/gas/riscv/c-zero-imm.s: Likewise.
|
|
|
|
|
|
|
2021-04-14 07:53:12 +08:00
|
|
|
|
2021-04-14 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27723
|
|
|
|
|
|
* dw2gencfi.c (initial_cie_insn): New function, extracted from..
|
|
|
|
|
|
(select_cie_for_fde): ..here. Simplify.
|
|
|
|
|
|
|
2021-04-13 21:51:04 +08:00
|
|
|
|
2021-04-14 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27723
|
|
|
|
|
|
* dw2gencfi.c (select_cie_for_fde): Handle DW_CFA_val_offset,
|
|
|
|
|
|
DW_CFA_GNU_window_save and DW_CFA_restore_state.
|
|
|
|
|
|
|
2021-04-12 23:02:11 +08:00
|
|
|
|
2021-04-13 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/m68hc11/m68hc11.exp (gas_m68hc11_message): Don't
|
|
|
|
|
|
write to $srcdir. Use gas_host_run and read output file rather
|
|
|
|
|
|
than gas_start/gas_finish.
|
|
|
|
|
|
|
2021-04-12 07:32:46 +08:00
|
|
|
|
2021-04-12 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (insn_validate): Use uint64_t for operand values.
|
|
|
|
|
|
(md_assemble): Likewise. Handle bignum operands.
|
|
|
|
|
|
(ppc_elf_suffix): Handle O_big. Remove unnecessary input_line_pointer
|
|
|
|
|
|
check.
|
|
|
|
|
|
* expr.c: Delete unnecessary forward declarations.
|
|
|
|
|
|
(generic_bignum_to_int32): Return uint32_t.
|
|
|
|
|
|
(generic_bignum_to_int64): Return uint64_t. Compile always.
|
|
|
|
|
|
(operand): Twiddle X_extrabit for unary '~'. Set X_unsigned and
|
|
|
|
|
|
clear X_extrabit for unary '!'.
|
|
|
|
|
|
* expr.h (generic_bignum_to_int32): Declare.
|
|
|
|
|
|
(generic_bignum_to_int64): Declare.
|
|
|
|
|
|
* testsuite/gas/ppc/prefix-pcrel.s,
|
|
|
|
|
|
* testsuite/gas/ppc/prefix-pcrel.d: Add more instructions.
|
|
|
|
|
|
|
RISC-V: Support to parse the multi-letter prefix in the architecture string.
The original discussion is as follows,
https://github.com/riscv/riscv-isa-manual/issues/637
I never considered the prefixes may have multiple letters, like zxm.
But the ISA spec has been updated for a long time that I haven't noticed.
This patch rewrites the part of architecture parser to support parsing
the multi-letter prefixes. Besides, I also improve the parser to report
errors in details. One of the most obvious improvement is - Do not parse
the prefixed extensions according to the orders in the parse_config.
If we do so, then we used to get "unexpected ISA string at end" errors,
but the message is a little bit hard to know what is happening. I Remove
the confused message, and let riscv_parse_prefixed_ext to report the details.
bfd/
* elfxx-riscv.c (riscv_std_z_ext_strtab): Moved forward.
(riscv_std_s_ext_strtab): Likewise.
(riscv_std_h_ext_strtab): Likewise.
(riscv_std_zxm_ext_strtab): Added for the zxm prefix.
(enum riscv_prefix_ext_class): Moved forward and renamed from
riscv_isa_ext_class. Reorder them according to the parsing order,
since the enum values are used to check the orders in the
riscv_compare_subsets.
(struct riscv_parse_prefix_config): Moved forward and renamed from
riscv_parse_config_t. Also removed the ext_valid_p field, the
related functions are replaced by riscv_valid_prefixed_ext.
(parse_config): Moved forward and updated. The more letters of the
prefix string, the more forward it must be defined. Otherwise, we
will get the wrong mapping when using strncmp in riscv_get_prefix_class.
(riscv_get_prefix_class): Moved forward. Support to parse the
multi-letter prefix, like zxm.
(riscv_known_prefixed_ext): New function, check if the prefixed
extension is supported according to the right riscv_std_*_ext_strtab.
(riscv_valid_prefixed_ext): New function, used to replace the
riscv_ext_*_valid_p functions.
(riscv_init_ext_order): Do not set the values for prefix keywords
since they may have multiple letters for now.
(riscv_compare_subsets): Set the order values of prefix keywords
to negative numbers according to the riscv_prefix_ext_class.
(riscv_parse_std_ext): Call riscv_get_prefix_class to see if we
have parsed the prefixed extensions.
(riscv_parse_prefixed_ext): Updated and removed the parameter config.
Report error when the prefix is unknown.
(riscv_parse_subset): Do not parse the prefixed extensions according
to the orders in the parse_config. Remove the confused message and
let riscv_parse_prefixed_ext to report the details.
* elfxx-riscv.h (enum riscv_isa_ext_class): Moved to elfxx-riscv.c.
(riscv_get_prefix_class): Removed to static.
gas/
* testsuite/gas/riscv/march-fail-order-x-std.d: Renamed from
march-fail-porder-x-std.d.
* testsuite/gas/riscv/march-fail-order-z-std.d: Renamed from
march-fail-porder-z-std.d.
* testsuite/gas/riscv/march-fail-order-x-z.d: Renamed from
march-fail-porder-x-z.d.
* testsuite/gas/riscv/march-fail-order-zx-std.l: Added to replace
march-fail-porder.l.
* testsuite/gas/riscv/march-fail-order-x-z.l: Likewise.
* testsuite/gas/riscv/march-fail-order-x.l: Updated.
* testsuite/gas/riscv/march-fail-order-z.l: Likewise.
* testsuite/gas/riscv/march-fail-single-prefix-h.d: Renamed from
march-fail-single-char-h.d.
* testsuite/gas/riscv/march-fail-single-prefix-s.d: Renamed from
march-fail-single-char-s.d.
* testsuite/gas/riscv/march-fail-single-prefix-x.d: Renamed from
march-fail-single-char-x.d.
* testsuite/gas/riscv/march-fail-single-prefix-z.d: Renamed from
march-fail-single-char-z.d.
* testsuite/gas/riscv/march-fail-single-prefix-zmx.d: Added.
* testsuite/gas/riscv/march-fail-single-prefix.l: Added to replace
march-fail-single-prefix.l.
* testsuite/gas/riscv/march-fail-unknown-zxm.d: Added.
* testsuite/gas/riscv/march-fail-unknown-std.l: Updated.
* testsuite/gas/riscv/march-fail-unknown.l: Likewise.
2021-04-07 12:50:19 +08:00
|
|
|
|
2021-04-12 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-order-x-std.d: Renamed from
|
|
|
|
|
|
march-fail-porder-x-std.d.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-order-z-std.d: Renamed from
|
|
|
|
|
|
march-fail-porder-z-std.d.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-order-x-z.d: Renamed from
|
|
|
|
|
|
march-fail-porder-x-z.d.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-order-zx-std.l: Added to replace
|
|
|
|
|
|
march-fail-porder.l.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-order-x-z.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-order-x.l: Updated.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-order-z.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-single-prefix-h.d: Renamed from
|
|
|
|
|
|
march-fail-single-char-h.d.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-single-prefix-s.d: Renamed from
|
|
|
|
|
|
march-fail-single-char-s.d.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-single-prefix-x.d: Renamed from
|
|
|
|
|
|
march-fail-single-char-x.d.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-single-prefix-z.d: Renamed from
|
|
|
|
|
|
march-fail-single-char-z.d.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-single-prefix-zmx.d: Added.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-single-prefix.l: Added to replace
|
|
|
|
|
|
march-fail-single-prefix.l.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-unknown-zxm.d: Added.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-unknown-std.l: Updated.
|
|
|
|
|
|
* testsuite/gas/riscv/march-fail-unknown.l: Likewise.
|
|
|
|
|
|
|
AArch64: Fix Diagnostic messaging for LD/ST Exclusive.
A summary of what this patch set fixes:
For instructions
STXR w0,x2,[x0]
STLXR w0,x2,[x0]
The warning we emit currently is misleading:
Warning: unpredictable: identical transfer and status registers --`stlxr w0,x2,[x0]'
Warning: unpredictable: identical transfer and status registers --`stxr w0,x2,[x0]'
it ought to be:
Warning: unpredictable: identical base and status registers --`stlxr w0,x2,[x0]'
Warning: unpredictable: identical base and status registers --`stxr w0,x2,[x0]'
For instructions:
ldaxp x0,x0,[x0]
ldxp x0,x0,[x0]
The warning we emit is incorrect
Warning: unpredictable: identical transfer and status registers --`ldaxp x0,x0,[x0]'
Warning: unpredictable: identical transfer and status registers --`ldxp x0,x0,[x0]'
it ought to be:
Warning: unpredictable load of register pair -- `ldaxp x0,x0,[x0]'
Warning: unpredictable load of register pair -- `ldxp x0,x0,[x0]'
For instructions
stlxp w0, x2, x2, [x0]
stxp w0, x2, x2, [x0]
We don't emit any warning when it ought to be:
Warning: unpredictable: identical base and status registers --`stlxp w0,x2,x2,[x0]'
Warning: unpredictable: identical base and status registers --`stxp w0,x2,x2,[x0]'
gas/ChangeLog:
2021-04-09 Tejas Belagod <tejas.belagod@arm.com>
* config/tc-aarch64.c (warn_unpredictable_ldst): Clean-up diagnostic messages
for LD/ST Exclusive instructions.
* testsuite/gas/aarch64/diagnostic.s: Add a diagnostic test for STLXP.
* testsuite/gas/aarch64/diagnostic.l: Fix-up test after message clean-up.
2021-04-09 19:29:32 +08:00
|
|
|
|
2021-04-09 Tejas Belagod <tejas.belagod@arm.com>
|
|
|
|
|
|
|
2021-04-12 07:32:46 +08:00
|
|
|
|
* config/tc-aarch64.c (warn_unpredictable_ldst): Clean-up
|
|
|
|
|
|
diagnostic messages for LD/ST Exclusive instructions.
|
AArch64: Fix Diagnostic messaging for LD/ST Exclusive.
A summary of what this patch set fixes:
For instructions
STXR w0,x2,[x0]
STLXR w0,x2,[x0]
The warning we emit currently is misleading:
Warning: unpredictable: identical transfer and status registers --`stlxr w0,x2,[x0]'
Warning: unpredictable: identical transfer and status registers --`stxr w0,x2,[x0]'
it ought to be:
Warning: unpredictable: identical base and status registers --`stlxr w0,x2,[x0]'
Warning: unpredictable: identical base and status registers --`stxr w0,x2,[x0]'
For instructions:
ldaxp x0,x0,[x0]
ldxp x0,x0,[x0]
The warning we emit is incorrect
Warning: unpredictable: identical transfer and status registers --`ldaxp x0,x0,[x0]'
Warning: unpredictable: identical transfer and status registers --`ldxp x0,x0,[x0]'
it ought to be:
Warning: unpredictable load of register pair -- `ldaxp x0,x0,[x0]'
Warning: unpredictable load of register pair -- `ldxp x0,x0,[x0]'
For instructions
stlxp w0, x2, x2, [x0]
stxp w0, x2, x2, [x0]
We don't emit any warning when it ought to be:
Warning: unpredictable: identical base and status registers --`stlxp w0,x2,x2,[x0]'
Warning: unpredictable: identical base and status registers --`stxp w0,x2,x2,[x0]'
gas/ChangeLog:
2021-04-09 Tejas Belagod <tejas.belagod@arm.com>
* config/tc-aarch64.c (warn_unpredictable_ldst): Clean-up diagnostic messages
for LD/ST Exclusive instructions.
* testsuite/gas/aarch64/diagnostic.s: Add a diagnostic test for STLXP.
* testsuite/gas/aarch64/diagnostic.l: Fix-up test after message clean-up.
2021-04-09 19:29:32 +08:00
|
|
|
|
* testsuite/gas/aarch64/diagnostic.s: Add a diagnostic test for STLXP.
|
2021-04-12 07:32:46 +08:00
|
|
|
|
* testsuite/gas/aarch64/diagnostic.l: Fix-up test after message
|
|
|
|
|
|
clean-up.
|
AArch64: Fix Diagnostic messaging for LD/ST Exclusive.
A summary of what this patch set fixes:
For instructions
STXR w0,x2,[x0]
STLXR w0,x2,[x0]
The warning we emit currently is misleading:
Warning: unpredictable: identical transfer and status registers --`stlxr w0,x2,[x0]'
Warning: unpredictable: identical transfer and status registers --`stxr w0,x2,[x0]'
it ought to be:
Warning: unpredictable: identical base and status registers --`stlxr w0,x2,[x0]'
Warning: unpredictable: identical base and status registers --`stxr w0,x2,[x0]'
For instructions:
ldaxp x0,x0,[x0]
ldxp x0,x0,[x0]
The warning we emit is incorrect
Warning: unpredictable: identical transfer and status registers --`ldaxp x0,x0,[x0]'
Warning: unpredictable: identical transfer and status registers --`ldxp x0,x0,[x0]'
it ought to be:
Warning: unpredictable load of register pair -- `ldaxp x0,x0,[x0]'
Warning: unpredictable load of register pair -- `ldxp x0,x0,[x0]'
For instructions
stlxp w0, x2, x2, [x0]
stxp w0, x2, x2, [x0]
We don't emit any warning when it ought to be:
Warning: unpredictable: identical base and status registers --`stlxp w0,x2,x2,[x0]'
Warning: unpredictable: identical base and status registers --`stxp w0,x2,x2,[x0]'
gas/ChangeLog:
2021-04-09 Tejas Belagod <tejas.belagod@arm.com>
* config/tc-aarch64.c (warn_unpredictable_ldst): Clean-up diagnostic messages
for LD/ST Exclusive instructions.
* testsuite/gas/aarch64/diagnostic.s: Add a diagnostic test for STLXP.
* testsuite/gas/aarch64/diagnostic.l: Fix-up test after message clean-up.
2021-04-09 19:29:32 +08:00
|
|
|
|
|
2021-04-06 17:33:35 +08:00
|
|
|
|
2021-04-09 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/prefix-pcrel.d: Update expected output.
|
|
|
|
|
|
* testsuite/gas/ppc/prefix-reloc.d: Likewise.
|
|
|
|
|
|
* gas/testsuite/gas/ppc/vsx_32byte.d: Likewise.
|
|
|
|
|
|
|
PR27676, PowerPC missing extended dcbt, dcbtst mnemonics
Note that this doesn't implement the ISA to the letter regarding
dcbtds (and dcbtstds), which says that the TH field may be zero. That
doesn't make sense because allowing TH=0 would mean you no long have a
dcbtds but rather a dcbtct instruction. I'm interpreting the ISA
wording about allowing TH=0 to mean that the TH field of dcbtds is
optional (in which case the TH value is 0b1000).
opcodes/
PR 27676
* ppc-opc.c (DCBT_EO): Move earlier.
(insert_thct, extract_thct, insert_thds, extract_thds): New functions.
(powerpc_operands): Add THCT and THDS entries.
(powerpc_opcodes): Add dcbtstct, dcbtstds, dcbna, dcbtct, dcbtds.
gas/
* testsuite/gas/ppc/pr27676.d,
* testsuite/gas/ppc/pr27676.s: New test.
* testsuite/gas/ppc/ppc.exp: Run it.
* testsuite/gas/ppc/dcbt.d: Update.
* testsuite/gas/ppc/power4_32.d: Update.
2021-04-05 06:47:06 +08:00
|
|
|
|
2021-04-08 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/pr27676.d,
|
|
|
|
|
|
* testsuite/gas/ppc/pr27676.s: New test.
|
|
|
|
|
|
* testsuite/gas/ppc/ppc.exp: Run it.
|
|
|
|
|
|
* testsuite/gas/ppc/dcbt.d: Update.
|
|
|
|
|
|
* testsuite/gas/ppc/power4_32.d: Update.
|
|
|
|
|
|
|
2021-04-07 16:42:38 +08:00
|
|
|
|
2021-04-07 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27217
|
|
|
|
|
|
* testsuite/gas/aarch64/pr27217.d: Correct name. Accept ilp32 relocs.
|
|
|
|
|
|
|
2021-04-06 20:27:50 +08:00
|
|
|
|
2021-04-06 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27217
|
|
|
|
|
|
* config/tc-aarch64.c (my_get_expression): Rename to
|
|
|
|
|
|
aarch64_get_expression. Add a fifth argument to enable deferring
|
|
|
|
|
|
of expression resolution.
|
|
|
|
|
|
(parse_typed_reg): Update calls to my_get_expression.
|
|
|
|
|
|
(parse_vector_reg_list): Likewise.
|
|
|
|
|
|
(parse_immediate_expression): Likewise.
|
|
|
|
|
|
(parse_big_immediate): Likewise.
|
|
|
|
|
|
(parse_shift): Likewise.
|
|
|
|
|
|
(parse_shifter_operand_imm): Likewise.
|
|
|
|
|
|
(parse_operands): Likewise.
|
|
|
|
|
|
(parse_shifter_operand_reloc): Update calls to my_get_expression
|
|
|
|
|
|
and call aarch64_force_reloc to determine the value of the new
|
|
|
|
|
|
fifth argument.
|
|
|
|
|
|
(parse_address_main): Likewise.
|
|
|
|
|
|
(parse_half): Likewise.
|
|
|
|
|
|
(parse_adrp): Likewise.
|
|
|
|
|
|
(aarch64_force_reloc): New function. Contains code extracted from...
|
|
|
|
|
|
(aarch64_force_relocation): ... here.
|
|
|
|
|
|
* testsuite/gas/aarch64/pr27217.s: New test case.
|
|
|
|
|
|
* testsuite/gas/aarch64/pr27217.d: New test driver.
|
|
|
|
|
|
|
2021-04-06 16:56:30 +08:00
|
|
|
|
2021-04-06 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* write.c (fixup_segment): Move add_symbol_segment declaration
|
|
|
|
|
|
into main loop.
|
|
|
|
|
|
|
C99 gas configury
Also remove alloca stuff since we don't use alloca in gas nowadays.
* configure.ac: Don't check for string.h, strings.h, stdlib.h,
errno.h, limits.h, locale.h or time.h. Don't check for unlink,
remove, sbrk (unused) or setlocale. Adjust gas_test_headers.
Don't check for errno, free, malloc, realoc, sbrk, strstr, getenv
strstr, or vsnprintf declarations.
(AC_ISC_POSIX, AC_FUNC_ALLOCA, AC_C_INLINE): Don't invoke.
* as.h: Don't include alloca-conf.h, include config.h instead.
Include string.h, stdlib.h, errno.h unconditionally. Remove
various fallback declarations.
* asintl.h: Don't test HAVE_LOCALE_H.
* as.c: Don't test HAVE_SETLOCALE.
* dwarf2dbg.c: Include limits.h unconditionally.
* expr.c: Likewise.
* sb.c: Likewise.
* symbols.c: Likewise.
* config/tc-cr16.c: Likewise.
* config/tc-d30v.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-tic54x.c (tic54x_mlib): Call remove rather than unlink.
* config.in: Regenerate.
* configure: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
2021-04-05 14:01:25 +08:00
|
|
|
|
2021-04-05 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.ac: Don't check for string.h, strings.h, stdlib.h,
|
|
|
|
|
|
errno.h, limits.h, locale.h or time.h. Don't check for unlink,
|
|
|
|
|
|
remove, sbrk (unused) or setlocale. Adjust gas_test_headers.
|
|
|
|
|
|
Don't check for errno, free, malloc, realoc, sbrk, strstr, getenv
|
|
|
|
|
|
strstr, or vsnprintf declarations.
|
|
|
|
|
|
(AC_ISC_POSIX, AC_FUNC_ALLOCA, AC_C_INLINE): Don't invoke.
|
|
|
|
|
|
* as.h: Don't include alloca-conf.h, include config.h instead.
|
|
|
|
|
|
Include string.h, stdlib.h, errno.h unconditionally. Remove
|
|
|
|
|
|
various fallback declarations.
|
|
|
|
|
|
* asintl.h: Don't test HAVE_LOCALE_H.
|
|
|
|
|
|
* as.c: Don't test HAVE_SETLOCALE.
|
|
|
|
|
|
* dwarf2dbg.c: Include limits.h unconditionally.
|
|
|
|
|
|
* expr.c: Likewise.
|
|
|
|
|
|
* sb.c: Likewise.
|
|
|
|
|
|
* symbols.c: Likewise.
|
|
|
|
|
|
* config/tc-cr16.c: Likewise.
|
|
|
|
|
|
* config/tc-d30v.c: Likewise.
|
|
|
|
|
|
* config/tc-i386.c: Likewise.
|
|
|
|
|
|
* config/tc-ia64.c: Likewise.
|
|
|
|
|
|
* config/tc-tic54x.c (tic54x_mlib): Call remove rather than unlink.
|
|
|
|
|
|
* config.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* doc/Makefile.in: Regenerate.
|
|
|
|
|
|
|
2021-03-22 21:56:16 +08:00
|
|
|
|
2021-04-01 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* config/obj-coff.c (strneq): Remove strneq and use startswith.
|
|
|
|
|
|
(weak_is_altname): Likewise.
|
|
|
|
|
|
(obj_coff_section): Likewise.
|
|
|
|
|
|
* config/tc-cr16.c (process_label_constant): Likewise.
|
|
|
|
|
|
* config/tc-crx.c (strneq): Likewise.
|
|
|
|
|
|
|
2021-03-22 20:33:04 +08:00
|
|
|
|
2021-04-01 Martin Liska <mliska@suse.cz>
|
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|
|
* as.c (select_emulation_mode): Use startswith.
|
|
|
|
|
|
* config/m68k-parse.y: Likewise.
|
|
|
|
|
|
* config/obj-aout.c (obj_aout_type): Likewise.
|
|
|
|
|
|
* config/obj-elf.c (elf_common_parse): Likewise.
|
|
|
|
|
|
(obj_elf_section_type): Likewise.
|
|
|
|
|
|
(obj_elf_section_word): Likewise.
|
|
|
|
|
|
(obj_elf_section): Likewise.
|
|
|
|
|
|
(obj_elf_symver): Likewise.
|
|
|
|
|
|
(adjust_stab_sections): Likewise.
|
|
|
|
|
|
* config/obj-evax.c (evax_shorten_name): Likewise.
|
|
|
|
|
|
* config/obj-macho.c (obj_mach_o_is_frame_section): Likewise.
|
|
|
|
|
|
* config/tc-aarch64.c (parse_aarch64_imm_float): Likewise.
|
|
|
|
|
|
(aarch64_parse_features): Likewise.
|
|
|
|
|
|
(create_register_alias): Likewise.
|
|
|
|
|
|
(aarch64_data_in_code): Likewise.
|
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
|
* config/tc-alpha.c (s_alpha_section_word): Likewise.
|
|
|
|
|
|
(s_alpha_pdesc): Likewise.
|
|
|
|
|
|
* config/tc-arc.c (tokenize_extregister): Likewise.
|
|
|
|
|
|
* config/tc-arm.c (create_register_alias): Likewise.
|
|
|
|
|
|
(create_neon_reg_alias): Likewise.
|
|
|
|
|
|
(parse_ifimm_zero): Likewise.
|
|
|
|
|
|
(parse_qfloat_immediate): Likewise.
|
|
|
|
|
|
(arm_elf_section_type): Likewise.
|
|
|
|
|
|
(arm_parse_extension): Likewise.
|
|
|
|
|
|
(aeabi_set_public_attributes): Likewise.
|
|
|
|
|
|
(s_arm_arch_extension): Likewise.
|
|
|
|
|
|
(arm_data_in_code): Likewise.
|
|
|
|
|
|
(start_unwind_section): Likewise.
|
|
|
|
|
|
* config/tc-avr.c (avr_ldi_expression): Likewise.
|
|
|
|
|
|
* config/tc-csky.c (is_freglist_legal): Likewise.
|
|
|
|
|
|
(csky_s_section): Likewise.
|
|
|
|
|
|
* config/tc-d30v.c (do_assemble): Likewise.
|
|
|
|
|
|
* config/tc-dlx.c (parse_operand): Likewise.
|
|
|
|
|
|
* config/tc-epiphany.c (md_assemble): Likewise.
|
|
|
|
|
|
* config/tc-h8300.c (h8300_elf_section): Likewise.
|
|
|
|
|
|
(get_operand): Likewise.
|
|
|
|
|
|
* config/tc-hppa.c (pa_ip): Likewise.
|
|
|
|
|
|
(pa_level): Likewise.
|
|
|
|
|
|
(pa_space): Likewise.
|
|
|
|
|
|
* config/tc-i386.c (i386_mach): Likewise.
|
|
|
|
|
|
(md_assemble): Likewise.
|
|
|
|
|
|
(check_VecOperations): Likewise.
|
|
|
|
|
|
(i386_target_format): Likewise.
|
|
|
|
|
|
(i386_elf_section_type): Likewise.
|
|
|
|
|
|
* config/tc-ia64.c (start_unwind_section): Likewise.
|
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
|
(is_taken_branch): Likewise.
|
|
|
|
|
|
(idesc->name,): Likewise.
|
|
|
|
|
|
(note_register_values): Likewise.
|
|
|
|
|
|
(do_alias): Likewise.
|
|
|
|
|
|
* config/tc-m32c.c (insn_to_subtype): Likewise.
|
|
|
|
|
|
* config/tc-m68hc11.c (get_operand): Likewise.
|
|
|
|
|
|
(md_assemble): Likewise.
|
|
|
|
|
|
* config/tc-m68k.c (m68k_ip): Likewise.
|
|
|
|
|
|
(m68k_elf_suffix): Likewise.
|
|
|
|
|
|
* config/tc-mcore.c (mcore_s_section): Likewise.
|
|
|
|
|
|
* config/tc-metag.c (parse_get_set): Likewise.
|
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
|
* config/tc-microblaze.c (parse_imm): Likewise.
|
|
|
|
|
|
(check_got): Likewise.
|
|
|
|
|
|
(md_apply_fix): Likewise.
|
|
|
|
|
|
* config/tc-mips.c (CPU_HAS_MIPS16): Likewise.
|
|
|
|
|
|
(md_begin): Likewise.
|
|
|
|
|
|
(s_is_linkonce): Likewise.
|
|
|
|
|
|
(check_regno): Likewise.
|
|
|
|
|
|
(match_float_constant): Likewise.
|
|
|
|
|
|
(classify_vr4120_insn): Likewise.
|
|
|
|
|
|
(match_insn): Likewise.
|
|
|
|
|
|
(mips_after_parse_args): Likewise.
|
|
|
|
|
|
(s_change_sec): Likewise.
|
|
|
|
|
|
(s_option): Likewise.
|
|
|
|
|
|
(parse_code_option): Likewise.
|
|
|
|
|
|
(md_section_align): Likewise.
|
|
|
|
|
|
(nopic_need_relax): Likewise.
|
|
|
|
|
|
* config/tc-mmix.c (mmix_handle_mmixal): Likewise.
|
|
|
|
|
|
* config/tc-mn10300.c (mn10300_fix_adjustable): Likewise.
|
|
|
|
|
|
(mn10300_end_of_match): Likewise.
|
|
|
|
|
|
* config/tc-msp430.c (msp430_make_init_symbols): Likewise.
|
|
|
|
|
|
* config/tc-nds32.c (nds32_parse_option): Likewise.
|
|
|
|
|
|
* config/tc-nds32.h (md_do_align): Likewise.
|
|
|
|
|
|
* config/tc-nios2.c (strprefix): Likewise.
|
|
|
|
|
|
(nios2_special_relocation_p): Likewise.
|
|
|
|
|
|
(nios2_parse_base_register): Likewise.
|
|
|
|
|
|
(nios2_cons): Likewise.
|
|
|
|
|
|
* config/tc-ns32k.c (addr_mode): Likewise.
|
|
|
|
|
|
* config/tc-pdp11.c (set_option): Likewise.
|
|
|
|
|
|
(parse_reg): Likewise.
|
|
|
|
|
|
(parse_ac5): Likewise.
|
|
|
|
|
|
(parse_op_no_deferred): Likewise.
|
|
|
|
|
|
(set_cpu_model): Likewise.
|
|
|
|
|
|
(set_machine_model): Likewise.
|
|
|
|
|
|
* config/tc-pj.c (md_operand): Likewise.
|
|
|
|
|
|
* config/tc-ppc.c (ppc_set_cpu): Likewise.
|
|
|
|
|
|
(ppc_arch): Likewise.
|
|
|
|
|
|
(ppc_section_type): Likewise.
|
|
|
|
|
|
* config/tc-s12z.c (tb_reg_rel): Likewise.
|
|
|
|
|
|
(tb_opr_rel): Likewise.
|
|
|
|
|
|
* config/tc-s390.c (s390_parse_cpu): Likewise.
|
|
|
|
|
|
(md_parse_option): Likewise.
|
|
|
|
|
|
* config/tc-score.c (s3_nopic_need_relax): Likewise.
|
|
|
|
|
|
(s3_pic_need_relax): Likewise.
|
|
|
|
|
|
* config/tc-score7.c (s7_nopic_need_relax): Likewise.
|
|
|
|
|
|
(s7_pic_need_relax): Likewise.
|
|
|
|
|
|
* config/tc-sh.h (SUB_SEGMENT_ALIGN): Likewise.
|
|
|
|
|
|
* config/tc-sparc.c (md_parse_option): Likewise.
|
|
|
|
|
|
(sparc_ip): Likewise.
|
|
|
|
|
|
(s_reserve): Likewise.
|
|
|
|
|
|
(s_common): Likewise.
|
|
|
|
|
|
(s_seg): Likewise.
|
|
|
|
|
|
(sparc_cons): Likewise.
|
|
|
|
|
|
* config/tc-tic54x.c (stag_add_field): Likewise.
|
|
|
|
|
|
(tic54x_endstruct): Likewise.
|
|
|
|
|
|
* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
|
|
|
|
|
|
* config/tc-v850.c (v850_comm): Likewise.
|
|
|
|
|
|
(md_begin): Likewise.
|
|
|
|
|
|
(md_assemble): Likewise.
|
|
|
|
|
|
* config/tc-vax.c (vax_cons): Likewise.
|
|
|
|
|
|
* config/tc-wasm32.c (wasm32_leb128): Likewise.
|
|
|
|
|
|
* config/tc-xstormy16.c (md_operand): Likewise.
|
|
|
|
|
|
* config/tc-xtensa.c (get_directive): Likewise.
|
|
|
|
|
|
(xg_instruction_matches_option_term): Likewise.
|
|
|
|
|
|
(is_unaligned_label): Likewise.
|
|
|
|
|
|
(cache_literal_section): Likewise.
|
|
|
|
|
|
* config/xtensa-relax.c (parse_precond): Likewise.
|
|
|
|
|
|
(parse_option_cond): Likewise.
|
|
|
|
|
|
(transition_applies): Likewise.
|
|
|
|
|
|
(wide_branch_opcode): Likewise.
|
|
|
|
|
|
* dw2gencfi.c: Likewise.
|
|
|
|
|
|
* dwarf2dbg.c (dwarf2_directive_filename): Likewise.
|
|
|
|
|
|
* ehopt.c (get_cie_info): Likewise.
|
|
|
|
|
|
* input-file.c (input_file_open): Likewise.
|
|
|
|
|
|
* listing.c (listing_newline): Likewise.
|
|
|
|
|
|
(debugging_pseudo): Likewise.
|
|
|
|
|
|
* read.c (read_a_source_file): Likewise.
|
|
|
|
|
|
* write.c (adjust_reloc_syms): Likewise.
|
|
|
|
|
|
(compress_debug): Likewise.
|
|
|
|
|
|
(maybe_generate_build_notes): Likewise.
|
|
|
|
|
|
|
2021-03-31 15:45:46 +08:00
|
|
|
|
2021-03-31 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* itbl-lex-wrapper.c: Include as.h not sysdep.h.
|
|
|
|
|
|
* config/bfin-lex-wrapper.c: Likewise.
|
|
|
|
|
|
* itbl-lex.l: Don't include as.h.
|
|
|
|
|
|
* config/bfin-lex.l: Likewise.
|
|
|
|
|
|
|
Use bool in gas
* as.h (POISON_BFD_BOOLEAN): Define.
* as.c, * as.h, * atof-generic.c, * config/atof-ieee.c,
* config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c,
* config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c,
* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
* config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h,
* config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c,
* config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c,
* config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c,
* config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h,
* config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c,
* config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h,
* config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c,
* config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c,
* config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c,
* config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h,
* config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c,
* config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h,
* config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c,
* config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h,
* config/tc-metag.c, * config/tc-metag.h,
* config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h,
* config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c,
* config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c,
* config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h,
* config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c,
* config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h,
* config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c,
* config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h,
* config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c,
* config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c,
* config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c,
* config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c,
* config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c,
* config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h,
* config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c,
* config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c,
* config/tc-xstormy16.c, * config/tc-xstormy16.h,
* config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c,
* config/tc-z8k.c, * config/xtensa-istack.h,
* config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c,
* dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c,
* frags.h, * listing.c, * macro.c, * output-file.c, * read.c,
* read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean
with bool, FALSE with false, and TRUE with true.
2021-03-31 08:12:05 +08:00
|
|
|
|
2021-03-31 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* as.h (POISON_BFD_BOOLEAN): Define.
|
|
|
|
|
|
* as.c, * as.h, * atof-generic.c, * config/atof-ieee.c,
|
|
|
|
|
|
* config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c,
|
|
|
|
|
|
* config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c,
|
|
|
|
|
|
* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
|
|
|
|
|
|
* config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h,
|
|
|
|
|
|
* config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c,
|
|
|
|
|
|
* config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c,
|
|
|
|
|
|
* config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c,
|
|
|
|
|
|
* config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h,
|
|
|
|
|
|
* config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c,
|
|
|
|
|
|
* config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h,
|
|
|
|
|
|
* config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c,
|
|
|
|
|
|
* config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c,
|
|
|
|
|
|
* config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c,
|
|
|
|
|
|
* config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h,
|
|
|
|
|
|
* config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c,
|
|
|
|
|
|
* config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h,
|
|
|
|
|
|
* config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c,
|
|
|
|
|
|
* config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h,
|
|
|
|
|
|
* config/tc-metag.c, * config/tc-metag.h,
|
|
|
|
|
|
* config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h,
|
|
|
|
|
|
* config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c,
|
|
|
|
|
|
* config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c,
|
|
|
|
|
|
* config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h,
|
|
|
|
|
|
* config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c,
|
|
|
|
|
|
* config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h,
|
|
|
|
|
|
* config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c,
|
|
|
|
|
|
* config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h,
|
|
|
|
|
|
* config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c,
|
|
|
|
|
|
* config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c,
|
|
|
|
|
|
* config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c,
|
|
|
|
|
|
* config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c,
|
|
|
|
|
|
* config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c,
|
|
|
|
|
|
* config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h,
|
|
|
|
|
|
* config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c,
|
|
|
|
|
|
* config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c,
|
|
|
|
|
|
* config/tc-xstormy16.c, * config/tc-xstormy16.h,
|
|
|
|
|
|
* config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c,
|
|
|
|
|
|
* config/tc-z8k.c, * config/xtensa-istack.h,
|
|
|
|
|
|
* config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c,
|
|
|
|
|
|
* dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c,
|
|
|
|
|
|
* frags.h, * listing.c, * macro.c, * output-file.c, * read.c,
|
|
|
|
|
|
* read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean
|
|
|
|
|
|
with bool, FALSE with false, and TRUE with true.
|
|
|
|
|
|
|
2021-03-31 07:37:02 +08:00
|
|
|
|
2021-03-31 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-aarch64.c: Include stdint.h in place of bfd_stdint.h.
|
|
|
|
|
|
* config/tc-crx.c: Likewise.
|
|
|
|
|
|
* config/tc-nds32.h: Likewise.
|
|
|
|
|
|
|
2021-03-30 20:09:41 +08:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (build_modrm_byte): Change return type.
|
|
|
|
|
|
Change type of "default_seg". Use NULL. Adjust setting of
|
|
|
|
|
|
"default_seg".
|
|
|
|
|
|
(reg_ds, reg_es, reg_ss): New.
|
|
|
|
|
|
(struct _i386_insn): Change type of seg[].
|
|
|
|
|
|
(md_begin): Initialize reg_ds, reg_es, and reg_ss.
|
|
|
|
|
|
(swap_operands): Change type of "temp_seg".
|
|
|
|
|
|
(check_string): Adjust %es check.
|
|
|
|
|
|
(process_operands): Change type of "default_seg". Use NULL.
|
|
|
|
|
|
Adjust segment override processing..
|
|
|
|
|
|
(i386_att_operand): Adjust segment override handling.
|
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_operand): Likewise.
|
|
|
|
|
|
|
2021-03-30 20:08:48 +08:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (reg_eax): New.
|
|
|
|
|
|
(md_begin): Initialize reg_eax.
|
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_simplify_register): Use
|
|
|
|
|
|
reg_eax.
|
|
|
|
|
|
(i386_intel_simplify): Likewise.
|
|
|
|
|
|
|
2021-03-30 20:08:11 +08:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (reg_st0): New.
|
|
|
|
|
|
(md_begin): Convert to switch(). Initialize reg_st0. Don't
|
|
|
|
|
|
insert other st(N).
|
|
|
|
|
|
(parse_real_register): Adjust st(N) processing.
|
|
|
|
|
|
|
2021-03-30 20:06:37 +08:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (rc_op): Delete.
|
|
|
|
|
|
(struct Rounding_Operation): Move ...
|
|
|
|
|
|
(struct _i386_insn): ... here. Change field "rounding".
|
|
|
|
|
|
(build_evex_prefix): Adjust rounding processing.
|
|
|
|
|
|
(swap_2_operands): Likewise.
|
|
|
|
|
|
(check_VecOperands): Likewise.
|
|
|
|
|
|
(RC_SAE_immediate): Likewise.
|
|
|
|
|
|
(optimize_encoding): Adjust check for rounding.
|
|
|
|
|
|
(build_modrm_byte): Likewise.
|
|
|
|
|
|
(output_imm): Likewise.
|
|
|
|
|
|
(md_assemble): Initialize rounding type.
|
|
|
|
|
|
|
2021-03-30 20:06:09 +08:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (broadcast_op): Delete.
|
|
|
|
|
|
(struct Broadcast_Operation): Move ...
|
|
|
|
|
|
(struct _i386_insn): ... here. Change field "broadcast".
|
|
|
|
|
|
(match_mem_size): Adjust check for broadcast.
|
|
|
|
|
|
(optimize_encoding): Likewise.
|
|
|
|
|
|
(process_suffix): Likewise.
|
|
|
|
|
|
(build_evex_prefix): Adjust broadcast processing.
|
|
|
|
|
|
(swap_2_operands): Likewise.
|
|
|
|
|
|
(check_VecOperations): Likewise.
|
|
|
|
|
|
(match_template): Likewise.
|
|
|
|
|
|
(check_VecOperands): Likewise.
|
|
|
|
|
|
|
2021-03-30 20:05:42 +08:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (reg_k0): New.
|
|
|
|
|
|
(mask_op): Delete.
|
|
|
|
|
|
(struct Mask_Operation): Move ...
|
|
|
|
|
|
(struct _i386_insn): ... here. Change field "mask".
|
|
|
|
|
|
(md_begin): Initialize reg_k0.
|
|
|
|
|
|
(build_evex_prefix): Adjust mask processing.
|
|
|
|
|
|
(swap_2_operands): Likewise.
|
|
|
|
|
|
(check_VecOperands): Likewise.
|
|
|
|
|
|
(check_VecOperations): Likewise.
|
|
|
|
|
|
(optimize_encoding): Adjust checks for masking.
|
|
|
|
|
|
(output_insn): Likewise.
|
|
|
|
|
|
|
2021-03-30 20:05:10 +08:00
|
|
|
|
2021-03-30 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (swap_2_operands): Switch parameters to
|
|
|
|
|
|
unsigned.
|
|
|
|
|
|
(struct RC_Operation): Switch operand field to unsigned.
|
|
|
|
|
|
(struct Mask_Operation): Likewise.
|
|
|
|
|
|
(struct Broadcast_Operation): Likewise.
|
|
|
|
|
|
(build_evex_prefix): Drop cast.
|
|
|
|
|
|
(check_VecOperands): Likewise.
|
|
|
|
|
|
(build_modrm_byte): Likewise.
|
|
|
|
|
|
(output_imm): Likewise.
|
|
|
|
|
|
(check_VecOperations): Add casts to unsigned.
|
|
|
|
|
|
|
2021-03-29 18:06:09 +08:00
|
|
|
|
2021-03-29 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-sse2avx.s: Add vpsadbw case.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-avx-swap-2.d.
|
|
|
|
|
|
testsuite/gas/i386/x86-64-sse2avx.d: Adjust expectations.
|
|
|
|
|
|
|
2021-03-29 18:02:50 +08:00
|
|
|
|
2021-03-29 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (optimize_encoding): Replace VEX-encoding
|
|
|
|
|
|
checks by opcodespace ones.
|
|
|
|
|
|
(insert_lfence_before): Likewise.
|
|
|
|
|
|
(maybe_fused_with_jcc_p): Likewise.
|
|
|
|
|
|
(add_branch_padding_frag_p): Likewise.
|
|
|
|
|
|
(output_disp): Likewise.
|
|
|
|
|
|
(load_insn_p): Re-arrange checks to key applicable ones off of
|
|
|
|
|
|
an opcodespace check.
|
|
|
|
|
|
(md_assemble): Adjust opcode checks.
|
|
|
|
|
|
(check_byte_reg): Likewise.
|
|
|
|
|
|
(process_operands): Likewise.
|
|
|
|
|
|
(i386_index_check): Likewise.
|
|
|
|
|
|
(process_suffix): Likewise. New local variable is_movx. Adjust
|
|
|
|
|
|
movsx/movzx and crc32 handling.
|
|
|
|
|
|
(output_insn): Adjust opcode checks. Drop no longer reachable
|
|
|
|
|
|
case labels. Output legacy encoding prefixes in addition to the
|
|
|
|
|
|
base_opcode byte(s). Rework counting of prefixes for extended
|
|
|
|
|
|
opcode maps.
|
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_simplify_register): Adjust
|
|
|
|
|
|
opcode checks.
|
|
|
|
|
|
|
TRUE/FALSE simplification
There is really no need to write code like "foo != 0 ? TRUE : FALSE"
unless we had stupidly defined FALSE as something other than 0 or TRUE
as something other than 1. The simpler "foo != 0" does just as well.
Similarly "(condition == TRUE)" or "(condition == FALSE) can be
simplified to "(condition)" and "(!condition)" respectively.
I'll note that there is reason to use "integer_expression != 0" when
assigning a bfd_boolean rather than the simpler "integer_expression",
if you expect the variable to have 0 or 1 value. It's probably even a
good idea to not rely on implicit conversion if bfd_boolean were _Bool.
bfd/
* aoutx.h (aout_link_write_symbols): Don't cast boolean expression
to bfd_boolean.
* elf32-or1k.c (or1k_set_got_and_rela_sizes): Dont compare booleans
against FALSE.
* elf32-arc.c (name_for_global_symbol): Don't compare boolean to TRUE.
(is_reloc_PC_relative): Don't use "boolean_condition ? TRUE : FALSE".
(is_reloc_SDA_relative, is_reloc_for_GOT): Likewise.
(is_reloc_for_PLT, is_reloc_for_TLS): Likewise.
* elf32-arm.c (stm32l4xx_need_create_replacing_stub): Likewise.
* elf32-nds32.c (insert_nds32_elf_blank): Likewise.
* elf32-rx.c (rx_set_section_contents): Likewise.
* elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Likewise.
* elfxx-mips.c (_bfd_mips_elf_ignore_undef_symbol): Likewise.
* mach-o.c (bfd_mach_o_read_command): Likewise.
* targets.c (bfd_get_target_info): Likewise.
binutils/
* dlltool.c (main): Don't use "boolean_condition ? TRUE : FALSE".
* dwarf.c (read_and_display_attr_value): Likewise.
(display_debug_str_offsets): Likewise.
* objdump.c (dump_bfd): Likewise.
* readelf.c (dump_section_as_strings): Likewise.
(dump_section_as_bytes): Likewise.
gas/
* atof-generic.c (FALSE, TRUE): Don't define.
* config/obj-elf.h (FALSE, TRUE): Don't define.
* config/obj-som.h (FALSE, TRUE): Don't define.
* config/tc-hppa.h (FALSE, TRUE): Don't define.
* config/tc-pdp11.c (FALSE, TRUE): Don't define.
* config/tc-iq2000.h (obj_fix_adjustable): Delete.
* config/tc-m32r.h (TC_FIX_ADJUSTABLE): Delete.
* config/tc-mt.h (obj_fix_adjustable): Delete.
* config/tc-nds32.h (TC_FIX_ADJUSTABLE): Delete.
* config/tc-arc.c (parse_opcode_flags): Simplify boolean expression.
(relaxable_flag, relaxable_operand, assemble_insn): Likewise.
(tokenize_extregister): Likewise.
* config/tc-csky.c (parse_opcode, get_operand_value): Likewise.
(parse_operands_op, parse_operands, md_assemble): Likewise.
* config/tc-d10v.c (build_insn): Likewise.
* config/tc-score.c (s3_gen_insn_frag): Likewise.
* config/tc-score7.c (s7_gen_insn_frag, s7_relax_frag): Likewise.
* config/tc-tic6x.c (tic6x_update_features, md_assemble): Likewise.
* config/tc-z80.c (emit_byte): Likewise.
include/
* opcode/aarch64.h (alias_opcode_p): Simplify boolean expression.
(opcode_has_alias, pseudo_opcode_p, optional_operand_p): Likewise.
(opcode_has_special_coder): Likewise.
ld/
* emultempl/aix.em (gld${EMULATION_NAME}_before_allocation): Simplify
boolean expression.
* lexsup.c (parse_args): Likewise.
* pe-dll.c (pe_dll_id_target): Likewise.
opcodes/
* aarch64-opc.c (vector_qualifier_p): Simplify boolean expression.
(fp_qualifier_p, get_data_pattern): Likewise.
(aarch64_get_operand_modifier_from_value): Likewise.
(aarch64_extend_operator_p, aarch64_shift_operator_p): Likewise.
(operand_variant_qualifier_p): Likewise.
(qualifier_value_in_range_constraint_p): Likewise.
(aarch64_get_qualifier_esize): Likewise.
(aarch64_get_qualifier_nelem): Likewise.
(aarch64_get_qualifier_standard_value): Likewise.
(get_lower_bound, get_upper_bound): Likewise.
(aarch64_find_best_match, match_operands_qualifier): Likewise.
(aarch64_print_operand): Likewise.
* aarch64-opc.h (operand_has_inserter, operand_has_extractor): Likewise.
(operand_need_sign_extension, operand_need_shift_by_two): Likewise.
(operand_need_shift_by_four, operand_maybe_stack_pointer): Likewise.
* arm-dis.c (print_insn_mve, print_insn_thumb32): Likewise.
* tic6x-dis.c (tic6x_check_fetch_packet_header): Likewise.
(print_insn_tic6x): Likewise.
2021-03-29 07:22:56 +08:00
|
|
|
|
2021-03-29 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* atof-generic.c (FALSE, TRUE): Don't define.
|
|
|
|
|
|
* config/obj-elf.h (FALSE, TRUE): Don't define.
|
|
|
|
|
|
* config/obj-som.h (FALSE, TRUE): Don't define.
|
|
|
|
|
|
* config/tc-hppa.h (FALSE, TRUE): Don't define.
|
|
|
|
|
|
* config/tc-pdp11.c (FALSE, TRUE): Don't define.
|
|
|
|
|
|
* config/tc-iq2000.h (obj_fix_adjustable): Delete.
|
|
|
|
|
|
* config/tc-m32r.h (TC_FIX_ADJUSTABLE): Delete.
|
|
|
|
|
|
* config/tc-mt.h (obj_fix_adjustable): Delete.
|
|
|
|
|
|
* config/tc-nds32.h (TC_FIX_ADJUSTABLE): Delete.
|
|
|
|
|
|
* config/tc-arc.c (parse_opcode_flags): Simplify boolean expression.
|
|
|
|
|
|
(relaxable_flag, relaxable_operand, assemble_insn): Likewise.
|
|
|
|
|
|
(tokenize_extregister): Likewise.
|
|
|
|
|
|
* config/tc-csky.c (parse_opcode, get_operand_value): Likewise.
|
|
|
|
|
|
(parse_operands_op, parse_operands, md_assemble): Likewise.
|
|
|
|
|
|
* config/tc-d10v.c (build_insn): Likewise.
|
|
|
|
|
|
* config/tc-score.c (s3_gen_insn_frag): Likewise.
|
|
|
|
|
|
* config/tc-score7.c (s7_gen_insn_frag, s7_relax_frag): Likewise.
|
|
|
|
|
|
* config/tc-tic6x.c (tic6x_update_features, md_assemble): Likewise.
|
|
|
|
|
|
* config/tc-z80.c (emit_byte): Likewise.
|
|
|
|
|
|
|
gas int vs bfd_boolean fixes
* config/tc-arm.c (struct arm_long_option_table <func>): Return
bfd_boolean.
* config/tc-arm.h (arm_optimize_expr, arm_data_in_code): Likewise.
* config/tc-metag.c (parse_mov_port): Replace unsigned int variable
with bfd_boolean.
(parse_mmov, parse_mov_ct, parse_alu, parse_shift, parse_bitop),
(parse_cmp, parse_fmmov, parse_fmov_data, parse_fearith),
(parse_dget_set, parse_dalu): Likewise, ensuring assignment from
logical expressions.
(struct metag_long_option <func>): Return bfd_boolean.
(metag_parse_cpu, metag_parse_fpu, metag_parse_dsp): Likewise.
* config/tc-msp430.c (msp430_dstoperand): Correct dummy type.
* config/tc-s12z.c (parse_operand_func): Return bfd_boolean.
(no_operands, lex_force_match, lex_reg_list): Likewise.
(size_from_suffix): Return int.
(s12z_relax_frag, md_estimate_size_before_relax): Return 0.
* config/tc-s12z.h (tc_s12z_fix_adjustable): Likewise.
2021-03-29 07:19:35 +08:00
|
|
|
|
2021-03-29 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-arm.c (struct arm_long_option_table <func>): Return
|
|
|
|
|
|
bfd_boolean.
|
|
|
|
|
|
* config/tc-arm.h (arm_optimize_expr, arm_data_in_code): Likewise.
|
|
|
|
|
|
* config/tc-metag.c (parse_mov_port): Replace unsigned int variable
|
|
|
|
|
|
with bfd_boolean.
|
|
|
|
|
|
(parse_mmov, parse_mov_ct, parse_alu, parse_shift, parse_bitop),
|
|
|
|
|
|
(parse_cmp, parse_fmmov, parse_fmov_data, parse_fearith),
|
|
|
|
|
|
(parse_dget_set, parse_dalu): Likewise, ensuring assignment from
|
|
|
|
|
|
logical expressions.
|
|
|
|
|
|
(struct metag_long_option <func>): Return bfd_boolean.
|
|
|
|
|
|
(metag_parse_cpu, metag_parse_fpu, metag_parse_dsp): Likewise.
|
|
|
|
|
|
* config/tc-msp430.c (msp430_dstoperand): Correct dummy type.
|
|
|
|
|
|
* config/tc-s12z.c (parse_operand_func): Return bfd_boolean.
|
|
|
|
|
|
(no_operands, lex_force_match, lex_reg_list): Likewise.
|
|
|
|
|
|
(size_from_suffix): Return int.
|
|
|
|
|
|
(s12z_relax_frag, md_estimate_size_before_relax): Return 0.
|
|
|
|
|
|
* config/tc-s12z.h (tc_s12z_fix_adjustable): Likewise.
|
|
|
|
|
|
|
2021-03-26 18:43:19 +08:00
|
|
|
|
2021-03-26 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-nosse2.s,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-nosse2.l: New.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new test.
|
|
|
|
|
|
|
2021-03-25 05:24:35 +08:00
|
|
|
|
2021-03-25 Abid Qadeer <abidh@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/nios2/brn.d: New.
|
|
|
|
|
|
* testsuite/gas/nios2/brn.d: New.
|
|
|
|
|
|
|
2021-03-25 15:20:55 +08:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (match_template): Use t instead of i.tm.
|
|
|
|
|
|
|
2021-03-25 15:20:19 +08:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/avx512f-nondef.s: Add vgather cases.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-vgather-check.s: Add cases with
|
|
|
|
|
|
colliding registers in the upper half of the space.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f-nondef.d,
|
|
|
|
|
|
testsuite/gas/i386/vgather-check.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check-error.l,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check-warn.e: Adjust
|
|
|
|
|
|
expecations.
|
|
|
|
|
|
* testsuite/gas/i386/vgather-check-none.d,
|
|
|
|
|
|
testsuite/gas/i386/vgather-check-warn.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check-none.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-vgather-check-warn.d: Refer to "base"
|
|
|
|
|
|
tests for expected dump output.
|
|
|
|
|
|
|
2021-03-25 15:19:21 +08:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/avx512f-nondef.s: Add case for EVEX.z
|
|
|
|
|
|
without mask register.
|
|
|
|
|
|
* testsuite/gas/i386/avx512f-nondef.d: Adjust expectations.
|
|
|
|
|
|
|
2021-03-25 15:18:41 +08:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Widen set of insns to avoid
|
|
|
|
|
|
swapping operands for.
|
|
|
|
|
|
* testsuite/gas/i386/invlpgb.s: Fix, re-arrange, and add Intel
|
|
|
|
|
|
syntax tests.
|
|
|
|
|
|
* testsuite/gas/i386/snp.s: Re-arrange and add multi-operand as
|
|
|
|
|
|
well as Intel syntax tests.
|
|
|
|
|
|
* testsuite/gas/i386/invlpgb.d, testsuite/gas/i386/snp.d: Adjust
|
|
|
|
|
|
expectations.
|
2021-04-12 07:32:46 +08:00
|
|
|
|
* testsuite/gas/i386/invlpgb64.d, testsuite/gas/i386/snp64.d:
|
2021-03-25 15:18:41 +08:00
|
|
|
|
Likewise. Drop passing --def-sym to as.
|
|
|
|
|
|
|
2021-03-25 15:17:45 +08:00
|
|
|
|
2021-03-25 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR/gas 27419
|
|
|
|
|
|
* config/tc-i386.c (process_suffix): Restrict (%rip) -> (%eip)
|
|
|
|
|
|
conversion to x32 mode.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/enqcmd.s,
|
|
|
|
|
|
testsuite/gas/i386/ilp32/enqcmd.d,
|
|
|
|
|
|
testsuite/gas/i386/ilp32/movdir.s,
|
|
|
|
|
|
testsuite/gas/i386/ilp32/movdir.d: New.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-enqcmd.s,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-movdir.s: Drop mismatched operand
|
|
|
|
|
|
cases.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-enqcmd-inval.s: Add (%rip) and
|
|
|
|
|
|
(%eip) cases.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-movdir64b-reg.s Add (%eip) case.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-enqcmd.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-enqcmd-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-enqcmd-inval.l,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-movdir.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-movdir-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-movdir64b-reg.l: Adjust expectations.
|
|
|
|
|
|
|
2021-03-25 08:59:34 +08:00
|
|
|
|
2021-03-25 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27647
|
|
|
|
|
|
* testsuite/gas/ppc/a2.d: Update expected output.
|
|
|
|
|
|
* testsuite/gas/ppc/power8.d: Likewise.
|
|
|
|
|
|
|
2021-03-24 15:33:33 +08:00
|
|
|
|
2021-03-24 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (struct _i386_insn): New field
|
|
|
|
|
|
opcode_length.
|
|
|
|
|
|
(md_begin): Drop assertion.
|
|
|
|
|
|
(install_template): New.
|
|
|
|
|
|
(build_vex_prefix): Call install_template.
|
|
|
|
|
|
(match_template): Likewise.
|
|
|
|
|
|
(process_operands): Use new opcode_length field.
|
|
|
|
|
|
(output_jump): Likewise.
|
|
|
|
|
|
(output_insn): Likewise. Adjust psedo prefix check.
|
|
|
|
|
|
|
2021-03-24 15:32:32 +08:00
|
|
|
|
2021-03-24 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_begin): Add assertion.
|
|
|
|
|
|
(build_vex_prefix): Drop implied prefix calculation.
|
|
|
|
|
|
(build_evex_prefix): Likewise.
|
|
|
|
|
|
(optimize_encoding): Adjust opcode checks.
|
|
|
|
|
|
(load_insn_p): Also check opcodeprefix.
|
|
|
|
|
|
(match_template): Also check opcodespace.
|
|
|
|
|
|
(process_suffix): Likewise.
|
|
|
|
|
|
(process_operands): Likewise.
|
|
|
|
|
|
(output_insn): Likewise. Also check isprefix when discaring
|
|
|
|
|
|
standalone LOCK.
|
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_operand): Also check
|
|
|
|
|
|
opcodespace.
|
|
|
|
|
|
|
2021-03-24 15:31:41 +08:00
|
|
|
|
2021-03-24 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (parse_insn): Recognize pseudo prefixes by
|
|
|
|
|
|
base_opcode and extension_opcode.
|
|
|
|
|
|
|
2021-03-24 00:09:53 +08:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (pte): Re-order opc_pfx[] entries.
|
|
|
|
|
|
|
2021-03-24 00:09:11 +08:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (output_i386_opcode): Invoke
|
|
|
|
|
|
process_i386_cpu_flag() slightly later.
|
|
|
|
|
|
(process_i386_opcodes): Likewise.
|
|
|
|
|
|
|
2021-03-24 00:08:39 +08:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (pte): Print prefix and encoding space.
|
|
|
|
|
|
(build_vex_prefix): Check opcodespace instead of opcodeprefix.
|
|
|
|
|
|
(build_evex_prefix): Likewise.
|
|
|
|
|
|
(load_insn_p): Likewise.
|
|
|
|
|
|
|
2021-03-23 15:44:35 +08:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (load_insn_p): Use PREFIX_NONE. Fold two
|
|
|
|
|
|
if()-s.
|
|
|
|
|
|
(match_template, output_insn): Use PREFIX_NONE.
|
|
|
|
|
|
|
2021-03-23 15:44:03 +08:00
|
|
|
|
2021-03-23 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (i386_index_check): New local variable t.
|
|
|
|
|
|
Correct MPX insn check.
|
|
|
|
|
|
* config/tc-i386-intel.c (i386_intel_simplify_register): Correct
|
|
|
|
|
|
MPX insn check.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-mpx.s: Add RIP-relative cases. Test
|
|
|
|
|
|
index scaling by other than 1.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-mpx.d: Adjust expectations.
|
|
|
|
|
|
|
2021-03-19 18:50:26 +08:00
|
|
|
|
2021-03-22 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_parse_option): Replace usage of CONST_STRNEQ with startswith.
|
|
|
|
|
|
(x86_64_section_word): Likewise.
|
|
|
|
|
|
* config/tc-sparc.c (md_parse_option): Likewise.
|
|
|
|
|
|
|
2021-03-19 11:54:05 +08:00
|
|
|
|
2021-03-19 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* app.c (do_scrub_chars): Don't lose spaces before a slash.
|
|
|
|
|
|
|
2021-03-19 04:33:51 +08:00
|
|
|
|
2021-03-18 Christian Groessler <chris@groessler.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-z8k.c (apply_fix): Handle 7-bit relocations correctly.
|
|
|
|
|
|
Problem found by Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>.
|
|
|
|
|
|
|
2021-02-24 13:26:29 +08:00
|
|
|
|
2021-03-16 Kuan-Lin Chen <kuanlinchentw@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (ext_version_table): Add b, zba, zbb and zbc.
|
|
|
|
|
|
(riscv_multi_subset_supports): Add INSN_CLASS_ZB*.
|
|
|
|
|
|
* testsuite/gas/riscv/b-ext-64.s: Bitmanip test case.
|
|
|
|
|
|
* testsuite/gas/riscv/b-ext-64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/b-ext.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/b-ext.d: Likewise.
|
|
|
|
|
|
|
aarch64: Add few missing system registers
This patch adds few missing system registers to GAS: LORC_EL1,
LOREA_EL1, LORN_EL1, LORSA_EL1, ICC_CTLR_EL3, ICC_SRE_ELX, ICH_VTR_EL2.
gas/ChangeLog:
2021-03-02 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* testsuite/gas/aarch64/illegal-sysreg-7.d: New test.
* testsuite/gas/aarch64/illegal-sysreg-7.l: New test.
* testsuite/gas/aarch64/illegal-sysreg-7.s: New test.
* testsuite/gas/aarch64/sysreg-7.d: New test.
* testsuite/gas/aarch64/sysreg-7.s: New test.
opcodes/ChangeLog:
2021-03-02 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* aarch64-opc.c: Add lorc_el1, lorea_el1, lorn_el1, lorsa_el1,
icc_ctlr_el3, icc_sre_elx, ich_vtr_el2 system registers.
2021-03-12 22:18:59 +08:00
|
|
|
|
2021-03-12 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/aarch64/illegal-sysreg-7.d: New test.
|
|
|
|
|
|
* testsuite/gas/aarch64/illegal-sysreg-7.l: New test.
|
|
|
|
|
|
* testsuite/gas/aarch64/illegal-sysreg-7.s: New test.
|
|
|
|
|
|
* testsuite/gas/aarch64/sysreg-7.d: New test.
|
|
|
|
|
|
* testsuite/gas/aarch64/sysreg-7.s: New test.
|
|
|
|
|
|
|
aix: implement TLS relocation for gas and ld
Add support for TLS in XCOFF. Amongst the things done by this commit:
- Update XCOFF auxialiary header to match new version and allow TLS
sections.
- Add TLS sections (.tdata and .tbss) support in gas and ld.
- Add support for the TLS relocations in gas and ld.
Two different types BFD_RELOC are created for PPC and PPC64 as
the size is a pointer, thus distinct in 32 or 64bit.
The addresses given by ld to .tdata and .tbss is a bit special. In
XCOFF, these addresses are actually offsets from the TLS pointer
computed at runtime. AIX assembly and linker does the same. In
top of that, the .tdata must be before .data (this is mandatory for AIX
loader). Thus, the aix ld script is recomputing "." before .data to restore
its original value. There might be a simpler way, but this one is working.
Optimisation linked to TLS relocations aren't yet implemented.
bfd/
* reloc.c (BFD_RELOC_PPC_TLS_LE, BFD_RELOC_PPC_TLS_IE,
BFD_RELOC_PPC_TLS_M, BFD_RELOC_PPC_TLS_ML, BFD_RELOC_PPC64_TLS_GD,
BFD_RELOC_PPC64_TLS_LD, BFD_RELOC_PPC64_TLS_LE,
BFD_RELOC_PPC64_TLS_IE, BFD_RELOC_PPC64_TLS_M,
BFD_RELOC_PPC64_TLS_ML): New relocations.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* coff-rs6000.c (xcoff_calculate_relocation): Call
xcoff_reloc_type_tls for TLS relocations.
(xcoff_howto_table): Implement TLS relocations.
(_bfd_xcoff_reloc_type_lookup): Add cases TLS relocations.
(xcoff_reloc_type_tls): New function.
* coff64-rs6000.c (xcoff_calculate_relocation): Likewise.
(xcoff_howto_table): Likewise.
(_bfd_xcoff_reloc_type_lookup): Likewise.
* coffcode.h (sec_to_styp_flags): Handle TLS sections.
(styp_to_sec_flags): Likewise.
(coff_compute_section_file_positions): Avoid file offset
optimisation for .data when the previous section is .tdata.
(coff_write_object_contents): Handle TLS sections.
* coffswap.h (coff_swap_aouthdr_out): Add support for
new fields in aouthdr.
* libxcoff.h (xcoff_reloc_type_tls): Add prototype.
* xcofflink.c (xcoff_link_add_symbols): Handle XMC_UL.
(xcoff_need_ldrel_p): Add cases for TLS relocations.
(xcoff_create_ldrel): Add l_symndx for TLS sections.
gas/
* config/tc-ppc.c (ppc_xcoff_text_section, ppc_xcoff_data_section,
(ppc_xcoff_bss_section, ppc_xcoff_tdata_section,
(ppc_xcoff_tbss_section): New variables.
(ppc_text_subsegment, ppc_text_csects, ppc_data_subgments,
(ppc_data_csects): Removed.
(ppc_xcoff_section_is_initialized, ppc_init_xcoff_section,
ppc_xcoff_parse_cons): New functions.
(md_being): Initialize XCOFF sections.
(ppc_xcoff_suffix): Add support for TLS relocations
(fixup_size, md_apply_fix): Add support for new BFD_RELOC.
(ppc_change_csect): Handle XMC_TL, XMC_UL. Correctly, add XMC_BS
to .bss section. Handle new XCOFF section variables.
(ppc_comm): Likewise.
(ppc_toc): Likewise.
(ppc_symbol_new_hook): Likewise.
(ppc_frob_symbol): Likewise.
(ppc_fix_adjustable): Add tbss support.
* config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): New define.
(ppc_xcoff_parse_cons): Add prototype.
(struct ppc_xcoff_section): New structure.
ld/
* emultempl/aix.em: Ensure .tdata section is removed
if empty, even with -r flag.
* scripttempl/aix.sc: Handle TLS sections.
* testsuite/ld-powerpc/aix52.exp: Add new tests.
* testsuite/ld-powerpc/aix-tls-reloc-32.d: New test.
* testsuite/ld-powerpc/aix-tls-reloc-64.d: New test.
* testsuite/ld-powerpc/aix-tls-reloc.ex: New test.
* testsuite/ld-powerpc/aix-tls-reloc.s: New test.
* testsuite/ld-powerpc/aix-tls-section-32.d: New test.
* testsuite/ld-powerpc/aix-tls-section-64.d: New test.
* testsuite/ld-powerpc/aix-tls-section.ex: New test.
* testsuite/ld-powerpc/aix-tls-section.s: New test.
include/
* coff/internal.h (struct internal_aouthdr): Add new fields.
* coff/rs6000.h (AOUTHDRÃ): Add new fields.
* coff/rs6k64.h (struct external_filehdr): Likewise.
* coff/xcoff.h (_TDATA), _TBSS): New defines
(RS6K_AOUTHDR_TLS_LE, RS6K_AOUTHDR_RAS, RS6K_AOUTHDR_ALGNTDATA,
RS6K_AOUTHDR_SHR_SYMTAB, RS6K_AOUTHDR_FORK_POLICY,
RS6K_AOUTHDR_FORK_COR): New defines.
(XMC_TU): Removed.
(XMC_UL): New define.
2021-03-11 18:08:19 +08:00
|
|
|
|
2021-03-12 Clément Chigot <clement.chigot@atos.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (ppc_xcoff_text_section, ppc_xcoff_data_section,
|
|
|
|
|
|
(ppc_xcoff_bss_section, ppc_xcoff_tdata_section,
|
|
|
|
|
|
(ppc_xcoff_tbss_section): New variables.
|
|
|
|
|
|
(ppc_text_subsegment, ppc_text_csects, ppc_data_subgments,
|
|
|
|
|
|
(ppc_data_csects): Removed.
|
|
|
|
|
|
(ppc_xcoff_section_is_initialized, ppc_init_xcoff_section,
|
|
|
|
|
|
ppc_xcoff_parse_cons): New functions.
|
|
|
|
|
|
(md_being): Initialize XCOFF sections.
|
|
|
|
|
|
(ppc_xcoff_suffix): Add support for TLS relocations
|
|
|
|
|
|
(fixup_size, md_apply_fix): Add support for new BFD_RELOC.
|
|
|
|
|
|
(ppc_change_csect): Handle XMC_TL, XMC_UL. Correctly, add XMC_BS
|
|
|
|
|
|
to .bss section. Handle new XCOFF section variables.
|
|
|
|
|
|
(ppc_comm): Likewise.
|
|
|
|
|
|
(ppc_toc): Likewise.
|
|
|
|
|
|
(ppc_symbol_new_hook): Likewise.
|
|
|
|
|
|
(ppc_frob_symbol): Likewise.
|
|
|
|
|
|
(ppc_fix_adjustable): Add tbss support.
|
|
|
|
|
|
* config/tc-ppc.h (TC_PARSE_CONS_EXPRESSION): New define.
|
|
|
|
|
|
(ppc_xcoff_parse_cons): Add prototype.
|
|
|
|
|
|
(struct ppc_xcoff_section): New structure.
|
|
|
|
|
|
|
2021-03-11 18:08:19 +08:00
|
|
|
|
2021-03-12 Clément Chigot <clement.chigot@atos.net>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-ppc.c (ppc_xcoff_suffix): New function.
|
|
|
|
|
|
(MAP, MAP32, MAP64): New macros for XCOFF.
|
|
|
|
|
|
(ppc_xcoff_fixup_addis): New function.
|
|
|
|
|
|
(ppc_is_toc_sym): Handle XMC_TE.
|
|
|
|
|
|
(fixup_size): Add cases for BFD_RELOC_PPC_TOC16_HI and
|
|
|
|
|
|
BFD_RELOC_PPC_TOC16_LO.
|
|
|
|
|
|
(md_assemble): Call ppc_xcoff_fixup_addis for XCOFF.
|
|
|
|
|
|
(ppc_change_csect): Handle XMC_TE.
|
|
|
|
|
|
(ppc_tc): Enable .tc symbols to have only a XMC_TC or XMC_TE
|
|
|
|
|
|
storage class.
|
|
|
|
|
|
(ppc_symbol_new_hook): Handle XMC_TE.
|
|
|
|
|
|
(ppc_frob_symbol): Likewise.
|
|
|
|
|
|
(ppc_fix_adjustable): Likewise.
|
|
|
|
|
|
(md_apply_fix): Handle BFD_RELOC_PPC_TOC16_HI and
|
|
|
|
|
|
BFD_RELOC_PPC_TOC16_LO.
|
|
|
|
|
|
|
2021-03-10 15:20:29 +08:00
|
|
|
|
2021-03-10 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/avx512f-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/avx512f_vl-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/avx512pf-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512f-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512f_vl-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-avx512pf-intel.d: Adjust expectations.
|
|
|
|
|
|
|
2021-03-10 15:14:11 +08:00
|
|
|
|
2021-03-10 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/prefetch.d,
|
|
|
|
|
|
testsuite/gas/i386/prefetch-intel.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-prefetch.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-prefetch-intel.d: Adjust expectations.
|
|
|
|
|
|
* testsuite/gas/i386/nops-8.s, testsuite/gas/i386/nops-8.d: New.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new test.
|
|
|
|
|
|
|
2021-03-09 15:54:32 +08:00
|
|
|
|
2021-03-09 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (check_hle): Replace HLEPrefix* by Prefix*.
|
|
|
|
|
|
(md_assemble): Replace use of repprefixok, islockable, and
|
|
|
|
|
|
notrackprefixok.
|
|
|
|
|
|
(i386_index_check): Replace use of repprefixok.
|
|
|
|
|
|
|
2021-03-09 15:53:38 +08:00
|
|
|
|
2021-03-09 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/noreg64.s: Add sysexit.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-sysenter-amd.s: Split sysexit into
|
|
|
|
|
|
sysexitl and sysexitq.
|
|
|
|
|
|
* testsuite/gas/i386/noreg-intel64.l,
|
|
|
|
|
|
testsuite/gas/i386/noreg64-data16.d,
|
|
|
|
|
|
testsuite/gas/i386/noreg64-data16.e,
|
|
|
|
|
|
testsuite/gas/i386/noreg64-rex64.d,
|
|
|
|
|
|
testsuite/gas/i386/noreg64.d,
|
|
|
|
|
|
testsuite/gas/i386/noreg64.l,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-amd.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-amd.l,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-sysenter-intel.d: Adjust expectations.
|
|
|
|
|
|
|
2021-02-27 00:37:30 +08:00
|
|
|
|
2021-02-26 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27411
|
|
|
|
|
|
* config/tc-arm.c (do_t_add_sub): Correct error message.
|
|
|
|
|
|
* testsuite/gas/arm/pr27411.s: New test.
|
|
|
|
|
|
* testsuite/gas/arm/pr27411.d: New test driver.
|
|
|
|
|
|
* testsuite/gas/arm/pr27411.l: Expected error output for new test.
|
|
|
|
|
|
|
PR23691, gas .y files vs. automatic make dependencies
A number of targets, bfin, rl78, rx, can show odd failures when
bfd/reloc.c changes BFD_RELOC_* enum values, if recompiling over a
build dir with existing objects. The problem is caused by
bfin-parse.o and similar not being recompiled and so using stale
BFD_RELOC_* values. This isn't fixed by making bfin-parse.c depend on
bfd/reloc.c, which isn't necessary anyway. bfin-parse.o should have
been recompiled due to bfd/bfd.h changing when extracted bfd/reloc.c
BFD_RELOC_* values change, but that wasn't happening. The problem is
that automake generates a makefile that loads gas/config/.deps/
dependency file for objects with corresponding sources mentioned in
EXTRA_as_new_SOURCES. Unless we want to mess around generating
explicit dependencies, I think that mean moving some object files to
the build gas/config/. This patch does that, removing some hacks for
m68k-parse.c that should no longer be necessary, and removes some
rules that catered to old bison producing code that triggers compiler
warnings.
PR 23691
* Makefile.am (TARGET_CPU_CFILES): Split off config/xtensa-relax.c..
(TARGET_CPU_HFILES): ..and config/xtensa-relax.h..
(TARGET_EXTRA_FILES): ..to here. Add config/bfin-lex-wrapper.c,
and use alongside TARGET_CPU_CFILES.
(EXTRA_DIST): Update location of generated .c files.
(config/m68k-parse.c): New rule replacing m68k-parse.c rule.
(config/bfin-parse.c, config/rl78-parse.cm config/rx-parse.c),
(config/bfin-lex.c, config/bfin-lex-wrapper.@OBJEXT@): Similarly.
(itbl-lex-wrapper.@OBJEXT@): Simplify to just the needed
dependencies.
(itbl-parse.@OBJEXT@): Delete rule using NO_WERROR.
(itbl-parse.c, itbl-parse.h): Tidy.
* config/bfin-lex-wrapper.c: Include config/bfin-lex.c.
* config/bfin-lex.l: Include config/bfin-parse.h.
* configure.ac (extra_objects): Move object files corresponding
to .y and .l files now in config/ to config/.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
2021-02-23 19:24:25 +08:00
|
|
|
|
2021-02-24 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 23691
|
|
|
|
|
|
* Makefile.am (TARGET_CPU_CFILES): Split off config/xtensa-relax.c..
|
|
|
|
|
|
(TARGET_CPU_HFILES): ..and config/xtensa-relax.h..
|
|
|
|
|
|
(TARGET_EXTRA_FILES): ..to here. Add config/bfin-lex-wrapper.c,
|
|
|
|
|
|
and use alongside TARGET_CPU_CFILES.
|
|
|
|
|
|
(EXTRA_DIST): Update location of generated .c files.
|
|
|
|
|
|
(config/m68k-parse.c): New rule replacing m68k-parse.c rule.
|
|
|
|
|
|
(config/bfin-parse.c, config/rl78-parse.cm config/rx-parse.c),
|
|
|
|
|
|
(config/bfin-lex.c, config/bfin-lex-wrapper.@OBJEXT@): Similarly.
|
|
|
|
|
|
(itbl-lex-wrapper.@OBJEXT@): Simplify to just the needed
|
|
|
|
|
|
dependencies.
|
|
|
|
|
|
(itbl-parse.@OBJEXT@): Delete rule using NO_WERROR.
|
|
|
|
|
|
(itbl-parse.c, itbl-parse.h): Tidy.
|
|
|
|
|
|
* config/bfin-lex-wrapper.c: Include config/bfin-lex.c.
|
|
|
|
|
|
* config/bfin-lex.l: Include config/bfin-parse.h.
|
|
|
|
|
|
* configure.ac (extra_objects): Move object files corresponding
|
|
|
|
|
|
to .y and .l files now in config/ to config/.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
2021-02-19 18:14:09 +08:00
|
|
|
|
2021-02-19 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_ip): Fix compile time warnings about
|
|
|
|
|
|
misleading indentation.
|
|
|
|
|
|
|
2021-01-26 18:02:38 +08:00
|
|
|
|
2021-02-19 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27158
|
|
|
|
|
|
* config/tc-riscv.c (riscv_ip): Updated encoding macros.
|
|
|
|
|
|
(md_apply_fix): Likewise.
|
|
|
|
|
|
(md_convert_frag_branch): Likewise.
|
|
|
|
|
|
(validate_riscv_insn): Likewise. Also arranged operands, including
|
|
|
|
|
|
added C5 and C6 operands, and removed unused Ci and C< operands.
|
|
|
|
|
|
* doc/c-riscv.texi: Updated and added CSS/CL/CS types.
|
|
|
|
|
|
* testsuite/gas/riscv/insn.d: Added CSS/CL/CS instructions.
|
|
|
|
|
|
* testsuite/gas/riscv/insn.s: Likewise.
|
|
|
|
|
|
|
2021-01-28 10:45:56 +08:00
|
|
|
|
2021-02-18 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c: Included cpu-riscv.h.
|
|
|
|
|
|
(enum riscv_csr_clas): Moved from include/opcode/riscv.h.
|
|
|
|
|
|
(struct riscv_csr_extra): Likewise.
|
|
|
|
|
|
(struct riscv_ext_version): Likewise.
|
|
|
|
|
|
(ext_version_table): Moved from opcodes/riscv-opc.c.
|
|
|
|
|
|
(default_isa_spec): Updated type to riscv_spec_class.
|
|
|
|
|
|
(default_priv_spec): Likewise.
|
|
|
|
|
|
(riscv_set_default_isa_spec): Updated.
|
|
|
|
|
|
(init_ext_version_hash): Likewise.
|
|
|
|
|
|
(riscv_init_csr_hash): Likewise, also fixed indent.
|
|
|
|
|
|
|
2021-02-17 14:18:41 +08:00
|
|
|
|
2021-02-17 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/elf/section28.d: xfail h8300.
|
|
|
|
|
|
|
2021-02-16 20:55:42 +08:00
|
|
|
|
2021-02-16 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/27412
|
|
|
|
|
|
* config/obj-elf.c (obj_elf_change_section): Strip SHF_GNU_RETAIN
|
|
|
|
|
|
when checking incorrect section attributes.
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run section28 and section29.
|
|
|
|
|
|
* testsuite/gas/elf/section28.d: New file.
|
|
|
|
|
|
* testsuite/gas/elf/section28.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section29.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section29.s: Likewise.
|
|
|
|
|
|
|
2021-02-16 18:34:25 +08:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/sse-check.s,
|
|
|
|
|
|
testsuite/gas/i386/sse2avx.s,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-sse2avx.s: Add CVTPI2PD cases.
|
|
|
|
|
|
* testsuite/gas/i386/sse-check-error.l,
|
|
|
|
|
|
testsuite/gas/i386/sse-check-warn.e,
|
|
|
|
|
|
testsuite/gas/i386/sse-check.d,
|
|
|
|
|
|
testsuite/gas/i386/sse2avx.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-sse-check-error.l,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-sse2avx.d: Adjust expecations.
|
|
|
|
|
|
* testsuite/gas/i386/property-cvtpi2pd.s,
|
|
|
|
|
|
testsuite/gas/i386/property-cvtpi2pd.d,
|
|
|
|
|
|
testsuite/gas/i386/property-cvtpi2ps.s,
|
|
|
|
|
|
testsuite/gas/i386/property-cvtpi2ps.d: New.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new tests.
|
|
|
|
|
|
|
2021-02-16 18:33:04 +08:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (md_assemble): Use template rather than
|
|
|
|
|
|
actuals when updating i.xstate.
|
|
|
|
|
|
* testsuite/gas/i386/property-4.d,
|
|
|
|
|
|
testsuite/gas/i386/property-5.d,
|
|
|
|
|
|
testsuite/gas/i386/property-12.d: Adjust expectations.
|
|
|
|
|
|
|
2021-02-16 18:32:18 +08:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-i386.c (output_insn): Handle ldmxcsr, stmxcsr,
|
|
|
|
|
|
vldmxcsr, vstmxcsr, vzeroall, and vzeroupper.
|
|
|
|
|
|
* testsuite/gas/i386/property-ldmxcsr.s,
|
|
|
|
|
|
testsuite/gas/i386/property-ldmxcsr.d,
|
|
|
|
|
|
testsuite/gas/i386/property-vldmxcsr.s,
|
|
|
|
|
|
testsuite/gas/i386/property-vldmxcsr.d,
|
|
|
|
|
|
testsuite/gas/i386/property-vzeroall.s,
|
|
|
|
|
|
testsuite/gas/i386/property-vzeroall.d: New.
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Run new tests.
|
|
|
|
|
|
|
2021-02-16 18:30:49 +08:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/i386.exp: Move bitness-independent property
|
|
|
|
|
|
tests to bitness independent section.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-property-2.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-property-3.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-property-4.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-property-5.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-property-6.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-property-10.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-property-11.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-property-12.d,
|
|
|
|
|
|
testsuite/gas/i386/x86-64-property-13.d: Delete.
|
|
|
|
|
|
|
2021-02-16 18:26:58 +08:00
|
|
|
|
2021-02-16 Jan Beulich <jbeulich@suse.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/i386/enqcmd-16bit.s: Include enqcmd.s, not
|
|
|
|
|
|
movdir.s.
|
|
|
|
|
|
* testsuite/gas/i386/enqcmd-16bit.d: Adjust expectations.
|
|
|
|
|
|
|
2021-02-16 12:09:04 +08:00
|
|
|
|
2021-02-16 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27426
|
|
|
|
|
|
* dwarf2dbg.c (allocate_filename_to_slot): Allocate the dirs array
|
|
|
|
|
|
in another place.
|
|
|
|
|
|
|
2021-02-16 12:02:36 +08:00
|
|
|
|
2021-02-16 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* read.c (demand_copy_C_string): Really check for embedded zeros.
|
|
|
|
|
|
|
2021-02-15 21:20:00 +08:00
|
|
|
|
2021-02-15 Andreas Krebbel <krebbel@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-s390.c (s390_parse_cpu): New entry for arch14.
|
|
|
|
|
|
* doc/c-s390.texi: Document arch14 march option.
|
|
|
|
|
|
* testsuite/gas/s390/s390.exp: Run the arch14 related tests.
|
|
|
|
|
|
* testsuite/gas/s390/zarch-arch14.d: New test.
|
|
|
|
|
|
* testsuite/gas/s390/zarch-arch14.s: New test.
|
|
|
|
|
|
|
2021-02-12 22:52:22 +08:00
|
|
|
|
2021-02-12 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/mach-o/sections-1.d: Stop automatic debug link
|
2021-04-12 07:32:46 +08:00
|
|
|
|
following.
|
2021-02-12 22:52:22 +08:00
|
|
|
|
* testsuite/gas/xgate/insns-dwarf2.d: Likewise.
|
|
|
|
|
|
|
2021-02-12 09:11:16 +08:00
|
|
|
|
2021-02-12 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/pr27381.err: Don't match source file name.
|
|
|
|
|
|
* testsuite/gas/all/pr27381.s: Don't start directive in first column.
|
|
|
|
|
|
* testsuite/gas/all/pr27384.err: Don't match source file name.
|
|
|
|
|
|
Adjust line number.
|
|
|
|
|
|
* testsuite/gas/all/pr27384.s: Add ".text" directive.
|
|
|
|
|
|
* testsuite/gas/elf/pr27355.err: Don't match source file name.
|
|
|
|
|
|
|
2021-02-10 10:06:52 +08:00
|
|
|
|
2021-02-11 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* NEWS: Mention arm-symbianelf removal.
|
|
|
|
|
|
|
2021-02-10 17:56:33 +08:00
|
|
|
|
2021-02-10 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* listing.c (buffer_line): Remove debugging code accidentally
|
|
|
|
|
|
included with the fix for PR 27384.
|
|
|
|
|
|
|
2021-02-09 22:22:23 +08:00
|
|
|
|
2021-02-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27381
|
|
|
|
|
|
* read.c (s_incbin): Check that the file to be included is a
|
|
|
|
|
|
regular, non-directory file.
|
|
|
|
|
|
* testsuite/gas/all/pr27381.s: New test source file.
|
|
|
|
|
|
* testsuite/gas/all/pr27381.d: New test control file.
|
|
|
|
|
|
* testsuite/gas/all/pr27381.err: Expected error output for the new test.
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Run the new test.
|
|
|
|
|
|
|
2021-02-08 18:36:17 +08:00
|
|
|
|
2021-02-09 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* Makefile.am (TARG_ENV_HFILES): Remove config/te-symbian.h.
|
|
|
|
|
|
* config/tc-arm.c (elf32_arm_target_format): Remove TE_SYMBIAN
|
|
|
|
|
|
support.
|
|
|
|
|
|
* config/te-symbian.h: Delete.
|
|
|
|
|
|
* configure.tgt: Remove arm-*-symbianelf*.
|
|
|
|
|
|
* testsuite/gas/arm/arch4t-eabi.d: Don't mention symbianelf in
|
|
|
|
|
|
target selection.
|
|
|
|
|
|
* testsuite/gas/arm/arch4t.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/got_prel.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/mapdir.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/mapmisc.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/mapsecs.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/mapshort-eabi.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/thumb-eabi.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/thumb.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/arm/thumbrel.d: Likewise.
|
|
|
|
|
|
* Makefile.in: Regenerate.
|
|
|
|
|
|
* po/POTFILES.in: Regenerate.
|
|
|
|
|
|
|
2021-02-09 20:53:32 +08:00
|
|
|
|
2021-02-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27384
|
|
|
|
|
|
* listing.c (listing_psize): Check the result of the width
|
|
|
|
|
|
expression before assigning it to paper_width.
|
|
|
|
|
|
* testsuite/gas/all/pr27384.s: New test source file.
|
|
|
|
|
|
* testsuite/gas/all/pr27384.d: New test control file.
|
|
|
|
|
|
* testsuite/gas/all/pr27384.err: Expected errors from new test.
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Run the new test.
|
|
|
|
|
|
|
2021-02-09 18:51:40 +08:00
|
|
|
|
2021-02-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27355
|
|
|
|
|
|
* testsuite/gas/elf/pr27355.s: New test source file.
|
|
|
|
|
|
* testsuite/gas/elf/pr27355.d: New test control file.
|
|
|
|
|
|
* testsuite/gas/elf/pr27355.err: Expected errors from new test.
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run the new test.
|
|
|
|
|
|
|
2021-01-16 14:00:45 +08:00
|
|
|
|
2021-02-08 Mike Frysinger <vapier@gentoo.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-tic54x (tic54x_mmregs): Rename to ...
|
|
|
|
|
|
(tic54x_register_mmregs): ... this. Change mmregs to tic54x_mmregs.
|
|
|
|
|
|
(md_pseudo_table): Change tic54x_mmregs to tic54x_register_mmregs.
|
|
|
|
|
|
(md_begin): Add tic54x_ prefix to regs, mmregs, condition_codes,
|
|
|
|
|
|
cc2_codes, cc3_codes, status_bits, and misc_symbols.
|
|
|
|
|
|
|
2021-02-09 02:31:21 +08:00
|
|
|
|
2021-02-08 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27355
|
|
|
|
|
|
* dwarf2dbg.c (allocate_filename_to_slot): Allocate the dirs array
|
|
|
|
|
|
if it has not already been created.
|
|
|
|
|
|
|
2021-02-04 16:15:03 +08:00
|
|
|
|
2021-02-04 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_multi_subset_supports): Removed
|
|
|
|
|
|
INSN_CLASS_ZB*.
|
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-32.d: Removed.
|
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-64.d: Removed.
|
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns.s: Removed.
|
|
|
|
|
|
|
2021-02-03 19:01:12 +08:00
|
|
|
|
2021-02-03 Andreas Krebbel <krebbel@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/c-s390.texi: Document vector instruction formats.
|
|
|
|
|
|
|
2021-02-02 01:31:47 +08:00
|
|
|
|
2021-02-01 Emery Hemingway <ehmry@posteo.net>
|
|
|
|
|
|
|
|
|
|
|
|
* configure.tgt: Add *-*-genode* as a target for AArch64 and x86.
|
|
|
|
|
|
|
2021-01-31 09:32:54 +08:00
|
|
|
|
2021-02-01 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27283
|
|
|
|
|
|
* config/tc-alpha.c (insert_operand): Delete dead code.
|
|
|
|
|
|
|
2021-01-27 00:18:39 +08:00
|
|
|
|
2021-01-26 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/27243
|
|
|
|
|
|
* config/tc-nios2.c (md_begin): Don't disable relaxation with
|
|
|
|
|
|
--gdwarf-N.
|
|
|
|
|
|
* testsuite/gas/nios2/relax.d: New file.
|
|
|
|
|
|
* testsuite/gas/nios2/relax.s: Likewise.
|
|
|
|
|
|
|
2021-01-25 20:23:31 +08:00
|
|
|
|
2021-01-26 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/local-label-overflow.d: Use xfail rather than
|
|
|
|
|
|
notarget all except hppa. Comment.
|
|
|
|
|
|
* testsuite/gas/all/sleb128-2.d: Use xfail rather than notarget.
|
|
|
|
|
|
* testsuite/gas/all/sleb128-4.d: Likewise. Don't skip msp430.
|
|
|
|
|
|
* testsuite/gas/all/sleb128-5.d: Use xfail rather than notarget.
|
|
|
|
|
|
* testsuite/gas/all/sleb128-7.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/all/sleb128-9.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/bignums.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/group0c.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/group1a.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section-symbol-redef.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section15.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section4.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section7.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/macros/irp.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/macros/repeat.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/macros/rept.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/macros/test2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/macros/vararg.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/all/string.d: Use xfail rather than skip.
|
|
|
|
|
|
* testsuite/gas/elf/missing-build-notes.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section0.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section10.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section11.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/section6.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/symtab.d: Use xfail rather than skip, adjust hppa.
|
|
|
|
|
|
* testsuite/gas/elf/symtab.s: Don't start directives in first column.
|
|
|
|
|
|
* testsuite/gas/macros/test3.d: Don't notarget nds32.
|
|
|
|
|
|
|
2021-01-25 12:48:55 +08:00
|
|
|
|
2021-01-26 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/all/byte.d,
|
|
|
|
|
|
* testsuite/gas/all/byte.l,
|
|
|
|
|
|
* testsuite/gas/all/byte.s: Delete.
|
|
|
|
|
|
* testsuite/gas/all/gas.exp: Don't run byte test.
|
|
|
|
|
|
|
2021-01-25 12:47:15 +08:00
|
|
|
|
2021-01-26 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27282
|
|
|
|
|
|
* testsuite/gas/all/none.d: Replace skip with xfail, don't xfail ft32.
|
|
|
|
|
|
* testsuite/gas/elf/pr27228.d: xfail hppa and allow OBJECT match.
|
|
|
|
|
|
|
2021-01-24 20:14:30 +08:00
|
|
|
|
2021-01-24 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/27228
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Run pr27228.
|
|
|
|
|
|
* testsuite/gas/elf/pr27228.d: New file.
|
|
|
|
|
|
* testsuite/gas/elf/pr27228.s: Likewise.
|
|
|
|
|
|
|
2021-01-24 10:09:07 +08:00
|
|
|
|
2021-01-24 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27228
|
|
|
|
|
|
* write.c (resolve_reloc_expr_symbols): Don't assume local symbol
|
|
|
|
|
|
is defined.
|
|
|
|
|
|
|
2021-01-21 14:20:02 +08:00
|
|
|
|
2021-01-21 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27221
|
|
|
|
|
|
* dwarf2dbg.c (dwarf2_gen_line_info_1): Don't warn about ignored
|
|
|
|
|
|
line number info when gas is generating it.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf2-20.d: Adjust to not expect warnings.
|
|
|
|
|
|
* testsuite/gas/m68hc11/indexed12.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp: Don't run warn-2.
|
|
|
|
|
|
* gas/testsuite/gas/elf/warn-2.s: Delete.
|
|
|
|
|
|
|
2021-01-21 14:16:20 +08:00
|
|
|
|
2021-01-21 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27218
|
|
|
|
|
|
* dwarf2dbg.c (dwarf2_gen_line_info): Correct setting of dwarf_level.
|
|
|
|
|
|
(dwarf2_directive_filename, dwarf2_directive_loc): Likewise, and
|
|
|
|
|
|
error for negative file numbers.
|
|
|
|
|
|
|
2021-01-20 13:25:46 +08:00
|
|
|
|
2021-01-20 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/power4.d: Adjust for removal of section sym.
|
|
|
|
|
|
* testsuite/gas/ppc/test1elf32.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/ppc/test1elf64.d: Likewise.
|
|
|
|
|
|
|
2021-01-18 22:25:05 +08:00
|
|
|
|
2021-01-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/27195
|
|
|
|
|
|
* dwarf2dbg.c (dwarf2_gen_line_info): Set dwarf_level to 5 if
|
|
|
|
|
|
needed.
|
|
|
|
|
|
(dwarf2_directive_filename): Likewise.
|
|
|
|
|
|
(dwarf2_directive_loc): Likewise.
|
|
|
|
|
|
* testsuite/gas/elf/dwarf-5-file0.d: Pass --gdwarf-3.
|
|
|
|
|
|
* testsuite/gas/lns/lns-diag-1.l: Remove the
|
|
|
|
|
|
"Error: file number less than one" errors.
|
|
|
|
|
|
|
2021-01-18 07:08:22 +08:00
|
|
|
|
2021-01-18 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27198
|
|
|
|
|
|
* config/tc-i386.c (need_plt32_p): Return FALSE for NULL symbol.
|
|
|
|
|
|
* testsuite/gas/i386/pr27198.d,
|
|
|
|
|
|
* gas/testsuite/gas/i386/pr27198.err,
|
|
|
|
|
|
* gas/testsuite/gas/i386/pr27198.s: New test.
|
|
|
|
|
|
* gas/testsuite/gas/i386/i386.exp: Run it.
|
|
|
|
|
|
|
2021-01-15 09:36:51 +08:00
|
|
|
|
2021-01-15 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c: Indent and GNU coding standards tidy,
|
|
|
|
|
|
also aligned the code.
|
|
|
|
|
|
* config/tc-riscv.h: Likewise.
|
|
|
|
|
|
|
2021-01-13 16:52:14 +08:00
|
|
|
|
2021-01-15 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c: Error and warning messages tidy.
|
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-fext.l: Updated.
|
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise.
|
|
|
|
|
|
|
2021-01-13 10:05:48 +08:00
|
|
|
|
2021-01-15 Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
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|
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|
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* config/tc-riscv.c: Comments tidy and improvement. Also update
|
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|
|
|
comment "fallthru" to "Fall through" that end with a period and
|
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|
two spaces.
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|
2021-01-14 11:14:10 +08:00
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|
|
2021-01-14 Mike Frysinger <vapier@gentoo.org>
|
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|
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* doc/as.texi: Delete @ifset ELF wrapping around [248]byte entries.
|
|
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|
|
Delete warning that these are only available with ELF targets.
|
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|
* obj-elf.c (elf_pseudo_table): Move 2byte/4byte/8byte entries ...
|
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|
|
* read.c (potable): ... here.
|
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|
2021-01-14 14:03:54 +08:00
|
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|
|
2021-01-14 Mike Frysinger <vapier@gentoo.org>
|
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|
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* Makefile.am (bfin-lex-wrapper.@OBJEXT@): Delete $(NO_WERROR).
|
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|
|
* Makefile.in: Regenerated.
|
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|
2021-01-14 13:51:59 +08:00
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|
2021-01-14 Mike Frysinger <vapier@gentoo.org>
|
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|
|
|
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|
|
|
* bfin-lex.l (YY_NO_INPUT, YY_NO_UNPUT): Define.
|
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|
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|
(parse_int): Mark char_bag const.
|
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|
2021-01-13 21:42:11 +08:00
|
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|
2021-01-13 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
|
|
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|
|
PR gas/27178
|
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|
|
* config/tc-i386.c (lex_got::gotrel): Add need_GOT_symbol.
|
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|
|
|
Don't generate GOT_symbol for PLT relocations.
|
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|
|
|
* testsuite/gas/i386/i386.exp: Run PR gas/27178 tests.
|
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* testsuite/gas/i386/no-got.d: New file.
|
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|
* testsuite/gas/i386/no-got.s: Likewise.
|
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|
|
|
* testsuite/gas/i386/x86-64-no-got.d: Likewise.
|
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|
|
|
|
* testsuite/gas/i386/x86-64-no-got.s: Likewise.
|
|
|
|
|
|
|
2021-01-13 16:43:23 +08:00
|
|
|
|
2021-01-13 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
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|
|
* Makefile.in: Regenerate.
|
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|
* Makefile.in: Regenerate.
|
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|
|
|
|
2021-01-12 21:45:28 +08:00
|
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|
|
2021-01-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR binutils/26792
|
|
|
|
|
|
* configure.ac: Use GNU_MAKE_JOBSERVER.
|
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|
|
|
|
* aclocal.m4: Regenerated.
|
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|
|
* configure: Likewise.
|
|
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|
|
2021-01-12 21:18:50 +08:00
|
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|
|
2021-01-12 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/fr.po: Updated French translation.
|
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|
|
2021-01-12 08:29:31 +08:00
|
|
|
|
2021-01-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR ld/27173
|
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|
|
* configure: Regenerated.
|
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|
2021-01-06 01:39:04 +08:00
|
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|
|
2021-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
|
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|
|
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|
|
|
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|
|
* NEWS: Remove CSRE.
|
|
|
|
|
|
* config/tc-aarch64.c (parse_csr_operand): Delete.
|
|
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|
|
|
(parse_operands): Delete handling of
|
|
|
|
|
|
AARCH64_OPND_CSRE_CSR.
|
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|
|
(aarch64_features): Remove csre.
|
|
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|
|
* doc/c-aarch64.texi: Remove CSRE.
|
|
|
|
|
|
* testsuite/gas/aarch64/csre.d: Delete.
|
|
|
|
|
|
* testsuite/gas/aarch64/csre-invalid.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/aarch64/csre-invalid.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr-invalid.s: Likewise.
|
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr-invalid.l: Likewise.
|
|
|
|
|
|
* testsuite/gas/aarch64/csre_csr-invalid.d: Likewise.
|
|
|
|
|
|
|
2021-01-11 20:55:33 +08:00
|
|
|
|
2021-01-11 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
|
|
|
* po/uk.po: Updated Ukranian translation.
|
|
|
|
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|
|
2021-01-09 22:47:58 +08:00
|
|
|
|
2021-01-09 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
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|
|
* configure: Regenerated.
|
|
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|
|
2021-01-09 19:01:01 +08:00
|
|
|
|
2021-01-09 Nick Clifton <nickc@redhat.com>
|
|
|
|
|
|
|
|
|
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|
|
* configure: Regenerate.
|
|
|
|
|
|
* po/gas.pot: Regenerate.
|
|
|
|
|
|
|
2021-01-09 18:40:28 +08:00
|
|
|
|
2021-01-09 Nick Clifton <nickc@redhat.com>
|
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|
|
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|
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|
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|
|
* 2.36 release branch crated.
|
|
|
|
|
|
|
POWER10: Add Return-Oriented Programming instructions
POWER10 adds some return-oriented programming (ROP) instructions and
this patch adds support for them. You will notice that they are enabled
for POWER8 and later, not just POWER10 and later. This is on purpose.
This allows the instructions to be added to POWER8 binaries that can be
run on POWER8, POWER9 and POWER10 cpus. On POWER8 and POWER9, these
instructions just act as nop's.
opcodes/
* ppc-opc.c (insert_dw, (extract_dw): New functions.
(DW, (XRC_MASK): Define.
(powerpc_opcodes) <hashchk, hashchkp, hashst, haststp>: New mnemonics.
gas/
* testsuite/gas/ppc/rop-checks.d,
* testsuite/gas/ppc/rop-checks.l,
* testsuite/gas/ppc/rop-checks.s,
* testsuite/gas/ppc/rop.d,
* testsuite/gas/ppc/rop.s: New tests.
* testsuite/gas/ppc/ppc.exp: Run them.
2021-01-09 06:07:12 +08:00
|
|
|
|
2021-01-08 Peter Bergner <bergner@linux.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/ppc/rop-checks.d,
|
|
|
|
|
|
* testsuite/gas/ppc/rop-checks.l,
|
|
|
|
|
|
* testsuite/gas/ppc/rop-checks.s,
|
|
|
|
|
|
* testsuite/gas/ppc/rop.d,
|
|
|
|
|
|
* testsuite/gas/ppc/rop.s: New tests.
|
|
|
|
|
|
* testsuite/gas/ppc/ppc.exp: Run them.
|
|
|
|
|
|
|
2021-01-09 08:33:29 +08:00
|
|
|
|
2021-01-09 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2021-01-08 00:47:36 +08:00
|
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|
|
2021-01-07 Samuel Thibault <samuel.thibault@gnu.org>
|
|
|
|
|
|
|
|
|
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|
|
* configure: Regenerate.
|
|
|
|
|
|
|
2021-01-07 22:42:00 +08:00
|
|
|
|
2021-01-07 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR 27109
|
|
|
|
|
|
* read.c (s_reloc): Call symbol_mark_used_in_reloc on the
|
|
|
|
|
|
section symbol.
|
|
|
|
|
|
* subsegs.c (subseg_set_rest): Set BSF_SECTION_SYM_USED if needed.
|
|
|
|
|
|
* write.c (adjust_reloc_syms): Call symbol_mark_used_in_reloc
|
|
|
|
|
|
on the section symbol.
|
|
|
|
|
|
(set_symtab): Don't generate unused section symbols.
|
|
|
|
|
|
(maybe_generate_build_notes): Call symbol_mark_used_in_reloc
|
|
|
|
|
|
on the section symbol.
|
|
|
|
|
|
* config/obj-elf.c (elf_adjust_symtab): Call
|
|
|
|
|
|
symbol_mark_used_in_reloc on the group signature symbol.
|
|
|
|
|
|
* testsuite/gas/cfi/cfi-label.d: Remove unused section symbols
|
|
|
|
|
|
from expected output.
|
|
|
|
|
|
* testsuite/gas/elf/elf.exp (run_elf_list_test): Check
|
|
|
|
|
|
is_elf_unused_section_symbols.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e: Updated.
|
|
|
|
|
|
* testsuite/gas/elf/section2.e-unused: New file.
|
|
|
|
|
|
* testsuite/gas/elf/symver.d: Remove unused section symbols.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/elf/symver.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-size-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-size-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-size-5.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-unwind.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/size-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/size-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/svr4.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-size-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-size-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-size-5.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-unwind.d: Likewise.
|
|
|
|
|
|
|
2021-01-07 15:53:25 +08:00
|
|
|
|
2021-01-07 Philipp Tomsich <prt@gnu.org>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_multi_subset_supports): Added
|
|
|
|
|
|
INSN_CLASS_ZIHINTPAUSE.
|
|
|
|
|
|
* testsuite/gas/riscv/pause.d: New testcase. Adding coverage for
|
|
|
|
|
|
the pause hint instruction.
|
|
|
|
|
|
* testsuite/gas/riscv/pause.s: Likewise.
|
|
|
|
|
|
|
2020-12-15 23:11:03 +08:00
|
|
|
|
2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com>
|
|
|
|
|
|
Jim Wilson <jimw@sifive.com>
|
|
|
|
|
|
Andrew Waterman <andrew@sifive.com>
|
|
|
|
|
|
Maxim Blinov <maxim.blinov@embecosm.com>
|
|
|
|
|
|
Kito Cheng <kito.cheng@sifive.com>
|
|
|
|
|
|
Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_multi_subset_supports): Handle INSN_CLASS_ZB*.
|
|
|
|
|
|
(riscv_get_default_ext_version): Do not check the default_isa_spec when
|
|
|
|
|
|
the version defined in the riscv_opcodes table is ISA_SPEC_CLASS_DRAFT.
|
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-32.d: New testcase.
|
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns.s: Likewise.
|
|
|
|
|
|
|
2021-01-06 10:06:31 +08:00
|
|
|
|
2021-01-06 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/sparc/sparc.exp: Move 64-bit tests inside gas_64_check.
|
|
|
|
|
|
|
2021-01-06 09:23:33 +08:00
|
|
|
|
2021-01-06 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/macros/app1.d: xfail tic30.
|
|
|
|
|
|
* testsuite/gas/macros/app2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/macros/app3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/macros/app4.d: Likewise.
|
|
|
|
|
|
|
2021-01-06 05:50:37 +08:00
|
|
|
|
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
|
|
|
|
|
|
|
|
|
|
|
|
* doc/as.texi: Add -mlittle-endian and -mbig-endian to docs.
|
|
|
|
|
|
* doc/c-riscv.texi: Likewise.
|
|
|
|
|
|
|
2021-01-06 05:50:39 +08:00
|
|
|
|
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/riscv/li32.d: Accept bigriscv in addition
|
|
|
|
|
|
to littleriscv.
|
|
|
|
|
|
* testsuite/gas/riscv/li64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/lla32.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/lla64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-g2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-g2_p1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-g2p0.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-i2p0.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-i2p0m2_a2f2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-nse-with-version.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-two-nse.d: Likewise.
|
|
|
|
|
|
|
RISC-V: Implement support for big endian targets.
RISC-V instruction/code is always little endian, but data might be
big-endian. Therefore, we can not use the original bfd_get/bfd_put
to get/put the code for big endian targets. Add new riscv_get_insn
and riscv_put_insn to always get/put code as little endian can resolve
the problem. Just remember to update them once we have supported
the 48-bit/128-bit instructions in the future patches.
bfd/
* config.bfd: Added targets riscv64be*-*-*, riscv32be*-*-* and
riscvbe*-*-*. Also added riscv_elf[32|64]_be_vec.
* configure.ac: Handle riscv_elf[32|64]_be_vec.
* configure: Regenerate.
* elfnn-riscv.c: Include <limits.h> and define CHAR_BIT for
riscv_is_insn_reloc.
(riscv_get_insn): RISC-V instructions are always little endian, but
bfd_get may be used for big-endian, so add new riscv_get_insn to handle
the insturctions.
(riscv_put_insn): Likewsie.
(riscv_is_insn_reloc): Check if we are relocaing an instruction.
(perform_relocation): Call riscv_is_insn_reloc to decide if we should
use riscv_[get|put]_insn or bfd_[get|put].
(riscv_zero_pcrel_hi_reloc): Use riscv_[get|put]_insn, bfd_[get|put]l32
or bfd_[get|put]l16 for code.
(riscv_elf_relocate_section): Likewise.
(riscv_elf_finish_dynamic_symbol): Likewise.
(riscv_elf_finish_dynamic_sections): Likewise.
(_bfd_riscv_relax_call): Likewise.
(_bfd_riscv_relax_lui): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_pc): Likewise.
(riscv_elf_object_p): Handled for big endian.
(TARGET_BIG_SYM, TARGET_BIG_NAME): Defined.
* targets.c: Add riscv_elf[32|64]_be_vec.
(_bfd_target_vector): Likewise.
gas/
* config/tc-riscv.c (riscv_target_format): Add elf64-bigriscv and
elf32-bigriscv.
(install_insn): Always write instructions as little endian.
(riscv_make_nops): Likewise.
(md_convert_frag_branch): Likewise.
(md_number_to_chars): Write data in target endianness.
(options, md_longopts): Add -mbig-endian and -mlittle-endian options.
(md_parse_option): Handle the endian options.
* config/tc-riscv.h: Only define TARGET_BYTES_BIG_ENDIAN if not
already defined.
* configure.tgt: Added riscv64be*, riscv32be*, riscvbe*.
ld/
* configure.tgt: Added riscvbe-*-*, riscv32be*-*-*, riscv64be*-*-*,
riscv32be*-*-linux*, and riscv64be*-*-linux*.
* Makefile.am: Added eelf32briscv.c, eelf32briscv_ilp32f.c and
eelf32briscv_ilp32.c.
* Makefile.in: Regenerate.
* emulparams/elf32briscv.sh: Added.
* emulparams/elf32briscv_ilp32.sh: Likewise.
* emulparams/elf32briscv_ilp32f.sh: Likewise.
* emulparams/elf64briscv.sh: Likewise.
* emulparams/elf64briscv_lp64.sh: Likewise.
* emulparams/elf64briscv_lp64f.sh: Likewise.
2021-01-06 05:50:32 +08:00
|
|
|
|
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_target_format): Add elf64-bigriscv and
|
|
|
|
|
|
elf32-bigriscv.
|
|
|
|
|
|
(install_insn): Always write instructions as little endian.
|
|
|
|
|
|
(riscv_make_nops): Likewise.
|
|
|
|
|
|
(md_convert_frag_branch): Likewise.
|
|
|
|
|
|
(md_number_to_chars): Write data in target endianness.
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(options, md_longopts): Add -mbig-endian and -mlittle-endian options.
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(md_parse_option): Handle the endian options.
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* config/tc-riscv.h: Only define TARGET_BYTES_BIG_ENDIAN if not
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already defined.
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* configure.tgt: Added riscv64be*, riscv32be*, riscvbe*.
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2021-01-05 04:37:49 +08:00
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2021-01-04 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/26256
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* config/obj-elf.c (obj_elf_change_section): Also filter out
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SHF_LINK_ORDER.
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2021-01-04 08:46:21 +08:00
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2021-01-04 Alan Modra <amodra@gmail.com>
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PR 27102
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* symbols.c (S_SET_EXTERNAL): Revise section symbol warning
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message and register symbol error message.
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2021-01-04 06:23:37 +08:00
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2021-01-04 Alan Modra <amodra@gmail.com>
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PR 27101
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* read.c (s_align): Use a large enough type for "align" to hold
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the result of get_absolute_expression.
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2021-01-01 11:51:52 +08:00
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2021-01-01 Nicolas Boulenguez <nicolas@debian.org>
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* config/tc-i386.c: Correct comment spelling.
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* config/tc-riscv.c: Likewise.
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* config/tc-s390.c: Correct comment grammar.
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* doc/c-i386.texi: Correct spelling.
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* doc/c-s390.texi: Correct grammar.
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2021-01-01 06:58:58 +08:00
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2021-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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2021-01-01 07:47:36 +08:00
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2021-01-01 Hans-Peter Nilsson <hp@bitrange.com>
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* config/tc-mmix.h (md_single_noop_insn): Change to "swym 0".
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2021-01-01 06:47:13 +08:00
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For older changes see ChangeLog-2020
|
2016-01-01 18:44:31 +08:00
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2021-01-01 06:47:13 +08:00
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Copyright (C) 2021 Free Software Foundation, Inc.
|
2016-01-01 18:44:31 +08:00
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Copying and distribution of this file, with or without modification,
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|
are permitted in any medium without royalty provided the copyright
|
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|
notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
|
