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DT_FLAGS_1: Add Solaris bits The following bits in DT_FLAGS_1 are used by Solaris: #define DF_1_KMOD 0x10000000 /* kernel module */ #define DF_1_WEAKFILTER 0x20000000 /* apply weak binding to DT_FILTER */ #define DF_1_NOCOMMON 0x40000000 /* no COMMON symbols exist */ binutils/ * readelf.c (process_dynamic_section): Also dump DF_1_KMOD, DF_1_WEAKFILTER and DF_1_NOCOMMON. include/ * elf/common.h (DF_1_KMOD): New. (DF_1_WEAKFILTER): Likewise. (DF_1_NOCOMMON): Likewise.
2018-03-22 03:55:40 +08:00
2018-03-21 H.J. Lu <hongjiu.lu@intel.com>
* elf/common.h (DF_1_KMOD): New.
(DF_1_WEAKFILTER): Likewise.
(DF_1_NOCOMMON): Likewise.
RISC-V: Add .insn support. gas/ChangeLog 2018-03-07 Kito Cheng <kito.cheng@gmail.com> * config/tc-riscv.c (opcode_name_list): New. (opcode_names_hash): Likewise. (init_opcode_names_hash): Likewise. (opcode_name_lookup): Likewise. (validate_riscv_insn): New argument length, and add new format which used in .insn directive. (md_begin): Refine hash table initialization logic into init_opcode_hash. (init_opcode_hash): New. (my_getOpcodeExpression): Parse opcode name for .insn. (riscv_ip): New argument hash, able to handle .insn directive. (s_riscv_insn): Handler for .insn directive. (riscv_pseudo_table): New entry for .insn. * doc/c-riscv.texi: Add documentation for .insn directive. * testsuite/gas/riscv/insn.d: Add testcase for .insn directive. * testsuite/gas/riscv/insn.s: Likewise. include/ChangeLog 2018-03-07 Kito Cheng <kito.cheng@gmail.com> * opcode/riscv.h (OP_MASK_FUNCT3): New. (OP_SH_FUNCT3): Likewise. (OP_MASK_FUNCT7): Likewise. (OP_SH_FUNCT7): Likewise. (OP_MASK_OP2): Likewise. (OP_SH_OP2): Likewise. (OP_MASK_CFUNCT4): Likewise. (OP_SH_CFUNCT4): Likewise. (OP_MASK_CFUNCT3): Likewise. (OP_SH_CFUNCT3): Likewise. (riscv_insn_types): Likewise. opcodes/ChangeLog 2018-03-07 Kito Cheng <kito.cheng@gmail.com> * riscv-opc.c (riscv_insn_types): New.
2018-03-15 07:04:03 +08:00
2018-03-14 Kito Cheng <kito.cheng@gmail.com>
* opcode/riscv.h (OP_MASK_FUNCT3): New.
(OP_SH_FUNCT3): Likewise.
(OP_MASK_FUNCT7): Likewise.
(OP_SH_FUNCT7): Likewise.
(OP_MASK_OP2): Likewise.
(OP_SH_OP2): Likewise.
(OP_MASK_CFUNCT4): Likewise.
(OP_SH_CFUNCT4): Likewise.
(OP_MASK_CFUNCT3): Likewise.
(OP_SH_CFUNCT3): Likewise.
(riscv_insn_types): Likewise.
Prevent memory access violations when attempting to parse an x86_64 PE binary containing corrupt unwind information. PR 22113 incldue * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd field. bfd * pei-x86_64.c (pex64_get_unwind_info): Change to a boolean function. Add an end address parameter. Check access of the data pointer to make sure that they do not extend beyond the end address. Return FALSE if any check fails. Add the end address pointer to the ui structure. (pex64_xdata_print_uwd_codes): Check accesses of the raw unwind codes to make sure that they do not extend beyond the end address pointer. Print an error message and return immediately if any check fails.
2018-03-13 22:02:52 +08:00
2018-03-13 Nick Clifton <nickc@redhat.com>
PR 22113
* coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
field.
x86: Remove support for old (<= 2.8.1) versions of gcc Old (<= 2.8.1) versions of gcc generate broken fsubp, fsubrp, fdivp and fdivrp instructions. Assembler translates them to correct ones with a warning: [hjl@gnu-cfl-1 gas]$ cat x.s fsubp %st(3),%st [hjl@gnu-cfl-1 gas]$ gcc -c x.s x.s: Assembler messages: x.s:1: Warning: translating to `fsubp %st,%st(3)' [hjl@gnu-cfl-1 gas]$ This patch removes support for old (<= 2.8.1) versions of gcc: [hjl@gnu-cfl-1 gas]$ ./as-new -o x.o x.s x.s: Assembler messages: x.s:1: Error: operand type mismatch for `fsubp' [hjl@gnu-cfl-1 gas]$ gas/ * NEWS: Mention -mold-gcc removal. * config/tc-i386.c (i386_error): Remove old_gcc_only. (old_gcc): Removed. (match_template): Remove old gcc support. (OPTION_MOLD_GCC): Removed. (OPTION_MRELAX_RELOCATIONS): Updated. (md_longopts): Remove OPTION_MOLD_GCC. (md_parse_option): Likewise. (md_show_usage): Remove -mold-gcc. * testsuite/gas/i386/general.s: Convert fsub/fdiv tests for old (<= 2.8.1) versions of gcc. * testsuite/gas/i386/intel.s: Likewise. * testsuite/gas/i386/general.l: Updated. * testsuite/gas/i386/intel-intel.d: Likewise. * testsuite/gas/i386/intel.d: Likewise. * testsuite/gas/i386/intel.e: Likewise. * testsuite/gas/i386/i386.exp: Don't pass -mold-gcc to general. include/ * opcode/i386 (OLDGCC_COMPAT): Removed. opcodes/ * i386-gen.c (opcode_modifiers): Remove OldGcc. * i386-opc.h (OldGcc): Removed. (i386_opcode_modifier): Remove oldgcc. * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp instructions for old (<= 2.8.1) versions of gcc. * i386-tbl.h: Regenerated.
2018-03-08 22:31:32 +08:00
2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
* opcode/i386 (OLDGCC_COMPAT): Removed.
[ARM] Remove ARM_FEATURE_COPY macro Among the macros to manipulate an arm_feature_set structure is the ARM_FEATURE_COPY which copy the value of a feature set into another. This can be achieved with a simple assignement which most of the existing code does. This patch removes the last 2 uses of that macro and remove the macro altogether. 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com> include/ * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition. 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com> opcodes/ * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY macro by assignements.
2018-02-28 00:40:45 +08:00
2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
* opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
MIPS16/opcodes: Free up `M' operand code The `M' and `m' MIPS16 operand codes are functionally the same, denoting a 7-bit register list that is encoded the same way for both SAVE and RESTORE. Use `m' for both instructions then, making `M' available for a different use. opcodes/ * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case. (mips16_opcodes): Replace `M' with `m' for "restore". include/ * opcode/mips.h: Remove `M' operand code.
2018-02-21 04:51:36 +08:00
2018-02-20 Maciej W. Rozycki <macro@mips.com>
* opcode/mips.h: Remove `M' operand code.
Add support for reading msdos MZ executables. See email thread starting here: https://www.sourceware.org/ml/binutils/2018-01/msg00001.html include * coff/msdos.h: New header. * coff/pe.h: Move common defines to msdos.h. * coff/powerpc.h: Likewise. bfd * i386msdos.c (msdos_mkobject); New function. (msdos_object_p): New function. (i386_msdos_vec): Use msdos_object_p as the check_format function. * peicode.h: Rename external_PEI_DOS_hdr, DOSMAGIC, and NT_SIGNATURE to external_DOS_hdr, IMAGE_DOS_SIGNATURE, and IMAGE_NT_SIGNATURE. * peXXigen.c: Likewise. * coff-ia64.c: Likewise.
2018-02-12 21:12:45 +08:00
2018-02-12 Zebediah Figura <z.figura12@gmail.com>
* coff/msdos.h: New header.
* coff/pe.h: Move common defines to msdos.h.
* coff/powerpc.h: Likewise.
Add note about 2.30 branch creation to changelogs
2018-01-13 21:26:38 +08:00
2018-01-13 Nick Clifton <nickc@redhat.com>
2.30 branch created.
ld: Add "-z separate-code" option to ELF linker The new "-z separate-code" option will generate separate code LOAD segment which must be in wholly disjoint pages from any other data. include/ PR ld/22393 * bfdlink.h (bfd_link_info): Add separate_code. ld/ PR ld/22393 * NEWS: Mention "-z separate-code". * emultempl/elf32.em (gld${EMULATION_NAME}_get_script): Get builtin linker scripts and return linker scripts from disk for "-z separate-code". (gld${EMULATION_NAME}_handle_option): Handle "-z separate-code" and "-z noseparate-code". * genscripts.sh: Generate linker scripts for "-z separate-code". (LD_FLAG): Set to *textonly for "-z separate-code". * ld.texinfo: Document "-z separate-code". * lexsup.c (elf_shlib_list_options): Add linker help messsages for "-z separate-code" and "-z noseparate-code". * scripttempl/elf.sc (SEPARATE_TEXT): New (TEXT_SEGMENT_ALIGN): Likewise. Use ${TEXT_SEGMENT_ALIGN} to align and pad text segment to ${MAXPAGESIZE}.
2018-01-12 11:01:39 +08:00
2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
PR ld/22393
* bfdlink.h (bfd_link_info): Add separate_code.
RISC-V: Add 2 missing privileged registers. gas/ * testsuite/gas/riscv/priv-reg.s: Add missing stval and mtval. * testsuite/gas/riscv/priv-reg.d: Likewise. include/ * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL. (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry. Add alias to map mbadaddr to CSR_MTVAL.
2018-01-05 06:17:53 +08:00
2018-01-04 Jim Wilson <jimw@sifive.com>
* opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
(CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
Add alias to map mbadaddr to CSR_MTVAL.
Update year range in copyright notice of binutils files
2018-01-03 13:17:27 +08:00
2018-01-03 Alan Modra <amodra@gmail.com>
Update year range in copyright notice of all files.
ChangeLog rotation
2018-01-03 13:15:17 +08:00
For older changes see ChangeLog-2017
New 2016 binutils ChangeLog files Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files.
2016-01-01 18:44:31 +08:00
ChangeLog rotation
2018-01-03 13:15:17 +08:00
Copyright (C) 2018 Free Software Foundation, Inc.
New 2016 binutils ChangeLog files Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files.
2016-01-01 18:44:31 +08:00
Copying and distribution of this file, with or without modification,
are permitted in any medium without royalty provided the copyright
notice and this notice are preserved.
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