2018-08-10 04:33:36 +08:00
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/* Target-dependent code for GNU/Linux on RISC-V processors.
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Copyright (C) 2018 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "riscv-tdep.h"
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#include "osabi.h"
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#include "glibc-tdep.h"
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#include "linux-tdep.h"
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#include "solib-svr4.h"
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#include "regset.h"
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/* Define the general register mapping. The kernel puts the PC at offset 0,
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gdb puts it at offset 32. Register x0 is always 0 and can be ignored.
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Registers x1 to x31 are in the same place. */
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static const struct regcache_map_entry riscv_linux_gregmap[] =
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{
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{ 1, RISCV_PC_REGNUM, 0 },
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{ 31, RISCV_RA_REGNUM, 0 }, /* x1 to x31 */
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{ 0 }
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};
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/* Define the general register regset. */
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static const struct regset riscv_linux_gregset =
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{
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riscv_linux_gregmap, regcache_supply_regset, regcache_collect_regset
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};
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/* Define hook for core file support. */
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static void
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riscv_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
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iterate_over_regset_sections_cb *cb,
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void *cb_data,
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const struct regcache *regcache)
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{
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2018-08-13 17:04:11 +08:00
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cb (".reg", (32 * riscv_isa_xlen (gdbarch)), (32 * riscv_isa_xlen (gdbarch)),
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2018-08-10 04:33:36 +08:00
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&riscv_linux_gregset, NULL, cb_data);
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/* TODO: Add FP register support. */
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}
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/* Initialize RISC-V Linux ABI info. */
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static void
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riscv_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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linux_init_abi (info, gdbarch);
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set_gdbarch_software_single_step (gdbarch, riscv_software_single_step);
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set_solib_svr4_fetch_link_map_offsets (gdbarch,
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(riscv_isa_xlen (gdbarch) == 4
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? svr4_ilp32_fetch_link_map_offsets
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: svr4_lp64_fetch_link_map_offsets));
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/* GNU/Linux uses SVR4-style shared libraries. */
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set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
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/* GNU/Linux uses the dynamic linker included in the GNU C Library. */
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set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
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/* Enable TLS support. */
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set_gdbarch_fetch_tls_load_module_address (gdbarch,
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svr4_fetch_objfile_link_map);
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set_gdbarch_iterate_over_regset_sections
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(gdbarch, riscv_linux_iterate_over_regset_sections);
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}
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/* Initialize RISC-V Linux target support. */
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void
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_initialize_riscv_linux_tdep (void)
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{
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gdbarch_register_osabi (bfd_arch_riscv, 0, GDB_OSABI_LINUX,
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riscv_linux_init_abi);
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}
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