Add simulation of MUL and NEG instructions to AArch64 simulator.
* cpustate.c: Remove spurious spaces from TRACE strings.
Print hex equivalents of floats and doubles.
Check element number against array size when accessing vector
registers.
* memory.c: Trace memory reads when --trace-memory is enabled.
Remove float and double load and store functions.
* memory.h (aarch64_get_mem_float): Delete prototype.
(aarch64_get_mem_double): Likewise.
(aarch64_set_mem_float): Likewise.
(aarch64_set_mem_double): Likewise.
* simulator (IS_SET): Always return either 0 or 1.
(IS_CLEAR): Likewise.
(fldrs_pcrel): Load and store floats using 32-bit memory accesses
and doubles using 64-bit memory accesses.
(fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
(fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
(fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
(fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
(store_pair_double, load_pair_float, load_pair_double): Likewise.
(do_vec_MUL_by_element): New function.
(do_vec_op2): Call do_vec_MUL_by_element.
(do_scalar_NEG): New function.
(do_double_add): Call do_scalar_NEG.
2016-03-18 17:32:32 +08:00
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2016-03-18 Nick Clifton <nickc@redhat.com>
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* cpustate.c: Remove spurious spaces from TRACE strings.
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Print hex equivalents of floats and doubles.
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Check element number against array size when accessing vector
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registers.
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2016-03-18 22:44:27 +08:00
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(GET_VEC_ELEMENT): Fix off by one error checking for an invalid
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element index.
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(SET_VEC_ELEMENT): Likewise.
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Add simulation of MUL and NEG instructions to AArch64 simulator.
* cpustate.c: Remove spurious spaces from TRACE strings.
Print hex equivalents of floats and doubles.
Check element number against array size when accessing vector
registers.
* memory.c: Trace memory reads when --trace-memory is enabled.
Remove float and double load and store functions.
* memory.h (aarch64_get_mem_float): Delete prototype.
(aarch64_get_mem_double): Likewise.
(aarch64_set_mem_float): Likewise.
(aarch64_set_mem_double): Likewise.
* simulator (IS_SET): Always return either 0 or 1.
(IS_CLEAR): Likewise.
(fldrs_pcrel): Load and store floats using 32-bit memory accesses
and doubles using 64-bit memory accesses.
(fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
(fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
(fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
(fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
(store_pair_double, load_pair_float, load_pair_double): Likewise.
(do_vec_MUL_by_element): New function.
(do_vec_op2): Call do_vec_MUL_by_element.
(do_scalar_NEG): New function.
(do_double_add): Call do_scalar_NEG.
2016-03-18 17:32:32 +08:00
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* memory.c: Trace memory reads when --trace-memory is enabled.
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Remove float and double load and store functions.
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* memory.h (aarch64_get_mem_float): Delete prototype.
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(aarch64_get_mem_double): Likewise.
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(aarch64_set_mem_float): Likewise.
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(aarch64_set_mem_double): Likewise.
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* simulator (IS_SET): Always return either 0 or 1.
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(IS_CLEAR): Likewise.
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(fldrs_pcrel): Load and store floats using 32-bit memory accesses
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and doubles using 64-bit memory accesses.
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(fldrd_pcrel, fldrs_wb, fldrs_abs, fldrs_scale_ext): Likewise.
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(fldrd_wb, fldrd_abs, fsturs, fsturd, fldurs, fldurd): Likewise.
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(fstrs_abs, fstrs_wb, fstrs_scale_ext, fstrd_abs): Likewise.
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(fstrd_wb, fstrd_scale_ext, store_pair_float): Likewise.
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(store_pair_double, load_pair_float, load_pair_double): Likewise.
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(do_vec_MUL_by_element): New function.
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(do_vec_op2): Call do_vec_MUL_by_element.
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(do_scalar_NEG): New function.
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(do_double_add): Call do_scalar_NEG.
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2016-03-03 23:14:35 +08:00
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2016-03-03 Nick Clifton <nickc@redhat.com>
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* simulator.c (set_flags_for_sub32): Correct type of signbit.
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(CondCompare): Swap interpretation of bit 30.
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(DO_ADDP): Delete macro.
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(do_vec_ADDP): Copy source registers before starting to update
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destination register.
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(do_vec_FADDP): Likewise.
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(do_vec_load_store): Fix computation of sizeof_operation.
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(rbit64): Fix type of constant.
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(aarch64_step): When displaying insn value, display all 32 bits.
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2016-01-09 17:09:35 +08:00
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2016-01-10 Mike Frysinger <vapier@gentoo.org>
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* config.in, configure: Regenerate.
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2016-01-11 06:49:48 +08:00
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2016-01-10 Mike Frysinger <vapier@gentoo.org>
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* configure: Regenerate.
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2016-01-11 05:52:25 +08:00
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2016-01-10 Mike Frysinger <vapier@gentoo.org>
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* configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call.
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* configure: Regenerate.
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2016-01-10 16:50:08 +08:00
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2016-01-10 Mike Frysinger <vapier@gentoo.org>
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* configure: Regenerate.
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2016-01-11 04:55:44 +08:00
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2016-01-10 Mike Frysinger <vapier@gentoo.org>
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* configure: Regenerate.
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2016-01-10 16:50:08 +08:00
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2016-01-09 18:58:01 +08:00
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2016-01-10 Mike Frysinger <vapier@gentoo.org>
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* configure.ac (SIM_AC_OPTION_INLINE): Delete call.
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* configure: Regenerate.
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2016-01-09 17:00:53 +08:00
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2016-01-10 Mike Frysinger <vapier@gentoo.org>
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* configure: Regenerate.
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2016-01-09 18:13:37 +08:00
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2016-01-10 Mike Frysinger <vapier@gentoo.org>
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* configure: Regenerate.
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2016-01-09 09:23:37 +08:00
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2016-01-09 Mike Frysinger <vapier@gentoo.org>
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* config.in, configure: Regenerate.
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2016-01-03 14:51:44 +08:00
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2016-01-06 Mike Frysinger <vapier@gentoo.org>
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* interp.c (sim_create_inferior): Mark argv and env const.
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(sim_open): Mark argv const.
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2015-12-31 12:26:05 +08:00
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2016-01-05 Mike Frysinger <vapier@gentoo.org>
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* interp.c: Delete dis-asm.h include.
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(info, opbuf, op_printf, aarch64_print_insn, sim_dis_read): Delete.
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(sim_create_inferior): Delete disassemble init logic.
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(OPTION_DISAS, aarch64_option_handler, aarch64_options): Delete.
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(sim_open): Delete sim_add_option_table call.
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* memory.c (mem_error): Delete disas check.
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* simulator.c: Delete dis-asm.h include.
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(disas): Delete.
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(HALT_UNALLOC): Replace disassembly logic with TRACE_DISASM.
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(HALT_NYI): Likewise.
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(handle_halt): Delete disas call.
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(aarch64_step): Replace disas logic with TRACE_DISASM.
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* simulator.h: Delete dis-asm.h include.
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(aarch64_print_insn): Delete.
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2016-01-05 11:24:03 +08:00
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2016-01-04 Mike Frysinger <vapier@gentoo.org>
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* simulator.c (MAX, MIN): Delete.
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(do_vec_maxv): Change MAX to max and MIN to min.
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(do_vec_fminmaxV): Likewise.
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2015-12-09 19:34:45 +08:00
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2016-01-04 Tristan Gingold <gingold@adacore.com>
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* simulator.c: Remove syscall.h include.
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2016-01-04 17:06:01 +08:00
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2016-01-04 Mike Frysinger <vapier@gentoo.org>
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* configure: Regenerate.
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2016-01-03 13:36:13 +08:00
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2016-01-03 Mike Frysinger <vapier@gentoo.org>
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* configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
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* configure: Regenerate.
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2016-01-03 06:46:16 +08:00
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2016-01-02 Mike Frysinger <vapier@gentoo.org>
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* configure: Regenerate.
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2015-12-27 14:41:27 +08:00
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2015-12-27 Mike Frysinger <vapier@gentoo.org>
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* interp.c (sim_dis_read): Change private_data to application_data.
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(sim_create_inferior): Likewise.
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2015-04-11 07:40:34 +08:00
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2015-12-27 Mike Frysinger <vapier@gentoo.org>
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* Makefile.in (SIM_OBJS): Delete sim-hload.o.
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2015-12-27 09:20:23 +08:00
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2015-12-26 Mike Frysinger <vapier@gentoo.org>
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* config.in, configure: Regenerate.
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2015-12-26 20:05:41 +08:00
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2015-12-26 Mike Frysinger <vapier@gentoo.org>
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* interp.c (sim_create_inferior): Update comment and argv check.
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2015-12-26 20:12:13 +08:00
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2015-12-14 Nick Clifton <nickc@redhat.com>
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* simulator.c (system_get): New function. Provides read
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access to the dczid system register.
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(do_mrs): New function - implements the MRS instruction.
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(dexSystem): Call do_mrs for the MRS instruction. Halt on
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unimplemented system instructions.
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2015-11-24 Nick Clifton <nickc@redhat.com>
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* configure.ac: New configure template.
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* aclocal.m4: Generate.
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* config.in: Generate.
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* configure: Generate.
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* cpustate.c: New file - functions for accessing AArch64 registers.
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* cpustate.h: New header.
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* decode.h: New header.
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* interp.c: New file - interface between GDB and simulator.
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* Makefile.in: New makefile template.
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* memory.c: New file - functions for simulating aarch64 memory
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accesses.
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* memory.h: New header.
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* sim-main.h: New header.
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* simulator.c: New file - aarch64 simulator functions.
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* simulator.h: New header.
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