binutils-gdb/ld/testsuite/ld-mips-elf/mips16-branch-absolute.d

#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 link branch to absolute expression
#source: ../../../gas/testsuite/gas/mips/mips16-branch-absolute.s
#ld: -Ttext 0 -e foo

.*: +file format .*mips.*

Disassembly of section \.text:
	\.\.\.
[0-9a-f]+ <[^>]*> f100 1018 	b	0+001234 <foo\+0x234>
[0-9a-f]+ <[^>]*> f100 6016 	bteqz	0+001234 <foo\+0x234>
[0-9a-f]+ <[^>]*> f100 6114 	btnez	0+001234 <foo\+0x234>
[0-9a-f]+ <[^>]*> f100 2212 	beqz	v0,0+001234 <foo\+0x234>
[0-9a-f]+ <[^>]*> f100 2a10 	bnez	v0,0+001234 <foo\+0x234>
[0-9a-f]+ <[^>]*> 6500      	nop
	\.\.\.
MIPS/GAS: Keep the ISA bit in the addend of branch relocations Correct a problem with the ISA bit being stripped from the addend of compressed branch relocations, affecting RELA targets. It has been there since microMIPS support has been added, with: commit df58fc944dbc6d5efd8d3826241b64b6af22f447 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Sun Jul 24 14:20:15 2011 +0000 <https://sourceware.org/ml/binutils/2011-07/msg00198.html>, ("MIPS: microMIPS ASE support") and R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 relocations originally affected, and the R_MIPS16_PC16_S1 relocation recently added with commit c9775dde3277 ("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support") actually triggering a linker error, due to its heightened processing strictness level: $ cat test.s .text .set mips16 foo: b bar .set bar, 0x1235 .align 4, 0 $ as -EB -n32 -o test.o test.s $ objdump -dr test.o test.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: f000 1000 b 4 <foo+0x4> 0: R_MIPS16_PC16_S1 ABS+0x1230 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o test test.o test.o: In function `foo': (.text+0x0): Branch to a non-instruction-aligned address $ This is because the ISA bit of the branch target does not match the ISA bit of the referring branch, hardwired to 1 of course. Retain the ISA bit then, so that the linker knows this is really MIPS16 code referred: $ objdump -dr fixed.o fixed.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: f000 1000 b 4 <foo+0x4> 0: R_MIPS16_PC16_S1 ABS+0x1231 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o fixed fixed.o $ Add a set of MIPS16 tests to cover the relevant cases, excluding linker tests though which would overflow the in-place addend on REL targets and use them as dump patterns for RELA targets only. gas/ * config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS16_16_PCREL_S1> <BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1> <BFD_RELOC_MICROMIPS_16_PCREL_S1>: Keep the ISA bit in the addend calculated. * testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit in `bar', export `foo'. * testsuite/gas/mips/mips16-branch-absolute.d: Adjust accordingly. * testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: Likewise. ld/ * testsuite/ld-mips-elf/mips16-branch-absolute.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except from `mips16-branch-absolute' and `mips16-branch-absolute-addend', referred indirectly only. 2016-07-12 08:30:48 +08:00			`#objdump: -dr --prefix-addresses --show-raw-insn`
			`#name: MIPS16 link branch to absolute expression`
			`#source: ../../../gas/testsuite/gas/mips/mips16-branch-absolute.s`
MIPS/LD/testsuite: Correct mips-elf.exp test ABI/emul/endian arrangement Similarly to commit 86b24e15c45b ("MIPS/LD/testsuite: Correct comm-data.exp test ABI/emul/endian arrangement") update the mips-elf.exp test script to: - correctly select emulations for targets using non-traditional MIPS emulations, - correctly select ABIs for targets that do not support all of them, - use the default endianness selection where possible to benefit targets that support only one, - simplify test invocation by providing ABI-specific `run_dump_test' wrappers, specifically `run_dump_test_o32', `run_dump_test_n32', `run_dump_test_n64' and `run_dump_test_eabi', which remove the need to use conditionals across the Expect script or to repeat ABI-specific GAS and LD flags with each invocation, removing numerous test failures for `mips-sgi-irix6', `mips64-openbsd', `mips64el-openbsd' and `mips64el-ps2-elf' targets and broadening coverage for several MIPS targets. There are some new failures for the `mips64el-ps2-elf' target with tests that were not previously run for that target: FAIL: MIPS16 link branch to absolute expression (n32) FAIL: MIPS16 link branch to absolute expression 1 (n32) FAIL: MIPS16 link branch to absolute expression 2 (n32) FAIL: microMIPS link branch to absolute expression (n32) FAIL: MIPS ELF got reloc n32 FAIL: MIPS ELF xgot reloc n32 FAIL: undefined weak symbol overflow (n32) FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs n32 FAIL: ld-mips-elf/attr-gnu-4-0-n32-ph FAIL: ld-mips-elf/attr-gnu-4-1-n32-ph FAIL: ld-mips-elf/attr-gnu-4-2-n32-ph FAIL: ld-mips-elf/attr-gnu-4-3-n32-ph FAIL: MIPSr6 JALR reloc unaligned/cross-mode link test (n32) which are mostly due to dump discrepancies caused by mapping differences coming from the default linker scripts used by these test cases, or sometimes because of the specific MIPS processor architecture recorded in the ELF file taking precedence over the general MIPS ISA level also recorded. Finally, the R_MIPS16_HI16/R_MIPS16_LO16 relocation test failure is a preexisting issue with the IRIX style emulation. These failures will have to be addressed separately. ld/ * testsuite/ld-mips-elf/mips-elf.exp (run_dump_test_abi) (run_dump_test_o32, run_dump_test_n32, run_dump_test_n64) (run_dump_test_eabi): New procedures. (has_newabi, has_elf32): Remove variables. (has_abi): New associative array variable. (abi_asflags, abi_ldflags): Update settings across targets. (irixemul): New variable. Replace `run_dump_test' calls where applicable throughout with `run_dump_test_o32', `run_dump_test_n32', `run_dump_test_n64' and `run_dump_test_eabi' as appropriate. Remove explicit passing of `abi_asflags' and `abi_ldflags'. Use `noarch' for tests that require their own architecture setting. Force the big endianness for tests that require it. Select the endianness required for `objdump invocation with the `reloc-2' test. Conditionalize tests run via `run_ld_link_tests' on the ABI required and use the ABI list from the `has_abi' array where appropriate. * testsuite/ld-mips-elf/attr-gnu-4-0-n32-ph.d: Remove ABI and endianness selection options from `ld' and `source' tags. Relax output format matching. * testsuite/ld-mips-elf/attr-gnu-4-0-n64-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-1-n32-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-1-n64-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-2-n32-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-2-n64-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-3-n32-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-3-n64-ph.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend-micromips-n32.d: Remove ABI and endianness selection options from `as', `ld', `source' tags, and also the `-march=from-abi' option. Remove the `as' tag where it would become empty. * testsuite/ld-mips-elf/bal-jalx-addend-micromips-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-micromips-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-micromips-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-addend-n32.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-addend-n64.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-addend.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-n32.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-n64.d: Likewise. * testsuite/ld-mips-elf/branch-absolute.d: Likewise. * testsuite/ld-mips-elf/dyn-sec64.d: Likewise. * testsuite/ld-mips-elf/eh-frame1-n32.d: Likewise. * testsuite/ld-mips-elf/eh-frame1-n64.d: Likewise. * testsuite/ld-mips-elf/eh-frame2-n32.d: Likewise. * testsuite/ld-mips-elf/eh-frame2-n64.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n32-embed.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n32.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n64-embed.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n64-irix.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n64.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n32.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n64-irix.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n64.d: Likewise. * testsuite/ld-mips-elf/emit-relocs-1.d: Likewise. * testsuite/ld-mips-elf/got-dump-2.d: Likewise. * testsuite/ld-mips-elf/got-page-2.d: Likewise. * testsuite/ld-mips-elf/jal-global-overflow-0.d: Likewise. * testsuite/ld-mips-elf/jal-global-overflow-1.d: Likewise. * testsuite/ld-mips-elf/jal-local-overflow-0.d: Likewise. * testsuite/ld-mips-elf/jal-local-overflow-1.d: Likewise. * testsuite/ld-mips-elf/jalbal.d: Likewise. * testsuite/ld-mips-elf/jalx-addend-n32.d: Likewise. * testsuite/ld-mips-elf/jalx-addend-n64.d: Likewise. * testsuite/ld-mips-elf/jalx-addend.d: Likewise. * testsuite/ld-mips-elf/jalx-local-n32.d: Likewise. * testsuite/ld-mips-elf/jalx-local-n64.d: Likewise. * testsuite/ld-mips-elf/jalx-local.d: Likewise. * testsuite/ld-mips-elf/jr-to-b-1.d: Likewise. * testsuite/ld-mips-elf/jr-to-b-2.d: Likewise. * testsuite/ld-mips-elf/lsi-4010-isa.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-addend-n32.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-addend-n64.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-n32.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-n64.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-3.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n32-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n32-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n64-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n64-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-addend-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-addend-3.d: Likewise. * testsuite/ld-mips-elf/mips16-hilo-n32.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-0.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-1.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-addend-2.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-addend-6.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-n32-0.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-n32-1.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-0.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-1.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-0.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-1.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: Likewise. * testsuite/ld-mips-elf/multi-got-1.d: Likewise. * testsuite/ld-mips-elf/multi-got-hidden-1.d: Likewise. * testsuite/ld-mips-elf/multi-got-hidden-2.d: Likewise. * testsuite/ld-mips-elf/multi-got-no-shared.d: Likewise. * testsuite/ld-mips-elf/no-shared-1-n32.d: Likewise. * testsuite/ld-mips-elf/no-shared-1-n64.d: Likewise. * testsuite/ld-mips-elf/no-shared-1-o32.d: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-2.d: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-3-error.d: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-4-error.d: Likewise. * testsuite/ld-mips-elf/pie-n32.d: Likewise. * testsuite/ld-mips-elf/pie-n64.d: Likewise. * testsuite/ld-mips-elf/pie-o32.d: Likewise. * testsuite/ld-mips-elf/rel32-n32.d: Likewise. * testsuite/ld-mips-elf/rel32-o32.d: Likewise. * testsuite/ld-mips-elf/rel64.d: Likewise. * testsuite/ld-mips-elf/relax-jalr-n32.d: Likewise. * testsuite/ld-mips-elf/reloc-1-n32.d: Likewise. * testsuite/ld-mips-elf/reloc-1-n64.d: Likewise. * testsuite/ld-mips-elf/reloc-2.d: Likewise. * testsuite/ld-mips-elf/reloc-3-n32.d: Likewise. * testsuite/ld-mips-elf/reloc-local-overflow.d: Likewise. * testsuite/ld-mips-elf/textrel-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-r6-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump.d: Likewise. * testsuite/ld-mips-elf/unaligned-ldpc-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-ldpc-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-lwpc-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-lwpc-1.d: Likewise. 2018-07-13 03:01:44 +08:00			`#ld: -Ttext 0 -e foo`
MIPS/GAS: Keep the ISA bit in the addend of branch relocations Correct a problem with the ISA bit being stripped from the addend of compressed branch relocations, affecting RELA targets. It has been there since microMIPS support has been added, with: commit df58fc944dbc6d5efd8d3826241b64b6af22f447 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Sun Jul 24 14:20:15 2011 +0000 <https://sourceware.org/ml/binutils/2011-07/msg00198.html>, ("MIPS: microMIPS ASE support") and R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1 and R_MICROMIPS_PC16_S1 relocations originally affected, and the R_MIPS16_PC16_S1 relocation recently added with commit c9775dde3277 ("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support") actually triggering a linker error, due to its heightened processing strictness level: $ cat test.s .text .set mips16 foo: b bar .set bar, 0x1235 .align 4, 0 $ as -EB -n32 -o test.o test.s $ objdump -dr test.o test.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: f000 1000 b 4 <foo+0x4> 0: R_MIPS16_PC16_S1 ABS+0x1230 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o test test.o test.o: In function `foo': (.text+0x0): Branch to a non-instruction-aligned address $ This is because the ISA bit of the branch target does not match the ISA bit of the referring branch, hardwired to 1 of course. Retain the ISA bit then, so that the linker knows this is really MIPS16 code referred: $ objdump -dr fixed.o fixed.o: file format elf32-ntradbigmips Disassembly of section .text: 00000000 <foo>: 0: f000 1000 b 4 <foo+0x4> 0: R_MIPS16_PC16_S1 ABS+0x1231 ... $ ld -melf32btsmipn32 -Ttext 0 -e 0 -o fixed fixed.o $ Add a set of MIPS16 tests to cover the relevant cases, excluding linker tests though which would overflow the in-place addend on REL targets and use them as dump patterns for RELA targets only. gas/ * config/tc-mips.c (md_apply_fix) <BFD_RELOC_MIPS16_16_PCREL_S1> <BFD_RELOC_MICROMIPS_7_PCREL_S1, BFD_RELOC_MICROMIPS_10_PCREL_S1> <BFD_RELOC_MICROMIPS_16_PCREL_S1>: Keep the ISA bit in the addend calculated. * testsuite/gas/mips/mips16-branch-absolute.s: Set the ISA bit in `bar', export `foo'. * testsuite/gas/mips/mips16-branch-absolute.d: Adjust accordingly. * testsuite/gas/mips/mips16-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/mips16-branch-absolute-addend-n64.d: Likewise. ld/ * testsuite/ld-mips-elf/mips16-branch-absolute.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: New test. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests, except from `mips16-branch-absolute' and `mips16-branch-absolute-addend', referred indirectly only. 2016-07-12 08:30:48 +08:00
			`.: +file format .mips.*`

			`Disassembly of section \.text:`
			`\.\.\.`
			`[0-9a-f]+ <[^>]*> f100 1018 b 0+001234 <foo\+0x234>`
			`[0-9a-f]+ <[^>]*> f100 6016 bteqz 0+001234 <foo\+0x234>`
			`[0-9a-f]+ <[^>]*> f100 6114 btnez 0+001234 <foo\+0x234>`
			`[0-9a-f]+ <[^>]*> f100 2212 beqz v0,0+001234 <foo\+0x234>`
			`[0-9a-f]+ <[^>]*> f100 2a10 bnez v0,0+001234 <foo\+0x234>`
			`[0-9a-f]+ <[^>]*> 6500 nop`
			`\.\.\.`