binutils-gdb/ld/testsuite/ld-mips-elf/jal-global-overflow-1.d

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MIPS/BFD: Enable local R_MIPS_26 overflow detection The original MIPS SVR4 psABI defines the calculation for the R_MIPS_26 relocation in a complex way, as follows[1]: Name Value Field Symbol Calculation R_MIPS_26 4 T-targ26 local (((A << 2) | \ (P & 0xf0000000)) + S) >> 2 4 T-targ26 external (sign-extend(A << 2) + S) >> 2 This is further clarified, by correcting typos (already applied in the excerpt above) in the 64-bit psABI extension[2]. A note is included in both documents to specify that for the purpose of relocation processing a local symbol is one with binding STB_LOCAL and type STT_SECTION, and otherwise, a symbol is external. We have both calculations implemented for the R_MIPS_26 relocation, and by extension also for the R_MIPS16_26 and R_MICROMIPS_26_S1 relocations, from now on collectively called jump relocations. However our code uses a different condition to tell local and external symbols apart, that is it only checks for the STB_LOCAL binding and ignores the symbol type, however for REL relocations only. The external calculation is used for all RELA jump relocations. In reality the difference matters for jump relocations referring local MIPS16 and, as from recent commit 44d3da233815 ("MIPS/GAS: Treat local jump relocs the same no matter if REL or RELA"), also local microMIPS symbols. Such relocations are not converted to refer to corresponding section symbols instead and retain the original local symbol reference. It can be inferred from the relocation calculation definitions that the addend is effectively unsigned for the local case and explicitly signed for the external case. With the REL relocation format it makes sense given the limited range provided for by the field being relocated: the use of an unsigned addend expands the range by one bit for the local case, because a negative offset from a section symbol makes no sense, and any usable negative offset from the original local symbol will have worked out positive if converted to a section-relative reference. In the external case a signed addend gives more flexibility as offsets both negative and positive can be used with a symbol. Any such offsets will typically have a small value. The inclusion of the (P & 0xf0000000) component, ORed in the calculation in the local case, seems questionable as bits 31:28 are not included in the relocatable field and are masked out as the relocation is applied. Their value is therefore irrelevant for output processing, the relocated field ends up the same regardless of their value. They could be used for overflow detection, however this is precluded by adding them to bits 31:28 of the symbol referred, as the sum will not correspond to the value calculated by the processor at run time whenever bits 31:28 of the symbol referred are not all zeros, even though it is valid as long they are the same as bits 31:28 of P. We deal with this problem by ignoring any overflow resulting from the local calculation. This however makes us miss genuine overflow cases, where 31:28 of the symbol referred are different from bits 31:28 of P, and non-functional code is produced. Given the situation, for the purpose of overflow detection we can change our code to follow the original psABI and only treat the in-place addend as unsigned in the section symbol case, permitting jumps to offsets 128MiB and above into section. Sections so large may be uncommon, but still a reasonable use case. On the other hand such large offsets from regular local symbols are not expected and it makes sense to support (possibly small) negative offsets instead, also in consistency with what we do for global symbols. Drop the (P & 0xf0000000) component then, treat the addend as signed with local non-section symbols and also detect an overflow in the result of such calculation with local symbols. NB it does not affect the value computed for the relocatable field, it only affects overflow detection. References: [1] "SYSTEM V APPLICATION BINARY INTERFACE, MIPS RISC Processor Supplement, 3rd Edition", Figure 4-11: "Relocation Types", p. 4-19 <http://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf> [2] "64-bit ELF Object File Specification, Draft Version 2.5", Table 32 "Relocation Types", p. 45 <http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf> bfd/ * elfxx-mips.c (mips_elf_calculate_relocation): <R_MIPS16_26> <R_MIPS_26, R_MICROMIPS_26_S1>: Drop the region bits of the reloc location from calculation, treat the addend as signed with local non-section symbols and enable overflow detection. ld/ * testsuite/ld-mips-elf/jal-global-overflow-0.d: New test. * testsuite/ld-mips-elf/jal-global-overflow-1.d: New test. * testsuite/ld-mips-elf/jal-local-overflow-0.d: New test. * testsuite/ld-mips-elf/jal-local-overflow-1.d: New test. * testsuite/ld-mips-elf/jal-global-overflow.s: New test source. * testsuite/ld-mips-elf/jal-local-overflow.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-28 17:30:22 +08:00
#name: MIPS JAL to global symbol overflow 1
#source: jal-global-overflow.s
MIPS/LD/testsuite: Correct mips-elf.exp test ABI/emul/endian arrangement Similarly to commit 86b24e15c45b ("MIPS/LD/testsuite: Correct comm-data.exp test ABI/emul/endian arrangement") update the mips-elf.exp test script to: - correctly select emulations for targets using non-traditional MIPS emulations, - correctly select ABIs for targets that do not support all of them, - use the default endianness selection where possible to benefit targets that support only one, - simplify test invocation by providing ABI-specific `run_dump_test' wrappers, specifically `run_dump_test_o32', `run_dump_test_n32', `run_dump_test_n64' and `run_dump_test_eabi', which remove the need to use conditionals across the Expect script or to repeat ABI-specific GAS and LD flags with each invocation, removing numerous test failures for `mips-sgi-irix6', `mips64-openbsd', `mips64el-openbsd' and `mips64el-ps2-elf' targets and broadening coverage for several MIPS targets. There are some new failures for the `mips64el-ps2-elf' target with tests that were not previously run for that target: FAIL: MIPS16 link branch to absolute expression (n32) FAIL: MIPS16 link branch to absolute expression 1 (n32) FAIL: MIPS16 link branch to absolute expression 2 (n32) FAIL: microMIPS link branch to absolute expression (n32) FAIL: MIPS ELF got reloc n32 FAIL: MIPS ELF xgot reloc n32 FAIL: undefined weak symbol overflow (n32) FAIL: R_MIPS16_HI16 and R_MIPS16_LO16 relocs n32 FAIL: ld-mips-elf/attr-gnu-4-0-n32-ph FAIL: ld-mips-elf/attr-gnu-4-1-n32-ph FAIL: ld-mips-elf/attr-gnu-4-2-n32-ph FAIL: ld-mips-elf/attr-gnu-4-3-n32-ph FAIL: MIPSr6 JALR reloc unaligned/cross-mode link test (n32) which are mostly due to dump discrepancies caused by mapping differences coming from the default linker scripts used by these test cases, or sometimes because of the specific MIPS processor architecture recorded in the ELF file taking precedence over the general MIPS ISA level also recorded. Finally, the R_MIPS16_HI16/R_MIPS16_LO16 relocation test failure is a preexisting issue with the IRIX style emulation. These failures will have to be addressed separately. ld/ * testsuite/ld-mips-elf/mips-elf.exp (run_dump_test_abi) (run_dump_test_o32, run_dump_test_n32, run_dump_test_n64) (run_dump_test_eabi): New procedures. (has_newabi, has_elf32): Remove variables. (has_abi): New associative array variable. (abi_asflags, abi_ldflags): Update settings across targets. (irixemul): New variable. Replace `run_dump_test' calls where applicable throughout with `run_dump_test_o32', `run_dump_test_n32', `run_dump_test_n64' and `run_dump_test_eabi' as appropriate. Remove explicit passing of `abi_asflags' and `abi_ldflags'. Use `noarch' for tests that require their own architecture setting. Force the big endianness for tests that require it. Select the endianness required for `objdump invocation with the `reloc-2' test. Conditionalize tests run via `run_ld_link_tests' on the ABI required and use the ABI list from the `has_abi' array where appropriate. * testsuite/ld-mips-elf/attr-gnu-4-0-n32-ph.d: Remove ABI and endianness selection options from `ld' and `source' tags. Relax output format matching. * testsuite/ld-mips-elf/attr-gnu-4-0-n64-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-1-n32-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-1-n64-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-2-n32-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-2-n64-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-3-n32-ph.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-3-n64-ph.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend-micromips-n32.d: Remove ABI and endianness selection options from `as', `ld', `source' tags, and also the `-march=from-abi' option. Remove the `as' tag where it would become empty. * testsuite/ld-mips-elf/bal-jalx-addend-micromips-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-addend.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-micromips-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-micromips-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-local.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-ignore.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-n32.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic-n64.d: Likewise. * testsuite/ld-mips-elf/bal-jalx-pic.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-addend-n32.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-addend-n64.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-addend.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-n32.d: Likewise. * testsuite/ld-mips-elf/branch-absolute-n64.d: Likewise. * testsuite/ld-mips-elf/branch-absolute.d: Likewise. * testsuite/ld-mips-elf/dyn-sec64.d: Likewise. * testsuite/ld-mips-elf/eh-frame1-n32.d: Likewise. * testsuite/ld-mips-elf/eh-frame1-n64.d: Likewise. * testsuite/ld-mips-elf/eh-frame2-n32.d: Likewise. * testsuite/ld-mips-elf/eh-frame2-n64.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n32-embed.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n32.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n64-embed.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n64-irix.d: Likewise. * testsuite/ld-mips-elf/elf-rel-got-n64.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n32.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n64-irix.d: Likewise. * testsuite/ld-mips-elf/elf-rel-xgot-n64.d: Likewise. * testsuite/ld-mips-elf/emit-relocs-1.d: Likewise. * testsuite/ld-mips-elf/got-dump-2.d: Likewise. * testsuite/ld-mips-elf/got-page-2.d: Likewise. * testsuite/ld-mips-elf/jal-global-overflow-0.d: Likewise. * testsuite/ld-mips-elf/jal-global-overflow-1.d: Likewise. * testsuite/ld-mips-elf/jal-local-overflow-0.d: Likewise. * testsuite/ld-mips-elf/jal-local-overflow-1.d: Likewise. * testsuite/ld-mips-elf/jalbal.d: Likewise. * testsuite/ld-mips-elf/jalx-addend-n32.d: Likewise. * testsuite/ld-mips-elf/jalx-addend-n64.d: Likewise. * testsuite/ld-mips-elf/jalx-addend.d: Likewise. * testsuite/ld-mips-elf/jalx-local-n32.d: Likewise. * testsuite/ld-mips-elf/jalx-local-n64.d: Likewise. * testsuite/ld-mips-elf/jalx-local.d: Likewise. * testsuite/ld-mips-elf/jr-to-b-1.d: Likewise. * testsuite/ld-mips-elf/jr-to-b-2.d: Likewise. * testsuite/ld-mips-elf/lsi-4010-isa.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-addend-n32.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-addend-n64.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-n32.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute-n64.d: Likewise. * testsuite/ld-mips-elf/micromips-branch-absolute.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-3.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n32.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend-n64.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-addend.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n32-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n32-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n32.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n64-1.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n64-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute-n64.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-absolute.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-addend-2.d: Likewise. * testsuite/ld-mips-elf/mips16-branch-addend-3.d: Likewise. * testsuite/ld-mips-elf/mips16-hilo-n32.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-0.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-1.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-addend-2.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-addend-6.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-n32-0.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-n32-1.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-0.d: Likewise. * testsuite/ld-mips-elf/mips16-pcrel-n64-sym32-1.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-0.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-1.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: Likewise. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: Likewise. * testsuite/ld-mips-elf/multi-got-1.d: Likewise. * testsuite/ld-mips-elf/multi-got-hidden-1.d: Likewise. * testsuite/ld-mips-elf/multi-got-hidden-2.d: Likewise. * testsuite/ld-mips-elf/multi-got-no-shared.d: Likewise. * testsuite/ld-mips-elf/no-shared-1-n32.d: Likewise. * testsuite/ld-mips-elf/no-shared-1-n64.d: Likewise. * testsuite/ld-mips-elf/no-shared-1-o32.d: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-2.d: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-3-error.d: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-4-error.d: Likewise. * testsuite/ld-mips-elf/pie-n32.d: Likewise. * testsuite/ld-mips-elf/pie-n64.d: Likewise. * testsuite/ld-mips-elf/pie-o32.d: Likewise. * testsuite/ld-mips-elf/rel32-n32.d: Likewise. * testsuite/ld-mips-elf/rel32-o32.d: Likewise. * testsuite/ld-mips-elf/rel64.d: Likewise. * testsuite/ld-mips-elf/relax-jalr-n32.d: Likewise. * testsuite/ld-mips-elf/reloc-1-n32.d: Likewise. * testsuite/ld-mips-elf/reloc-1-n64.d: Likewise. * testsuite/ld-mips-elf/reloc-2.d: Likewise. * testsuite/ld-mips-elf/reloc-3-n32.d: Likewise. * testsuite/ld-mips-elf/reloc-local-overflow.d: Likewise. * testsuite/ld-mips-elf/textrel-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-r6-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch-r6-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-branch.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-2.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump-micromips.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump-mips16.d: Likewise. * testsuite/ld-mips-elf/unaligned-jump.d: Likewise. * testsuite/ld-mips-elf/unaligned-ldpc-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-ldpc-1.d: Likewise. * testsuite/ld-mips-elf/unaligned-lwpc-0.d: Likewise. * testsuite/ld-mips-elf/unaligned-lwpc-1.d: Likewise.
2018-07-13 03:01:44 +08:00
#ld: -Ttext 0x1fffd000 -e 0x1fffd000
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
#error: \A[^\n]*: in function `foo':\n
MIPS/BFD: Enable local R_MIPS_26 overflow detection The original MIPS SVR4 psABI defines the calculation for the R_MIPS_26 relocation in a complex way, as follows[1]: Name Value Field Symbol Calculation R_MIPS_26 4 T-targ26 local (((A << 2) | \ (P & 0xf0000000)) + S) >> 2 4 T-targ26 external (sign-extend(A << 2) + S) >> 2 This is further clarified, by correcting typos (already applied in the excerpt above) in the 64-bit psABI extension[2]. A note is included in both documents to specify that for the purpose of relocation processing a local symbol is one with binding STB_LOCAL and type STT_SECTION, and otherwise, a symbol is external. We have both calculations implemented for the R_MIPS_26 relocation, and by extension also for the R_MIPS16_26 and R_MICROMIPS_26_S1 relocations, from now on collectively called jump relocations. However our code uses a different condition to tell local and external symbols apart, that is it only checks for the STB_LOCAL binding and ignores the symbol type, however for REL relocations only. The external calculation is used for all RELA jump relocations. In reality the difference matters for jump relocations referring local MIPS16 and, as from recent commit 44d3da233815 ("MIPS/GAS: Treat local jump relocs the same no matter if REL or RELA"), also local microMIPS symbols. Such relocations are not converted to refer to corresponding section symbols instead and retain the original local symbol reference. It can be inferred from the relocation calculation definitions that the addend is effectively unsigned for the local case and explicitly signed for the external case. With the REL relocation format it makes sense given the limited range provided for by the field being relocated: the use of an unsigned addend expands the range by one bit for the local case, because a negative offset from a section symbol makes no sense, and any usable negative offset from the original local symbol will have worked out positive if converted to a section-relative reference. In the external case a signed addend gives more flexibility as offsets both negative and positive can be used with a symbol. Any such offsets will typically have a small value. The inclusion of the (P & 0xf0000000) component, ORed in the calculation in the local case, seems questionable as bits 31:28 are not included in the relocatable field and are masked out as the relocation is applied. Their value is therefore irrelevant for output processing, the relocated field ends up the same regardless of their value. They could be used for overflow detection, however this is precluded by adding them to bits 31:28 of the symbol referred, as the sum will not correspond to the value calculated by the processor at run time whenever bits 31:28 of the symbol referred are not all zeros, even though it is valid as long they are the same as bits 31:28 of P. We deal with this problem by ignoring any overflow resulting from the local calculation. This however makes us miss genuine overflow cases, where 31:28 of the symbol referred are different from bits 31:28 of P, and non-functional code is produced. Given the situation, for the purpose of overflow detection we can change our code to follow the original psABI and only treat the in-place addend as unsigned in the section symbol case, permitting jumps to offsets 128MiB and above into section. Sections so large may be uncommon, but still a reasonable use case. On the other hand such large offsets from regular local symbols are not expected and it makes sense to support (possibly small) negative offsets instead, also in consistency with what we do for global symbols. Drop the (P & 0xf0000000) component then, treat the addend as signed with local non-section symbols and also detect an overflow in the result of such calculation with local symbols. NB it does not affect the value computed for the relocatable field, it only affects overflow detection. References: [1] "SYSTEM V APPLICATION BINARY INTERFACE, MIPS RISC Processor Supplement, 3rd Edition", Figure 4-11: "Relocation Types", p. 4-19 <http://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf> [2] "64-bit ELF Object File Specification, Draft Version 2.5", Table 32 "Relocation Types", p. 45 <http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf> bfd/ * elfxx-mips.c (mips_elf_calculate_relocation): <R_MIPS16_26> <R_MIPS_26, R_MICROMIPS_26_S1>: Drop the region bits of the reloc location from calculation, treat the addend as signed with local non-section symbols and enable overflow detection. ld/ * testsuite/ld-mips-elf/jal-global-overflow-0.d: New test. * testsuite/ld-mips-elf/jal-global-overflow-1.d: New test. * testsuite/ld-mips-elf/jal-local-overflow-0.d: New test. * testsuite/ld-mips-elf/jal-local-overflow-1.d: New test. * testsuite/ld-mips-elf/jal-global-overflow.s: New test source. * testsuite/ld-mips-elf/jal-local-overflow.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-28 17:30:22 +08:00
#error: \(\.text\+0x2000\): relocation truncated to fit: R_MIPS_26 against `abar'\n
ld error/warning messages This patch standardizes messages in ld, to better conform to the GNU coding standard. Besides issues of capitalization and full-stops, I've - Split up help messages for target options, so that adding a new option does not mean loss of translation for all the others. - Embedded tabs have been removed, since a user might have tab stops set at other than 8 char intervals. - Added missing program name (%P). ld isn't the compiler. - Put %F and %X first (and removed %X if %F was present). These can go anywhere, but look silly in the m%Fiddle of a message, and choosing "%P%F:" in some messages but "%F%P:" in others leads to the likelihood of duplication in ld.pot. Besides, the colon belongs with %P. * emulparams/call_nop.sh, * emulparams/cet.sh, * emulparams/elf32mcore.sh, * emultempl/aarch64elf.em * emultempl/aix.em, * emultempl/alphaelf.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/avrelf.em, * emultempl/beos.em, * emultempl/bfin.em, * emultempl/cr16elf.em, * emultempl/elf32.em, * emultempl/elf-generic.em, * emultempl/hppaelf.em, * emultempl/linux.em, * emultempl/lnk960.em, * emultempl/m68hc1xelf.em, * emultempl/m68kcoff.em, * emultempl/m68kelf.em, * emultempl/metagelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nds32elf.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc32elf.em, * emultempl/ppc64elf.em, * emultempl/scoreelf.em, * emultempl/sh64elf.em, * emultempl/spuelf.em, * emultempl/sunos.em, * emultempl/tic6xdsbt.em, * emultempl/ticoff.em, * emultempl/v850elf.em, * emultempl/vms.em, * emultempl/vxworks.em, * emultempl/xtensaelf.em, * ldcref.c, * ldctor.c, * ldexp.c, * ldfile.c, * ldgram.y, * ldlang.c, * ldmain.c, * ldmisc.c, * ldwrite.c, * lexsup.c, * mri.c, * pe-dll.c, * plugin.c: Standardize error/warning messages. * testsuite/ld-arc/jli-overflow.err, * testsuite/ld-arm/cmse-implib-errors.out, * testsuite/ld-arm/cmse-new-earlier-later-implib.out, * testsuite/ld-arm/cmse-new-implib-not-sg-in-implib.out, * testsuite/ld-arm/cmse-new-wrong-implib.out, * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out, * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out, * testsuite/ld-arm/vxworks1-static.d, * testsuite/ld-cris/tls-err-20x.d, * testsuite/ld-cris/tls-err-29.d, * testsuite/ld-cris/tls-err-31.d, * testsuite/ld-cris/tls-err-33.d, * testsuite/ld-cris/tls-err-35.d, * testsuite/ld-cris/tls-err-37.d, * testsuite/ld-cris/tls-err-39.d, * testsuite/ld-cris/tls-err-41.d, * testsuite/ld-cris/tls-err-43.d, * testsuite/ld-cris/tls-err-45.d, * testsuite/ld-cris/tls-err-47.d, * testsuite/ld-cris/tls-err-49.d, * testsuite/ld-cris/tls-err-51.d, * testsuite/ld-cris/tls-err-67.d, * testsuite/ld-elf/dwarf2.err, * testsuite/ld-elf/dwarf3.err, * testsuite/ld-elf/orphan-5.l, * testsuite/ld-elf/orphan-6.l, * testsuite/ld-i386/vxworks1-static.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic-micromips.d, * testsuite/ld-mips-elf/bal-jalx-pic-n32.d, * testsuite/ld-mips-elf/bal-jalx-pic-n64.d, * testsuite/ld-mips-elf/bal-jalx-pic.d, * testsuite/ld-mips-elf/jal-global-overflow-1.d, * testsuite/ld-mips-elf/jal-local-overflow-1.d, * testsuite/ld-mips-elf/mode-change-error-1.d, * testsuite/ld-mips-elf/unaligned-branch-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-2.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-ignore-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-micromips.d, * testsuite/ld-mips-elf/unaligned-branch-mips16.d, * testsuite/ld-mips-elf/unaligned-branch-r6-1.d, * testsuite/ld-mips-elf/unaligned-branch-r6-2.d, * testsuite/ld-mips-elf/unaligned-branch.d, * testsuite/ld-mips-elf/unaligned-jalx-1.d, * testsuite/ld-mips-elf/unaligned-jalx-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-3.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-addend-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jalx-micromips-1.d, * testsuite/ld-mips-elf/unaligned-jalx-mips16-1.d, * testsuite/ld-mips-elf/unaligned-jump-micromips.d, * testsuite/ld-mips-elf/unaligned-jump-mips16.d, * testsuite/ld-mips-elf/unaligned-jump.d, * testsuite/ld-mips-elf/unaligned-ldpc-1.d, * testsuite/ld-mips-elf/unaligned-lwpc-1.d, * testsuite/ld-mips-elf/undefined.d, * testsuite/ld-mips-elf/vxworks1-static.d, * testsuite/ld-mmix/bpo-20.d, * testsuite/ld-mmix/bpo-20m.d, * testsuite/ld-mmix/bpo-7.d, * testsuite/ld-mmix/bpo-7m.d, * testsuite/ld-mmix/bpo-8.d, * testsuite/ld-mmix/bpo-8m.d, * testsuite/ld-mmix/greg-17.d, * testsuite/ld-mmix/greg-18.d, * testsuite/ld-mmix/greg-8.d, * testsuite/ld-mmix/greg-9.d, * testsuite/ld-plugin/plugin-14.d, * testsuite/ld-plugin/plugin-15.d, * testsuite/ld-plugin/plugin-16.d, * testsuite/ld-plugin/plugin-20.d, * testsuite/ld-plugin/plugin-21.d, * testsuite/ld-plugin/plugin-22.d, * testsuite/ld-plugin/plugin-23.d, * testsuite/ld-plugin/plugin-6.d, * testsuite/ld-plugin/plugin-7.d, * testsuite/ld-plugin/plugin-8.d, * testsuite/ld-powerpc/aix-weak-3-32.d, * testsuite/ld-powerpc/aix-weak-3-64.d, * testsuite/ld-powerpc/vxworks1-static.d, * testsuite/ld-sh/vxworks1-static.d, * testsuite/ld-sparc/vxworks1-static.d, * testsuite/ld-undefined/undefined.exp, * testsuite/ld-x86-64/pie1.d: Update for changed errors and warnings. * testsuite/ld-elf/warn1.d, * testsuite/ld-elf/warn2.d: Correct regex.
2018-02-24 07:58:12 +08:00
#error: [^\n]*: in function `bar':\n
MIPS/BFD: Enable local R_MIPS_26 overflow detection The original MIPS SVR4 psABI defines the calculation for the R_MIPS_26 relocation in a complex way, as follows[1]: Name Value Field Symbol Calculation R_MIPS_26 4 T-targ26 local (((A << 2) | \ (P & 0xf0000000)) + S) >> 2 4 T-targ26 external (sign-extend(A << 2) + S) >> 2 This is further clarified, by correcting typos (already applied in the excerpt above) in the 64-bit psABI extension[2]. A note is included in both documents to specify that for the purpose of relocation processing a local symbol is one with binding STB_LOCAL and type STT_SECTION, and otherwise, a symbol is external. We have both calculations implemented for the R_MIPS_26 relocation, and by extension also for the R_MIPS16_26 and R_MICROMIPS_26_S1 relocations, from now on collectively called jump relocations. However our code uses a different condition to tell local and external symbols apart, that is it only checks for the STB_LOCAL binding and ignores the symbol type, however for REL relocations only. The external calculation is used for all RELA jump relocations. In reality the difference matters for jump relocations referring local MIPS16 and, as from recent commit 44d3da233815 ("MIPS/GAS: Treat local jump relocs the same no matter if REL or RELA"), also local microMIPS symbols. Such relocations are not converted to refer to corresponding section symbols instead and retain the original local symbol reference. It can be inferred from the relocation calculation definitions that the addend is effectively unsigned for the local case and explicitly signed for the external case. With the REL relocation format it makes sense given the limited range provided for by the field being relocated: the use of an unsigned addend expands the range by one bit for the local case, because a negative offset from a section symbol makes no sense, and any usable negative offset from the original local symbol will have worked out positive if converted to a section-relative reference. In the external case a signed addend gives more flexibility as offsets both negative and positive can be used with a symbol. Any such offsets will typically have a small value. The inclusion of the (P & 0xf0000000) component, ORed in the calculation in the local case, seems questionable as bits 31:28 are not included in the relocatable field and are masked out as the relocation is applied. Their value is therefore irrelevant for output processing, the relocated field ends up the same regardless of their value. They could be used for overflow detection, however this is precluded by adding them to bits 31:28 of the symbol referred, as the sum will not correspond to the value calculated by the processor at run time whenever bits 31:28 of the symbol referred are not all zeros, even though it is valid as long they are the same as bits 31:28 of P. We deal with this problem by ignoring any overflow resulting from the local calculation. This however makes us miss genuine overflow cases, where 31:28 of the symbol referred are different from bits 31:28 of P, and non-functional code is produced. Given the situation, for the purpose of overflow detection we can change our code to follow the original psABI and only treat the in-place addend as unsigned in the section symbol case, permitting jumps to offsets 128MiB and above into section. Sections so large may be uncommon, but still a reasonable use case. On the other hand such large offsets from regular local symbols are not expected and it makes sense to support (possibly small) negative offsets instead, also in consistency with what we do for global symbols. Drop the (P & 0xf0000000) component then, treat the addend as signed with local non-section symbols and also detect an overflow in the result of such calculation with local symbols. NB it does not affect the value computed for the relocatable field, it only affects overflow detection. References: [1] "SYSTEM V APPLICATION BINARY INTERFACE, MIPS RISC Processor Supplement, 3rd Edition", Figure 4-11: "Relocation Types", p. 4-19 <http://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf> [2] "64-bit ELF Object File Specification, Draft Version 2.5", Table 32 "Relocation Types", p. 45 <http://techpubs.sgi.com/library/manuals/4000/007-4658-001/pdf/007-4658-001.pdf> bfd/ * elfxx-mips.c (mips_elf_calculate_relocation): <R_MIPS16_26> <R_MIPS_26, R_MICROMIPS_26_S1>: Drop the region bits of the reloc location from calculation, treat the addend as signed with local non-section symbols and enable overflow detection. ld/ * testsuite/ld-mips-elf/jal-global-overflow-0.d: New test. * testsuite/ld-mips-elf/jal-global-overflow-1.d: New test. * testsuite/ld-mips-elf/jal-local-overflow-0.d: New test. * testsuite/ld-mips-elf/jal-local-overflow-1.d: New test. * testsuite/ld-mips-elf/jal-global-overflow.s: New test source. * testsuite/ld-mips-elf/jal-local-overflow.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-05-28 17:30:22 +08:00
#error: \(\.text\+0x4000\): relocation truncated to fit: R_MIPS_26 against `afoo'\Z