2008-08-15 20:10:21 +08:00
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2008-08-15 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
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* gas/s390/esa-g5.d: lxr operands are floating point.
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* gas/s390/esa-g5.s: Likewise.
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* gas/testsuite/gas/s390/zarch-z9-ec.d: rrdtr, rrxtr third
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operands is gpr.
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* gas/testsuite/gas/s390/zarch-z9-ec.s: Likewise.
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2008-08-13 05:44:56 +08:00
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2008-08-12 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/amd.s: Add syscall and sysret. Remove padding.
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* gas/i386/amd.d: Updated.
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* gas/i386/x86-64-opcode.d: Likewise.
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* gas/i386/i386.exp: Run x86-64-intel64.
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* gas/i386/x86-64-intel64.d: New.
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* gas/i386/x86-64-intel64.s: Likewise.
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* gas/i386/x86-64-opcode.s: Add syscall and sysret.
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2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
(elf_mips_copy_howto): ...this howto. Clear the size fields.
(mips_vxworks_jump_slot_howto_rela): Replace with...
(elf_mips_jump_slot_howto): ...this howto.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_plt_readonly): Define.
(elf_backend_plt_sym_val): Define for non-VxWorks targets.
(mips_vxworks_bfd_reloc_type_lookup): Delete.
(mips_vxworks_bfd_reloc_name_lookup): Likewise.
(mips_vxworks_rtype_to_howto): Likewise.
(elf_backend_want_dynbss): Don't define for VxWorks.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_got_symbol_offset): Don't define.
* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
* elfxx-mips.c (mips_elf_la25_stub): New structure.
(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
and "has_nonpic_branches" fields. Remove "is_relocation_target" and
"is_branch_target".
(mips_elf_link_hash_table): Add blank lines. Add
"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
"la25_stubs" and "add_stub_section" fields.
(mips_htab_traverse_info): New structure.
(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
(MIPS_RESERVED_GOTNO): Delete.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
(mips_elf_link_hash_newfunc): Update after the changes to
mips_elf_link_hash_entry.
(mips_elf_check_mips16_stubs): Replace the DATA parameter with
an INFO parameter. Don't look through warnings symbols here;
do it in mips_elf_check_symbols instead.
(mips_elf_create_stub_symbol): New function.
(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
(mips_elf_gotplt_index): Check for VxWorks.
(mips_elf_output_dynamic_relocation): Take the relocation index
as an extra parameter. Do not increment reloc_count here.
(mips_elf_initialize_tls_slots): Update the calls to
mips_elf_output_dynamic_relocation accordingly.
(mips_elf_multi_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Don't allocate reserved GOT
entries here. Unconditionally create .got.plt, but don't
set its alignment here.
(mips_elf_relocation_needs_la25_stub): New function.
(mips_elf_calculate_relocation): Redirect branches and jumps to
a non-PIC stub if one exists. Check !h->has_static_relocs instead
of !htab->is_vxworks when deciding whether to create dynamic
relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
_bfd_elf_create_dynamic_sections. Unconditionally set up
htab->splt and htab->sdynbss. Set htab->srelplt to ".rel.plt"
if !htab->is_vxworks. Add non-VxWorks values of
htab->plt_header_size and htab->plt_entry_size.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
non-branch static relocations. Set has_nonpic_branches when an la25
stub might be required. Set can_make_dynamic_p to TRUE if R_MIPS_32,
R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
rather than duplicating the condition. Do not make them dynamic
for read-only sections in non-PIC executable objects.
Do not protect this code with dynobj == NULL || htab->sgot == NULL;
handle each group of cases separately. Add a default case that
sets has_static_relocs for non-GOT relocations that cannot be
made dynamic. Don't set is_relocation_target and is_branch_target.
Reject non-PIC static relocations in shared objects.
(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
htab->use_plts_and_copy_relocs instead of htab->is_vxworks
to select PLT and copy-reloc handling. Set the alignment of
.plt and .got.plt when allocating the first entry. Generalize
code to handle REL as well as RELA sections and 64-bit as well as
32-bit GOT entries. Complain if we find a static-only reloc
against an externally-defined symbol and if we cannot create
dynamic relocations for it. Allocate copy relocs using
mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
Skip reserved .got.plt entries.
(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
instead of mips_elf_check_mips16_stubs to process each symbol.
Do the traversal for relocatable objects too.
(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
is empty. Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
to non-VxWorks targets. Only add DT_REL{,A}, DT_REL{,A}SZ and
DT_REL{,A}ENT if .rel.dyn is nonempty. Create a symbol for the
PLT. Allocate a nop at the end of the PLT. Allocate DT_MIPS_PLTGOT.
(mips_elf_create_la25_stub_info): New function.
(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
and copy relocs where necessary. Check pointer_equality_needed.
(mips_finish_exec_plt): New function.
(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
to the beginning of htab->sgot. Use htab->reserved_gotno instead
of MIPS_RESERVED_GOTNO. Assert htab->use_plts_and_copy_relocs
instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
Use mips_finish_exec_plt to create non-VxWorks PLT headers. Set
DT_MIPS_PLTGOT.
(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
from the indirect symbol to the direct symbol. Also copy
has_nonpic_branches for indirect symbols.
(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
DT_MIPS_RWPLT.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): Set
use_plts_and_copy_relocs to TRUE. Use TRUE rather than 1
when setting is_vxworks.
(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
each la25_stub.
(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
as PIC. Generalize message about linking PIC and non-PIC.
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
functions.
* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
* bfd-in2.h: Regenerated.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
STO_MIPS_PIC.
(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
(dump_relocations, debug_apply_relocations): Don't handle it here.
(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
(print_mips_pltgot_entry): New function.
(process_mips_specific): Dump the PLT GOT.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
(md_longopts): Add -call_nonpic.
(md_parse_option): Handle OPTION_CALL_NONPIC.
(md_show_usage): Add -call_nonpic.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
two variables.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
(is_mips_elf): New macro.
(stub_file, stub_bfd): New variables.
(hook_stub_info): New structure.
(hook_in_stub): New function.
(mips_add_stub_section): Likewise.
(mips_create_output_section_statements): Likewise.
(mips_before_allocation): Likewise.
(real_func): New variable.
(mips_for_each_input_file_wrapper): New function.
(mips_lang_for_each_input_file): Likewise.
(lang_for_each_input_file): Define.
(LDEMUL_BEFORE_ALLOCATION): Likewise.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* ld-mips-elf/mips16-pic-3a.s,
ld-mips-elf/mips16-pic-3b.s,
ld-mips-elf/mips16-pic-3.dd,
ld-mips-elf/mips16-pic-3.gd,
ld-mips-elf/mips16-pic-3.rd,
ld-mips-elf/mips16-pic-3.inc,
ld-mips-elf/pic-and-nonpic-1a.s,
ld-mips-elf/pic-and-nonpic-1b.s,
ld-mips-elf/pic-and-nonpic-1.ld,
ld-mips-elf/pic-and-nonpic-1.dd,
ld-mips-elf/pic-and-nonpic-1.nd,
ld-mips-elf/pic-and-nonpic-1-rel.dd,
ld-mips-elf/pic-and-nonpic-1-rel.nd,
ld-mips-elf/pic-and-nonpic-2a.s,
ld-mips-elf/pic-and-nonpic-2b.s,
ld-mips-elf/pic-and-nonpic-2.d,
ld-mips-elf/pic-and-nonpic-3a.s,
ld-mips-elf/pic-and-nonpic-3a.ld,
ld-mips-elf/pic-and-nonpic-3a.dd,
ld-mips-elf/pic-and-nonpic-3a.gd,
ld-mips-elf/pic-and-nonpic-3a.sd,
ld-mips-elf/pic-and-nonpic-3b.s,
ld-mips-elf/pic-and-nonpic-3b.ld,
ld-mips-elf/pic-and-nonpic-3b.ad,
ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-3b.gd,
ld-mips-elf/pic-and-nonpic-3b.nd,
ld-mips-elf/pic-and-nonpic-3b.pd,
ld-mips-elf/pic-and-nonpic-3b.rd,
ld-mips-elf/pic-and-nonpic-3b.sd,
ld-mips-elf/pic-and-nonpic-3-error.d,
ld-mips-elf/pic-and-nonpic-4a.s,
ld-mips-elf/pic-and-nonpic-4b.s,
ld-mips-elf/pic-and-nonpic-4b.ld,
ld-mips-elf/pic-and-nonpic-4b.ad,
ld-mips-elf/pic-and-nonpic-4b.dd,
ld-mips-elf/pic-and-nonpic-4b.gd,
ld-mips-elf/pic-and-nonpic-4b.nd,
ld-mips-elf/pic-and-nonpic-4b.rd,
ld-mips-elf/pic-and-nonpic-4b.sd,
ld-mips-elf/pic-and-nonpic-4-error.d,
ld-mips-elf/pic-and-nonpic-5a.s,
ld-mips-elf/pic-and-nonpic-5b.s,
ld-mips-elf/pic-and-nonpic-5b.ld,
ld-mips-elf/pic-and-nonpic-5b.ad,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-5b.gd,
ld-mips-elf/pic-and-nonpic-5b.nd,
ld-mips-elf/pic-and-nonpic-5b.rd,
ld-mips-elf/pic-and-nonpic-5b.sd,
ld-mips-elf/pic-and-nonpic-5b.pd,
ld-mips-elf/pic-and-nonpic-6.ld,
ld-mips-elf/pic-and-nonpic-6-o32a.s,
ld-mips-elf/pic-and-nonpic-6-o32b.s,
ld-mips-elf/pic-and-nonpic-6-o32c.s,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.pd,
ld-mips-elf/pic-and-nonpic-6-o32.rd,
ld-mips-elf/pic-and-nonpic-6-o32.sd,
ld-mips-elf/pic-and-nonpic-6-n32a.s,
ld-mips-elf/pic-and-nonpic-6-n32b.s,
ld-mips-elf/pic-and-nonpic-6-n32c.s,
ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.pd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n32.sd,
ld-mips-elf/pic-and-nonpic-6-n64a.s,
ld-mips-elf/pic-and-nonpic-6-n64b.s,
ld-mips-elf/pic-and-nonpic-6-n64c.s,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.pd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
2008-08-09 03:24:49 +08:00
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2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
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* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
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* gas/mips/mips.exp: Run it.
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bfd/
* reloc.c (BFD_RELOC_MIPS16_GOT16, BFD_RELOC_MIPS16_CALL16): Declare.
* libbfd.h, bfd-in2.h: Regenerate.
* elf32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(mips16_reloc_map): Add mappings.
* elf64-mips.c (mips16_elf64_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(mips16_elf64_howto_table_rela): Likewise.
(mips16_reloc_map): Add mappings.
* elfn32-mips.c (elf_mips16_howto_table_rel): Fill in reserved
R_MIPS16_GOT16 and R_MIPS16_CALL16 entries.
(elf_mips16_howto_table_rela): Likewise.
(mips16_reloc_map): Add mappings.
* elfxx-mips.c (mips_elf_create_shadow_symbol): New function.
(section_allows_mips16_refs_p): Likewise.
(mips16_stub_symndx): Likewise.
(mips_elf_check_mips16_stubs): Treat the data argument as a
bfd_link_info. Mark every dynamic symbol as needing MIPS16 stubs
and create a "shadow" symbol for the original MIPS16 definition.
(mips16_reloc_p, got16_reloc_p, call16_reloc_p, hi16_reloc_p)
(lo16_reloc_p, mips16_call_reloc_p): New functions.
(_bfd_mips16_elf_reloc_unshuffle): Use mips16_reloc_p to generalize
relocation checks.
(_bfd_mips16_elf_reloc_shuffle): Likewise.
(_bfd_mips_elf_lo16_reloc): Handle R_MIPS16_GOT16.
(mips_elf_got16_entry): Add comment.
(mips_elf_calculate_relocation): Use hi16_reloc_p,
lo16_reloc_p, mips16_call_reloc_p, call16_reloc_p and got16_reloc_p
to generalize relocation checks. Use section_allows_mips16_refs_p
instead of mips16_stub_section_p. Handle R_MIPS16_CALL16 and
R_MIPS16_GOT16, allowing the former to refer directly to a
MIPS16 function if its stub is not needed.
(mips16_stub_section_p): Delete.
(_bfd_mips_elf_symbol_processing): Convert odd-valued function
symbols into even MIPS16 symbols.
(mips_elf_add_lo16_rel_addend): Use mips16_reloc_p to generalize
a relocation check.
(_bfd_mips_elf_check_relocs): Calculate "bed" and "rel_end"
earlier in the function. Use mips16_stub_symndx to identify
the target function. Avoid out-of-bounds accesses when the
stub has no relocations; report an error instead. Use
section_allows_mips16_refs_p instead of mips16_stub_section_p.
Use mips16_call_reloc_p and got16_reloc_p to generalize relocation
checks. Handle R_MIPS16_CALL16 and R_MIPS16_GOT16. Don't create
dynamic relocations for absolute references to __gnu_local_gp.
(_bfd_mips_elf_always_size_sections): Pass a bfd_link_info as
the argument to mips_elf_check_mips16_stubs. Generalize comment.
(_bfd_mips_elf_relocate_section): Use hi16_reloc_p and got16_reloc_p
to generalize relocation checks.
(_bfd_mips_elf_finish_dynamic_symbol): If a dynamic MIPS16 function
symbol has a non-MIPS16 stub, redirect the symbol to the stub.
Fix an overly long line. Don't give dynamic symbols type STO_MIPS16.
(_bfd_mips_elf_gc_sweep_hook): Handle R_MIPS16_CALL16 and
R_MIPS16_GOT16.
gas/
* config/tc-mips.c (mips16_reloc_p, got16_reloc_p, hi16_reloc_p)
(lo16_reloc_p): New functions.
(reloc_needs_lo_p): Use hi16_reloc_p and got16_reloc_p to
generalize relocation checks.
(matching_lo_reloc): New function.
(fixup_has_matching_lo_p): Use it.
(mips16_mark_labels): Don't clobber a symbol's visibility.
(append_insn): Use hi16_reloc_p and lo16_reloc_p.
(mips16_ip): Handle BFD_RELOC_MIPS16_GOT16 and BFD_RELOC_MIPS16_CALL16.
(md_apply_fix): Likewise.
(mips16_percent_op): Add %got and %call16.
(mips_frob_file): Use got16_reloc_p to generalize relocation checks.
Use matching_lo_reloc.
(mips_force_relocation): Use hi16_reloc_p and lo16_reloc_p to
generalize relocation checks.
(mips_fix_adjustable): Use lo16_reloc_p to generalize relocation
checks.
gas/testsuite/
* gas/mips/elf-rel8-mips16.d, gas/mips/elf-rel8-mips16.s,
* gas/mips/elf-rel9-mips16.d, gas/mips/elf-rel9-mips16.s,
* gas/mips/elf-rel13-mips16.d, gas/mips/elf-rel13-mips16.s: New tests.
* gas/mips/mips.exp: Run them.
ld/testsuite/
* ld-mips-elf/mips16-local-stubs-1.d: Remove stub_for_h3,
which was only referenced by the .pdr section, and was not
actually needed by code.
* ld-mips-elf/mips16-intermix.d: Remove unused static function stubs.
* ld-mips-elf/mips16-pic-1a.s,
ld-mips-elf/mips16-pic-1b.s,
ld-mips-elf/mips16-pic-1-dummy.s,
ld-mips-elf/mips16-pic-1.dd,
ld-mips-elf/mips16-pic-1.gd,
ld-mips-elf/mips16-pic-1.inc,
ld-mips-elf/mips16-pic-1.ld,
ld-mips-elf/mips16-pic-2a.s,
ld-mips-elf/mips16-pic-2b.s,
ld-mips-elf/mips16-pic-2.ad,
ld-mips-elf/mips16-pic-2.dd,
ld-mips-elf/mips16-pic-2.gd,
ld-mips-elf/mips16-pic-2.nd,
ld-mips-elf/mips16-pic-2.rd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
2008-08-07 03:44:47 +08:00
|
|
|
|
2008-08-06 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/elf-rel8-mips16.d, gas/mips/elf-rel8-mips16.s,
|
|
|
|
|
|
* gas/mips/elf-rel9-mips16.d, gas/mips/elf-rel9-mips16.s,
|
|
|
|
|
|
* gas/mips/elf-rel13-mips16.d, gas/mips/elf-rel13-mips16.s: New tests.
|
|
|
|
|
|
* gas/mips/mips.exp: Run them.
|
|
|
|
|
|
|
gas/
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
Handle -mvsx and -mpower7.
(md_show_usage): Document -mpower7 and -mvsx.
* doc/as.texinfo (Target PowerPC): Document -mvsx.
* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.
gas/testsuite/
* gas/ppc/power7.d: New.
* gas/ppc/power7.s: Likewise.
* gas/ppc/ppc.exp: Run power7 test.
include/opcode/
* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
* ppc-opc.c (insert_xt6): New static function.
(extract_xt6): Likewise.
(insert_xa6): Likewise.
(extract_xa6: Likewise.
(insert_xb6): Likewise.
(extract_xb6): Likewise.
(insert_xb6s): Likewise.
(extract_xb6s): Likewise.
(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
XX3DM_MASK, PPCVSX): New.
(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
2008-08-02 12:38:51 +08:00
|
|
|
|
2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/ppc/power7.d: New.
|
|
|
|
|
|
* gas/ppc/power7.s: Likewise.
|
|
|
|
|
|
* gas/ppc/ppc.exp: Run power7 test.
|
|
|
|
|
|
|
2008-08-01 22:21:30 +08:00
|
|
|
|
2008-08-01 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/cfi/cfi-i386.s: Remove tests for AVX register maps.
|
|
|
|
|
|
* gas/cfi/cfi-x86_64.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/cfi/cfi-i386.d: Updated.
|
|
|
|
|
|
* gas/cfi/cfi-x86_64.d: Likewise.
|
|
|
|
|
|
|
2008-08-01 10:44:12 +08:00
|
|
|
|
2008-07-31 Peter Bergner <bergner@vnet.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/ppc/cell.s: Add altivec instructions.
|
|
|
|
|
|
* gas/ppc/cell.d: Update expected output.
|
|
|
|
|
|
* gas/ppc/power6.d: New.
|
|
|
|
|
|
* gas/ppc/power6.s: Likewise.
|
|
|
|
|
|
* gas/ppc/ppc.exp (powerpc64*-*-*): Move cell from here to...
|
|
|
|
|
|
(powerpc*-*-*): Here. Run power6 test.
|
|
|
|
|
|
|
2008-07-25 02:51:33 +08:00
|
|
|
|
2008-07-24 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/nops-1.d: Add -mtune=generic32.
|
|
|
|
|
|
* gas/i386/nops-2.d: Likewise.
|
|
|
|
|
|
* gas/i386/nops-3.d: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-nops-1.d: Add -mtune=generic64.
|
|
|
|
|
|
* gas/i386/x86-64-nops-2.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-nops-3.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-nops-4.d: Likewise.
|
|
|
|
|
|
|
2008-07-22 18:44:51 +08:00
|
|
|
|
2008-07-22 Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/tls-ill.l: Update error message.
|
|
|
|
|
|
* gas/mips/octeon-ill.l: Likewise.
|
|
|
|
|
|
|
* gas/bfin/{bit2.s, cache2.s, control_code2.s, event2.s,
logical2.s, move2.s, parallel.s, parallel2.s, parallel3.s,
parallel4.s, shift2.s, stack2.s, video2.s}: Remove DOS line
endings.
2008-07-14 11:54:27 +08:00
|
|
|
|
2008-07-14 Jie Zhang <jie.zhang@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/bfin/{bit2.s, cache2.s, control_code2.s, event2.s,
|
|
|
|
|
|
logical2.s, move2.s, parallel.s, parallel2.s, parallel3.s,
|
|
|
|
|
|
parallel4.s, shift2.s, stack2.s, video2.s}: Remove DOS line
|
|
|
|
|
|
endings.
|
|
|
|
|
|
|
2008-07-11 03:05:29 +08:00
|
|
|
|
2008-07-10 Richard Sandiford <rdsandiford@googlemail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
|
|
|
|
|
|
* gas/mips/mips.exp: Run them.
|
|
|
|
|
|
|
2008-07-09 18:28:12 +08:00
|
|
|
|
2008-07-09 Kai Tietz <kai.tietz@onevision.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp (x86-64-pcrel): Disable for w64.
|
|
|
|
|
|
(x86-64-sse5): Likewise.
|
|
|
|
|
|
(x86-64-opcode-inval): Likewise.
|
|
|
|
|
|
(x86-64-opcode-inval-intel): Likewise.
|
|
|
|
|
|
(x86-64-w64-pcrel): New.
|
|
|
|
|
|
* gas/i386/x86-64-w64-pcrel.d: New.
|
|
|
|
|
|
|
2008-07-08 03:28:02 +08:00
|
|
|
|
2008-07-07 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32.s: Move out coprocessor2 insns from here ...
|
|
|
|
|
|
* gas/mips/mips32-cp2.s: ... to here.
|
|
|
|
|
|
* gas/mips/mips32.d: Update.
|
|
|
|
|
|
* gas/mips/mips32-cp2.d: New file.
|
|
|
|
|
|
* gas/mips/mips32r2.s: Move out coprocessor2 insns from here ...
|
|
|
|
|
|
* gas/mips/mips32r2-cp2.s: ... to here.
|
|
|
|
|
|
* gas/mips/mips32r2.d: Update.
|
|
|
|
|
|
* gas/mips/mips32r2-cp2.d: New file.
|
|
|
|
|
|
* gas/mips/mips64.s: Move out coprocessor2 insns from here ...
|
|
|
|
|
|
* gas/mips/mips64-cp2.s: ... to here.
|
|
|
|
|
|
* gas/mips/mips64.d: Update.
|
|
|
|
|
|
* gas/mips/mips64-cp2.d: New file.
|
|
|
|
|
|
* gas/mips/mips.exp: Run mips32-cp2, mips32r2-cp2 and mips64-cp
|
|
|
|
|
|
except for Octeon.
|
|
|
|
|
|
* gas/mips/octeon.s: Add supported coprocessor insns. Move pop
|
|
|
|
|
|
down to keep alphabetical order.
|
|
|
|
|
|
* gas/mips/octeon.d: Update.
|
|
|
|
|
|
* gas/mips/octeon-ill.s: Add unsupported coprocessor insns.
|
|
|
|
|
|
* gas/mips/octeon-ill.l: Update.
|
|
|
|
|
|
|
2008-07-08 03:12:58 +08:00
|
|
|
|
2008-07-07 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/movw-local.d: New test.
|
|
|
|
|
|
* gas/arm/movw-local.s: New test.
|
|
|
|
|
|
|
2008-06-28 02:30:11 +08:00
|
|
|
|
2008-06-27 Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/odd-float.d: Replace ... with #pass.
|
|
|
|
|
|
* gas/mips/ldstla-32-shared.d: Add -march=mips1 for as.
|
|
|
|
|
|
* gas/mips/ldstla-32.d: Likewise.
|
|
|
|
|
|
* gas/mips/mips16-hilo-match.d: Add -mabi=32 -march=mips1 for as.
|
|
|
|
|
|
|
2008-06-21 02:34:00 +08:00
|
|
|
|
2008-06-19 Chao-ying Fu <fu@mips.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/e32-rel2.d: Add -march=mips1 for as.
|
|
|
|
|
|
|
2008-06-16 23:05:55 +08:00
|
|
|
|
2008-06-16 Hans-Peter Nilsson <hp@bitrange.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/6607
|
|
|
|
|
|
* gas/mmix/err-loc-10.s, gas/mmix/err-loc-9.s, gas/mmix/loc-6.d,
|
|
|
|
|
|
gas/mmix/loc-6.s, gas/mmix/loc-7.d, gas/mmix/loc-7.s: New tests.
|
|
|
|
|
|
|
include/opcode/
* mips.h: Document new field descriptors +x, +X, +p, +P, +s, +S.
Update comment before MIPS16 field descriptors to mention MIPS16.
(OP_SH_BBITIND, OP_MASK_BBITIND): New bit mask and shift count for
BBIT.
(OP_SH_CINSPOS, OP_MASK_CINSPOS, OP_SH_CINSLM1, OP_MASK_CINSLM1):
New bit masks and shift counts for cins and exts.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptors
+x, +X, +p, +P, +s, +S.
(mips_ip): Likewise.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
+s, +S.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
syncw, syncws, vm3mulu, vm0 and vmulu.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
syncws, vm3mulu, vm0 and vmulu.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
* gas/mips/mips.exp: Run it. Run octeon test with
run_dump_test_arches.
2008-06-13 00:14:52 +08:00
|
|
|
|
2008-06-12 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for baddu,
|
|
|
|
|
|
bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw,
|
|
|
|
|
|
syncws, vm3mulu, vm0 and vmulu.
|
|
|
|
|
|
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: New test.
|
|
|
|
|
|
* gas/mips/mips.exp: Run it. Run octeon test with
|
|
|
|
|
|
run_dump_test_arches.
|
|
|
|
|
|
|
2008-06-13 05:44:54 +08:00
|
|
|
|
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
|
|
|
|
|
|
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
|
|
|
|
|
|
and snei.
|
|
|
|
|
|
|
2008-06-04 01:31:52 +08:00
|
|
|
|
2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run sse-check-none and
|
|
|
|
|
|
x86-64-sse-check-none.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/sse-check-none.d: New.
|
|
|
|
|
|
* gas/i386/sse-check-none.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-sse-check-none.d: Likewise.
|
|
|
|
|
|
|
2008-06-03 22:29:07 +08:00
|
|
|
|
2008-06-03 Paul Brook <paul@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/arm/thumb32.d: Update expected output.
|
|
|
|
|
|
|
2008-05-31 03:49:18 +08:00
|
|
|
|
2008-05-30 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-avx.s: Add tests for vmovd on 64bit operands.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-sse2avx.s: Add tests for movd on 64bit
|
|
|
|
|
|
operands.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/testsuite/gas/i386/x86-64-avx.d: Updated.
|
|
|
|
|
|
* gas/testsuite/gas/i386/x86-64-avx-intel.d: Likewise.
|
|
|
|
|
|
* gas/testsuite/gas/i386/x86-64-sse2avx.d: Likewise.
|
|
|
|
|
|
|
2008-05-27 20:52:44 +08:00
|
|
|
|
2008-05-27 Martin Schwidefsky <schwidefsky@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/s390/zarch-z990.d (idte): Fix operand format.
|
|
|
|
|
|
|
2008-05-23 08:18:52 +08:00
|
|
|
|
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/sse-noavx.s: Add tests for cvtpd2pi, cvtpi2pd and
|
|
|
|
|
|
cvttpd2pi.
|
|
|
|
|
|
* gas/i386/x86-64-sse-noavx.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/sse-noavx.d: Updated.
|
|
|
|
|
|
* gas/i386/x86-64-sse-noavx.d: Likewise.
|
|
|
|
|
|
|
2008-05-23 04:52:54 +08:00
|
|
|
|
2008-05-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/6517
|
|
|
|
|
|
* gas/i386/avx.s: Add tests for unspecified memory operand
|
|
|
|
|
|
size in Intel syntax.
|
|
|
|
|
|
* gas/i386/x86-64-avx.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/simd.s: Add tests for cvtsi2ss and cvtsi2sd with
|
|
|
|
|
|
unspecified memory operand size in Intel syntax.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/avx.d: Updated.
|
|
|
|
|
|
* gas/i386/avx-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/simd.d: Likewise.
|
|
|
|
|
|
* gas/i386/simd-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/simd-suffix.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-avx.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-avx-intel.d: Likewise.
|
|
|
|
|
|
|
2008-05-22 05:40:57 +08:00
|
|
|
|
2008-05-21 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/sse-noavx.s: Add tests for movdq2q and movq2dq.
|
|
|
|
|
|
* gas/i386/x86-64-sse-noavx.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/sse-noavx.d: Updated.
|
|
|
|
|
|
* gas/i386/x86-64-sse-noavx.d: Likewise.
|
|
|
|
|
|
|
2008-05-10 03:28:47 +08:00
|
|
|
|
2008-05-09 Catherine Moore <clm@codesourcery.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips16-hilo-match.s: New test.
|
|
|
|
|
|
* gas/mips/mip16-hilo-match.d: New test output.
|
|
|
|
|
|
|
gas/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention XSAVE, EPT and MOVBE.
* config/tc-i386.c (cpu_arch): Add .movbe and .ept.
(md_show_usage): Add .movbe and .ept.
* doc/c-i386.texi: Add movbe and ept to -march=. Document
.movbe and .ept.
gas/testsuite/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
x86-64-inval-ept.
* gas/i386/arch-10.s: Add movbe and invept.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/ept.d: New file
* gas/i386/ept-intel.d: Likewise.
* gas/i386/ept.s: Likewise.
* gas/i386/inval-ept.l: Likewise.
* gas/i386/inval-ept.s: Likewise.
* gas/i386/inval-movbe.l: Likewise.
* gas/i386/inval-movbe.s: Likewise.
* gas/i386/movbe.d: Likewise.
* gas/i386/movbe-intel.d: Likewise.
* gas/i386/movbe.s: Likewise.
* gas/i386/x86-64-inval-ept.l: Likewise.
* gas/i386/x86-64-inval-ept.s: Likewise.
* gas/i386/x86-64-inval-movbe.l: Likewise.
* gas/i386/x86-64-inval-movbe.s: Likewise.
* gas/i386/x86-64-ept.d: Likewise.
* gas/i386/x86-64-ept-intel.d: Likewise.
* gas/i386/x86-64-ept.s: Likewise.
* gas/i386/x86-64-movbe.d: Likewise.
* gas/i386/x86-64-movbe-intel.d: Likewise.
* gas/i386/x86-64-movbe.s: Likewise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
opcodes/
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (MOVBE_Fixup): New.
(Mo): Likewise.
(PREFIX_0F3880): Likewise.
(PREFIX_0F3881): Likewise.
(PREFIX_0F38F0): Updated.
(prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881. Update
PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
(three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
* i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
CPU_EPT_FLAGS.
(cpu_flags): Add CpuMovbe and CpuEPT.
* i386-opc.h (CpuMovbe): New.
(CpuEPT): Likewise.
(CpuLM): Updated.
(i386_cpu_flags): Add cpumovbe and cpuept.
* i386-opc.tbl: Add entries for movbe and EPT instructions.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-05-03 00:53:40 +08:00
|
|
|
|
2008-05-02 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run movbe, movbe-intel, inval-movbe, ept,
|
|
|
|
|
|
ept-intel, inval-ept, x86-64-movbe, x86-64-movbe-intel,
|
|
|
|
|
|
x86-64-inval-movbe. x86-64-ept, x86-64-ept-intel and
|
|
|
|
|
|
x86-64-inval-ept.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/arch-10.s: Add movbe and invept.
|
|
|
|
|
|
* gas/i386/x86-64-arch-2.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/ept.d: New file
|
|
|
|
|
|
* gas/i386/ept-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/ept.s: Likewise.
|
|
|
|
|
|
* gas/i386/inval-ept.l: Likewise.
|
|
|
|
|
|
* gas/i386/inval-ept.s: Likewise.
|
|
|
|
|
|
* gas/i386/inval-movbe.l: Likewise.
|
|
|
|
|
|
* gas/i386/inval-movbe.s: Likewise.
|
|
|
|
|
|
* gas/i386/movbe.d: Likewise.
|
|
|
|
|
|
* gas/i386/movbe-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/movbe.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval-ept.l: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval-ept.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval-movbe.l: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval-movbe.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-ept.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-ept-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-ept.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-movbe.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-movbe-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-movbe.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/arch-10.d: Updated.
|
|
|
|
|
|
* gas/i386/arch-10-1.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-2.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-3.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-4.l: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-arch-2.d: Likewise.
|
|
|
|
|
|
|
2008-04-29 01:10:18 +08:00
|
|
|
|
2008-04-28 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips4.s: Split out fp instruction from here ...
|
|
|
|
|
|
* gas/mips/mips4-fp.s: ... to here.
|
|
|
|
|
|
* gas/mips/mips4.d: Update.
|
|
|
|
|
|
* gas/mips/mips4-fp.l: New file. Check error messages with
|
|
|
|
|
|
-msoft-float.
|
|
|
|
|
|
* gas/mips/mips4-fp.d: New file. Check disassembly with
|
|
|
|
|
|
hard-float.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32r2.s: Split out fp instructions from here ...
|
|
|
|
|
|
* gas/mips/mips32r2-fp32.s: ... to here.
|
|
|
|
|
|
* gas/mips/mips32r2.d: Update.
|
|
|
|
|
|
* gas/mips/mips32r2-fp32.l: New file. Check error messages with
|
|
|
|
|
|
-msoft-float.
|
|
|
|
|
|
* gas/mips/mips32r2-fp32.d: New file. Check disassembly with
|
|
|
|
|
|
hard-float.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32r2-ill-nofp.s, gas/mips/mips32r2-ill-nofp.l: New
|
|
|
|
|
|
test derived from mips32r2-ill.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips32-sf32.l: New list test for mips32-sf32.s to check
|
|
|
|
|
|
error messages for soft-float targets.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips-macro-ill-sfp.s, gas/mips/mips-macro-ill-sfp.l:
|
|
|
|
|
|
New test for -msingle-float.
|
|
|
|
|
|
* gas/mips/mips-macro-ill-nofp.s, gas/mips/mips-macro-ill-nofp.l:
|
|
|
|
|
|
New test for -msoft-float.
|
|
|
|
|
|
* gas/mips/mips-hard-float-flag.s,
|
|
|
|
|
|
gas/mips/mips-hard-float-flag.l: New test for -mhard-float.
|
|
|
|
|
|
* gas/mips/mips-double-float-flag.s,
|
|
|
|
|
|
gas/mips/mips-double-float-flag.l: New test for -mdouble-float.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips.exp: Run new mips4-fp and mips32r2-fp dump tests.
|
|
|
|
|
|
Run mips4-fp and mips32r2-fp list tests with -msoft-float. Run
|
|
|
|
|
|
new mips32r2-ill-nofp with -msoft-float. Run new mips32-sf32 list
|
|
|
|
|
|
test with -msoft-float. Run new mips-macro-ill-sfp test with
|
|
|
|
|
|
-msingle-float. Run new mips-macro-ill-nofp test with
|
|
|
|
|
|
-msoft-float. Run new mips-hard-float-flag and
|
|
|
|
|
|
mips-double-float-flag tests.
|
|
|
|
|
|
|
2008-04-24 00:01:10 +08:00
|
|
|
|
2008-04-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run sse-noavx and x86-64-sse-noavx.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/sse-noavx.d: New.
|
|
|
|
|
|
* gas/i386/sse-noavx.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-sse-noavx.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-sse-noavx.s: Likewise.
|
|
|
|
|
|
|
2008-04-23 22:34:05 +08:00
|
|
|
|
2008-04-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/sse2.s: Add tests for pmuludq, paddq and psubq.
|
|
|
|
|
|
* gas/i386/x86-64-simd.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/sse2.d: Updated.
|
|
|
|
|
|
* gas/i386/x86-64-simd.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-simd-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-simd-suffix.d: Likewise.
|
|
|
|
|
|
|
2008-04-23 15:49:33 +08:00
|
|
|
|
2008-04-23 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/sparc/pc2210.d: New file.
|
|
|
|
|
|
* gas/sparc/pc2210.d: Likewise.
|
|
|
|
|
|
* gas/sparc/sparc.exp: Run new %pc22/%pc10 relocation test.
|
|
|
|
|
|
|
2008-04-18 21:10:32 +08:00
|
|
|
|
2008-04-18 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/arch-10.d: Updated.
|
|
|
|
|
|
* gas/i386/avx.d: Likewise.
|
|
|
|
|
|
* gas/i386/avx-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-arch-2.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-avx.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-avx-intel.d: Likewise.
|
|
|
|
|
|
|
2008-04-16 23:31:33 +08:00
|
|
|
|
2008-04-16 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
|
|
|
|
|
|
Michael Meissner <michael.meissner@amd.com>
|
|
|
|
|
|
|
2008-04-18 21:10:32 +08:00
|
|
|
|
* gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the
|
|
|
|
|
|
middle operand.
|
2008-04-16 23:31:33 +08:00
|
|
|
|
* gas/i386/x86-64-sse5.d: Likewise.
|
|
|
|
|
|
|
2008-04-16 16:52:15 +08:00
|
|
|
|
2008-04-16 David S. Miller <davem@davemloft.net>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/sparc/gotops32.d: New.
|
|
|
|
|
|
* gas/sparc/gotops32.s: Likewise.
|
|
|
|
|
|
* gas/sparc/gotops64.d: Likewise.
|
|
|
|
|
|
* gas/sparc/gotops64.s: Likewise.
|
|
|
|
|
|
* gas/sparc/sparc.exp: Run new gotdata tests.
|
|
|
|
|
|
|
2008-04-15 23:53:26 +08:00
|
|
|
|
2008-04-15 Andrew Stubbs <andrew.stubbs@st.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/sh/arch/arch.exp: Align PC-relative instructions in the gererated
|
|
|
|
|
|
assembly files.
|
|
|
|
|
|
* gas/sh/arch/sh-dsp.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh2.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh2a-nofpu.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh2a-or-sh3e.s: Regenerate.: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh2a-or-sh4.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh2a.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh2e.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh3-dsp.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh3-nommu.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh3.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh3e.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh4-nofpu.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh4-nommu-nofpu.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh4.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh4a-nofpu.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh4a.s: Regenerate.
|
|
|
|
|
|
* gas/sh/arch/sh4al-dsp.s: Regenerate.
|
|
|
|
|
|
* gas/sh/err-mova.s: New test.
|
|
|
|
|
|
|
2008-04-14 19:01:38 +08:00
|
|
|
|
2008-04-14 Edmar Wienskoski <edmar@freescale.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/ppc/e500mc.s, gas/ppc/e500mc.d: New test.
|
|
|
|
|
|
* gas/ppc/ppc.exp: Run the new test
|
|
|
|
|
|
|
2008-04-12 01:51:15 +08:00
|
|
|
|
2008-04-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/lns/lns-big-delta.d: Updated.
|
|
|
|
|
|
* gas/lns/lns-common-1.d: Likewise.
|
|
|
|
|
|
* gas/lns/lns-common-1-alt.d: Likewise.
|
|
|
|
|
|
* gas/lns/lns-duplicate.d: Likewise.
|
|
|
|
|
|
|
2008-04-11 01:53:40 +08:00
|
|
|
|
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run sse-check, sse-check-warn,
|
|
|
|
|
|
sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
|
|
|
|
|
|
x86-64-sse-check-error.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/sse-check.d: New.
|
|
|
|
|
|
* gas/i386/sse-check.s: Likewise.
|
|
|
|
|
|
* gas/i386/sse-check-error.l: Likewise.
|
|
|
|
|
|
* gas/i386/sse-check-error.s: Likewise.
|
|
|
|
|
|
* gas/i386/sse-check-warn.d: Likewise.
|
|
|
|
|
|
* gas/i386/sse-check-warn.e: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-sse-check.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-sse-check-error.l: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-sse-check-error.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-sse-check-warn.d: Likewise.
|
|
|
|
|
|
|
2008-04-10 20:45:18 +08:00
|
|
|
|
2008-04-10 Santiago Urue<75>a <suruena@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/all/gas.exp: Check the performance of the -ag command line
|
|
|
|
|
|
switch.
|
|
|
|
|
|
|
2008-04-10 16:59:46 +08:00
|
|
|
|
2008-04-10 Andreas Krebbel <krebbel1@de.ibm.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/s390/zarch-z10.d: Map the compare and branch variants
|
|
|
|
|
|
with odd condition code mask to version with an even mask.
|
|
|
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|
|
2008-04-07 21:07:16 +08:00
|
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|
|
2008-04-07 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
|
|
|
|
* gas/i386/att-regs.s: Add AVX register test.
|
|
|
|
|
|
* gas/i386/intel-regs.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/att-regs.d: Updated.
|
|
|
|
|
|
* gas/i386/intel-regs.d: Likewise.
|
|
|
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|
|
|
2008-04-07 10:55:08 +08:00
|
|
|
|
2008-04-07 Kaz Kojima <kkojima@rr.iij4u.or.jp>
|
|
|
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|
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|
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|
|
PR gas/6043
|
|
|
|
|
|
* gas/sh/sh64/eh-1.d: New.
|
|
|
|
|
|
* gas/sh/sh64/eh-1.d: Likewise.
|
|
|
|
|
|
|
2008-04-05 00:34:23 +08:00
|
|
|
|
2008-04-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
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|
|
|
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|
|
* gas/i386/arch-10-1.l: Replace CLMUL with PCLMUL.
|
|
|
|
|
|
* gas/i386/arch-10-2.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-3.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-4.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10.s: Likewise.
|
|
|
|
|
|
* gas/i386/clmul-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/clmul.d: Likewise.
|
|
|
|
|
|
* gas/i386/clmul.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-arch-2.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-clmul-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-clmul.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-clmul.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/arch-10.d: Replace clmul with pclmul.
|
|
|
|
|
|
* gas/i386/x86-64-arch-2.d: Likewise.
|
|
|
|
|
|
|
binutils/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* dwarf.c (dwarf_regnames_i386): Add AVX registers.
(dwarf_regnames_x86_64): Likewise.
gas/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention AES, CLMUL, AVX/FMA and -msse2avx.
* doc/c-i386.texi: Add avx, aes, clmul and fma to -march=.
Document -msse2avx, .avx, .aes, .clmul and .fma.
* config/tc-i386.c (YMMWORD_MNEM_SUFFIX): New.
(vex_prefix): Likewise.
(sse2avx): Likewise.
(CPU_FLAGS_ARCH_MATCH): Likewise.
(CPU_FLAGS_64BIT_MATCH): Likewise.
(CPU_FLAGS_32BIT_MATCH): Likewise.
(CPU_FLAGS_PERFECT_MATCH): Likewise.
(regymm): Likewise.
(vex_imm4): Likewise.
(fits_in_imm4): Likewise.
(build_vex_prefix): Likewise.
(VEX_check_operands): Likewise.
(bad_implicit_operand): Likewise.
(OPTION_MSSE2AVX): Likewise.
(T_YMMWORD): Likewise.
(_i386_insn): Add vex.
(cpu_arch): Add .avx, .aes, .clmul and .fma.
(cpu_flags_match): Changed to take a pointer to const template.
Enable encoding SSE instructions with VEX prefix for -msse2avx.
(match_mem_size): Also check ymmword.
(operand_type_match): Clear ymmword.
(md_begin): Allow '_' in mnemonic.
(type_names): Add OPERAND_TYPE_VEX_IMM4.
(process_immext): Update assert.
(md_assemble): Don't call process_immext if sse2avx and immext
are true. Call build_vex_prefix if vex is true.
(parse_insn): Updated for cpu_flags_match.
(swap_operands): Handle 5 operands.
(match_template): Handle 5 operands. Updated for cpu_flags_match.
Check regymm. Call VEX_check_operands. Handle YMMWORD_MNEM_SUFFIX.
(process_suffix): Handle YMMWORD_MNEM_SUFFIX.
(check_byte_reg): Check regymm.
(process_operands): Duplicate the destination register for
-msse2avx if needed.
(build_modrm_byte): Updated for instructions with VEX encoding.
(output_insn): Output VEX prefix if needed.
(md_longopts): Add msse2avx.
(md_parse_option): Handle OPTION_MSSE2AVX.
(md_show_usage): Add avx, aes, clmul, fma and -msse2avx.
(intel_e09): Support YMMWORD.
(intel_e11): Likewise.
(intel_get_token): Likewise.
gas/testsuite/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
x86-64-avx-intel and x86-64-inval-avx.
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
* gas/cfi/cfi-x86_64.s: Likewise.
* gas/i386/aes.d: New.
* gas/i386/aes.s: Likewise.
* gas/i386/aes-intel.d: Likewise.
* gas/i386/avx.d: Likewise.
* gas/i386/avx.s: Likewise.
* gas/i386/avx-intel.d: Likewise.
* gas/i386/clmul.d: Likewise.
* gas/i386/clmul-intel.d: Likewise.
* gas/i386/clmul.s: Likewise.
* gas/i386/i386.exp: Likewise.
* gas/i386/inval-avx.l: Likewise.
* gas/i386/inval-avx.s: Likewise.
* gas/i386/sse2avx.d: Likewise.
* gas/i386/sse2avx.s: Likewise.
* gas/i386/x86-64-aes.d: Likewise.
* gas/i386/x86-64-aes.s: Likewise.
* gas/i386/x86-64-aes-intel.d: Likewise.
* gas/i386/x86-64-avx.d: Likewise.
* gas/i386/x86-64-avx.s: Likewise.
* gas/i386/x86-64-avx-intel.d: Likewise.
* gas/i386/x86-64-clmul.d: Likewise.
* gas/i386/x86-64-clmul-intel.d: Likewise.
* gas/i386/x86-64-clmul.s: Likewise.
* gas/i386/x86-64-inval-avx.l: Likewise.
* gas/i386/x86-64-inval-avx.s: Likewise.
* gas/i386/x86-64-sse2avx.d: Likewise.
* gas/i386/x86-64-sse2avx.s: Likewise.
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
* gas/i386/x86-64-arch-2.s: Likewise.
* gas/i386/rexw.s: Add AVX tests.
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
* gas/cfi/cfi-i386.d: Updated.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/i386/arch-10.d: Likewise.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/rexw.d: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/x86-64-opcode-inval.d: Likewise.
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
include/opcode/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (MAX_OPERANDS): Set to 5.
(MAX_MNEM_SIZE): Changed to 20.
opcodes/
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_E_register): New.
(OP_E_memory): Likewise.
(OP_VEX): Likewise.
(OP_EX_Vex): Likewise.
(OP_EX_VexW): Likewise.
(OP_XMM_Vex): Likewise.
(OP_XMM_VexW): Likewise.
(OP_REG_VexI4): Likewise.
(PCLMUL_Fixup): Likewise.
(VEXI4_Fixup): Likewise.
(VZERO_Fixup): Likewise.
(VCMP_Fixup): Likewise.
(VPERMIL2_Fixup): Likewise.
(rex_original): Likewise.
(rex_ignored): Likewise.
(Mxmm): Likewise.
(XMM): Likewise.
(EXxmm): Likewise.
(EXxmmq): Likewise.
(EXymmq): Likewise.
(Vex): Likewise.
(Vex128): Likewise.
(Vex256): Likewise.
(VexI4): Likewise.
(EXdVex): Likewise.
(EXqVex): Likewise.
(EXVexW): Likewise.
(EXdVexW): Likewise.
(EXqVexW): Likewise.
(XMVex): Likewise.
(XMVexW): Likewise.
(XMVexI4): Likewise.
(PCLMUL): Likewise.
(VZERO): Likewise.
(VCMP): Likewise.
(VPERMIL2): Likewise.
(xmm_mode): Likewise.
(xmmq_mode): Likewise.
(ymmq_mode): Likewise.
(vex_mode): Likewise.
(vex128_mode): Likewise.
(vex256_mode): Likewise.
(USE_VEX_C4_TABLE): Likewise.
(USE_VEX_C5_TABLE): Likewise.
(USE_VEX_LEN_TABLE): Likewise.
(VEX_C4_TABLE): Likewise.
(VEX_C5_TABLE): Likewise.
(VEX_LEN_TABLE): Likewise.
(REG_VEX_XX): Likewise.
(MOD_VEX_XXX): Likewise.
(PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
(PREFIX_0F3A44): Likewise.
(PREFIX_0F3ADF): Likewise.
(PREFIX_VEX_XXX): Likewise.
(VEX_OF): Likewise.
(VEX_OF38): Likewise.
(VEX_OF3A): Likewise.
(VEX_LEN_XXX): Likewise.
(vex): Likewise.
(need_vex): Likewise.
(need_vex_reg): Likewise.
(vex_i4_done): Likewise.
(vex_table): Likewise.
(vex_len_table): Likewise.
(OP_REG_VexI4): Likewise.
(vex_cmp_op): Likewise.
(pclmul_op): Likewise.
(vpermil2_op): Likewise.
(m_mode): Updated.
(es_reg): Likewise.
(PREFIX_0F38F0): Likewise.
(PREFIX_0F3A60): Likewise.
(reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
(prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
and PREFIX_VEX_XXX entries.
(x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
(three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
PREFIX_0F3ADF.
(mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
Add MOD_VEX_XXX entries.
(ckprefix): Initialize rex_original and rex_ignored. Store the
REX byte in rex_original.
(get_valid_dis386): Handle the implicit prefix in VEX prefix
bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
(print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
calling get_valid_dis386. Use rex_original and rex_ignored when
printing out REX.
(putop): Handle "XY".
(intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
ymmq_mode.
(OP_E_extended): Updated to use OP_E_register and
OP_E_memory.
(OP_XMM): Handle VEX.
(OP_EX): Likewise.
(XMM_Fixup): Likewise.
(CMP_Fixup): Use ARRAY_SIZE.
* i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
CPU_FMA_FLAGS and CPU_AVX_FLAGS.
(operand_type_init): Add OPERAND_TYPE_REGYMM and
OPERAND_TYPE_VEX_IMM4.
(cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
(opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
VexImmExt and SSE2AVX.
(operand_types): Add RegYMM, Ymmword and Vex_Imm4.
* i386-opc.h (CpuAVX): New.
(CpuAES): Likewise.
(CpuCLMUL): Likewise.
(CpuFMA): Likewise.
(Vex): Likewise.
(Vex256): Likewise.
(VexNDS): Likewise.
(VexNDD): Likewise.
(VexW0): Likewise.
(VexW1): Likewise.
(Vex0F): Likewise.
(Vex0F38): Likewise.
(Vex0F3A): Likewise.
(Vex3Sources): Likewise.
(VexImmExt): Likewise.
(SSE2AVX): Likewise.
(RegYMM): Likewise.
(Ymmword): Likewise.
(Vex_Imm4): Likewise.
(Implicit1stXmm0): Likewise.
(CpuXsave): Updated.
(CpuLM): Likewise.
(ByteOkIntel): Likewise.
(OldGcc): Likewise.
(Control): Likewise.
(Unspecified): Likewise.
(OTMax): Likewise.
(i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
(i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
vex3sources, veximmext and sse2avx.
(i386_operand_type): Add regymm, ymmword and vex_imm4.
* i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
* i386-reg.tbl: Add AVX registers, ymm0..ymm15.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-04-03 22:03:21 +08:00
|
|
|
|
2008-04-03 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run aes, aes-intel, x86-64-aes,
|
|
|
|
|
|
x86-64-aes-intel, avx, avx-intel, inval-avx, x86-64-avx,
|
|
|
|
|
|
x86-64-avx-intel and x86-64-inval-avx.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/cfi/cfi-i386.s: Add tests for AVX register maps.
|
|
|
|
|
|
* gas/cfi/cfi-x86_64.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/aes.d: New.
|
|
|
|
|
|
* gas/i386/aes.s: Likewise.
|
|
|
|
|
|
* gas/i386/aes-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/avx.d: Likewise.
|
|
|
|
|
|
* gas/i386/avx.s: Likewise.
|
|
|
|
|
|
* gas/i386/avx-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/clmul.d: Likewise.
|
|
|
|
|
|
* gas/i386/clmul-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/clmul.s: Likewise.
|
|
|
|
|
|
* gas/i386/i386.exp: Likewise.
|
|
|
|
|
|
* gas/i386/inval-avx.l: Likewise.
|
|
|
|
|
|
* gas/i386/inval-avx.s: Likewise.
|
|
|
|
|
|
* gas/i386/sse2avx.d: Likewise.
|
|
|
|
|
|
* gas/i386/sse2avx.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-aes.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-aes.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-aes-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-avx.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-avx.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-avx-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-clmul.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-clmul-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-clmul.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval-avx.l: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval-avx.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-sse2avx.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-sse2avx.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/arch-10.s: Add tests for AVX, AES, CLMUL and FMA.
|
|
|
|
|
|
* gas/i386/x86-64-arch-2.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/rexw.s: Add AVX tests.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-opcode-inval.s: Remove lds/les test.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/cfi/cfi-i386.d: Updated.
|
|
|
|
|
|
* gas/cfi/cfi-x86_64.d: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10.d: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-1.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-2.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-3.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-4.l: Likewise.
|
|
|
|
|
|
* gas/i386/rexw.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-arch-2.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-opcode-inval.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-opcode-inval-intel.d: Likewise.
|
|
|
|
|
|
|
opcodes:
From Robin Getz <robin.getz@analog.com>
* bfin-dis.c (bu32): Typedef.
(enum const_forms_t): Add c_uimm32 and c_huimm32.
(constant_formats[]): Add uimm32 and huimm16.
(fmtconst_val): New.
(uimm32): Define.
(huimm32): Define.
(imm16_val): Define.
(luimm16_val): Define.
(struct saved_state): Define.
(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
(get_allreg): New.
(decode_LDIMMhalf_0): Print out the whole register value.
gas/testsuite:
From Jie Zhang <jie.zhang@analog.com>
* gas/bfin/load.d: Update.
2008-03-26 22:50:52 +08:00
|
|
|
|
2008-03-26 Bernd Schmidt <bernd.schmidt@analog.com>
|
|
|
|
|
|
|
|
|
|
|
|
From Jie Zhang <jie.zhang@analog.com>
|
|
|
|
|
|
* gas/bfin/load.d: Update.
|
2008-03-26 23:18:42 +08:00
|
|
|
|
* gas/bfin/expected_comparison_errors.l: New test.
|
|
|
|
|
|
* gas/bfin/expected_comparison_errors.s: New test.
|
|
|
|
|
|
* gas/bfin/bfin.exp: Add expected_comparison_errors.
|
2008-03-26 23:58:27 +08:00
|
|
|
|
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s: Add
|
|
|
|
|
|
tests for bad options of "multiply and multipy-accumulate to
|
|
|
|
|
|
accumulator" instructions. Add new vector instruction option
|
|
|
|
|
|
mode tests.
|
|
|
|
|
|
* gas/bfin/vector2.s: Add new vector instruction option mode test.
|
|
|
|
|
|
* gas/bfin/vector2.d: Adjust accordingly.
|
2008-03-27 00:21:10 +08:00
|
|
|
|
* gas/bfin/expected_errors.l, gas/bfin/expected_errors.s:
|
|
|
|
|
|
Add check for mismatch of accumulator and data register.
|
|
|
|
|
|
* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
|
|
|
|
|
|
for IU option.
|
2008-03-27 00:33:33 +08:00
|
|
|
|
|
|
|
|
|
|
* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
|
|
|
|
|
|
and LOOP_END instruction are local now.
|
|
|
|
|
|
* gas/bfin/flow2.d: Likewise.
|
|
|
|
|
|
|
2008-03-26 23:58:27 +08:00
|
|
|
|
From Mike Frysinger <michael.frysinger@analog.com>
|
|
|
|
|
|
* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
|
|
|
|
|
|
for mismatched half registers in vector multipy-accumulate
|
|
|
|
|
|
instructions.
|
opcodes:
From Robin Getz <robin.getz@analog.com>
* bfin-dis.c (bu32): Typedef.
(enum const_forms_t): Add c_uimm32 and c_huimm32.
(constant_formats[]): Add uimm32 and huimm16.
(fmtconst_val): New.
(uimm32): Define.
(huimm32): Define.
(imm16_val): Define.
(luimm16_val): Define.
(struct saved_state): Define.
(GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
(get_allreg): New.
(decode_LDIMMhalf_0): Print out the whole register value.
gas/testsuite:
From Jie Zhang <jie.zhang@analog.com>
* gas/bfin/load.d: Update.
2008-03-26 22:50:52 +08:00
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gas/testsuite/:
From Robin Getz <rgetz@blackfin.uclinux.org>
* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
recent changes in opcodes/bfin-dis.c.
gas/bfin/arithmetic.s: Likewise.
gas/bfin/bit.d: Likewise.
gas/bfin/bit2.d: Likewise.
gas/bfin/control_code.d: Likewise.
gas/bfin/control_code2.d: Likewise.
gas/bfin/event.d: Likewise.
gas/bfin/event2.d: Likewise.
gas/bfin/flow.d: Likewise.
gas/bfin/flow2.d: Likewise.
gas/bfin/load.d: Likewise.
gas/bfin/logical.d: Likewise.
gas/bfin/logical2.d: Likewise.
gas/bfin/move.d: Likewise.
gas/bfin/move2.d: Likewise.
gas/bfin/parallel.d: Likewise.
gas/bfin/parallel2.d: Likewise.
gas/bfin/parallel3.d: Likewise.
gas/bfin/parallel4.d: Likewise.
gas/bfin/shift.d: Likewise.
gas/bfin/shift2.d: Likewise.
gas/bfin/stack.d: Likewise.
gas/bfin/stack2.d: Likewise.
gas/bfin/store.d: Likewise.
gas/bfin/vector.d: Likewise.
gas/bfin/vector2.d: Likewise.
gas/bfin/video.d: Likewise.
gas/bfin/video2.d: Likewise.
opcodes/:
* bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
c_imm32, c_huimm32e): Define.
(constant_formats): Add flags for printing decimal, leading spaces, and
exact symbols.
(comment, parallel): Add global flags in all disassembly.
(fmtconst): Take advantage of new flags, and print default in hex.
(fmtconst_val): Likewise.
(decode_macfunc): Be consistant with spaces, tabs, comments,
capitalization in disassembly, fix minor coding style issues.
(reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
(decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
_print_insn_bfin, print_insn_bfin): Likewise.
2008-03-27 00:48:32 +08:00
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From Robin Getz <rgetz@blackfin.uclinux.org>
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* gas/bfin/arithmetic.d: Update to reflect spaces/capitalization in
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recent changes in opcodes/bfin-dis.c.
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gas/bfin/arithmetic.s: Likewise.
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gas/bfin/bit.d: Likewise.
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gas/bfin/bit2.d: Likewise.
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gas/bfin/control_code.d: Likewise.
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gas/bfin/control_code2.d: Likewise.
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gas/bfin/event.d: Likewise.
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gas/bfin/event2.d: Likewise.
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gas/bfin/flow.d: Likewise.
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gas/bfin/flow2.d: Likewise.
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gas/bfin/load.d: Likewise.
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gas/bfin/logical.d: Likewise.
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gas/bfin/logical2.d: Likewise.
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gas/bfin/move.d: Likewise.
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gas/bfin/move2.d: Likewise.
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gas/bfin/parallel.d: Likewise.
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gas/bfin/parallel2.d: Likewise.
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gas/bfin/parallel3.d: Likewise.
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gas/bfin/parallel4.d: Likewise.
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gas/bfin/shift.d: Likewise.
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gas/bfin/shift2.d: Likewise.
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gas/bfin/stack.d: Likewise.
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gas/bfin/stack2.d: Likewise.
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gas/bfin/store.d: Likewise.
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gas/bfin/vector.d: Likewise.
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gas/bfin/vector2.d: Likewise.
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gas/bfin/video.d: Likewise.
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gas/bfin/video2.d: Likewise.
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2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
(s390_cond_extensions): Reduced extensions to the compare related.
(main): z10 cpu type option added.
(expandConditionalJump): Renamed to ...
(insertExpandedMnemonic): ... this.
* opcodes/s390-opc.c: Re-group the operand format makros.
(INSTR_RIE_RRPU, INSTR_RIE_RRP0, INSTR_RIE_RUPI,
INSTR_RIE_R0PI, INSTR_RIE_RUPU, INSTR_RIE_R0PU, INSTR_RIE_R0IU,
INSTR_RIE_R0I0, INSTR_RIE_R0UU, INSTR_RIE_R0U0,
INSTR_RIE_RRUUU, INSTR_RIS_RURDI, INSTR_RIS_R0RDI, INSTR_RIS_RURDU,
INSTR_RIS_R0RDU, INSTR_RRF_U0RR, INSTR_RRF_00RR, INSTR_RRS_RRRDU,
INSTR_RRS_RRRD0, INSTR_RXY_URRD, INSTR_SIY_IRD, INSTR_SIL_RDI,
INSTR_SIL_RDU): New instruction formats added.
(MASK_RIE_RRPU, MASK_RIE_RRP0, MASK_RIE_RUPI, MASK_RIE_R0PI,
MASK_RIE_RUPU, MASK_RIE_R0PU, MASK_RIE_R0IU, MASK_RIE_R0I0,
MASK_RIE_R0UU, MASK_RIE_R0U0, MASK_RIE_RRUUU, MASK_RIS_RURDI,
MASK_RIS_R0RDI, MASK_RIS_RURDU, MASK_RIS_R0RDU, MASK_RRF_U0RR,
MASK_RRF_00RR, MASK_RRS_RRRDU, MASK_RRS_RRRD0, MASK_RXY_URRD,
MASK_SIY_IRD, MASK_SIL_RDI, MASK_SIL_RDU): New instruction format
masks added.
(s390_opformats): New formats added "ris", "rrs", "sil".
* opcodes/s390-opc.txt: Add the conditional jumps with the
extensions removed from automatic expansion in s390-mkopc.c manually.
(asi - trtre): Add new System z10 EC instructions.
* include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z10 added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z10 option added.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/zarch-z10.d: New file.
* gas/s390/zarch-z10.s: New file.
* gas/s390/s390.exp: Run the z10 testcases.
2008-03-19 18:29:18 +08:00
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2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
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* gas/s390/zarch-z10.d: New file.
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* gas/s390/zarch-z10.s: New file.
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* gas/s390/s390.exp: Run the z10 testcases.
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2008-03-18 02:45:35 +08:00
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2008-03-17 Richard Sandiford <rsandifo@nildram.co.uk>
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* gas/mips/elf-rel26.d: Add -32.
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* gas/mips/mips16-intermix.d: Likewise.
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2008-03-13 18:51:33 +08:00
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2008-03-13 Nick Clifton <nickc@redhat.com>
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PR gas/5895
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* gas/macros/exit.s: New test case.
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* gas/macros/macros.exp: Run the new test, expect it to produce an
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error result.
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2008-03-09 21:23:29 +08:00
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2008-03-09 Paul Brook <paul@codesourcery.com>
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* gas/arm/vfpv3-d16-bad.d: New test.
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* gas/arm/vfpv3-d16-bad.l: New test.
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2008-03-06 Florian Krohm <fkrohm@us.ibm.com>
* s390-opc.c (INSTR_RSL_R0RD): Fix operands.
* s390-opc.txt (cmpsc): Duplicate entry removed.
(dxr, sqdr, sqer, cxfbr, cdfbr, cefbr, lzer, lzdr, lzxr,
cegbr, cdgbr, cxgbr, cegr, cdgr, cxgr, cxfr, cdfr, cefr, fixr, fidr,
fier, cu42, cu41): Fix operand format.
2008-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
* gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr,
dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix
operand format.
* gas/s390/esa-g5.s: Likewise.
* gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr,
cxgr): Likewise.
* gas/s390/zarch-z900.s: Likewise.
* gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand.
* gas/s390/zarch-z9-109.s: Likewise.
2008-03-06 20:01:13 +08:00
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2008-03-06 Andreas Krebbel <krebbel1@de.ibm.com>
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* gas/s390/esa-g5.d (cdfbr, cdfr, cefbr, cefr, cxfbr, cxfr,
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dxr, fidr, fier, fixr, lzdr, lzer, lzxr, sqdr, sqer, tp): Fix
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operand format.
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* gas/s390/esa-g5.s: Likewise.
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* gas/s390/zarch-z900.d (cdgbr, cdgr, cegbr, cegr, cxgbr,
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cxgr): Likewise.
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* gas/s390/zarch-z900.s: Likewise.
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* gas/s390/zarch-z9-109.d (cu41, cu42): Remove mask operand.
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* gas/s390/zarch-z9-109.s: Likewise.
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2008-03-05 09:31:26 +08:00
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2008-03-04 Paul Brook <paul@codesourcery.com>
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* gas/arm/archv6m.d: New test.
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* gas/arm/archv6m.s: New test.
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* gas/arm/t16-bad.s: Test low register non flag setting add.
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* gas/arm/t16-bad.l: Update expected output.
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2008-03-03 23:28:58 +08:00
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2008-03-03 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/5543
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* gas/i386/i386.exp: Run inval-equ-1 and inval-equ-2.
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* gas/i386/inval-equ-1.l: New.
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* gas/i386/inval-equ-1.s: Likewise.
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* gas/i386/inval-equ-2.l: Likewise.
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* gas/i386/inval-equ-2.s: Likewise.
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2008-03-02 07:30:51 +08:00
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2008-03-01 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/x86-64-branch.s: Add tests for 16-bit near indirect
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branches.
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* gas/i386/x86-64-inval.s: Remove tests for 16-bit near indirect
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branches.
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* gas/i386/x86-64-branch.d: Updated.
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* gas/i386/x86-64-inval.l: Likewise.
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2008-02-27 20:33:43 +08:00
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2008-02-27 Nick Clifton <nickc@redhat.com>
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PR 3134
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* gas/h8300/pr3134.s: New test.
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* gas/h8300/pr3134.d: Expected disassembly
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* gas/h8300/h8300.exp: Run the new test.
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* gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
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accept h8300-rtemscoff not just h8300-rtems.
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2008-02-27 00:18:16 +08:00
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2008-02-26 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/jump.d: Updated for COFF.
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2008-02-24 01:29:17 +08:00
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2008-02-23 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/jump.s: Add tests for far branches.
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* gas/i386/jump16.s: Likewise.
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* gas/i386/jump.d: Updated.
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* gas/i386/jump16.d: Likewise.
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* gas/i386/x86-64-inval.l: Likewise.
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* gas/i386/x86-64-inval.s: Add tests for 16-bit near indirect
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branches.
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2008-02-22 23:33:31 +08:00
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2008-02-22 Nick Clifton <nickc@redhat.com>
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* gas/m68hc11/bug-1825.d: Update to match changes in the
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information generated with source-in-disassembly listings.
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* gas/m68hc11/indexed12.d: Likewise.
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* gas/m68hc11/insns-dwarf2.d: Likewise.
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* gas/m68hc11/lbranch-dwarf2.d: Likewise.
|
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2008-02-19 05:05:07 +08:00
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2008-02-18 H.J. Lu <hongjiu.lu@intel.com>
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* cfi/cfi.exp (gas_x86_64_check): New.
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(gas_x86_32_check): Likewise.
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Run 32bit and 64bit tests for x86 targets if they are supportd.
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2008-02-18 16:44:38 +08:00
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2008-02-18 Jan Beulich <jbeulich@novell.com>
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* gas/i386/att-regs.s, gas/i386/att-regs.d,
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gas/i386/intel-regs.s, gas/i386/intel-regs.d: New.
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* gas/i386/i386.exp: Run new tests.
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2008-02-15 00:35:51 +08:00
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2008-02-14 Nick Clifton <nickc@redhat.com>
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PR gas/5712
|
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* gas/arm/fp-save.s: New test.
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* gas/arm/fp-save.d: Expected disassembly.
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2008-02-14 01:22:43 +08:00
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2008-02-13 Adam Nemet <anemet@caviumnetworks.com>
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* gas/mips/branch-misc-2pic-64.d (#name): Have a unique name
|
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different from the branch-misc-2-64.d test.
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2008-02-13 21:41:26 +08:00
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2008-02-13 Jan Beulich <jbeulich@novell.com>
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* gas/i386/intelok.s: Replace invalid offset expression with
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valid ones.
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* gas/i386/x86_64.s: Likewise.
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2008-02-13 21:29:31 +08:00
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|
2008-02-13 Jan Beulich <jbeulich@novell.com>
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* gas/i386/intelbad.s, gas/i386/intelok.s: Add 'bound' tests.
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* gas/i386/intelbad.l, gas/i386/intelok.l, gas/i386/intelok.e,
|
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gas/i386/opcode-intel.d: Adjust.
|
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|
2008-02-13 18:14:40 +08:00
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|
2008-02-13 Jan Beulich <jbeulich@novell.com>
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* gas/cfi/cfi-i386.s: Add code testing use of all registers.
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Fix a few comments.
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* gas/cfi/cfi-x86_64.s: Likewise.
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* gas/cfi/cfi-i386.d, gas/cfi/cfi-x86_64.d: Adjust.
|
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|
2008-02-21 07:32:33 +08:00
|
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|
2008-02-12 H.J. Lu <hongjiu.lu@intel.com>
|
2008-02-13 02:56:12 +08:00
|
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|
|
|
|
|
|
|
* gas/i386/i386.exp: Run x86-64-arch-2 instead of
|
|
|
|
|
|
x86-64-arch-10.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-arch-10.d: Removed.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-arch-2.d: New.
|
|
|
|
|
|
* gas/i386/x86-64-arch-2.s: Likewise.
|
|
|
|
|
|
|
2008-02-12 23:35:29 +08:00
|
|
|
|
2008-02-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-xsave.d: Remove prefix.
|
|
|
|
|
|
|
2008-02-12 13:35:36 +08:00
|
|
|
|
2008-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/arch-10.s: Add xgetbv.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/arch-10.d: Updated.
|
|
|
|
|
|
* gas/i386/arch-10-1.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-2.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-3.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-4.l: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-arch-10.d: Likewise.
|
|
|
|
|
|
|
2008-02-12 08:04:45 +08:00
|
|
|
|
2002-02-11 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave
|
|
|
|
|
|
and x86-64-xsave-intel.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-xsave-intel.d: New file.
|
|
|
|
|
|
* gas/i386/x86-64-xsave.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-xsave.s: Likewise.
|
|
|
|
|
|
* gas/i386/xsave-intel.d: Likewise.
|
|
|
|
|
|
* gas/i386/xsave.d: Likewise.
|
|
|
|
|
|
* gas/i386/xsave.s: Likewise.
|
|
|
|
|
|
|
2008-02-06 13:29:03 +08:00
|
|
|
|
2008-02-05 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips.exp: Invoke the tests smartmips, mips32-dsp,
|
|
|
|
|
|
mips32-dspr2, mips64-dsp and mips32-mt with run_dump_test instead
|
|
|
|
|
|
of run_dump_test_arches.
|
|
|
|
|
|
* gas/mips/smartmips.d: Pass -mips32.
|
|
|
|
|
|
* gas/mips/mips64-dsp.d: Pass -mips64r2.
|
|
|
|
|
|
* gas/mips/mips32-dsp.d: Pass -mips32r2.
|
|
|
|
|
|
* gas/mips/mips32-dspr2.d: Likewise.
|
|
|
|
|
|
* gas/mips/mips32-mt.d: Likewise.
|
|
|
|
|
|
|
2008-02-05 03:19:43 +08:00
|
|
|
|
2008-02-04 Adam Nemet <anemet@caviumnetworks.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/mips/mips.exp: Call mips_arch_create for Octeon. Invoke
|
|
|
|
|
|
Octeon tests.
|
|
|
|
|
|
* gas/mips/octeon.s, gas/mips/octeon.d: New test.
|
|
|
|
|
|
|
2008-02-02 01:58:48 +08:00
|
|
|
|
2008-01-31 Marc Gauthier <marc@tensilica.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/all/gas.exp: Recognize Xtensa processor variants.
|
|
|
|
|
|
* gas/elf/elf.exp: Likewise.
|
|
|
|
|
|
* gas/lns/lns.exp: Likewise.
|
|
|
|
|
|
|
2008-01-28 23:15:32 +08:00
|
|
|
|
2008-01-28 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/cfi/cfi-alpha-1.d: Replace DW_CFA_def_cfa_reg with
|
|
|
|
|
|
DW_CFA_def_cfa_register.
|
|
|
|
|
|
* gas/cfi/cfi-alpha-3.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-hppa-1.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-i386.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-m68k.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-mips-1.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-sh-1.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-sparc-1.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-sparc64-1.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-x86_64.d: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/cfi/cfi-common-1.d: Updated for i386/x86-64 register
|
|
|
|
|
|
names.
|
|
|
|
|
|
* gas/cfi/cfi-common-2.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-common-5.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-i386.d: Likewise.
|
|
|
|
|
|
* gas/cfi/cfi-x86_64.d: Likewise.
|
|
|
|
|
|
|
2008-01-24 23:11:35 +08:00
|
|
|
|
2008-01-24 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-sib.s: Add tests for r12.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-sib-intel.d: Updated.
|
|
|
|
|
|
* gas/i386/x86-64-sib.d: Likewise.
|
|
|
|
|
|
|
2008-01-24 03:05:12 +08:00
|
|
|
|
2008-01-23 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-arch-1.d: New.
|
|
|
|
|
|
* gas/i386/x86-64-arch-1.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-arch-10.d: Likewise.
|
|
|
|
|
|
|
2008-01-23 16:57:11 +08:00
|
|
|
|
2008-01-23 Tristan Gingold <gingold@adacore.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/ia64/regs.d: Updated as the ia64 disassembler now displays
|
|
|
|
|
|
symbolic names for all ar registers.
|
|
|
|
|
|
|
2008-01-23 03:57:30 +08:00
|
|
|
|
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/arch-10.d: New.
|
|
|
|
|
|
* gas/i386/arch-11.s: Likewise.
|
|
|
|
|
|
* gas/i386/arch-12.d: Likewise.
|
|
|
|
|
|
* gas/i386/arch-12.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run arch-11 and arch-12.
|
|
|
|
|
|
|
2008-01-23 03:16:45 +08:00
|
|
|
|
2008-01-22 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/arch-10-1.l: New.
|
|
|
|
|
|
* gas/i386/arch-10-1.s: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-2.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-2.s: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-3.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-3.s: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-4.l: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10-4.s: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10.d: Likewise.
|
|
|
|
|
|
* gas/i386/arch-10.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2,
|
|
|
|
|
|
arch-10-3 and arch-10-4.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/nops-2.s: Use movsbl instead of cmove.
|
|
|
|
|
|
* gas/i386/nops-2-i386.d: Updated.
|
|
|
|
|
|
* gas/i386/nops-2-merom.d: Likewise.
|
|
|
|
|
|
* gas/i386/nops-2.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-nops-2.d: Likewise.
|
|
|
|
|
|
|
2008-01-16 08:05:56 +08:00
|
|
|
|
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/prescott.s: Add tests for movddup in Intel syntax.
|
|
|
|
|
|
* gas/i386/x86-64-prescott.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/prescott.d: Updated.
|
|
|
|
|
|
* gas/i386/x86-64-prescott.d: Likewise.
|
|
|
|
|
|
|
2008-01-16 02:50:44 +08:00
|
|
|
|
2008-01-15 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.s: Add more tests for movsx and movzx.
|
|
|
|
|
|
* gas/i386/x86_64.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/inval.s: Remove tests for movsxw and movzxw.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw,
|
|
|
|
|
|
movsxl, movzxb and movzxw.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.d: Updated.
|
|
|
|
|
|
* gas/i386/inval.l: Likewise.
|
|
|
|
|
|
* gas/i386/x86_64.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval.l: Likewise.
|
|
|
|
|
|
|
2008-01-15 09:37:56 +08:00
|
|
|
|
2008-01-14 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.s: Add tests for movsx, movzx and movnti.
|
|
|
|
|
|
* gas/i386/inval.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86_64.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/i386.d: Updated.
|
|
|
|
|
|
* gas/i386/inval.l: Likewise.
|
|
|
|
|
|
* gas/i386/x86_64.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval.l: Likewise.
|
|
|
|
|
|
|
gas/testsuite/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
* gas/i386/inval.s: Likewise.
* gas/i386/x86_64.s: Likewise.
* gas/i386/intel.s: Use word instead of dword on ss.
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
and out.
* gas/i386/prefix.s: Remove invalid fstsw.
* gas/i386/inval.l: Updated.
* gas/i386/intelbad.l: Likewise.
* gas/i386/i386.d: Likewise.
* gas/i386/x86_64.d: Likewise.
* gas/i386/x86-64-inval.l: Likewise.
* gas/i386/prefix.d: Updated.
gas/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (_i386_insn): Update comment.
(operand_type_match): Also clear unspecified.
(operand_type_register_match): Likewise.
(parse_operands): Initialize unspecified.
(i386_intel_operand): Likewise.
(match_template): Check memory and accumulator operand size.
(i386_att_operand): Clear unspecified on register operand.
(intel_e11): Likewise.
(intel_e09): Set operand size and clean unspecified for
"XXX PTR".
opcodes/
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (operand_type_init): Add Dword to
OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64.
(opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
Qword and Xmmword.
(operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
Xmmword, Unspecified and Anysize.
(set_bitfield): Make Mmword an alias of Qword. Make Oword
an alias of Xmmword.
* i386-opc.h (CheckSize): Removed.
(Byte): Updated.
(Word): Likewise.
(Dword): Likewise.
(Qword): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(OTMax): Likewise.
(i386_opcode_modifier): Remove checksize, byte, word, dword,
qword and xmmword.
(Fword): New.
(TBYTE): Likewise.
(Unspecified): Likewise.
(Anysize): Likewise.
(i386_operand_type): Add byte, word, dword, fword, qword,
tbyte xmmword, unspecified and anysize.
* i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
Tbyte, Xmmword, Unspecified and Anysize.
* i386-reg.tbl: Add size for accumulator.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2008-01-13 00:05:42 +08:00
|
|
|
|
2008-01-12 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5534
|
|
|
|
|
|
* gas/i386/i386.s: Add tests for fnstsw and fstsw.
|
|
|
|
|
|
* gas/i386/inval.s: Likewise.
|
|
|
|
|
|
* gas/i386/x86_64.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/intel.s: Use word instead of dword on ss.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in
|
|
|
|
|
|
and out.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/prefix.s: Remove invalid fstsw.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/inval.l: Updated.
|
|
|
|
|
|
* gas/i386/intelbad.l: Likewise.
|
|
|
|
|
|
* gas/i386/i386.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86_64.d: Likewise.
|
|
|
|
|
|
* gas/i386/x86-64-inval.l: Likewise.
|
|
|
|
|
|
* gas/i386/prefix.d: Updated.
|
|
|
|
|
|
|
2008-01-10 22:52:35 +08:00
|
|
|
|
2008-01-10 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/nops.s: Add more tests with opcodes from 0x0f19
|
|
|
|
|
|
to 0x0f1f.
|
|
|
|
|
|
* gas/i386/x86-64-nops.s: Likewise.
|
|
|
|
|
|
|
|
|
|
|
|
* gas/i386/nops.d: Updated.
|
|
|
|
|
|
* gas/i386/x86-64-nops.d: Likewise.
|
|
|
|
|
|
|
2008-01-10 01:30:59 +08:00
|
|
|
|
2008-01-09 Bob Wilson <bob.wilson@acm.org>
|
|
|
|
|
|
|
|
|
|
|
|
* gas/lns/lns.exp: Run new lns-big-delta test for targets that set
|
|
|
|
|
|
DWARF2_USE_FIXED_ADVANCE_PC.
|
|
|
|
|
|
* gas/lns/lns-big-delta.s: New.
|
|
|
|
|
|
* gas/lns/lns-big-delta.d: New.
|
|
|
|
|
|
|
2008-01-08 16:37:13 +08:00
|
|
|
|
2008-01-08 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
|
|
|
|
|
|
|
|
|
|
|
|
PR gas/5322
|
|
|
|
|
|
* lib/gas-defs.exp (gas_host_run): Add fourth argument to regsub
|
|
|
|
|
|
command.
|
|
|
|
|
|
|
gas/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic.
* config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic
only.
(md_assemble): Remove Intel mode workaround.
(match_template): Check support for old gcc, AT&T mnemonic
and Intel Syntax.
(md_parse_option): Don't set intel_mnemonic to 0 for
OPTION_MOLD_GCC.
gas/testsuite/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
* gas/i386/intel.d: Updated.
* gas/i386/intel.e: Likewise.
opcodes/
2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
ATTSyntax.
* i386-opc.h (IntelMnemonic): Renamed to ..
(ATTSyntax): This
(Opcode_Modifier_Max): Updated.
(i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
and intelsyntax.
* i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
* i386-tbl.h: Regenerated.
2008-01-06 01:07:25 +08:00
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2008-01-05 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp,
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fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp.
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* gas/i386/intel.d: Updated.
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* gas/i386/intel.e: Likewise.
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2008-01-05 02:03:02 +08:00
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2008-01-04 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/rexw.d: New.
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* gas/i386/rexw.s: Likewise.
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* gas/i386/x86-64-sse4_1-intel.d: Updated.
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* gas/i386/x86-64-sse4_1.d: Likewise.
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2008-01-04 22:53:50 +08:00
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2008-01-04 Nick Clifton <nickc@redhat.com>
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* gas/ppc/altivec_and_spe.s: New test - checks that ISA extension
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command line options (-maltivec, -mspe) can be specified before
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CPU selection command line options.
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* gas/ppc/altivec_and_spe.d: Expected disassembly.
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* gas/ppc/ppc.exp: Run the new test
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2008-01-04 09:05:45 +08:00
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2008-01-03 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/arch-9.d: New file.
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* gas/i386/arch-9.s: Likewise.
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* gas/i386/i386.exp: Run arch-9.
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2008-01-03 13:29:53 +08:00
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2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/arch-5.d: New file.
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* gas/i386/arch-5.s: Likewise.
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* gas/i386/arch-6.d: Likewise.
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* gas/i386/arch-6.s: Likewise.
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* gas/i386/arch-7.d: Likewise.
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* gas/i386/arch-7.s: Likewise.
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* gas/i386/arch-8.d: Likewise.
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* gas/i386/arch-8.s: Likewise.
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* gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8.
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2008-01-03 11:28:35 +08:00
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2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/i386.s: Add tests for movq.
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* gas/i386/x86_64.s: Likewise.
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* gas/i386/i386.d Updated.
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* gas/i386/x86_64.d: Likewise.
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gas/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX.
Check memory size in Intel mode.
(process_suffix): Handle XMMWORD_MNEM_SUFFIX.
(intel_e09): Likewise.
* config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New.
gas/testsuite/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
* gas/i386/inval.s: Add tests for movq.
* gas/i386/x86-64-inval.s: Likewise.
* gas/i386/inval.l: Updated.
* gas/i386/x86-64-inval.l: Likewise.
opcodes/
2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/5534
* i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
Byte, Word, Dword, QWord and Xmmword.
* i386-opc.h (No_xSuf): New.
(CheckSize): Likewise.
(Byte): Likewise.
(Word): Likewise.
(Dword): Likewise.
(QWord): Likewise.
(Xmmword): Likewise.
(FWait): Updated.
(i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
Dword, QWord and Xmmword.
* i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
used.
* i386-tbl.h: Regenerated.
2008-01-03 05:43:34 +08:00
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2008-01-02 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/5534
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* gas/i386/intel.s: Use QWORD on movq instead of DWORD.
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* gas/i386/inval.s: Add tests for movq.
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* gas/i386/x86-64-inval.s: Likewise.
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* gas/i386/inval.l: Updated.
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* gas/i386/x86-64-inval.l: Likewise.
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2008-01-03 04:59:47 +08:00
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2008-01-02 Catherine Moore <clm@codesourcery.com>
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* gas/mips/jalr.s: New test.
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* gas/mips/jalr.l: New test output.
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* gas/mips/mips.exp: Run new test.
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2008-01-03 05:41:02 +08:00
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For older changes see ChangeLog-2007
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2004-01-02 19:16:21 +08:00
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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