binutils-gdb/gas/ChangeLog

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2011-06-29 Tristan Gingold <gingold@adacore.com>
* config/tc-i386.c (i386_mach): Convert to ISO-C.
(md_begin, pe_directive_secrel, md_estimate_size_before_relax): Ditto.
(md_convert_frag, md_apply_fix, md_undefined_symbol): Ditto.
(md_section_align, tc_gen_reloc): Ditto.
2011-06-28 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (s_alpha_pdesc): Fix indentation. Do not
generate dummy fix.
2011-06-28 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (load_expression): Use alloca instead of xmalloc.
(emit_jsrjmp): Ditto.
(tc_gen_reloc): Ditto.
2011-06-28 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (alpha_evax_proc_hash): Remove.
(alpha_evax_proc_data): New variable.
(s_alpha_ent): Prevent nested function. Remove has_insert call.
(s_alpha_pdesc): Do not call demand_empty_rest_of_line in case of
error. Do not search in the hash table. Check if match with .ent.
(s_alpha_name): Remove unused variable.
(md_begin): Remove initialization of alpha_evax_proc_hash.
2011-06-27 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (add_to_link_pool): Remove basesym parameter.
Locally declare basesym. Add comments. Do not set literal_pool_size.
(load_expression): Adjust call to add_to_link_pool.
(s_alpha_pdesc): Define pdesc symbol using dot.
Do not set literal_pool_size.
(s_alpha_end): Use NULL instead of 0.
2011-06-27 Tristan Gingold <gingold@adacore.com>
* config/obj-evax.c (evax_frob_file_before_adjust): Add comments.
Fix style.
* config/obj-evax.h (struct alpha_linkage_fixups): Remove seg
field. Add comments.
(obj_symbol_type, object_headers, OBJ_SYMFIELD_TYPE): Remove
2011-06-26 Richard Sandiford <rdsandiford@googlemail.com>
* config/tc-mips.c (fix_24k_record_store_info): If the previous
instruction was a store, and the next instructions are unknown,
assume the worst.
2011-06-25 Richard Sandiford <rdsandiford@googlemail.com>
PR gas/12915
* config/tc-mips.c (nops_for_vr4130, nops_for_24k, nops_for_insn)
(nops_for_sequence, nops_for_insn_or_target): Add ignore parameters.
(mips_emit_delays, start_noreorder): Update accordingly.
(append_insn): Likewise. Revert original fix for this PR
and use the ignore parameter instead.
2011-06-24 Tristan Gingold <gingold@adacore.com>
PR gas/11625
* config/obj-evax.c (evax_frob_symbol): Use as_bad instead of abort.
2011-06-24 Tristan Gingold <gingold@adacore.com>
* config/tc-alpha.c (add_to_link_pool): Remove useless offset
variable. Fix style.
2011-06-23 Richard Sandiford <rdsandiford@googlemail.com>
PR gas/12915
* config/tc-mips.c (append_insn): Only consider hazards between the
pre-noreorder block and ip.
2011-06-21 Sameera Deshpande <sameera.deshpande@arm.com>
* config/tc-arm.c (vfp_conv): Add check on range of immediate operand
in vcvt instruction between floating-point and fixed-point.
(operand_parse_code): Add "OP_oI32z".
(parse_operands): OP_oI32z case added.
2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt: Revert x32 change.
2011-06-20 Nick Clifton <nickc@redhat.com>
* doc/Makefile.am: (CPU_DOCS): Add c-xstormy16.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Set XSTORMY16.
* doc/c-xstormy16.texi: New file.
2011-06-19 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt: Support x32.
2011-06-15 Nick Clifton <nickc@redhat.com>
* NEWS: Mention addition of TILEPRO and TIKE-Gx support.
2011-06-14 Tristan Gingold <gingold@adacore.com>
* config/tc-ppc.h (struct ppc_tc_sy): Complete comment on within.
(tc_new_dot_label): Define.
(ppc_new_dot_label): Declare.
* config/tc-ppc.c (ppc_frob_label): Set within target field.
(ppc_fix_adjustable): Use this field to adjust the reloc.
(ppc_new_dot_label): New function.
2011-06-14 13:11:15 +08:00
2011-06-14 Alan Modra <amodra@gmail.com>
* po/POTFILES.in: Regenerate.
* Makefile.am (ALL_MACHINES): Add cpu-tilegx.lo and cpu-tilepro.lo. (ALL_MACHINE_CFILES): Add cpu-tilegx.c and cpu-tilepro.c. (BFD32_BACKENDS): Add elf32-tilegx.lo, elf32-tilepro.lo, and elfxx-tilegx.lo. (BFD32_BACKENDS_CFILES): Add elf32-tilegx.c elf32-tilepro.c, and elfxx-tilegx.c. (BFD64_BACKENDS): Add elf64-tilegx.lo. (BFD64_BACKENDS_CFILES): Add elf64-tilegx.c. * Makefile.in: Regenerate. * arctures.c (bfd_architecture): Define bfd_arch_tilepro, bfd_arch_tilegx, bfd_mach_tilepro, bfd_mach_tilegx. (bfd_arch_info): Add bfd_tilegx_arch, bfd_tilepro_arch. (bfd_archures_list): Add bfd_tilegx_arch, bfd_tilepro_arch. bfd-in2.h: Regenerate. * config.bfd: Handle tilegx-*-* and tilepro-*-*. * configure.in: Handle bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * configure: Regenerate. * elf-bfd.h (enum elf_target_id): Define TILEGX_ELF_DATA and TILEPRO_ELF_DATA. * libbfd.h: Regenerate. * reloc.c: Add BFD_RELOC_TILEPRO_{COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JOFFLONG_X1, JOFFLONG_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM15_X1, MF_IMM15_X1, IMM16_X0, IMM16_X1, IMM16_X0_LO, IMM16_X1_LO, IMM16_X0_HI, IMM16_X1_HI, IMM16_X0_HA, IMM16_X1_HA, IMM16_X0_PCREL, IMM16_X1_PCREL, IMM16_X0_LO_PCREL, IMM16_X1_LO_PCREL, IMM16_X0_HI_PCREL, IMM16_X1_HI_PCREL, IMM16_X0_HA_PCREL, IMM16_X1_HA_PCREL, IMM16_X0_GOT, IMM16_X1_GOT, IMM16_X0_GOT_LO, IMM16_X1_GOT_LO, IMM16_X0_GOT_HI, IMM16_X1_GOT_HI, IMM16_X0_GOT_HA, IMM16_X1_GOT_HA, MMSTART_X0, MMEND_X0, MMSTART_X1, MMEND_X1, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_TLS_GD, IMM16_X1_TLS_GD, IMM16_X0_TLS_GD_LO, IMM16_X1_TLS_GD_LO, IMM16_X0_TLS_GD_HI, IMM16_X1_TLS_GD_HI, IMM16_X0_TLS_GD_HA, IMM16_X1_TLS_GD_HA, IMM16_X0_TLS_IE, IMM16_X1_TLS_IE, IMM16_X0_TLS_IE_LO, IMM16_X1_TLS_IE_LO, IMM16_X0_TLS_IE_HI, IMM16_X1_TLS_IE_HI, IMM16_X0_TLS_IE_HA, IMM16_X1_TLS_IE_HA, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} Add BFD_RELOC_TILEGX_{HW0, HW1, HW2, HW3, HW0_LAST, HW1_LAST, HW2_LAST, COPY, GLOB_DAT, JMP_SLOT, RELATIVE, BROFF_X1, JUMPOFF_X1, JUMPOFF_X1_PLT, IMM8_X0, IMM8_Y0, IMM8_X1, IMM8_Y1, DEST_IMM8_X1, MT_IMM14_X1, MF_IMM14_X1, MMSTART_X0, MMEND_X0, SHAMT_X0, SHAMT_X1, SHAMT_Y0, SHAMT_Y1, IMM16_X0_HW0, IMM16_X1_HW0, IMM16_X0_HW1, IMM16_X1_HW1, IMM16_X0_HW2, IMM16_X1_HW2, IMM16_X0_HW3, IMM16_X1_HW3, IMM16_X0_HW0_LAST, IMM16_X1_HW0_LAST, IMM16_X0_HW1_LAST, IMM16_X1_HW1_LAST, IMM16_X0_HW2_LAST, IMM16_X1_HW2_LAST, IMM16_X0_HW0_PCREL, IMM16_X1_HW0_PCREL, IMM16_X0_HW1_PCREL, IMM16_X1_HW1_PCREL, IMM16_X0_HW2_PCREL, IMM16_X1_HW2_PCREL, IMM16_X0_HW3_PCREL, IMM16_X1_HW3_PCREL, IMM16_X0_HW0_LAST_PCREL, IMM16_X1_HW0_LAST_PCREL, IMM16_X0_HW1_LAST_PCREL, IMM16_X1_HW1_LAST_PCREL, IMM16_X0_HW2_LAST_PCREL, IMM16_X1_HW2_LAST_PCREL, IMM16_X0_HW0_GOT, IMM16_X1_HW0_GOT, IMM16_X0_HW1_GOT, IMM16_X1_HW1_GOT, IMM16_X0_HW2_GOT, IMM16_X1_HW2_GOT, IMM16_X0_HW3_GOT, IMM16_X1_HW3_GOT, IMM16_X0_HW0_LAST_GOT, IMM16_X1_HW0_LAST_GOT, IMM16_X0_HW1_LAST_GOT, IMM16_X1_HW1_LAST_GOT, IMM16_X0_HW2_LAST_GOT, IMM16_X1_HW2_LAST_GOT, IMM16_X0_HW0_TLS_GD, IMM16_X1_HW0_TLS_GD, IMM16_X0_HW1_TLS_GD, IMM16_X1_HW1_TLS_GD, IMM16_X0_HW2_TLS_GD, IMM16_X1_HW2_TLS_GD, IMM16_X0_HW3_TLS_GD, IMM16_X1_HW3_TLS_GD, IMM16_X0_HW0_LAST_TLS_GD, IMM16_X1_HW0_LAST_TLS_GD, IMM16_X0_HW1_LAST_TLS_GD, IMM16_X1_HW1_LAST_TLS_GD, IMM16_X0_HW2_LAST_TLS_GD, IMM16_X1_HW2_LAST_TLS_GD, IMM16_X0_HW0_TLS_IE, IMM16_X1_HW0_TLS_IE, IMM16_X0_HW1_TLS_IE, IMM16_X1_HW1_TLS_IE, IMM16_X0_HW2_TLS_IE, IMM16_X1_HW2_TLS_IE, IMM16_X0_HW3_TLS_IE, IMM16_X1_HW3_TLS_IE, IMM16_X0_HW0_LAST_TLS_IE, IMM16_X1_HW0_LAST_TLS_IE, IMM16_X0_HW1_LAST_TLS_IE, IMM16_X1_HW1_LAST_TLS_IE, IMM16_X0_HW2_LAST_TLS_IE, IMM16_X1_HW2_LAST_TLS_IE, TLS_DTPMOD64, TLS_DTPOFF64, TLS_TPOFF64, TLS_DTPMOD32, TLS_DTPOFF32, TLS_TPOFF32} * targets.c (bfd_elf32_tilegx_vec): Declare. (bfd_elf32_tilepro_vec): Declare. (bfd_elf64_tilegx_vec): Declare. (bfd_target_vector): Add bfd_elf32_tilegx_vec, bfd_elf32_tilepro_vec, and bfd_elf64_tilegx_vec. * cpu-tilegx.c: New file. * cpu-tilepro.c: New file. * elf32-tilepro.h: New file. * elf32-tilepro.c: New file. * elf32-tilegx.c: New file. * elf32-tilegx.h: New file. * elf64-tilegx.c: New file. * elf64-tilegx.h: New file. * elfxx-tilegx.c: New file. * elfxx-tilegx.h: New file. * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and config/tc-tilepro.c. (TARGET_CPU_HFILES): Add config/tc-tilegx.h and config/tc-tilepro.h. * Makefile.in: Regenerate. * configure.tgt (tilepro-*-*): New. (tilegx-*-*): Likewise. * config/tc-tilegx.c: New file. * config/tc-tilegx.h: Likewise. * config/tc-tilepro.h: Likewise. * config/tc-tilepro.c: Likewise. * doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and c-tilepro.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TILEGX): Define. (TILEPRO): Define. * doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include c-tilegx.texi and c-tilepro.texi. * doc/c-tilegx.texi: New. * doc/c-tilepro.texi: New. * gas/tilepro/t_constants.s: New file. * gas/tilepro/t_constants.d: Likewise. * gas/tilepro/t_insns.s: Likewise. * gas/tilepro/tilepro.exp: Likewise. * gas/tilepro/t_insns.d: Likewise. * gas/tilegx/tilegx.exp: Likewise. * gas/tilegx/t_insns.d: Likewise. * gas/tilegx/t_insns.s: Likewise. * dis-asm.h (print_insn_tilegx): Declare. (print_insn_tilepro): Likewise. * tilegx.h: New file. * tilepro.h: New file. * common.h: Add EM_TILEGX. * tilegx.h: New file. * tilepro.h: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32tilegx.c and eelf32tilepro.c. (ALL_64_EMULATION_SOURCES): Add eelf64tilegx.c. (eelf32tilegx.c): New target. (eelf32tilepro.c): Likewise. (eelf64tilegx.c): Likewise. * Makefile.in: Regenerate. * configure.tgt: Handle tilegx-*-* and tilepro-*-*. * emulparams/elf32tilegx.sh: New file. * emulparams/elf64tilegx.sh: New file. * emulparams/elf32tilepro.sh: New file. * ld-elf/eh5.d: Don't run on tile*. * ld-srec/srec.exp: xfail on tile*. * ld-tilegx/external.s: New file. * ld-tilegx/reloc.d: New file. * ld-tilegx/reloc.s: New file. * ld-tilegx/tilegx.exp: New file. * ld-tilepro/external.s: New file. * ld-tilepro/reloc.d: New file. * ld-tilepro/reloc.s: New file. * ld-tilepro/tilepro.exp: New file. * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. * Makefile.in: Regenerate. * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. * configure: Regenerate. * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. * po/POTFILES.in: Regenerate. * tilegx-dis.c: New file. * tilegx-opc.c: New file. * tilepro-dis.c: New file. * tilepro-opc.c: New file.
2011-06-13 23:18:54 +08:00
2011-06-13 Walter Lee <walt@tilera.com>
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-tilegx.c and
config/tc-tilepro.c.
(TARGET_CPU_HFILES): Add config/tc-tilegx.h and
config/tc-tilepro.h.
* Makefile.in: Regenerate.
* configure.tgt (tilepro-*-*): New.
(tilegx-*-*): Likewise.
* config/tc-tilegx.c: New file.
* config/tc-tilegx.h: Likewise.
* config/tc-tilepro.h: Likewise.
* config/tc-tilepro.c: Likewise.
* doc/Makefile.am (CPU_DOCS): Add c-tilegx.texi and
c-tilepro.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi (TILEGX): Define.
(TILEPRO): Define.
* doc/as.texinfo: Add Tile-Gx and TILEPro documentation. Include
c-tilegx.texi and c-tilepro.texi.
* doc/c-tilegx.texi: New.
* doc/c-tilepro.texi: New.
2011-06-13 Nick Clifton <nickc@redhat.com>
PR gas/12854
* config/tc-arm.c (do_shift): Do not allow shift operations at the
end of a register based shift insn.
(do_t_shift): Likewise.
2011-06-13 Nick Clifton <nickc@redhat.com>
* config/tc-score.c (s3_my_get_expression): Delete unused local
variable 'seg'.
(s3_do_ldst_insn): Delete unused local variable 'strbak'.
(s3_do16_ldst_insn): Delete unused local variable 'temp'.
(s3_do_macro_bcmp): Zero inst_expand array.
(s3_do_macro_bcmpz): Likewise.
(s3_s_score_end): Delete unused local variable 'dot'.
(s3_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
* config/tc-score7.c (s7_my_get_expression): Delete unused local
variable 'seg'.
(s7_do_ldst_insn): Delete unused local variable 'strbak'.
(s7_b32_relax_to_b16): Delete unused local variables 'r_old' and
'r_new'.
(s7_s_score_end): Delete unused local variable 'dot'.
(s7_relax_frag): Delete unused local variable 'relax_size'.
(s7_gen_reloc): Delete unused local variables 'f', 's', and 'e'.
Support AVX Programming Reference (June, 2011). gas/ 2011-06-10 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (June, 2011) * config/tc-i386.c (i386_error): Add invalid_vsib_address and unsupported_vector_index_register. (cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid. (check_VecOperands): New. (match_template): Call check_VecOperands. Handle invalid_vsib_address and unsupported_vector_index_register. (build_modrm_byte): Support VecSIB. Check register-only source operand when two source operands are swapped. (i386_index_check): Allow Xmm/Ymm index registers. * doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt and invpcid./invpcid. gas/testsuite/ 2011-06-10 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (June, 2011) * gas/i386/arch-10-1.l: Updated. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10.s: Add LZCNT to comments. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10-lzcnt.d: New. * gas/i386/avx-gather-intel.d: Likewise. * gas/i386/avx-gather.d: Likewise. * gas/i386/avx-gather.s: Likewise. * gas/i386/avx2-intel.d: Likewise. * gas/i386/avx2.d: Likewise. * gas/i386/avx2.s: Likewise * gas/i386/avx256int-intel.d: Likewise. * gas/i386/avx256int.d: Likewise. * gas/i386/avx256int.s: Likewise. * gas/i386/bmi2-intel.d: Likewise. * gas/i386/bmi2.d: Likewise. * gas/i386/bmi2.s: Likewise. * gas/i386/inval-invpcid.l:Likewise. * gas/i386/inval-invpcid.s: Likewise. * gas/i386/invpcid-intel.d: Likewise. * gas/i386/invpcid.d: Likewise. * gas/i386/invpcid.s: Likewise. * gas/i386/x86-64-arch-2-lzcnt.d: Likewise. * gas/i386/x86-64-avx-gather-intel.d: Likewise. * gas/i386/x86-64-avx-gather.d: Likewise. * gas/i386/x86-64-avx-gather.s: Likewise. * gas/i386/x86-64-avx2-intel.d: Likewise. * gas/i386/x86-64-avx2.d: Likewise. * gas/i386/x86-64-avx2.s: Likewise. * gas/i386/x86-64-avx256int-intel.d: Likewise. * gas/i386/x86-64-avx256int.d: Likewise. * gas/i386/x86-64-avx256int.s: Likewise. * gas/i386/x86-64-bmi2-intel.d: Likewise. * gas/i386/x86-64-bmi2.d: Likewise. * gas/i386/x86-64-bmi2.s: Likewise. * gas/i386/x86-64-inval-invpcid.l: Likewise. * gas/i386/x86-64-inval-invpcid.s: Likewise. * gas/i386/x86-64-invpcid-intel.d: Likewise. * gas/i386/x86-64-invpcid.d: Likewise. * gas/i386/x86-64-invpcid.s: Likewise. opcodes/ 2011-06-10 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (June, 2011) * i386-dis.c (XMGatherQ): New. * i386-dis.c (EXxmm_mb): New. (EXxmm_mb): Likewise. (EXxmm_mw): Likewise. (EXxmm_md): Likewise. (EXxmm_mq): Likewise. (EXxmmdw): Likewise. (EXxmmqd): Likewise. (VexGatherQ): Likewise. (MVexVSIBDWpX): Likewise. (MVexVSIBQWpX): Likewise. (xmm_mb_mode): Likewise. (xmm_mw_mode): Likewise. (xmm_md_mode): Likewise. (xmm_mq_mode): Likewise. (xmmdw_mode): Likewise. (xmmqd_mode): Likewise. (ymmxmm_mode): Likewise. (vex_vsib_d_w_dq_mode): Likewise. (vex_vsib_q_w_dq_mode): Likewise. (MOD_VEX_0F385A_PREFIX_2): Likewise. (MOD_VEX_0F388C_PREFIX_2): Likewise. (MOD_VEX_0F388E_PREFIX_2): Likewise. (PREFIX_0F3882): Likewise. (PREFIX_VEX_0F3816): Likewise. (PREFIX_VEX_0F3836): Likewise. (PREFIX_VEX_0F3845): Likewise. (PREFIX_VEX_0F3846): Likewise. (PREFIX_VEX_0F3847): Likewise. (PREFIX_VEX_0F3858): Likewise. (PREFIX_VEX_0F3859): Likewise. (PREFIX_VEX_0F385A): Likewise. (PREFIX_VEX_0F3878): Likewise. (PREFIX_VEX_0F3879): Likewise. (PREFIX_VEX_0F388C): Likewise. (PREFIX_VEX_0F388E): Likewise. (PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise. (PREFIX_VEX_0F38F5): Likewise. (PREFIX_VEX_0F38F6): Likewise. (PREFIX_VEX_0F3A00): Likewise. (PREFIX_VEX_0F3A01): Likewise. (PREFIX_VEX_0F3A02): Likewise. (PREFIX_VEX_0F3A38): Likewise. (PREFIX_VEX_0F3A39): Likewise. (PREFIX_VEX_0F3A46): Likewise. (PREFIX_VEX_0F3AF0): Likewise. (VEX_LEN_0F3816_P_2): Likewise. (VEX_LEN_0F3819_P_2): Likewise. (VEX_LEN_0F3836_P_2): Likewise. (VEX_LEN_0F385A_P_2_M_0): Likewise. (VEX_LEN_0F38F5_P_0): Likewise. (VEX_LEN_0F38F5_P_1): Likewise. (VEX_LEN_0F38F5_P_3): Likewise. (VEX_LEN_0F38F6_P_3): Likewise. (VEX_LEN_0F38F7_P_1): Likewise. (VEX_LEN_0F38F7_P_2): Likewise. (VEX_LEN_0F38F7_P_3): Likewise. (VEX_LEN_0F3A00_P_2): Likewise. (VEX_LEN_0F3A01_P_2): Likewise. (VEX_LEN_0F3A38_P_2): Likewise. (VEX_LEN_0F3A39_P_2): Likewise. (VEX_LEN_0F3A46_P_2): Likewise. (VEX_LEN_0F3AF0_P_3): Likewise. (VEX_W_0F3816_P_2): Likewise. (VEX_W_0F3818_P_2): Likewise. (VEX_W_0F3819_P_2): Likewise. (VEX_W_0F3836_P_2): Likewise. (VEX_W_0F3846_P_2): Likewise. (VEX_W_0F3858_P_2): Likewise. (VEX_W_0F3859_P_2): Likewise. (VEX_W_0F385A_P_2_M_0): Likewise. (VEX_W_0F3878_P_2): Likewise. (VEX_W_0F3879_P_2): Likewise. (VEX_W_0F3A00_P_2): Likewise. (VEX_W_0F3A01_P_2): Likewise. (VEX_W_0F3A02_P_2): Likewise. (VEX_W_0F3A38_P_2): Likewise. (VEX_W_0F3A39_P_2): Likewise. (VEX_W_0F3A46_P_2): Likewise. (MOD_VEX_0F3818_PREFIX_2): Removed. (MOD_VEX_0F3819_PREFIX_2): Likewise. (VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise. (VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise. (VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise. (VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise. (VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise. (VEX_LEN_0F3A0E_P_2): Likewise. (VEX_LEN_0F3A0F_P_2): Likewise. (VEX_LEN_0F3A42_P_2): Likewise. (VEX_LEN_0F3A4C_P_2): Likewise. (VEX_W_0F3818_P_2_M_0): Likewise. (VEX_W_0F3819_P_2_M_0): Likewise. (prefix_table): Updated. (three_byte_table): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (vex_w_table): Likewise. (mod_table): Likewise. (putop): Handle "LW". (intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode, xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode, vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode. (OP_EX): Likewise. (OP_E_memory): Handle vex_vsib_d_w_dq_mode and vex_vsib_q_w_dq_mode. (OP_XMM): Handle vex_vsib_q_w_dq_mode. (OP_VEX): Likewise. * i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS, CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS. (cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID. (opcode_modifiers): Add VecSIB. * i386-opc.h (CpuAVX2): New. (CpuBMI2): Likewise. (CpuLZCNT): Likewise. (CpuINVPCID): Likewise. (VecSIB128): Likewise. (VecSIB256): Likewise. (VecSIB): Likewise. (i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid. (i386_opcode_modifier): Add vecsib. * i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-06-11 05:27:40 +08:00
2011-06-10 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2011)
* config/tc-i386.c (i386_error): Add invalid_vsib_address and
unsupported_vector_index_register.
(cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid.
(check_VecOperands): New.
(match_template): Call check_VecOperands. Handle
Support AVX Programming Reference (June, 2011). gas/ 2011-06-10 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (June, 2011) * config/tc-i386.c (i386_error): Add invalid_vsib_address and unsupported_vector_index_register. (cpu_arch): Add .avx2, .bmi2, .lzcnt and .invpcid. (check_VecOperands): New. (match_template): Call check_VecOperands. Handle invalid_vsib_address and unsupported_vector_index_register. (build_modrm_byte): Support VecSIB. Check register-only source operand when two source operands are swapped. (i386_index_check): Allow Xmm/Ymm index registers. * doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt and invpcid./invpcid. gas/testsuite/ 2011-06-10 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (June, 2011) * gas/i386/arch-10-1.l: Updated. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10.s: Add LZCNT to comments. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10-lzcnt.d: New. * gas/i386/avx-gather-intel.d: Likewise. * gas/i386/avx-gather.d: Likewise. * gas/i386/avx-gather.s: Likewise. * gas/i386/avx2-intel.d: Likewise. * gas/i386/avx2.d: Likewise. * gas/i386/avx2.s: Likewise * gas/i386/avx256int-intel.d: Likewise. * gas/i386/avx256int.d: Likewise. * gas/i386/avx256int.s: Likewise. * gas/i386/bmi2-intel.d: Likewise. * gas/i386/bmi2.d: Likewise. * gas/i386/bmi2.s: Likewise. * gas/i386/inval-invpcid.l:Likewise. * gas/i386/inval-invpcid.s: Likewise. * gas/i386/invpcid-intel.d: Likewise. * gas/i386/invpcid.d: Likewise. * gas/i386/invpcid.s: Likewise. * gas/i386/x86-64-arch-2-lzcnt.d: Likewise. * gas/i386/x86-64-avx-gather-intel.d: Likewise. * gas/i386/x86-64-avx-gather.d: Likewise. * gas/i386/x86-64-avx-gather.s: Likewise. * gas/i386/x86-64-avx2-intel.d: Likewise. * gas/i386/x86-64-avx2.d: Likewise. * gas/i386/x86-64-avx2.s: Likewise. * gas/i386/x86-64-avx256int-intel.d: Likewise. * gas/i386/x86-64-avx256int.d: Likewise. * gas/i386/x86-64-avx256int.s: Likewise. * gas/i386/x86-64-bmi2-intel.d: Likewise. * gas/i386/x86-64-bmi2.d: Likewise. * gas/i386/x86-64-bmi2.s: Likewise. * gas/i386/x86-64-inval-invpcid.l: Likewise. * gas/i386/x86-64-inval-invpcid.s: Likewise. * gas/i386/x86-64-invpcid-intel.d: Likewise. * gas/i386/x86-64-invpcid.d: Likewise. * gas/i386/x86-64-invpcid.s: Likewise. opcodes/ 2011-06-10 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (June, 2011) * i386-dis.c (XMGatherQ): New. * i386-dis.c (EXxmm_mb): New. (EXxmm_mb): Likewise. (EXxmm_mw): Likewise. (EXxmm_md): Likewise. (EXxmm_mq): Likewise. (EXxmmdw): Likewise. (EXxmmqd): Likewise. (VexGatherQ): Likewise. (MVexVSIBDWpX): Likewise. (MVexVSIBQWpX): Likewise. (xmm_mb_mode): Likewise. (xmm_mw_mode): Likewise. (xmm_md_mode): Likewise. (xmm_mq_mode): Likewise. (xmmdw_mode): Likewise. (xmmqd_mode): Likewise. (ymmxmm_mode): Likewise. (vex_vsib_d_w_dq_mode): Likewise. (vex_vsib_q_w_dq_mode): Likewise. (MOD_VEX_0F385A_PREFIX_2): Likewise. (MOD_VEX_0F388C_PREFIX_2): Likewise. (MOD_VEX_0F388E_PREFIX_2): Likewise. (PREFIX_0F3882): Likewise. (PREFIX_VEX_0F3816): Likewise. (PREFIX_VEX_0F3836): Likewise. (PREFIX_VEX_0F3845): Likewise. (PREFIX_VEX_0F3846): Likewise. (PREFIX_VEX_0F3847): Likewise. (PREFIX_VEX_0F3858): Likewise. (PREFIX_VEX_0F3859): Likewise. (PREFIX_VEX_0F385A): Likewise. (PREFIX_VEX_0F3878): Likewise. (PREFIX_VEX_0F3879): Likewise. (PREFIX_VEX_0F388C): Likewise. (PREFIX_VEX_0F388E): Likewise. (PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise. (PREFIX_VEX_0F38F5): Likewise. (PREFIX_VEX_0F38F6): Likewise. (PREFIX_VEX_0F3A00): Likewise. (PREFIX_VEX_0F3A01): Likewise. (PREFIX_VEX_0F3A02): Likewise. (PREFIX_VEX_0F3A38): Likewise. (PREFIX_VEX_0F3A39): Likewise. (PREFIX_VEX_0F3A46): Likewise. (PREFIX_VEX_0F3AF0): Likewise. (VEX_LEN_0F3816_P_2): Likewise. (VEX_LEN_0F3819_P_2): Likewise. (VEX_LEN_0F3836_P_2): Likewise. (VEX_LEN_0F385A_P_2_M_0): Likewise. (VEX_LEN_0F38F5_P_0): Likewise. (VEX_LEN_0F38F5_P_1): Likewise. (VEX_LEN_0F38F5_P_3): Likewise. (VEX_LEN_0F38F6_P_3): Likewise. (VEX_LEN_0F38F7_P_1): Likewise. (VEX_LEN_0F38F7_P_2): Likewise. (VEX_LEN_0F38F7_P_3): Likewise. (VEX_LEN_0F3A00_P_2): Likewise. (VEX_LEN_0F3A01_P_2): Likewise. (VEX_LEN_0F3A38_P_2): Likewise. (VEX_LEN_0F3A39_P_2): Likewise. (VEX_LEN_0F3A46_P_2): Likewise. (VEX_LEN_0F3AF0_P_3): Likewise. (VEX_W_0F3816_P_2): Likewise. (VEX_W_0F3818_P_2): Likewise. (VEX_W_0F3819_P_2): Likewise. (VEX_W_0F3836_P_2): Likewise. (VEX_W_0F3846_P_2): Likewise. (VEX_W_0F3858_P_2): Likewise. (VEX_W_0F3859_P_2): Likewise. (VEX_W_0F385A_P_2_M_0): Likewise. (VEX_W_0F3878_P_2): Likewise. (VEX_W_0F3879_P_2): Likewise. (VEX_W_0F3A00_P_2): Likewise. (VEX_W_0F3A01_P_2): Likewise. (VEX_W_0F3A02_P_2): Likewise. (VEX_W_0F3A38_P_2): Likewise. (VEX_W_0F3A39_P_2): Likewise. (VEX_W_0F3A46_P_2): Likewise. (MOD_VEX_0F3818_PREFIX_2): Removed. (MOD_VEX_0F3819_PREFIX_2): Likewise. (VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise. (VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise. (VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise. (VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise. (VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise. (VEX_LEN_0F3A0E_P_2): Likewise. (VEX_LEN_0F3A0F_P_2): Likewise. (VEX_LEN_0F3A42_P_2): Likewise. (VEX_LEN_0F3A4C_P_2): Likewise. (VEX_W_0F3818_P_2_M_0): Likewise. (VEX_W_0F3819_P_2_M_0): Likewise. (prefix_table): Updated. (three_byte_table): Likewise. (vex_table): Likewise. (vex_len_table): Likewise. (vex_w_table): Likewise. (mod_table): Likewise. (putop): Handle "LW". (intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode, xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode, vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode. (OP_EX): Likewise. (OP_E_memory): Handle vex_vsib_d_w_dq_mode and vex_vsib_q_w_dq_mode. (OP_XMM): Handle vex_vsib_q_w_dq_mode. (OP_VEX): Likewise. * i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS, CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS. (cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID. (opcode_modifiers): Add VecSIB. * i386-opc.h (CpuAVX2): New. (CpuBMI2): Likewise. (CpuLZCNT): Likewise. (CpuINVPCID): Likewise. (VecSIB128): Likewise. (VecSIB256): Likewise. (VecSIB): Likewise. (i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid. (i386_opcode_modifier): Add vecsib. * i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2011-06-11 05:27:40 +08:00
invalid_vsib_address and unsupported_vector_index_register.
(build_modrm_byte): Support VecSIB. Check register-only source
operand when two source operands are swapped.
(i386_index_check): Allow Xmm/Ymm index registers.
* doc/c-i386.texi: Document avx2/.avx2, bmi2/.bmi2, lzcnt/.lzcnt
and invpcid./invpcid.
2011-06-09 Nick Clifton <nickc@redhat.com>
PR gas/12861
* config/tc-cr16.c (tc_gen_reloc): Remove unused local variable
code.
(check_cinv_options): Remove unused local variables. Make
function void.
(md_assemble): Remove unused local variable.
2011-06-09 James Greenhalgh <james.greenhalgh@arm.com>
* config/tc-arm.c (do_ldrd): Warn in unpredictable cases.
2011-06-03 22:44:04 +08:00
2011-06-03 Arnaud Patard <arnaud.patard@rtp-net.org>
PR gas/12698
* config/tc-arm.c (parse_psr): Set m_profile to false when
assembling for any architecture.
2011-06-02 23:32:10 +08:00
2011-06-02 Jie Zhang jie@codesourcery.com
Nathan Sidwell nathan@codesourcery.com
* config/tc-arm.c (parse_address_main): Handle -0 offsets.
(encode_arm_addr_mode_2): Set default sign of zero here ...
(encode_arm_addr_mode_3): ... and here.
(encode_arm_cp_address): ... and here.
(md_apply_fix): Use default sign of zero here.
2011-06-02 21:43:24 +08:00
2011-06-02 Nick Clifton <nickc@redhat.com>
* as.c: Fix spelling typo.
* read.c: Likewise.
* config/tc-ppc.c: Likewise.
* po/gas.pit: Regenerate.
2011-05-31 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (arm_cpus): Add Cortex-R5.
(arm_extensions): Allow idiv on ARMv7-R.
* doc/c-arm.text: Update idiv extension restrictions.
2011-05-31 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (arm_force_relocation): Resolve all pc-relative
loads.
2011-05-31 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (do_t_branch): Avoid relaxing branches to constant
addresses.
2011-05-31 Paul Brook <paul@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
* config/tc-arm.c (fix_new_arm): Create an absolute symbol for
pc-relative fixes to constants.
* config/tc-arm.h (TC_FORCE_RELOCATATION_ABS): Define.
2011-06-02 21:43:24 +08:00
2011-05-27 Nick Clifton <nickc@redhat.com>
* config/tc-s390.c (md_begin): Remove unused variable dup_insn.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (md_gather_operands): Fix check for floating
register pair operands.
2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (md_gather_operands): Emit an error for odd
numbered registers used as register pair operand.
2011-05-23 Nick Clifton <nickc@redhat.com>
* config/tc-v850.h (TC_FX_SIZE_SLACK): Define.
2011-05-20 Bernd Schmidt <bernds@codesourcery.com>
* config/tc-tic6x.c (tic6x_operators): Add "pcr_offset".
(tic6x_parse_name): Handle it.
(tic6x_fix_new_exp): Handle O_pcr_offset.
(tic6x_fix_adjustable): Return 0 for the new relocs.
(md_apply_fix): Handle them.
(tc_gen_reloc): Likewise.
* config/tc-tic6x.h (tic6x_fix_info): Add a fix_subsy member.
2011-05-18 Nick Clifton <nickc@redhat.com>
PR gas/12754
* config/tc-tic30.c (ordinal_names): Allow translation of the
ordinal names.
2011-05-18 Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (s_unreq): Reword warning message to make it
easier to translate.
* config/tc-ia64.c (md_show_usage): Add note for translators.
* configure.in (ALL_LINGUAS): Add "fi".
* configure: Regenerate.
2011-05-18 Tristan Gingold <gingold@adacore.com>
* config/tc-ppc.h (ppc_tc_sy): Reorder fields.
Put size into an union with dw.
(OBJ_COPY_SYMBOL_ATTRIBUTES): Adjust.
(ppc_xcoff_end): Declare.
(md_end): Define.
* config/tc-ppc.c: Add includes for xcoff.
(ppc_dwsect): New function.
(md_pseudo_table): Add dwsect.
(struct dw_subsection): New.
(dw_sections): New.
(ppc_change_debug_section): New function.
(ppc_xcoff_end): Ditto.
(ppc_function): Adjust for ppc_tc_sy.
(ppc_symbol_new_hook): Ditto.
(ppc_frob_symbol): Ditto.
(ppc_frob_section): Do not set vma for debug sections.
(ppc_fix_adjustable): Return true for debug sections.
* config/obj-coff.c: Add includes for xcoff.
(coff_frob_section): Handle dwarf section.
2011-05-17 Nick Clifton <nickc@redhat.com>
* po/fi.po: New Finnish translation.
* po/fr.po: Updated French translation.
* config/tc-m32r.c (md_show_usage): Fix typos in descriptions.
* config/tc-mt.c (md_assemble): Fix typos in warning messages.
* cond.c (s_else): Fix typos in error messages.
* config/tc-pj.c (md_assemble): Fix typo in error message.
2011-05-16 Hans-Peter Nilsson <hp@axis.com>
* config/tc-cris.c (md_parse_option) <OPTION_PIC>: Error if not
emitting ELF object.
(md_show_usage): Only mention --pic if the assembler can generate
ELF objects.
* doc/c-cris.texi (CRIS-Opt): Mention that generating ELF is a
prerequisite for --pic being a valid option.
2011-05-13 Frederic Marchal <fmarchal@perso.be>
PR gas/12755
* config/tc-v850.c (parse_register_list): Correct error string.
2011-05-12 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Rename PROCESSOR_BDVER1 to PROCESSOR_BD.
(i386_align_code): Ditto
2011-05-12 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
PR gas/12715
* config/tc-arm.c (parse_big_immediate): Fix parsing of 64-bit
immediates on 32-bit hosts.
2011-05-10 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add bdver2 and rename
PROCESSOR_BDVER1 to PROCESSOR_BDVER.
(i386_align_code): Rename PROCESSOR_BDVER1.
(processor_type): Ditto.
* doc/c-i386.texi: Add bdver2.
2011-05-10 Alan Modra <amodra@gmail.com>
* dw2gencfi.c (tc_cfi_endproc): Avoid "set but not used" error.
2011-05-09 Paul Brook <paul@codesourcery.com> bfd/ * elf32-tic6x.c (is_tic6x_elf_unwind_section_name, elf32_tic6x_fake_sections): New functions. (elf_backend_fake_sections): Define. gas/ * config/tc-tic6x.c (streq): Define. (tic6x_get_unwind): New. (s_tic6x_cantunwind, s_tic6x_handlerdata, s_tic6x_endp, s_tic6x_personalityindex, s_tic6x_personality): New functions. (md_pseudo_table): Add "endp", "handlerdata", "personalityindex", "personality" and "cantunwind". (tic6x_regname_to_dw2regnum, tic6x_frame_initial_instructions, tic6x_start_unwind_section, tic6x_unwind_frame_regs, tic6x_pop_rts_offset_little, tic6x_pop_rts_offset_big, tic6x_unwind_reg_from_dwarf, tic6x_flush_unwind_word, tic6x_unwind_byte, tic6x_unwind_2byte, tic6x_unwind_uleb, tic6x_cfi_startproc, output_exidx_entry, tic6x_output_unwinding, tic6x_cfi_endproc): New. * config/tc-tic6x.h (TIC6X_NUM_UNWIND_REGS): Define. (tic6x_unwind_info): New. (tic6x_segment_info_type): Add marked_pr_dependency, unwind and text_unwind. (TARGET_USE_CFIPOP, tc_regname_to_dw2regnum, tc_cfi_frame_initial_instructions, DWARF2_DEFAULT_RETURN_COLUMN, DWARF2_CIE_DATA_ALIGNMENT, tc_cfi_startproc, tc_cfi_endproc, tc_cfi_section_name): Define. * doc/c-tic6x.texi: Document new unwinding directives. * dw2gencfi.c (tc_cfi_startproc, tc_cfi_endproc): Add default definitions. (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr): Move to dw2gencfi.h. (CFI_EMIT_target): Define. (dot_cfi_sections): Check tc_cfi_section_name. (dot_cfi_startproc): Use tc_cfi_startproc. (dot_cfi_endproc): Use tc_cfi_endproc. * dw2gencfi.h (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr): Move to here from dw2gencfi.c. gas/testsuite: * gas/tic6x/unwind-1.d: New test. * gas/tic6x/unwind-1.s: New test. * gas/tic6x/unwind-2.d: New test. * gas/tic6x/unwind-2.s: New test. * gas/tic6x/unwind-3.d: New test. * gas/tic6x/unwind-3.s: New test. * gas/tic6x/unwind-bad-1.d: New test. * gas/tic6x/unwind-bad-1.s: New test. * gas/tic6x/unwind-bad-1.l: New test. * gas/tic6x/unwind-bad-2.d: New test. * gas/tic6x/unwind-bad-2.s: New test. * gas/tic6x/unwind-bad-2.l: New test. include/ * elf/tic6x.h (ELF_STRING_C6000_unwind, ELF_STRING_C6000_unwind_info, ELF_STRING_C6000_unwind_once, ELF_STRING_C6000_unwind_info_once): Define.
2011-05-09 21:17:58 +08:00
2011-05-09 Paul Brook <paul@codesourcery.com>
* config/tc-tic6x.c (streq): Define.
(tic6x_get_unwind): New.
(s_tic6x_cantunwind, s_tic6x_handlerdata, s_tic6x_endp,
s_tic6x_personalityindex, s_tic6x_personality): New functions.
(md_pseudo_table): Add "endp", "handlerdata", "personalityindex",
"personality" and "cantunwind".
(tic6x_regname_to_dw2regnum, tic6x_frame_initial_instructions,
tic6x_start_unwind_section, tic6x_unwind_frame_regs,
tic6x_pop_rts_offset_little, tic6x_pop_rts_offset_big,
tic6x_unwind_reg_from_dwarf, tic6x_flush_unwind_word,
tic6x_unwind_byte, tic6x_unwind_2byte, tic6x_unwind_uleb,
tic6x_cfi_startproc, output_exidx_entry, tic6x_output_unwinding,
tic6x_cfi_endproc): New.
* config/tc-tic6x.h (TIC6X_NUM_UNWIND_REGS): Define.
(tic6x_unwind_info): New.
(tic6x_segment_info_type): Add marked_pr_dependency, unwind and
text_unwind.
(TARGET_USE_CFIPOP, tc_regname_to_dw2regnum,
tc_cfi_frame_initial_instructions, DWARF2_DEFAULT_RETURN_COLUMN,
DWARF2_CIE_DATA_ALIGNMENT, tc_cfi_startproc, tc_cfi_endproc,
tc_cfi_section_name): Define.
* doc/c-tic6x.texi: Document new unwinding directives.
* dw2gencfi.c (tc_cfi_startproc, tc_cfi_endproc): Add default
definitions.
(cfi_insn_data, fde_entry, CFI_adjust_cfa_offset, CFI_return_column,
CFI_rel_offset, CFI_escape, CFI_signal_frame, CFI_val_encoded_addr):
Move to dw2gencfi.h.
(CFI_EMIT_target): Define.
(dot_cfi_sections): Check tc_cfi_section_name.
(dot_cfi_startproc): Use tc_cfi_startproc.
(dot_cfi_endproc): Use tc_cfi_endproc.
* dw2gencfi.h (cfi_insn_data, fde_entry, CFI_adjust_cfa_offset,
CFI_return_column, CFI_rel_offset, CFI_escape, CFI_signal_frame,
CFI_val_encoded_addr): Move to here from dw2gencfi.c.
2011-05-07 Alan Modra <amodra@gmail.com>
* dw2gencfi.c (CUR_SEG, SET_CUR_SEG, HANDLED, SET_HANDLED): Define.
Use throughout in place of #if SUPPORT_FRAME_LINKONCE.
(struct fde_entry): Rename cseg to cur_seg.
(cfi_change_reg_numbers): Remove ATTRIBUTE_UNUSED.
(get_cfi_seg): Likewise. Use if (SUPPORT_FRAME_LINKONCE) rather
that #if SUPPORT_FRAME_LINKONCE.
(cfi_finish): Likewise.
2011-05-06 Tristan Gingold <gingold@adacore.com>
* read.c (s_comm_internal): Remove code for OBJ_VMS.
(s_data): Ditto.
(s_text): Ditto.
* write.c (write_object_file): Ditto.
* symbols.c (define_sym_at_dot): Ditto.
(colon): Ditto.
2011-05-05 Alan Modra <amodra@gmail.com>
* dw2gencfi.c (SUPPORT_FRAME_LINKONCE): Define. Use throughout
file to conditionally compile code added 2011-04-26.
(cfi_change_reg_numbers): Add ATTRIBUTE_UNUSED on params only used
when SUPPORT_FRAME_LINKONCE.
(get_cfi_seg): Likewise. Reintroduce old code for when not
SUPPORT_FRAME_LINKONCE.
(cfi_finish): Move get_cfi_seg calls out of loop when not
SUPPORT_FRAME_LINKONCE. Avoid unused var warning.
2011-05-03 Paul Brook <paul@codesourcery.com>
* config/tc-tic6x.c (s_ehtype): New function.
(md_pseudo_table): Add "ehtype".
(tic6x_fix_adjustable, md_apply_fix): BFD_RELOC_C6000_EHTYPE.
* doc/c-tic6x.texi: Document .ehtype directive.
2011-04-26 Kai Tietz <ktietz@redhat.com>
* dw2gencfi.c (dwcfi_seg_list): New struct.
(dwcfi_hash): New static hash variable.
(get_debugseg_name): New.
(alloc_debugseg_item): New.
(make_debug_seg): New.
(dwcfi_hash_insert): New.
(dwcfi_hash_find): New.
(dwcfi_hash_find_or_make): New.
(cfi_insn_data): New member cur_seg.
(cie_entry): Likewise.
(fde_entry): New cseg and handled members.
(alloc_fde_entry): Initialize cseg member.
(alloc_cfi_insn_data): Initialize cur_seg member.
(dot_cfi_sections): Compare for beginning of
section names via strncmp.
(get_cfi_seg): New.
(cfi_finish): Treat link-once sections.
(is_now_linkonce_segment): New local helper.
(output_cie): Ignore cie entries not member of current
segment.
(output_fde): Likewise.
(select_cie_for_fde): Likewise.
(cfi_change_reg_numbers): Add new argument for current segment
and ignore insn elements, if not part of current segment.
* ehopt.c (get_cie_info): Use strncmp for
section name matching.
(heck_eh_frame): Likewise.
2011-04-20 Catherine Moore <clm@codesourcery.com>
David Ung <davidu@mips.com>
* config/mips.c (mips_cl_insn): Add new field complete_p.
(create_insn): Initialize complete_p to zero.
(BASE_REG_EQ): New.
(fix_24k_align_to): New.
(fix_24k_store_info): Declare.
(fix_24k_sort): New.
(fix_24k_record_store_info): New.
(nops_for_24k): New.
(nops_for_insn): Call nops_for_24k.
(append_insn): Move O_constant expression handling.
2011-04-20 Alan Modra <amodra@gmail.com>
* hash.c (set_gas_hash_table_size): Use bfd_hash_set_default_size.
(hash_new_sized): New function, split out from..
(hash_new): ..here.
2011-04-19 Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (v7m_psrs): Revert previous delta.
2011-04-18 Julian Brown <julian@codesourcery.com>
Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (parse_psr): Use selected_cpu not cpu_variant to
detect M-profile targets.
(do_t_swi): Exclude v7 and higher variants from arm_ext_os test.
(v7m_psrs): Fix typo: basepri_max should be basepri_mask.
2011-04-14 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (s390_machine): New prototype.
(md_pseudo_table): New pseudo-op .machine.
(s390_opcode_hash): Initialize to NULL.
(s390_parse_cpu): New function.
(md_parse_option): Use s390_parse_cpu.
(s390_setup_opcodes): New function.
(md_begin): Use s390_setup_opcodes.
(s390_machine): New hook handling the new .machine pseudo.
* doc/c-s390.texi: Document the new pseudo op .machine.
2011-04-12 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (i386_mach): Start error message with lower
case.
(md_begin): Likewise.
(md_parse_option): Likewise.
(i386_target_format): Likewise.
(check_byte_reg): Likewise.
(check_long_reg): Likewise.
(check_qword_reg): Likewise.
(check_word_reg): Likewise.
2011-04-12 Nick Clifton <nickc@redhat.com>
PR gas/12532
* config/tc-arm.c (relax_branch): Do not relax branches to
preemptable global symbols.
gas/ * config/tc-arm.c (parse_psr): Add LHS argument. Improve support for *APSR bitmasks. (operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR. Remove OP_RVC_PSR. (parse_operands): Likewise. (do_mrs): Tweak error message for constraint. (do_t_mrs): Update constraints for changes to APSR support. (do_t_msr): Likewise. Don't set PSR_f flag here. (psrs): Remove "g", "nzcvq", "nzcvqg". (insns): Tweak entries for msr and mrs instructions. opcodes/ * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX. (print_insn_thumb32): Add APSR bitmask support. gas/testsuite/ * gas/arm/mrs-msr-thumb-v7-m.s: New. * gas/arm/mrs-msr-thumb-v7-m.d: New. * gas/arm/mrs-msr-thumb-v7-m-bad.d: New. * gas/arm/mrs-msr-thumb-v7-m-bad.l: New. * gas/arm/mrs-msr-thumb-v7-m-bad.s: New. * gas/arm/mrs-msr-thumb-v7e-m.d: New. * gas/arm/mrs-msr-thumb-v7e-m.s: New. * gas/arm/mrs-msr-arm-v7-a-bad.d: New. * gas/arm/mrs-msr-arm-v7-a-bad.l: New. * gas/arm/mrs-msr-arm-v7-a-bad.s: New. * gas/arm/mrs-msr-arm-v7-a.d: New. * gas/arm/mrs-msr-arm-v7-a.s: New. * gas/arm/mrs-msr-arm-v6.d: New. * gas/arm/mrs-msr-arm-v6.s: New. * gas/arm/mrs-msr-thumb-v6t2.d: New. * gas/arm/mrs-msr-thumb-v6t2.s: New. * gas/arm/arch7.d: Fix typo in disassembly for BASEPRI_MAX, bitmasks for IAPSR etc. * gas/arm/arch7.s: Specify bitmask for APSR writes. * gas/arm/archv6m.s: Likewise. * msr-imm-bad.l: Tweak expected disassembly in error message. * msr-reg-bad.l: Likewise. * msr-imm.d: Tweak expected disassembly. * msr-reg.d: Likewise. * msr-reg-thumb.d: Likewise. * msr-imm.s: Specify bitmask on APSR writes. * msr-reg.s: Add comment about deprecated usage.
2011-04-12 02:49:06 +08:00
2011-04-11 Julian Brown <julian@codesourcery.com>
* config/tc-arm.c (parse_psr): Add LHS argument. Improve support
for *APSR bitmasks.
(operand_parse_code): Replace OP_PSR with OP_wPSR and OP_rPSR.
Remove OP_RVC_PSR.
(parse_operands): Likewise.
(do_mrs): Tweak error message for constraint.
(do_t_mrs): Update constraints for changes to APSR support.
(do_t_msr): Likewise. Don't set PSR_f flag here.
(psrs): Remove "g", "nzcvq", "nzcvqg".
(insns): Tweak entries for msr and mrs instructions.
2011-04-11 Kai Tietz <ktietz@redhat.com>
* config/tc-i386.c (x86_cons): Initialize adjust with zero.
2011-04-11 Nick Clifton <nickc@redhat.com>
* config/tc-i386.c (x86_cons): Define even for non-ELF targets.
* config/tc-i386.h (x86_cons): Always prototype.
* config/tc-cr16.c (getprocregp_image): Fix type of 'r' parameter
in order to avoid a compile time warning.
(getprocreg_image): Likewise.
2011-04-11 Alan Modra <amodra@gmail.com>
* config/tc-cr16.c (getprocreg_image): Correct range check.
(getprocregp_image): Likewise.
bfd: * config.bfd (thumb-*-oabi): Don't handle in list of obsolete targets. (strongarm*, thumb*, xscale*): Remove architectures. (strongarm-*-kaos*, thumb-*-coff, thumb-*-elf, thumb-epoc-pe*, thumb-*-pe*, strongarm-*-elf, strongarm-*-coff, xscale-*-elf, xscale-*-coff): Remove targets. binutils: * configure.in (thumb-*-pe*): Remove. * configure: Regenerate. binutils/testsuite: * binutils-all/objcopy.exp (*arm*-*-coff): Change to arm*-*-coff. (xscale-*-coff, thumb*-*-coff, thumb*-*-pe): Don't handle. gas: * configure.tgt (strongarm*be, strongarm*b, strongarm*, xscale*be|xscale*b, xscale*): Remove architectures. (thumb-*-coff, thumb-*-rtems*, thumb-*-elf, thumb-epoc-pe, thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets. gas/testsuite: * gas/all/gas.exp (*arm*-*-coff): Change to arm*-*-coff. (thumb*-*-coff, thumb*-*-pe*): Don;t handle. * gas/arm/arm.exp (*arm*-*-*): Change to arm*-*-*. (*xscale*-*-*): Don't handle. * gas/cfi/cfi.exp (xscale*-*): Don't handle. * gas/elf/elf.exp (*arm*-*-*): Change to arm*-*-*. (xscale*-*-*): Don't handle. ld: * configure.tgt (thumb-*-linux-* | thumb-*-uclinux*, strongarm-*-coff, strongarm-*-elf, strongarm-*-kaos*, thumb-*-coff, thumb-*-elf, thumb-epoc-pe, thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets. ld/testsuite: * ld-selective/selective.exp (xscale-*-*): Don't handle. * ld-srec/srec.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't handle. (*arm*-*-*): Change to arm*-*-*. (strongarm*-*-coff, xscale*-*-coff, thumb-*-coff*, thumb-*-pe*, thumb-*-elf*, strongarm*-*-*, thumb-*-*): Remove xfails. * ld-undefined/undefined.exp (thumb*-*-pe*, thumb*-*-pe*): Remove commented-out xfails. (thumb-elf): Remove reference in comment. * lib/ld-lib.exp (strongarm*-*-*, xscale*-*-*, thumb-*-*): Don't handle.
2011-04-07 01:09:56 +08:00
2011-04-06 Joseph Myers <joseph@codesourcery.com>
* configure.tgt (strongarm*be, strongarm*b, strongarm*,
xscale*be|xscale*b, xscale*): Remove architectures.
(thumb-*-coff, thumb-*-rtems*, thumb-*-elf, thumb-epoc-pe,
thumb-*-pe, xscale-*-coff, xscale-*-elf): Remove targets.
2011-04-01 Tristan Gingold <gingold@adacore.com>
* config/tc-ia64.c (md_apply_fix): Add a cast to avoid a warning.
include/elf/ * tic6x.h (R_C6000_JUMP_SPLOT, R_C6000_EHTYPE, R_C6000_PCR_H16, R_C6000_PCR_L16): New relocs. (SHN_TIC6X_SCOMMON): Define. bfd/ * elf32-tic6x.h (struct elf32_tic6x_params): New. (elf32_tic6x_setup): Declare. * elf32-tic6x.c: Include <limits.h>. (ELF_DYNAMIC_LINKER, DEFAULT_STACK_SIZE, PLT_ENTRY_SIZE): Define. (struct elf32_tic6x_link_hash_table, struct elf32_link_hash_entry): New structures. (elf32_tic6x_link_hash_table, is_tic6x_elf): New macros. (tic6x_elf_scom_section, tic6x_elf_scom_symbol, tic6x_elf_scom_symbol_ptr): New static variables. (elf32_tic6x_howto_table, elf32_tic6x_howto_table_rel, elf32_tic6x_reloc_map): Add R_C6000_JUMP_SLOT, R_C6000_EHTYPE, R_C6000_PCR_H16 and R_C6000_PCR_L16. (elf32_tic6x_link_hash_newfunc, elf32_tic6x_link_hash_table_create, elf32_tic6x_link_hash_table_free, elf32_tic6x_setup, elf32_tic6x_using_dsbt, elf32_tic6x_install_rela, elf32_tic6x_create_dynamic_sections, elf32_tic6x_make_got_dynreloc, elf32_tic6x_finish_dynamic_symbol, elf32_tic6x_gc_sweep_hook, elf32_tic6x_adjust_dynamic_symbol): New static functions. (elf32_tic6x_relocate_section): For R_C6000_PCR_S21, convert branches to weak symbols as required by the ABI. Handle GOT and DSBT_INDEX relocs, and copy relocs to the output file as needed when generating DSBT output. (elf32_tic6x_check_relocs, elf32_tic6x_add_symbol_hook, elf32_tic6x_symbol_processing, elf32_tic6x_section_from_bfd_section, elf32_tic6x_allocate_dynrelocs, elf32_tic6x_size_dynamic_sections, elf32_tic6x_always_size_sections, elf32_tic6x_modify_program_headers, elf32_tic6x_finish_dynamic_sections, elf32_tic6x_plt_sym_val, elf32_tic6x_copy_private_data, elf32_tic6x_link_omit_section_dynsym): New static functions. (ELF_MAXPAGESIZE): Define to 0x1000. (bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_link_hash_table_create, bfd_elf32_bfd_link_hash_table_free, elf_backend_can_refcount, elf_backend_want_got_plt, elf_backend_want_dynbss, elf_backend_plt_readonly, elf_backend_got_header_size, elf_backend_gc_sweep_hook, elf_backend_modify_program_headers, elf_backend_create_dynamic_sections, elf_backend_adjust_dynamic_symbol, elf_backend_check_relocs, elf_backend_add_symbol_hook, elf_backend_symbol_processing, elf_backend_link_output_symbol_hook, elf_backend_section_from_bfd_section, elf_backend_finish_dynamic_symbol, elf_backend_always_size_sections, elf32_tic6x_size_dynamic_sections, elf_backend_finish_dynamic_sections, elf_backend_omit_section_dynsym, elf_backend_plt_sym_val): Define. * bfd/reloc.c (BFD_RELOC_C6000_JUMP_SLOT, BFD_RELOC_C6000_EHTYPE, BFD_RELOC_C6000_PCR_H16, BFD_RELOC_C6000_PCR_S16): Add. * bfd/bfd-in2.h: Regenerate. * bfd/libbfd.h: Regenerate. * config.bfd: Accept tic6x-*-* instead of tic6x-*-elf. gas/ * config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New static variables. (md_begin): Initialize them. (s_tic6x_scomm): New static function. (md_pseudo_table): Add "scomm". (tc_gen_reloc): Really undo all adjustments made by bfd_install_relocation. * doc/c-tic6x.texi: Document the .scomm directive. gas/testsuite/ * gas/tic6x/scomm-directive-1.s: New test. * gas/tic6x/scomm-directive-1.d: New test. * gas/tic6x/scomm-directive-2.s: New test. * gas/tic6x/scomm-directive-2.d: New test. * gas/tic6x/scomm-directive-3.s: New test. * gas/tic6x/scomm-directive-3.d: New test. * gas/tic6x/scomm-directive-4.s: New test. * gas/tic6x/scomm-directive-4.d: New test. * gas/tic6x/scomm-directive-5.s: New test. * gas/tic6x/scomm-directive-5.d: New test. * gas/tic6x/scomm-directive-6.s: New test. * gas/tic6x/scomm-directive-6.d: New test. * gas/tic6x/scomm-directive-7.s: New test. * gas/tic6x/scomm-directive-7.d: New test. * gas/tic6x/scomm-directive-8.s: New test. * gas/tic6x/scomm-directive-8.d: New test. ld/ * emulparams/elf32_tic6x_le.sh (BIG_OUTPUT_FORMAT, EXTRA_EM_FILE, GENERATE_SHLIB_SCRIPT): New defines. (TEXT_START_ADDR): Define differently depending on target. (.got): Redefine to include "*(.dsbt)". (SDATA_START_SYMBOLS): Remove, replace with (OTHER_GOT_SYMBOLS): New. (OTHER_BSS_SECTIONS): Define only for ELF targets. * emultempl/tic6xdsbt.em: New file. * gen-doc.texi: Set C6X. * ld.texinfo: Likewise. (Options specific to C6X uClinux targets): New section. binutils/ * readelf.c (get_symbol_index_type): Handle SCOM for TIC6X. (dump_relocations): Likewise. binutils/testsuite/ * lib/binutils-common.exp (is_elf_format): Accept tic6x*-*-uclinux*. ld/testsuite/ * ld-scripts/crossref.exp: Add CFLAGS for tic6x*-*-*. * ld-elf/sec-to-seg.exp: Remove tic6x from list of targets defining pagesize to 1. * ld-tic6x/tic6x.exp: Add support for DSBT shared library/executable linking tests. * ld-tic6x/dsbt.ld: New linker script. * ld-tic6x/dsbt-be.ld: New linker script. * ld-tic6x/dsbt-overflow.ld: New linker script. * ld-tic6x/dsbt-inrange.ld: New linker script. * ld-tic6x/shlib-1.s: New test. * ld-tic6x/shlib-2.s: New test. * ld-tic6x/shlib-app-1r.s: New test. * ld-tic6x/shlib-app-1.s: New test. * ld-tic6x/shlib-1.sd: New test. * ld-tic6x/shlib-1.dd: New test. * ld-tic6x/shlib-app-1.rd: New test. * ld-tic6x/shlib-app-1rb.rd: New test. * ld-tic6x/shlib-app-1.sd: New test. * ld-tic6x/static-app-1rb.od: New test. * ld-tic6x/shlib-app-1.dd: New test. * ld-tic6x/shlib-app-1rb.sd: New test. * ld-tic6x/static-app-1b.od: New test. * ld-tic6x/static-app-1r.od: New test. * ld-tic6x/shlib-1rb.rd: New test. * ld-tic6x/shlib-app-1rb.dd: New test. * ld-tic6x/shlib-1rb.sd: New test. * ld-tic6x/shlib-1rb.dd: New test. * ld-tic6x/shlib-app-1b.od: New test. * ld-tic6x/tic6x.exp: New test. * ld-tic6x/static-app-1rb.rd: New test. * ld-tic6x/shlib-app-1r.od: New test. * ld-tic6x/static-app-1.od: New test. * ld-tic6x/static-app-1b.rd: New test. * ld-tic6x/static-app-1r.rd: New test. * ld-tic6x/static-app-1rb.sd: New test. * ld-tic6x/static-app-1b.sd: New test. * ld-tic6x/static-app-1rb.dd: New test. * ld-tic6x/static-app-1r.sd: New test. * ld-tic6x/static-app-1b.dd: New test. * ld-tic6x/shlib-1b.rd: New test. * ld-tic6x/static-app-1r.dd: New test. * ld-tic6x/shlib-app-1b.rd: New test. * ld-tic6x/shlib-1r.rd: New test. * ld-tic6x/shlib-app-1r.rd: New test. * ld-tic6x/shlib-1b.sd: New test. * ld-tic6x/static-app-1.rd: New test. * ld-tic6x/shlib-app-1b.sd: New test. * ld-tic6x/shlib-1r.sd: New test. * ld-tic6x/shlib-1b.dd: New test. * ld-tic6x/shlib-app-1r.sd: New test. * ld-tic6x/shlib-app-1b.dd: New test. * ld-tic6x/shlib-1r.dd: New test. * ld-tic6x/static-app-1.sd: New test. * ld-tic6x/shlib-app-1r.dd: New test. * ld-tic6x/static-app-1.dd: New test. * ld-tic6x/shlib-noindex.rd: New test. * ld-tic6x/shlib-noindex.dd: New test. * ld-tic6x/shlib-noindex.sd: New test. * ld-tic6x/got-reloc-local-1.s: New test. * ld-tic6x/got-reloc-local-2.s: New test. * ld-tic6x/got-reloc-local-r.d: New test. * ld-tic6x/got-reloc-global.s: New test. * ld-tic6x/got-reloc-global-addend-1.d: New test. * ld-tic6x/got-reloc-global-addend-1.s: New test. * ld-tic6x/got-reloc-global-addend-2.d: New test. * ld-tic6x/got-reloc-inrange.d: New test. * ld-tic6x/got-reloc-overflow.d: New test. * ld-tic6x/got-reloc-global-addend-2.s: New test. * ld-tic6x/dsbt-index-error.d: New test. * ld-tic6x/dsbt-index.d: New test. * ld-tic6x/dsbt-index.s: New test. * ld-tic6x/shlib-app-1.od: New test. * ld-tic6x/shlib-app-1rb.od: New test. * ld-tic6x/shlib-1.rd: New test. * ld-tic6x/weak.d: New test. * ld-tic6x/weak-be.d: New test. * ld-tic6x/weak.s: New test. * ld-tic6x/weak-data.d: New test. * ld-tic6x/common.d: New test. * ld-tic6x/common.ld: New test. * ld-tic6x/common.s: New test.
2011-03-31 16:58:28 +08:00
2011-03-31 Bernd Schmidt <bernds@codesourcery.com>
* config/tc-tic6x.c (sbss_section, scom_section, scom_symbol): New
static variables.
(md_begin): Initialize them.
(s_tic6x_scomm): New static function.
(md_pseudo_table): Add "scomm".
(tc_gen_reloc): Really undo all adjustments made by
bfd_install_relocation.
* doc/c-tic6x.texi: Document the .scomm directive.
2011-03-31 Tristan Gingold <gingold@adacore.com>
* dwarf2dbg.c (DWARF2_VERSION): Define.
(out_debug_line): Use it.
(out_debug_aranges): Ditto.
(out_debug_info): Ditto.
* config/tc-ia64.h (DWARF2_VERSION): Override it.
2011-03-30 Michael Snyder <msnyder@vmware.com>
* obj-elf.c (obj_elf_section): Free malloced name.
* macro.c (get_any_string): Free malloced br_buf.
(do_formals): Free 'formal'.
2011-03-30 Tristan Gingold <gingold@adacore.com>
* config/tc-ppc.c (ppc_frob_symbol): Convert stsym symbols value
to offset only if within is set.
(ppc_stabx): Reformat. For stsym stabs, add a check and set
within only for symbols.
2011-03-29 Richard Henderson <rth@redhat.com>
PR 12610
* config/tc-alpha.c (s_alpha_align): Don't auto-align a previous
label; zap alpha_insn_label.
2011-03-29 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (handle_quad): Properly handle multiple
operands.
2011-03-29 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (BYTEUNPACK): Return yyerror when dest
reg $2 is the same as dest reg $4.
2011-03-29 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (BYTEOP16M): Return yyerror when dest
reg $2 is the same as dest reg $4.
2011-03-29 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (BYTEOP16P): Return yyerror when dest
reg $2 is the same as dest reg $4.
2011-03-28 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (16bit acc add): Return yyerror when dest
reg $1 is the same as dest reg $7.
2011-03-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (handle_quad): New.
(md_pseudo_table): Add "quad".
2011-03-28 19:18:27 +08:00
2011-03-26 John Marino <binutils@marino.st>
* configure.tgt: Fix support for *-*-dragonfly*.
* config/tc-i386.c: define SVR4_COMMENT_CHARS for dragonfly.
* config/te-dragonfly.h: New file.
2011-03-24 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add new devices: atmega325pa,
atmega3250pa, atmega3290pa, atmega16hvbrevb, atmega32hvbrevb,
at90pwm161.
* doc/c-avr.texi: Document new device names.
2011-03-24 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (dual 32bit add/sub): Return yyerror when dest
reg $1 is the same as dest reg $7.
(quad 16bit add/sub): Return yyerror when dest reg $1 is the same as
dest reg $7.
2011-03-24 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (check_macfuncs): Clarify error message when
P is mismatched. Check destination regno are off by one when P is
set, or are equal when P is not set.
2011-03-23 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (SEARCH): Return yyerror when dest reg $2 is
the same as dest reg $4.
(BITMUX): Return yyerror when dest reg $3 is the same as dest reg $5.
2011-03-23 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add new xmega devices: atxmega64a1u,
atxmega128a1u, atxmega16x1, atxmega32x1, atxmega128b1, atxmega256a3bu.
* doc/c-avr.texi: Document new device names.
/bfd: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * archures.c: Add AVR XMEGA architecture information. * cpu-avr.c (arch_info_struct): Likewise. * elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise. (elf32_avr_object_p): Likewise. /gas: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (struct avr_opcodes_s): Add opcode field. (AVR_INSN): Change definition to match. (avr_opcodes): Likewise, change to match. (mcu_types): Add XMEGA architecture names and new XMEGA device names. (md_show_usage): Add XMEGA architecture names. (avr_operand): Add 'E' constraint for DES instruction of XMEGA devices. Add support for SPM Z+ instruction. * doc/c-avr.texi: Add documentation for XMEGA architectures and devices. /include/opcode: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA): New instruction set flags. (AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA. /ld: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures. (eavrxmega?.c): Likewise. * configure.tgt (targ_extra_emuls): Likewise. * emulparams/avrxmega1.sh: New file. * emulparams/avrxmega2.sh: Likewise. * emulparams/avrxmega3.sh: Likewise. * emulparams/avrxmega4.sh: Likewise. * emulparams/avrxmega5.sh: Likewise. * emulparams/avrxmega6.sh: Likewise. * emulparams/avrxmega7.sh: Likewise. * emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation): Add avrxmega6, avrxmega7 to list of architectures for no stubs. /opcodes: 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> * avr-dis.c (avr_operand): Add opcode_str parameter. Check for post-increment to support LPM Z+ instruction. Add support for 'E' constraint for DES instruction. (print_insn_avr): Adjust calls to avr_operand. Rename variable.
2011-03-23 02:10:48 +08:00
2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
(AVR_INSN): Change definition to match.
(avr_opcodes): Likewise, change to match.
(mcu_types): Add XMEGA architecture names and new XMEGA device names.
(md_show_usage): Add XMEGA architecture names.
(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
Add support for SPM Z+ instruction.
* doc/c-avr.texi: Add documentation for XMEGA architectures and
devices.
2011-03-21 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (md_show_usage): Add "Assembler" text to output.
2011-03-18 Alan Modra <amodra@gmail.com>
* config/obj-elf.c (elf_frob_symbol): Report S_SET_SIZE symbol
on .size expression errors rather than symbols in the size expression.
2011-03-18 Alan Modra <amodra@gmail.com>
* input-scrub.c (line_numberT): Delete.
(input_scrub_close): Reset line counters.
* messages.c (as_show_where): Don't print invalid line number.
(as_warn_internal, as_bad_internal): Likewise.
2011-03-18 Alan Modra <amodra@gmail.com>
* read.c (read_a_source_file): Remove md_after_pass_hook.
Move "quit" label before set of dot_symbol.
* config/tc-d10v.h (md_after_pass_hook): Don't define.
* config/tc-d30v.h (md_after_pass_hook): Likewise.
* config/tc-m32r.h (md_after_pass_hook): Likewise.
(md_cleanup): Define to call m32r_fill_insn.
2011-03-18 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c (md_parse_option): Add -march=all option which
switches to the highest available CPU.
2011-03-17 Alan Modra <amodra@gmail.com>
PR 12569
* expr.c (operand): Correct passing of "mode" to expr.
* read.c (do_org): Allow expr_section.
(get_known_segmented_expression): Don't assert anything about the
segment.
2011-03-16 H.J. Lu <hongjiu.lu@intel.com>
* as.c (show_usage): Add --size-check=.
(parse_args): Add and handle OPTION_SIZE_CHECK.
* as.h (flag_size_check): New.
* config/obj-elf.c (elf_frob_symbol): Use as_bad to report
bad .size directive only for --size-check=error.
* doc/as.texinfo: Document --size-check=.
2011-03-14 Mike Frysinger <vapier@gentoo.org>
* config/tc-bfin.c (bfin_cpus[]): Add 0.4 for
bf542/bf544/bf547/bf548/bf549.
include/elf/ * arm.h (R_ARM_IRELATIVE): New relocation. bfd/ * reloc.c (BFD_RELOC_ARM_IRELATIVE): New relocation. * bfd-in2.h: Regenerate. * elf32-arm.c (elf32_arm_howto_table_2): Rename existing definition to elf32_arm_howto_table_3 and replace with a single R_ARM_IRELATIVE entry. (elf32_arm_howto_from_type): Update accordingly. (elf32_arm_reloc_map): Map BFD_RELOC_ARM_IRELATIVE to R_ARM_IRELATIVE. (elf32_arm_reloc_name_lookup): Handle elf32_arm_howto_table_3. (arm_plt_info): New structure, split out from elf32_arm_link_hash_entry with an extra noncall_refcount field. (arm_local_iplt_info): New structure. (elf_arm_obj_tdata): Add local_iplt. (elf32_arm_local_iplt): New accessor macro. (elf32_arm_link_hash_entry): Replace plt_thumb_refcount, plt_maybe_thumb_refcount and plt_got_offset with an arm_plt_info. Change tls_type to a bitfield and add is_iplt. (elf32_arm_link_hash_newfunc): Update accordingly. (elf32_arm_allocate_local_sym_info): New function. (elf32_arm_create_local_iplt): Likewise. (elf32_arm_get_plt_info): Likewise. (elf32_arm_plt_needs_thumb_stub_p): Likewise. (elf32_arm_get_local_dynreloc_list): Likewise. (create_ifunc_sections): Likewise. (elf32_arm_copy_indirect_symbol): Update after the changes to elf32_arm_link_hash_entry. Assert the is_iplt has not yet been set. (arm_type_of_stub): Add an st_type argument. Use elf32_arm_get_plt_info to get PLT information. Assert that all STT_GNU_IFUNC references are turned into PLT references. (arm_build_one_stub): Pass the symbol type to elf32_arm_final_link_relocate. (elf32_arm_size_stubs): Pass the symbol type to arm_type_of_stub. (elf32_arm_allocate_irelocs): New function. (elf32_arm_add_dynreloc): In static objects, use .rel.iplt for all R_ARM_IRELATIVE. (elf32_arm_allocate_plt_entry): New function. (elf32_arm_populate_plt_entry): Likewise. (elf32_arm_final_link_relocate): Add an st_type parameter. Set srelgot to null for static objects. Use separate variables to record which st_value and st_type should be used when generating a dynamic relocation. Use elf32_arm_get_plt_info to find the symbol's PLT information, setting has_iplt_entry, splt, plt_offset and gotplt_offset accordingly. Check whether STT_GNU_IFUNC symbols should resolve to an .iplt entry, and change the relocation target accordingly. Broaden assert to include .iplts. Don't set sreloc for static relocations. Assert that we only generate dynamic R_ARM_RELATIVE relocations for R_ARM_ABS32 and R_ARM_ABS32_NOI. Generate R_ARM_IRELATIVE relocations instead of R_ARM_RELATIVE relocations if the target is an STT_GNU_IFUNC symbol. Pass the symbol type to arm_type_of_stub. Conditionally resolve GOT references to the .igot.plt entry. (elf32_arm_relocate_section): Update the call to elf32_arm_final_link_relocate. (elf32_arm_gc_sweep_hook): Use elf32_arm_get_plt_info to get PLT information. Treat R_ARM_REL32 and R_ARM_REL32_NOI as call relocations in shared libraries and relocatable executables. Count non-call PLT references. Use elf32_arm_get_local_dynreloc_list to get the list of dynamic relocations for a local symbol. (elf32_arm_check_relocs): Always create ifunc sections. Set isym at the same time as setting h. Use elf32_arm_allocate_local_sym_info to allocate local symbol information. Treat R_ARM_REL32 and R_ARM_REL32_NOI as call relocations in shared libraries and relocatable executables. Record PLT information for local STT_GNU_IFUNC functions as well as global functions. Count non-call PLT references. Use elf32_arm_get_local_dynreloc_list to get the list of dynamic relocations for a local symbol. (elf32_arm_adjust_dynamic_symbol): Handle STT_GNU_IFUNC symbols. Don't remove STT_GNU_IFUNC PLTs unless all references have been removed. Update after the changes to elf32_arm_link_hash_entry. (allocate_dynrelocs_for_symbol): Decide whether STT_GNU_IFUNC PLT entries should live in .plt or .iplt. Check whether the .igot.plt and .got entries can be combined. Use elf32_arm_allocate_plt_entry to allocate .plt and .(i)got.plt entries. Detect which .got entries will need R_ARM_IRELATIVE relocations and use elf32_arm_allocate_irelocs to allocate them. Likewise other non-.got dynamic relocations. (elf32_arm_size_dynamic_sections): Allocate .iplt, .igot.plt and dynamic relocations for local STT_GNU_IFUNC symbols. Check whether the .igot.plt and .got entries can be combined. Detect which .got entries will need R_ARM_IRELATIVE relocations and use elf32_arm_allocate_irelocs to allocate them. Use stashed section pointers intead of strcmp checks. Handle iplt and igotplt. (elf32_arm_finish_dynamic_symbol): Use elf32_arm_populate_plt_entry to fill in .plt, .got.plt and .rel(a).plt entries. Point STT_GNU_IFUNC symbols at an .iplt entry if non-call relocations resolve to it. (elf32_arm_output_plt_map_1): New function, split out from elf32_arm_output_plt_map. Handle .iplt entries. Use elf32_arm_plt_needs_thumb_stub_p. (elf32_arm_output_plt_map): Call it. (elf32_arm_output_arch_local_syms): Add mapping symbols for local .iplt entries. (elf32_arm_swap_symbol_in): Handle Thumb STT_GNU_IFUNC symbols. (elf32_arm_swap_symbol_out): Likewise. (elf32_arm_add_symbol_hook): New function. (elf_backend_add_symbol_hook): Define for all targets. opcodes/ * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. gas/ * config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to determine whether a relocation is needed. (md_apply_fix, arm_apply_sym_value): Likewise. ld/testsuite/ * ld-arm/ifunc-1.s, ld-arm/ifunc-1.dd, ld-arm/ifunc-1.gd, ld-arm/ifunc-1.rd, ld-arm/ifunc-2.s, ld-arm/ifunc-2.dd, ld-arm/ifunc-2.gd, ld-arm/ifunc-2.rd, ld-arm/ifunc-3.s, ld-arm/ifunc-3.dd, ld-arm/ifunc-3.gd, ld-arm/ifunc-3.rd, ld-arm/ifunc-4.s, ld-arm/ifunc-4.dd, ld-arm/ifunc-4.gd, ld-arm/ifunc-4.rd, ld-arm/ifunc-5.s, ld-arm/ifunc-5.dd, ld-arm/ifunc-5.gd, ld-arm/ifunc-5.rd, ld-arm/ifunc-6.s, ld-arm/ifunc-6.dd, ld-arm/ifunc-6.gd, ld-arm/ifunc-6.rd, ld-arm/ifunc-7.s, ld-arm/ifunc-7.dd, ld-arm/ifunc-7.gd, ld-arm/ifunc-7.rd, ld-arm/ifunc-8.s, ld-arm/ifunc-8.dd, ld-arm/ifunc-8.gd, ld-arm/ifunc-8.rd, ld-arm/ifunc-9.s, ld-arm/ifunc-9.dd, ld-arm/ifunc-9.gd, ld-arm/ifunc-9.rd, ld-arm/ifunc-10.s, ld-arm/ifunc-10.dd, ld-arm/ifunc-10.gd, ld-arm/ifunc-10.rd, ld-arm/ifunc-11.s, ld-arm/ifunc-11.dd, ld-arm/ifunc-11.gd, ld-arm/ifunc-11.rd, ld-arm/ifunc-12.s, ld-arm/ifunc-12.dd, ld-arm/ifunc-12.gd, ld-arm/ifunc-12.rd, ld-arm/ifunc-13.s, ld-arm/ifunc-13.dd, ld-arm/ifunc-13.gd, ld-arm/ifunc-13.rd, ld-arm/ifunc-14.s, ld-arm/ifunc-14.dd, ld-arm/ifunc-14.gd, ld-arm/ifunc-14.rd, ld-arm/ifunc-15.s, ld-arm/ifunc-15.dd, ld-arm/ifunc-15.gd, ld-arm/ifunc-15.rd, ld-arm/ifunc-16.s, ld-arm/ifunc-16.dd, ld-arm/ifunc-16.gd, ld-arm/ifunc-16.rd, ld-arm/ifunc-dynamic.ld, ld-arm/ifunc-static.ld: New tests. * ld-arm/farcall-group.d, ld-arm/farcall-group-size2.d, ld-arm/farcall-mixed-lib-v4t.d, ld-arm/farcall-mixed-lib.d: Update for new stub hashes. * ld-arm/arm-elf.exp: Run them.
2011-03-15 00:04:16 +08:00
2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
* config/tc-arm.c (md_pcrel_from_section): Use S_FORCE_RELOC to
determine whether a relocation is needed.
(md_apply_fix, arm_apply_sym_value): Likewise.
include/elf/ * internal.h (elf_internal_sym): Add st_target_internal. * arm.h (arm_st_branch_type): New enum. (ARM_SYM_BRANCH_TYPE): New macro. bfd/ * elf-bfd.h (elf_link_hash_entry): Add target_internal. * elf.c (swap_out_syms): Set st_target_internal for each Elf_Internal_Sym. * elfcode.h (elf_swap_symbol_in): Likewise. * elf32-i370.c (i370_elf_finish_dynamic_sections): Likewise. * elf32-sh-symbian.c (sh_symbian_relocate_section): Likewise. * elf64-sparc.c (elf64_sparc_output_arch_syms): Likewise. * elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections): Likewise. * elflink.c (elf_link_output_extsym): Likewise. (bfd_elf_final_link): Likewise. (elf_link_add_object_symbols): Copy st_target_internal to the hash table if we see a definition. (_bfd_elf_copy_link_hash_symbol_type): Copy target_internal. * elf32-arm.c (elf32_arm_stub_hash_entry): Replace st_type with a branch_type field. (a8_erratum_fix, a8_erratum_reloc): Likewise. (arm_type_of_stub): Replace actual_st_type with an actual_branch_type parameter. (arm_build_one_stub): Use branch types rather than st_types to determine the type of branch. (cortex_a8_erratum_scan): Likewise. (elf32_arm_size_stubs): Likewise. (bfd_elf32_arm_process_before_allocation): Likewise. (allocate_dynrelocs_for_symbol): Likewise. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_final_link_relocate): Replace sym_flags parameter with a branch_type parameter. (elf32_arm_relocate_section): Update call accordingly. (elf32_arm_adjust_dynamic_symbol): Don't check STT_ARM_TFUNC. (elf32_arm_output_map_sym): Initialize st_target_internal. (elf32_arm_output_stub_sym): Likewise. (elf32_arm_symbol_processing): Delete. (elf32_arm_swap_symbol_in): Convert STT_ARM_TFUNCs into STT_FUNCs. Use st_target_internal to record the branch type. (elf32_arm_swap_symbol_out): Use st_target_internal to test for Thumb functions. (elf32_arm_is_function_type): Delete. (elf_backend_symbol_processing): Likewise. (elf_backend_is_function_type): Likewise. gas/ * config/tc-arm.c (arm_adjust_symtab): Set the branch type for Thumb symbols. ld/ * emultempl/armelf.em (gld${EMULATION_NAME}_finish): Check eh->target_internal. opcodes/ * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC. Use branch types instead. (print_insn): Likewise.
2011-03-14 23:55:04 +08:00
2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
* config/tc-arm.c (arm_adjust_symtab): Set the branch type
for Thumb symbols.
2011-03-11 Nick Clifton <nickc@redhat.com>
* remap.c (remap_debug_filename): Always allocate a buffer for the
returned pointer.
* stabs.c (stabs_generate_asm_file): Free the pointer returned by
remap_debug_filename.
2011-03-10 Michael Snyder <msnyder@vmware.com>
Revert the following change:
* dwarf2dbg.c (out_file_list): Free malloced 'dir'.
(out_debug_info): Free malloced 'dirname' and 'comp_dir'.
2011-03-10 Alan Modra <amodra@gmail.com>
* gas/config/obj-elf.h (ELF_TARGET_SYMBOL_FIELDS,
TARGET_SYMBOL_FIELDS): Don't define.
* gas/config/tc-arc.c (arc_common): Use correct symbol "local" field.
2011-03-09 Michael Snyder <msnyder@vmware.com>
* dwarf2dbg.c (out_file_list): Free malloced 'dir'.
(out_debug_info): Free malloced 'dirname' and 'comp_dir'.
(emit_fixed_inc_line_addr): Assign instead of conditional in
assert.
2011-03-05 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c (elf_frob_symbol): Mention symbol name in
non-constant .size expression.
2011-03-03 01:23:09 +08:00
2011-03-02 Nick Clifton <nickc@redhat.com>
* ecoff.c: Incldue filenames.h
2011-02-28 Kai Tietz <kai.tietz@onevision.com>
* depend.c (register_dependency): Use filename_(n)cmp.
* dwarf2dbg.c (get_filenum): Likewise.
* ecoff.c (add_file): Likewise.
(ecoff_generate_asm_lineno): Likewise.
* input-scrub.c (new_logical_line_flags): Likewise.
* listing.c (file_info): Likewise.
(listing_newline): Likewise.
* remap.c (remap_debug_filename): Likewise.
* stabs.c (generate_asm_file): Likewise.
(stabs_generate_asm_lineno): Likewise.
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (append_insn): Disable branch relaxation for
DSP instructions.
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (macro): Handle M_PREF_AB.
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary
register to use.
(RELAX_BRANCH_UNCOND): Adjust accordingly.
(RELAX_BRANCH_LIKELY): Likewise.
(RELAX_BRANCH_LINK): Likewise.
(RELAX_BRANCH_TOOFAR): Likewise.
(RELAX_BRANCH_AT): New macro.
(append_insn): Encode the temporary register to use in standard
MIPS branch relaxation.
(relaxed_branch_length): Update according to changes to
RELAX_BRANCH_ENCODE.
(md_convert_frag): Use the encoded register as the temporary.
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (mips_fix_adjustable): On REL targets also
reject PC-relative relocations.
2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (md_convert_frag): Correct message
capitalization.
2011-02-28 Alan Modra <amodra@gmail.com>
* symbols.c (report_op_error): Remove unnecessary forward declaration.
Add "op" parameter. Report operator and operand segments in error
message, not operand symbols.
(resolve_symbol_value): Always set segment for equated symbols, not
just when finalizing. Adjust report_op_error calls.
2011-02-25 H.J. Lu <hongjiu.lu@intel.com>
2011-02-26 03:20:58 +08:00
* config/tc-i386.c (reloc): Don't sign-check 4-byte relocations
if 64bit relocations aren't allowed.
2011-02-25 Alan Modra <amodra@gmail.com>
PR gas/12519
* config/obj-elf.c (elf_frob_symbol): Properly handle size expression.
2011-02-21 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-mips.c (mips_ip) <'o'>: Remove duplicate
initialization of offset_reloc.
2011-02-15 Richard Henderson <rth@redhat.com>
* dw2gencfi.c (dot_cfi_dummy): New.
(cfi_pseudo_table) [!TARGET_USE_CFIPOP]: New.
* read.c (pobegin): Unconditionally call cfi_pop_insert.
2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* configure: Regenerate.
2011-02-13 Mike Frysinger <vapier@gentoo.org>
* config/bfin-lex.l (BYTEOP2M): Remove tokenization.
* config/bfin-parse.y (BYTEOP2M): Delete token.
(asm_1): Remove BYTEOP2M insn matching.
2011-02-12 Mike Frysinger <vapier@gentoo.org>
* config/bfin-defs.h: Include opcode/bfin.h.
(M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, M_IH, M_IU): Delete.
2011-02-11 Mike Frysinger <vapier@gentoo.org>
* doc/c-bfin.texi (Instruction Delimiting): Fix occur typo.
(Modify Registers): Fix subtracted typo.
(.byte2): Extend and swap descriptions with .byte4.
(.byte4): Extend and swap descriptions with .byte2.
(.db, .dw, .dd): Document behavior.
2011-02-11 Mike Frysinger <vapier@gentoo.org>
* config/bfin-parse.y (TESTSET): Reject REG_SP and REG_FP.
2011-02-11 Alan Modra <amodra@gmail.com>
* doc/c-ppc.texi (PowerPC-Opts <-nops>): Clarify.
2011-02-10 Alan Modra <amodra@gmail.com>
* doc/as.texinfo (Overview): Add missing markup around Blackfin
and PowerPC options.
2011-02-10 Alan Modra <amodra@gmail.com>
* config/tc-ppc.c (md_show_usage): Remove -l and -b. Add -K PIC.
* doc/as.texinfo: Refer to and include c-ppc.texi for PowerPC options.
(Overview <Target PowerPC options>): Add a number of missing options.
* doc/c-ppc.texi: Likewise. Add markup for use in manpage generation.
2011-02-08 H.J. Lu <hongjiu.lu@intel.com>
PR gas/6957
* config/tc-i386.c (i386_align_code): Use f32_patt when tuning
for i686.
2011-02-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (set_cpu_arch): Also update cpu_arch_isa_flags
for ISA extensions.
(md_parse_option): Likewise.
2011-02-04 Bernd Schmidt <bernds@codesourcery.com>
* doc/as.texinfo (Target TIC6X options): Don't mention "-matomic".
* doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic".
(TIC6X Options): Don't mention "-matomic".
* config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete.
(md_longopts): Remove corresponding entries.
(md_parse_option): Don't handle them.
(md_show_usage): Don't document them.
(tic6x_atomic): Delete variable.
(tic6x_update_features): Always copy tic6x_arch_enable to
tic6x_features.
(tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC.
(s_tic6x_atomic, s_tic6x_noatomic): Remove functions.
(md_pseudo_table): Remove ".atomic" and ".noatomic".
2011-01-31 Nick Clifton <nickc@redhat.com>
* write.c (write_contents): Include output file name and bfd error
value when reporting the inability to write to the output file.
* config/tc-rx.c (rx_handle_align): Do not insert NOPs into align
frag that has a non-zero fill value.
2011-01-27 DJ Delorie <dj@redhat.com>
* config/tc-rx.c (md_convert_frag): If we can't compute the target
address, zero out the values stored in the object file to make
objdump's output consistent.
2011-01-26 Kai Tietz <kai.tietz@onevision.com>
* config/tc-i386.c (md_begin): Set for x64 windows COFF target
x86_dwarf2_return_column to 32.
2011-01-20 Nick Clifton <nickc@redhat.com>
PR gas/12384
* config/tc-h8300.c (constant_fits_width_p): Use correct type for
comparison.
2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
* write.c (compress_debug): Return if section size is smaller
than 32 bytes.
2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
PR gas/12409
* write.c (compress_debug): Return if section size is 0.
2011-01-18 Mingfeng Wu <mingfeng@faraday-tech.com>
* config/tc-arm.c (arm_cpus): Add Faraday ARMv5TE compatible
cores: fa606te, fa616te, fmp626. Modify the VFP of fa626te.
* doc/c-arm.texi (ARM Options): Add -mcpu={fa606te, fa616te,
fmp626} options.
PR gas/12390 * doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
2011-01-18 21:37:39 +08:00
2011-01-18 Nick Clifton <nickc@redhat.com>
PR gas/12390
* doc/all.texi: Add NS32K
* doc/as.texinfo: Remove target specific details of which
characters act as comment initiators and statement separators into
individual target specific files.
* doc/c-alpha.texi (Alpha-Chars): Document special behaviour of
the hash character at the start of a line.
* doc/c-arm.texi (ARM-Chars): Likewise.
* doc/c-avr.texi (AVR-Chars): Likewise.
* doc/c-d10v.texi (D10V-Chars): Likewise.
* doc/c-d30v.texi (D30V-Chars): Likewise.
* doc/c-mmix.texi (MMIX-Chars): Likewise.
* doc/c-s390.texi (s390 characters): Likewise.
* doc/c-sh.texi (SH-Chars): Likewise.
* doc/c-sh64.texi (SH64-Chars): Likewise.
* doc/c-sparc.texi (SPARC-Chars): Likewise.
* doc/c-tic6x.texi (TIC6X Syntax): Likewise.
* doc/c-xtensa.texi (Xtensa Syntax): Likewise.
* doc/c-z80.texi (Z80-Chars): Likewise.
* doc/c-z8k.texi (Z8000-Chars): Likewise.
* doc/c-pdp11.texi (PDP11-Syntax): Document line separator character.
* doc/c-arc.texi (ARC-Chars): Fill in this subsection.
* doc/c-bfin.texi (Blackfin Syntax): Document line comment and
line separator characters.
* doc/c-cr16.texi (CR16 Syntax): Likewise.
* doc/c-i386.texi (i386-Chars): Likewise.
* doc/c-i860.texi (i860-Chars): Likewise.
* doc/c-i960.texi (i960-Chars): Likewise.
* doc/c-ip2k.texi (IP2K-Chars): Likewise.
* doc/c-lm32.texi (LM32-Chars): likewise.
* doc/c-m32c.texi (M32C-Chars): Likewise.
* doc/c-m68hc11.texi (M68HC11-syntax): Likewise.
* doc/c-m68k.texi (M68K-Chars): Likewise.
* doc/c-microblaze.texi (MicroBlaze-Chars): Likewise.
* doc/c-msp430.texi (MSP430-Chars): Likewise.
* doc/c-mt.texi (MT-Chars): Likewise.
* doc/c-ns32k.texi (NS32K-Chars): Likewise.
* doc/c-pj.texi (PJ-Chars): Likewise.
* doc/c-ppc.texi (PowerPC-Chars): Likewise.
* doc/c-rx.texi (RX-Chars): Likewise.
* doc/c-score.texi (SCORE-Chars): Likewise.
* doc/c-tic54x.texi (TIC54X-Chars): Likewise.
* doc/c-v850.texi (V850-Chars): Likewise.
* doc/c-vax.texi (VAX-Chars): Likewise.
* doc/c-xc16x.texi (xc16x-Chars): Likewise.
2011-01-17 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS.
* doc/c-i386.texi (i386-TBM): New section.
2011-01-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (disallow_64bit_disp): Renamed to ...
(disallow_64bit_reloc): This.
(md_assemble): Don't check movabs for x32 mode here.
(i386_target_format): Updated.
(tc_gen_reloc): Check if 64bit relocations are allowed.
2011-01-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (disallow_64bit_disp): New.
(x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with
X86_64_ABI/X86_64_X32_ABI.
(md_assemble): Don't allow movabs with relocation in x32 mode.
(i386_target_format): Updated.
2011-01-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (OPTION_N32): Renamed to ...
(OPTION_X32): This.
(md_longopts): Replace n32 with x32.
(md_parse_option): Updated.
(md_show_usage): Likewise.
2011-01-16 01:25:30 +08:00
* doc/c-i386.texi: Replace --n32 with --x32.
2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
* config/tc-mips.c (mips_ip): Update error messages. Take an
unadjusted offset for "+c" argument.
2011-01-10 Nick Clifton <nickc@redhat.com>
* config/tc-i386.c (x86_elf_abi): Only define for targets that use
it.
2011-01-10 Nick Clifton <nickc@redhat.com>
* config/tc-arm.c (s_arm_tls_desceq): Move code into ELF-only
part of the file.
bfd/ * reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL, BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ, BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New relocations. * libbfd.h: Rebuilt. * bfd-in2.h: Rebuilt. * elf32-arm.c (elf32_arm_howto_table_1): Add new relocations. (elf32_arm_reloc_map): Likewise. (tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates. (elf32_arm_stub_long_branch_any_tls_pic, elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates. (DEF_STUBS): Add new stubs. (struct_elf_arm_obj_data): Add local_tlsdesc_gotent field. (elf32_arm_local_tlsdesc_gotent): New. (GOT_TLS_GDESC): New mask. (GOT_TLS_GD_ANY): Define. (struct elf32_arm_link_hash_entry): Add tlsdesc_got field. (elf32_arm_compute_jump_table_size): New. (struct elf32_arm_link_hash_table): Add next_tls_desc_index, num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline, sgotplt_jump_table_size fields. (elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field. (elf32_arm_link_hash_table_create): Initialize new fields. (arm_type_of_stub): Check TLS desc relocs too. (elf32_arm_stub_name): TLS desc relocs can be shared. (elf32_arm_tls_transition): Determine relaxation. (arm_stub_required_alignment): Add tls stubs. (elf32_arm_size_stubs): Likewise. (elf32_arm_tls_relax): Perform TLS relaxing. (elf32_arm_final_link_relocate): Process TLS DESC relocations. (IS_ARM_TLS_GNU_RELOC): New. (IS_ARM_TLS_RELOC): Use it. (elf32_arm_relocate_section): Perform TLS relaxing. (elf32_arm_check_relocs): Anticipate TLS relaxing, process tls desc relocations. (allocate_dynrelocs): Allocate tls desc relcoations. (elf32_arm_output_arch_local_syms): Emit tls trampoline mapping symbols. (elf32_arm_size_dynamic_sections): Allocate tls trampolines and got slots. (elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE symbol. (elf32_arm_finish_dynamic_symbol): Adjust. (arm_put_trampoline): New. (elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls trampolines. (elf_backend_always_size_sections): Define. include/elf/ * arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL, R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New relocations. gas/ * doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and .tlsdescseq directive. * config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc following a symbol. (s_arm_tls_descseq): New directive. (md_pseudo_table): Add it. (encode_branch): Allow TLS_CALL relocs too. (do_t_blx, do_t_branch23): Use encode_branch. (reloc_names): Add tlsdesc and tlscall. (md_apply_fix): Process tls desc relocations. (tc_gen_reloc): Likewise. (arm_fix_adjustable): Likewise. gas/testsuite/ * gas/arm/tls.s: Add tlsdesc tests. * gas/arm/tls.d: Adjust. ld/testsuite/ * ld-arm/arm-elf.exp: Added tests for new TLS handling relocations. * ld-arm/tls-descrelax-be32.d: New. * ld-arm/tls-descrelax-be32.s: New. * ld-arm/tls-descrelax-be8.d: New. * ld-arm/tls-descrelax-be8.s: New. * ld-arm/tls-descrelax-v7.d: New. * ld-arm/tls-descrelax-v7.s: New. * ld-arm/tls-descrelax.d: New. * ld-arm/tls-descrelax.s: New. * ld-arm/tls-descseq.d: New. * ld-arm/tls-descseq.r: New. * ld-arm/tls-descseq.s: New. * ld-arm/tls-gdesc-got.d: New. * ld-arm/tls-gdesc-got.s: New. * ld-arm/tls-gdesc-nlazy.g: New. * ld-arm/tls-gdesc-nlazy.s: New. * ld-arm/tls-gdesc.d: New. * ld-arm/tls-gdesc.r: New. * ld-arm/tls-gdesc.s: New. * ld-arm/tls-gdierelax.d: New. * ld-arm/tls-gdierelax.s: New. * ld-arm/tls-gdierelax2.d: New. * ld-arm/tls-gdierelax2.s: New. * ld-arm/tls-gdlerelax.d: New. * ld-arm/tls-gdlerelax.s: New. * ld-arm/tls-lib-loc.d: New. * ld-arm/tls-lib-loc.r: New. * ld-arm/tls-lib-loc.s: New. * ld-arm/tls-longplt-lib.d: New. * ld-arm/tls-longplt-lib.s: New. * ld-arm/tls-longplt.d: New. * ld-arm/tls-longplt.s: New. * ld-arm/tls-mixed.r: New. * ld-arm/tls-mixed.s: New. * ld-arm/tls-thumb1.d: New. * ld-arm/tls-thumb1.s: New. * ld-arm/arm-elf.exp: New.
2011-01-10 16:40:19 +08:00
2011-01-10 Nathan Sidwell <nathan@codesourcery.com>
Glauber de Oliveira Costa <glommer@gmail.com>
* doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and
.tlsdescseq directive.
* config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc
following a symbol.
(s_arm_tls_descseq): New directive.
(md_pseudo_table): Add it.
(encode_branch): Allow TLS_CALL relocs too.
(do_t_blx, do_t_branch23): Use encode_branch.
(reloc_names): Add tlsdesc and tlscall.
(md_apply_fix): Process tls desc relocations.
(tc_gen_reloc): Likewise.
(arm_fix_adjustable): Likewise.
2011-01-07 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS.
* doc/c-i386.texi (i386-BMI): New section.
2011-01-06 Paul Koning <ni1d@arrl.net>
* config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relative
references to absolute addresses.
2011-01-05 DJ Delorie <dj@redhat.com>
* config/tc-rx.c (tc_gen_reloc): Emit an RX_OP_NEG expression
instead of an RH_NEG32 one.
2011-01-05 Jonathan Wakely <jwakely.gcc@gmail.com>
* doc/c-i386.texi: Clarify --n32.
2011-01-05 08:16:57 +08:00
2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_modrm_byte): Allow encoding 32/64bit
integer registers in VEX.vvvv. Check register-only source
operand when two source operands are swapped. Properly update
destination when two source operands are swapped.
2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
* gas.c (parse_args): Update copyright to 2011.
2011-01-02 00:44:48 +08:00
For older changes see ChangeLog-2010
2002-01-07 20:12:47 +08:00
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