2016-03-10 08:38:18 +08:00
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/* Low level support for ppc, shared between gdbserver and IPA.
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2019-01-01 14:01:51 +08:00
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Copyright (C) 2016-2019 Free Software Foundation, Inc.
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2016-03-10 08:38:18 +08:00
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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2019-01-28 03:51:36 +08:00
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#ifndef GDBSERVER_LINUX_PPC_TDESC_INIT_H
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#define GDBSERVER_LINUX_PPC_TDESC_INIT_H
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2016-03-10 08:38:18 +08:00
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/* Note: since IPA obviously knows what ABI it's running on (32 vs 64),
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it's sufficient to pass only the register set here. This, together with
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the ABI known at IPA compile time, maps to a tdesc. */
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enum ppc_linux_tdesc {
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PPC_TDESC_BASE,
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PPC_TDESC_ALTIVEC,
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Remove Cell Broadband Engine debugging support
This patch implements removal of Cell/B.E. support, including
- Support for the spu-*-* target
- Support for native stand-alone SPU debugging
- Support for integrated debugging of combined PPU/SPU applications
- Remote debugging (gdbserver) support for all the above.
The patch also removes the TARGET_OBJECT_SPU target object type,
as this is available only on Cell/B.E. targets, including
- Native Linux support
- Core file support (including core file generation)
- Remote target support, including removal of the qXfer:spu:read
and qXfer:spu:write remote protocal packets and associated
support in gdbserver.
gdb/ChangeLog
2019-09-20 Ulrich Weigand <uweigand@de.ibm.com>
* NEWS: Mention that Cell/B.E. debugging support was removed.
* MAINTAINERS: Remove spu target.
* config/djgpp/fnchange.lst: Remove entries for removed files.
* Makefile.in (ALL_TARGET_OBS): Remove solib-spu.o,
spu-multiarch.o, and spu-tdep.o.
(HFILES_NO_SRCDIR): Remove solib-spu.h and spu-tdep.h.
(ALLDEPFILES): Remove solib-spu.c, spu-linux-nat.c,
spu-multiarch.c, and spu-tdep.c.
* spu-linux-nat.c: Remove file.
* spu-multiarch.c: Remove file.
* spu-tdep.c: Remove file.
* spu-tdep.h: Remove file.
* solib-spu.c: Remove file.
* solib-spu.h: Remove file.
* configure.host (powerpc64*-*-linux*): Remove Cell/B.E. support.
* configure.nat (spu-linux): Remove.
* configure.tgt (powerpc*-*-linux*): Remove solib-spu.o and
solib-multiarch.o from gdb_target_obs.
(spu*-*-*): Remove.
* arch/ppc-linux-common.h (struct ppc_linux_features): Remove "cell"
feature flag.
(ppc_linux_no_features): Update.
* arch/ppc-linux-common.c (ppc_linux_match_description): Remove
Cell/B.E. support.
* arch/ppc-linux-tdesc.h (tdesc_powerpc_cell32l): Remove declaration.
(tdesc_powerpc_cell64l): Likewise.
* nat/ppc-linux.h (PPC_FEATURE_CELL): Remove.
* ppc-linux-nat.c (ppc_linux_nat_target::read_description): Remove
Cell/B.E. support.
* ppc-linux-tdep.h: Do not include "solib-spu.h" or "spu-tdep.h".
Do not include "features/rs6000/powerpc-cell32l.c" or
"features/rs6000/powerpc-cell64l.c".
(ppc_linux_spu_section): Remove.
(ppc_linux_core_read_description): Remove Cell/B.E. support.
(spe_context_objfile, spe_context_lm_addr, spe_context_offset,
spe_context_cache_ptid, spe_context_cache_ptid): Remove.
(ppc_linux_spe_context_lookup): Remove.
(ppc_linux_spe_context_inferior_created): Remove.
(ppc_linux_spe_context_solib_loaded): Remove.
(ppc_linux_spe_context_solib_unloaded): Remove.
(ppc_linux_spe_context): Remove.
(struct ppu2spu_cache): Remove.
(ppu2spu_prev_arch, ppu2spu_this_id, ppu2spu_prev_register): Remove.
(struct ppu2spu_data): Remove.
(ppu2spu_unwind_register, ppu2spu_sniffer, ppu2spu_dealloc_cache,
ppu2spu_unwind): Remove.
(ppc_linux_init_abi): Remove Cell/B.E. support.
* rs6000-tdep.h (rs6000_gdbarch_init): Remove Cell/B.E. support.
* features/Makefile (rs6000/powerpc-cell32l-expedite): Remove.
(rs6000/powerpc-cell64l-expedite): Likewise
(WHICH): Remove rs6000/powerpc-cell32l and rs6000/powerpc-cell64l.
(XMLTOC): Remove rs6000/powerpc-cell32l.xml and
rs6000/powerpc-cell64l.xml.
* features/rs6000/powerpc-cell32l.xml: Remove.
* features/rs6000/powerpc-cell64l.xml: Likewise.
* features/rs6000/powerpc-cell32l.c: Remove generated file.
* features/rs6000/powerpc-cell64l.c: Likewise.
* regformats/rs6000/powerpc-cell32l.dat: Remove generated file.
* regformats/rs6000/powerpc-cell64l.dat: Likewise.
* regformats/reg-spu.dat: Remove.
* target.h (enum target_object): Remove TARGET_OBJECT_SPU.
* corelow.c (struct spuid_list): Remove.
(add_to_spuid_list): Remove.
(core_target::xfer_partial): Remove support for TARGET_OBJECT_SPU.
* remote.c (PACKET_qXfer_spu_read, PACKET_qXfer_spu_write): Remove.
(remote_protocol_features): Remove associated entries.
(_initialize_remote): No longer initialize them.
(remote_target::xfer_partial): Remove support for TARGET_OBJECT_SPU.
* linux-nat.c (SPUFS_MAGIC): Remove.
(linux_proc_xfer_spu): Remove.
(spu_enumerate_spu_ids): Remove.
(linux_nat_target::xfer_partial): Remove support for TARGET_OBJECT_SPU.
* linux-tdep.c (-linux_spu_make_corefile_notes): Remove.
(linux_make_corefile_notes): No longer call it.
* regcache.c (cooked_read_test): Remove bfd_arch_spu special case.
(cooked_write_test): Likewise.
gdb/doc/ChangeLog
2019-09-20 Ulrich Weigand <uweigand@de.ibm.com>
* doc/gdb.texinfo (Remote Configuration): Remove documentation for
qXfer:spu:read and qXfer:spu:write.
(General Query Packets): Likewise.
(Cell Broadband Engine SPU architecture): Remove subsection.
gdb/gdbserver/ChangeLog
2019-09-20 Ulrich Weigand <uweigand@de.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Remove powerpc-cell32l-ipa.o
and powerpc-cell64l-ipa.o.
(powerpc*-*-linux*): Remove powerpc-cell32l.o and powerpc-cell64l.o
from srv_regobj. Remove rs6000/powerpc-cell32l.xml and
rs6000/powerpc-cell64l.xml from srv_xmlfiles.
(spu*-*-*): Remove.
* spu-low.c: Remove file.
* linux-ppc-low.c (INSTR_SC, NR_spu_run): Remove.
(parse_spufs_run): Remove.
(ppc_get_pc): Remove Cell/B.E. support.
(ppc_set_pc): Likewise.
(ppc_breakpoint_at): Likewise.
(ppc_arch_setup): Likewise.
(ppc_get_ipa_tdesc_idx): Do not handle tdesc_powerpc_cell64l or
tdesc_powerpc_cell32l.
(initialize_low_arch): Do not call init_registers_powerpc_cell64l
or init_registers_powerpc_cell32l.
* linux-ppc-ipa.c (get_ipa_tdesc): Do not handle PPC_TDESC_CELL.
(initialize_low_tracepoint): Do not call init_registers_powerpc_cell64l
or init_registers_powerpc_cell32l.
* linux-ppc-tdesc-init.h (PPC_TDESC_CELL): Mark as unused.
(init_registers_powerpc_cell32l): Remove prototype.
(init_registers_powerpc_cell64l): Likewise.
* target.h (struct target_ops): Remove qxfer_spu member.
* server.c (handle_qxfer_spu): Remove.
(qxfer_packets): Remove entry for "spu".
(handle_query): No longer support qXfer:spu:read or qXfer:spu:write.
* linux-low.c (SPUFS_MAGIC): Remove.
(spu_enumerate_spu_ids): Remove.
(linux_qxfer_spu): Remove.
(linux_target_ops): Remove qxfer_spu member.
* lynx-low.c (lynx_target_ops): Remove qxfer_spu member.
* nto-low.c (nto_target_ops): Remove qxfer_spu member.
* win32-low.c (win32_target_ops): Remove qxfer_spu member.
gdb/testsuite/ChangeLog
2019-09-20 Ulrich Weigand <uweigand@de.ibm.com>
* gdb.arch/spu-info.exp: Remove file.
* gdb.arch/spu-info.c: Remove file.
* gdb.arch/spu-ls.exp: Remove file.
* gdb.arch/spu-ls.c: Remove file.
* gdb.asm/asm-source.exp: Remove support for spu*-*-*.
* gdb.asm/spu.inc: Remove file.
* gdb.base/dump.exp: Remove support for spu*-*-*.
* gdb.base/stack-checking.exp: Likewise.
* gdb.base/overlays.exp: Likewise.
* gdb.base/ovlymgr.c: Likewise.
* gdb.base/spu.ld: Remove file.
* gdb.cp/bs15503.exp: Remove support for spu*-*-*.
* gdb.cp/cpexprs.exp: Likewise.
* gdb.cp/exception.exp: Likewise.
* gdb.cp/gdb2495.exp: Likewise.
* gdb.cp/mb-templates.exp: Likewise.
* gdb.cp/pr9167.exp: Likewise.
* gdb.cp/userdef.exp: Likewise.
* gdb.xml/tdesc-regs.exp: Remove support for spu*-*-*.
* gdb.cell: Remove directory.
* lib/cell.exp: Remove file.
2019-09-21 05:06:57 +08:00
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PPC_TDESC_CELL, /* No longer used, but kept to avoid ABI changes. */
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2016-03-10 08:38:18 +08:00
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PPC_TDESC_VSX,
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PPC_TDESC_ISA205,
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PPC_TDESC_ISA205_ALTIVEC,
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PPC_TDESC_ISA205_VSX,
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[PowerPC] Add support for PPR and DSCR
This patch adds gdb support for the Program Priorty Register and the
Data Stream Control Register, for the powerpc linux native and core
file targets, and for the powerpc linux server stub.
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-tdesc.h (tdesc_powerpc_isa205_ppr_dscr_vsx32l)
(tdesc_powerpc_isa205_ppr_dscr_vsx64l): Declare.
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_PPRREGSET)
(PPC_LINUX_SIZEOF_DSCRREGSET): Define.
(struct ppc_linux_features) <ppr_dscr>: New field.
(ppc_linux_no_features): Add initializer for ppr_dscr field.
* arch/ppc-linux-common.c (ppc_linux_match_description): Return
new tdescs.
* nat/ppc-linux.h (PPC_FEATURE2_DSCR, NT_PPC_PPR, NT_PPC_DSCR):
Define if not already defined.
* features/Makefile (WHICH): Add
rs6000/powerpc-isa205-ppr-dscr-vsx32l and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.
(XMLTOC): Add rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml.
* features/rs6000/power-dscr.xml: New file.
* features/rs6000/power-ppr.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c: Generate.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c: Generate.
* regformats/rs6000/powerpc-isa205-ppr-dscr-vsx32l.dat: Generate.
* regformats/rs6000/powerpc-isa205-ppr-dscr-vsx64l.dat: Generate.
* ppc-linux-nat.c: Include <sys/uio.h>.
(fetch_regset, store_regset, check_regset): New functions.
(fetch_register, fetch_ppc_registers): Call fetch_regset with
DSCR and PPR regsets.
(store_register, store_ppc_registers): Call store_regset with
DSCR and PPR regsets.
(ppc_linux_get_hwcap2): New function.
(ppc_linux_nat_target::read_description): Call
ppc_linux_get_hwcap2 and check_regset, set ppr_dscr field in the
features struct if needed.
* ppc-linux-tdep.c: Include
features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c and
features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c.
(ppc32_regmap_ppr, ppc32_regmap_dscr, ppc32_linux_pprregset)
(ppc32_linux_dscrregset): New globals.
(ppc_linux_iterate_over_regset_sections): Call back with the ppr
and dscr regsets.
(ppc_linux_core_read_description): Check if the ppr and dscr
sections are present and set ppr_dscr in the features struct.
(_initialize_ppc_linux_tdep): Call
initialize_tdesc_powerpc_isa205_ppr_dscr_vsx32l and
initialize_tdesc_powerpc_isa205_ppr_dscr_vsx64l.
* ppc-linux-tdep.h (ppc32_linux_pprregset)
(ppc32_linux_dscrregset): Declare.
* ppc-tdep.h (struct gdbarch_tdep) <ppc_ppr_regnum>: New field.
<ppc_dscr_regnum>: New field.
(enum) <PPC_PPR_REGNUM, PPC_DSCR_REGNUM>: New enum values.
* rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate ppr
and dscr features.
(ppc_process_record_op31): Record changes to PPR and DSCR.
gdb/gdbserver/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Add
powerpc-isa205-ppr-dscr-vsx32l-ipa.o and
powerpc-isa205-ppr-dscr-vsx64l-ipa.o.
(powerpc*-*-linux*): Add powerpc-isa205-ppr-dscr-vsx32l.o and
powerpc-isa205-ppr-dscr-vsx64l.o to srv_regobj, add
rs6000/power-dscr.xml, rs6000/power-ppr.xml,
rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml to srv_xmlfiles.
* linux-ppc-tdesc-init.h (enum ppc_linux_tdesc)
<PPC_TDESC_ISA205_PPR_DSCR_VSX>: New enum value.
(init_registers_powerpc_isa205_ppr_dscr_vsx32l)
(init_registers_powerpc_isa205_ppr_dscr_vsx64l): Declare.
* linux-ppc-low.c: Include "elf/common.h" and <sys/uio.h>.
(ppc_hwcap): Add comment.
(ppc_hwcap2): New global.
(ppc_check_regset, ppc_fill_pprregset, ppc_store_pprregset)
(ppc_fill_dscrregset, ppc_store_dscrregset): New functions.
(ppc_regsets): Add entries for the DSCR and PPR regsets.
(ppc_arch_setup): Get AT_HWCAP2. Set ppr_dscr in features struct
when needed. Set sizes for the the DSCR and PPR regsets.
(ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA205_PPR_DSCR_VSX.
(initialize_low_arch): Call
init_registers_powerpc_isa205_ppr_dscr_vsx32l and
init_registers_powerpc_isa205_ppr_dscr_vsx64l.
* linux-ppc-ipa.c (get_ipa_tdesc): Handle
PPC_TDESC_ISA205_PPR_DSCR_VSX.
(initialize_low_tracepoint): Call
init_registers_powerpc_isa205_ppr_dscr_vsx32l and
init_registers_powerpc_isa205_ppr_dscr_vsx64l.
gdb/testsuite/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/powerpc-ppr-dscr.c: New file.
* gdb.arch/powerpc-ppr-dscr.exp: New file.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new features
"org.gnu.gdb.power.ppr" and "org.gnu.gdb.power.dscr".
2018-10-26 20:37:54 +08:00
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PPC_TDESC_ISA205_PPR_DSCR_VSX,
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2018-10-26 20:37:54 +08:00
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PPC_TDESC_ISA207_VSX,
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[PowerPC] Add support for HTM registers
This patch adds support for Hardware Transactional Memory registers
for the powerpc linux native and core file targets, and for the
pwoerpc linux server stub.
These registers include both the HTM special-purpose registers (TFHAR,
TEXASR and TFIAR) as well as the set of registers that are
checkpointed (saved) when a transaction is initiated, which the
processor restores in the event of a transaction failure.
The set of checkpointed general-purpose registers is returned by the
linux kernel in the same format as the regular general-purpose
registers, defined in struct pt_regs. However, the architecture
specifies that only some of the registers present in pt_regs are
checkpointed (GPRs 0-31, CR, XER, LR and CTR). The kernel fills the
slots for MSR and NIP with other info. The other fields usually don't
have meaningful values. GDB doesn't define registers that are not
checkpointed in the architecture, but when generating a core file, GDB
fills the slot for the checkpointed MSR with the regular MSR. These
are usually similar, although some bits might be different, and in
some cases the checkpointed MSR will have a value of 0 in a
kernel-generated core-file. The checkpointed NIP is filled with TFHAR
by GDB in the core-file, which is what the kernel does. The other
fields are set to 0 by GDB.
Core files generated by the kernel have a note section for
checkpointed GPRs with the same size for both 32-bit and 64-bit
threads, and the values for the registers of a 32-bit thread are
squeezed in the first half, with no useful data in the second half.
GDB generates a smaller note section for 32-bit threads, but can read
both sizes.
The checkpointed XER is required to be 32-bit in the target
description documentation, even though the more recent ISAs define it
as 64-bit wide, since the high-order 32-bits are reserved, and because
in Linux there is no way to get a 64-bit checkpointed XER for 32-bit
threads. If this changes in the future, the target description
feature requirement can be relaxed to allow for a 64-bit checkpointed
XER.
Access to the checkpointed CR (condition register) can be confusing.
The architecture only specifies that CR fields 1 to 7 (the 24 least
significant bits) are checkpointed, but the kernel provides all 8
fields (32 bits). The value of field 0 is not masked by ptrace, so it
will sometimes show the result of some kernel operation, probably
treclaim., which sets this field.
The checkpointed registers are marked not to be saved and restored.
Inferior function calls during an active transaction don't work well,
and it's unclear what should be done in this case. TEXASR and TFIAR
can be altered asynchronously, during transaction failure recording,
so they are also not saved and restored. For consistency neither is
TFHAR.
Record and replay also doesn't work well when transactions are
involved. This patch doesn't address this, so the values of the HTM
SPRs will sometimes be innacurate when the record/relay target is
enabled. For instance, executing a "tbegin." alters TFHAR and TEXASR,
but these changes are not currently recorded.
Because the checkpointed registers are only available when a
transaction is active (or suspended), ptrace can return ENODATA when
gdb tries to read these registers and the inferior is not in a
transactional state. The registers are set to the unavailable state
when this happens. When gbd tries to write to one of these registers,
and it is unavailable, an error is raised.
The "fill" functions for checkpointed register sets in the server stub
are not implemented for the same reason as for the EBB register set,
since ptrace can also return ENODATA for checkpointed regsets. The
same issues with 'G' packets apply here.
Just like for the EBB registers, tracepoints will not mark the
checkpointed registers as unavailable if the inferior was not in a
transaction, so their content will also show 0 instead of
<unavailable> when inspecting trace data.
The new tests record the values of the regular registers before
stepping the inferior through a "tbegin." instruction to start a
transaction, then the checkpointed registers are checked against the
recorded pre-transactional values. New values are written to the
checkpointed registers and recorded, the inferior continues until the
transaction aborts (which is usually immediately when it is resumed),
and the regular registers are checked against the recorded values,
because the abort should have reverted the registers to these values.
Like for the EBB registers, target_store_registers will ignore the
checkpointed registers when called with -1 as the regno
argument (store all registers in one go).
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-tdesc.h (tdesc_powerpc_isa207_htm_vsx32l)
(tdesc_powerpc_isa207_htm_vsx64l): Declare.
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_TM_SPRREGSET)
(PPC32_LINUX_SIZEOF_CGPRREGSET, PPC64_LINUX_SIZEOF_CGPRREGSET)
(PPC_LINUX_SIZEOF_CFPRREGSET, PPC_LINUX_SIZEOF_CVMXREGSET)
(PPC_LINUX_SIZEOF_CVSXREGSET, PPC_LINUX_SIZEOF_CPPRREGSET)
(PPC_LINUX_SIZEOF_CDSCRREGSET, PPC_LINUX_SIZEOF_CTARREGSET):
Define.
(struct ppc_linux_features) <htm>: New field.
(ppc_linux_no_features): Add initializer for htm field.
* arch/ppc-linux-common.c (ppc_linux_match_description): Return
new tdescs.
* nat/ppc-linux.h (PPC_FEATURE2_HTM, NT_PPC_TM_CGPR)
(NT_PPC_TM_CFPR, NT_PPC_TM_CVMX, NT_PPC_TM_CVSX)
(NT_PPC_TM_SPR, NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR):
Define if not already defined.
* features/Makefile (WHICH): Add rs6000/powerpc-isa207-htm-vsx32l
and rs6000/powerpc-isa207-htm-vsx64l.
(XMLTOC): Add rs6000/powerpc-isa207-htm-vsx32l.xml and
rs6000/powerpc-isa207-htm-vsx64l.xml.
* features/rs6000/power-htm-spr.xml: New file.
* features/rs6000/power-htm-core.xml: New file.
* features/rs6000/power64-htm-core.xml: New file.
* features/rs6000/power-htm-fpu.xml: New file.
* features/rs6000/power-htm-altivec.xml: New file.
* features/rs6000/power-htm-vsx.xml: New file.
* features/rs6000/power-htm-ppr.xml: New file.
* features/rs6000/power-htm-dscr.xml: New file.
* features/rs6000/power-htm-tar.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx32l.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx64l.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx32l.c: Generate.
* features/rs6000/powerpc-isa207-htm-vsx64l.c: Generate.
* regformats/rs6000/powerpc-isa207-htm-vsx32l.dat: Generate.
* regformats/rs6000/powerpc-isa207-htm-vsx64l.dat: Generate.
* ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call
fetch_regset with HTM regsets.
(store_register, store_ppc_registers): Call store_regset with HTM
regsets.
(ppc_linux_nat_target::read_description): Set htm field in the
features struct if needed.
* ppc-linux-tdep.c: Include
features/rs6000/powerpc-isa207-htm-vsx32l.c and
features/rs6000/powerpc-isa207-htm-vsx64l.c.
(ppc32_regmap_tm_spr, ppc32_regmap_cgpr, ppc64_le_regmap_cgpr)
(ppc64_be_regmap_cgpr, ppc32_regmap_cfpr, ppc32_le_regmap_cvmx)
(ppc32_be_regmap_cvmx, ppc32_regmap_cvsx, ppc32_regmap_cppr)
(ppc32_regmap_cdscr, ppc32_regmap_ctar): New globals.
(ppc32_linux_tm_sprregset, ppc32_linux_cgprregset)
(ppc64_be_linux_cgprregset, ppc64_le_linux_cgprregset)
(ppc32_linux_cfprregset, ppc32_le_linux_cvmxregset)
(ppc32_be_linux_cvmxregset, ppc32_linux_cvsxregset)
(ppc32_linux_cpprregset, ppc32_linux_cdscrregset)
(ppc32_linux_ctarregset): New globals.
(ppc_linux_cgprregset, ppc_linux_cvmxregset): New functions.
(ppc_linux_collect_core_cpgrregset): New function.
(ppc_linux_iterate_over_regset_sections): Call back with the htm
regsets.
(ppc_linux_core_read_description): Check if the tm spr section is
present and set htm in the features struct.
(_initialize_ppc_linux_tdep): Call
initialize_tdesc_powerpc_isa207_htm_vsx32l and
initialize_tdesc_powerpc_isa207_htm_vsx64l.
* ppc-linux-tdep.h (ppc_linux_cgprregset, ppc_linux_cvmxregset):
Declare.
(ppc32_linux_tm_sprregset, ppc32_linux_cfprregset)
(ppc32_linux_cvsxregset, ppc32_linux_cpprregset)
(ppc32_linux_cdscrregset, ppc32_linux_ctarregset): Declare.
* ppc-tdep.h (struct gdbarch_tdep) <have_htm_spr, have_htm_core>:
New fields.
<have_htm_fpu, have_htm_altivec, have_htm_vsx>:
Likewise.
<ppc_cppr_regnum, ppc_cdscr_regnum, ppc_ctar_regnum>: Likewise.
<ppc_cdl0_regnum, ppc_cvsr0_regnum, ppc_cefpr0_regnum>: Likewise.
(enum) <PPC_TFHAR_REGNUM, PPC_TEXASR_REGNUM, PPC_TFIAR_REGNUM>:
New enum fields.
<PPC_CR0_REGNUM, PPC_CCR_REGNUM, PPC_CXER_REGNUM>: Likewise.
<PPC_CLR_REGNUM, PPC_CCTR_REGNUM, PPC_CF0_REGNUM>: Likewise.
<PPC_CFPSCR_REGNUM, PPC_CVR0_REGNUM, PPC_CVSCR_REGNUM>: Likewise.
<PPC_CVRSAVE_REGNUM, PPC_CVSR0_UPPER_REGNUM>: Likewise.
<PPC_CPPR_REGNUM, PPC_CDSCR_REGNUM>: Likewise.
<PPC_CTAR_REGNUM>: Likewise.
(PPC_IS_TMSPR_REGNUM, PPC_IS_CKPTGP_REGNUM, PPC_IS_CKPTFP_REGNUM)
(PPC_IS_CKPTVMX_REGNUM, PPC_IS_CKPTVSX_REGNUM): Define.
* rs6000-tdep.c (IS_CDFP_PSEUDOREG, IS_CVSX_PSEUDOREG)
(IS_CEFP_PSEUDOREG): Define.
(rs6000_register_name): Hide the upper halves of checkpointed VSX
registers. Return names for the checkpointed DFP, VSX, and EFP
pseudo registers.
(rs6000_pseudo_register_type): Remove initial assert and raise an
internal error in the else clause instead. Return types for the
checkpointed DFP, VSX, and EFP pseudo registers.
(dfp_pseudo_register_read, dfp_pseudo_register_write): Handle
checkpointed DFP pseudo registers.
(vsx_pseudo_register_read, vsx_pseudo_register_write): Handle
checkpointed VSX pseudo registers.
(efp_pseudo_register_read, efp_pseudo_register_write): Rename
from efpr_pseudo_register_read and
efpr_pseudo_register_write. Handle checkpointed EFP pseudo
registers.
(rs6000_pseudo_register_read, rs6000_pseudo_register_write):
Handle checkpointed DFP, VSX, and EFP registers.
(dfp_ax_pseudo_register_collect, vsx_ax_pseudo_register_collect)
(efp_ax_pseudo_register_collect): New functions.
(rs6000_ax_pseudo_register_collect): Move DFP, VSX and EFP pseudo
register logic to new functions. Handle checkpointed DFP, VSX,
and EFP pseudo registers.
(rs6000_gdbarch_init): Look for and validate the htm features.
Include checkpointed DFP, VSX and EFP pseudo-registers.
* NEWS: Mention access to PPR, DSCR, TAR, EBB/PMU registers and
HTM registers.
gdb/gdbserver/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Add
powerpc-isa207-htm-vsx32l-ipa.o and
powerpc-isa207-htm-vsx64l-ipa.o.
(powerpc*-*-linux*): Add powerpc-isa207-htm-vsx32l.o and
powerpc-isa207-htm-vsx64l.o to srv_regobj. Add
rs6000/power-htm-spr.xml, rs6000/power-htm-core.xml,
rs6000/power64-htm-core.xml, rs6000/power-htm-fpu.xml,
rs6000/power-htm-altivec.xml, rs6000/power-htm-vsx.xml,
rs6000/power-htm-ppr.xml, rs6000/power-htm-dscr.xml,
rs6000/power-htm-tar.xml, rs6000/powerpc-isa207-htm-vsx32l.xml,
and rs6000/powerpc-isa207-htm-vsx64l.xml to srv_xmlfiles.
* linux-ppc-tdesc-init.h (enum ppc_linux_tdesc)
<PPC_TDESC_ISA207_HTM_VSX>: New enum value.
(init_registers_powerpc_isa207_htm_vsx32l)
(init_registers_powerpc_isa207_htm_vsx64l): Declare.
* linux-ppc-low.c (ppc_fill_tm_sprregset, ppc_store_tm_sprregset)
(ppc_store_tm_cgprregset, ppc_store_tm_cfprregset)
(ppc_store_tm_cvrregset, ppc_store_tm_cvsxregset)
(ppc_store_tm_cpprregset, ppc_store_tm_cdscrregset)
(ppc_store_tm_ctarregset): New functions.
(ppc_regsets): Add entries for HTM regsets.
(ppc_arch_setup): Set htm in features struct when needed. Set
sizes for the HTM regsets.
(ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA207_HTM_VSX.
(initialize_low_arch): Call
init_registers_powerpc_isa207_htm_vsx32l and
init_registers_powerpc_isa207_htm_vsx64l.
* linux-ppc-ipa.c (get_ipa_tdesc): Handle
PPC_TDESC_ISA207_HTM_VSX.
(initialize_low_tracepoint): Call
init_registers_powerpc_isa207_htm_vsx32l and
init_registers_powerpc_isa207_htm_vsx64l.
gdb/testsuite/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/powerpc-htm-regs.c: New file.
* gdb.arch/powerpc-htm-regs.exp: New file.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new features
"org.gnu.gdb.power.htm.spr", "org.gnu.gdb.power.htm.core",
"org.gnu.gdb.power.htm.fpu", "org.gnu.gdb.power.htm.altivec",
"org.gnu.gdb.power.htm.vsx", "org.gnu.gdb.power.htm.ppr",
"org.gnu.gdb.power.htm.dscr", "org.gnu.gdb.power.htm.tar".
2018-10-26 20:37:55 +08:00
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PPC_TDESC_ISA207_HTM_VSX,
|
2016-03-10 08:38:18 +08:00
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PPC_TDESC_E500,
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};
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#if !defined __powerpc64__ || !defined IN_PROCESS_AGENT
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/* Defined in auto-generated file powerpc-32l.c. */
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void init_registers_powerpc_32l (void);
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/* Defined in auto-generated file powerpc-altivec32l.c. */
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void init_registers_powerpc_altivec32l (void);
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/* Defined in auto-generated file powerpc-vsx32l.c. */
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void init_registers_powerpc_vsx32l (void);
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/* Defined in auto-generated file powerpc-isa205-32l.c. */
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void init_registers_powerpc_isa205_32l (void);
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/* Defined in auto-generated file powerpc-isa205-altivec32l.c. */
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void init_registers_powerpc_isa205_altivec32l (void);
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/* Defined in auto-generated file powerpc-isa205-vsx32l.c. */
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void init_registers_powerpc_isa205_vsx32l (void);
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[PowerPC] Add support for PPR and DSCR
This patch adds gdb support for the Program Priorty Register and the
Data Stream Control Register, for the powerpc linux native and core
file targets, and for the powerpc linux server stub.
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-tdesc.h (tdesc_powerpc_isa205_ppr_dscr_vsx32l)
(tdesc_powerpc_isa205_ppr_dscr_vsx64l): Declare.
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_PPRREGSET)
(PPC_LINUX_SIZEOF_DSCRREGSET): Define.
(struct ppc_linux_features) <ppr_dscr>: New field.
(ppc_linux_no_features): Add initializer for ppr_dscr field.
* arch/ppc-linux-common.c (ppc_linux_match_description): Return
new tdescs.
* nat/ppc-linux.h (PPC_FEATURE2_DSCR, NT_PPC_PPR, NT_PPC_DSCR):
Define if not already defined.
* features/Makefile (WHICH): Add
rs6000/powerpc-isa205-ppr-dscr-vsx32l and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.
(XMLTOC): Add rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml.
* features/rs6000/power-dscr.xml: New file.
* features/rs6000/power-ppr.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c: Generate.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c: Generate.
* regformats/rs6000/powerpc-isa205-ppr-dscr-vsx32l.dat: Generate.
* regformats/rs6000/powerpc-isa205-ppr-dscr-vsx64l.dat: Generate.
* ppc-linux-nat.c: Include <sys/uio.h>.
(fetch_regset, store_regset, check_regset): New functions.
(fetch_register, fetch_ppc_registers): Call fetch_regset with
DSCR and PPR regsets.
(store_register, store_ppc_registers): Call store_regset with
DSCR and PPR regsets.
(ppc_linux_get_hwcap2): New function.
(ppc_linux_nat_target::read_description): Call
ppc_linux_get_hwcap2 and check_regset, set ppr_dscr field in the
features struct if needed.
* ppc-linux-tdep.c: Include
features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c and
features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c.
(ppc32_regmap_ppr, ppc32_regmap_dscr, ppc32_linux_pprregset)
(ppc32_linux_dscrregset): New globals.
(ppc_linux_iterate_over_regset_sections): Call back with the ppr
and dscr regsets.
(ppc_linux_core_read_description): Check if the ppr and dscr
sections are present and set ppr_dscr in the features struct.
(_initialize_ppc_linux_tdep): Call
initialize_tdesc_powerpc_isa205_ppr_dscr_vsx32l and
initialize_tdesc_powerpc_isa205_ppr_dscr_vsx64l.
* ppc-linux-tdep.h (ppc32_linux_pprregset)
(ppc32_linux_dscrregset): Declare.
* ppc-tdep.h (struct gdbarch_tdep) <ppc_ppr_regnum>: New field.
<ppc_dscr_regnum>: New field.
(enum) <PPC_PPR_REGNUM, PPC_DSCR_REGNUM>: New enum values.
* rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate ppr
and dscr features.
(ppc_process_record_op31): Record changes to PPR and DSCR.
gdb/gdbserver/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Add
powerpc-isa205-ppr-dscr-vsx32l-ipa.o and
powerpc-isa205-ppr-dscr-vsx64l-ipa.o.
(powerpc*-*-linux*): Add powerpc-isa205-ppr-dscr-vsx32l.o and
powerpc-isa205-ppr-dscr-vsx64l.o to srv_regobj, add
rs6000/power-dscr.xml, rs6000/power-ppr.xml,
rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml to srv_xmlfiles.
* linux-ppc-tdesc-init.h (enum ppc_linux_tdesc)
<PPC_TDESC_ISA205_PPR_DSCR_VSX>: New enum value.
(init_registers_powerpc_isa205_ppr_dscr_vsx32l)
(init_registers_powerpc_isa205_ppr_dscr_vsx64l): Declare.
* linux-ppc-low.c: Include "elf/common.h" and <sys/uio.h>.
(ppc_hwcap): Add comment.
(ppc_hwcap2): New global.
(ppc_check_regset, ppc_fill_pprregset, ppc_store_pprregset)
(ppc_fill_dscrregset, ppc_store_dscrregset): New functions.
(ppc_regsets): Add entries for the DSCR and PPR regsets.
(ppc_arch_setup): Get AT_HWCAP2. Set ppr_dscr in features struct
when needed. Set sizes for the the DSCR and PPR regsets.
(ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA205_PPR_DSCR_VSX.
(initialize_low_arch): Call
init_registers_powerpc_isa205_ppr_dscr_vsx32l and
init_registers_powerpc_isa205_ppr_dscr_vsx64l.
* linux-ppc-ipa.c (get_ipa_tdesc): Handle
PPC_TDESC_ISA205_PPR_DSCR_VSX.
(initialize_low_tracepoint): Call
init_registers_powerpc_isa205_ppr_dscr_vsx32l and
init_registers_powerpc_isa205_ppr_dscr_vsx64l.
gdb/testsuite/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/powerpc-ppr-dscr.c: New file.
* gdb.arch/powerpc-ppr-dscr.exp: New file.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new features
"org.gnu.gdb.power.ppr" and "org.gnu.gdb.power.dscr".
2018-10-26 20:37:54 +08:00
|
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|
/* Defined in auto-generated file powerpc-isa205-ppr-dscr-vsx32l.c. */
|
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void init_registers_powerpc_isa205_ppr_dscr_vsx32l (void);
|
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2018-10-26 20:37:54 +08:00
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/* Defined in auto-generated file powerpc-isa207-vsx32l.c. */
|
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|
|
void init_registers_powerpc_isa207_vsx32l (void);
|
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[PowerPC] Add support for HTM registers
This patch adds support for Hardware Transactional Memory registers
for the powerpc linux native and core file targets, and for the
pwoerpc linux server stub.
These registers include both the HTM special-purpose registers (TFHAR,
TEXASR and TFIAR) as well as the set of registers that are
checkpointed (saved) when a transaction is initiated, which the
processor restores in the event of a transaction failure.
The set of checkpointed general-purpose registers is returned by the
linux kernel in the same format as the regular general-purpose
registers, defined in struct pt_regs. However, the architecture
specifies that only some of the registers present in pt_regs are
checkpointed (GPRs 0-31, CR, XER, LR and CTR). The kernel fills the
slots for MSR and NIP with other info. The other fields usually don't
have meaningful values. GDB doesn't define registers that are not
checkpointed in the architecture, but when generating a core file, GDB
fills the slot for the checkpointed MSR with the regular MSR. These
are usually similar, although some bits might be different, and in
some cases the checkpointed MSR will have a value of 0 in a
kernel-generated core-file. The checkpointed NIP is filled with TFHAR
by GDB in the core-file, which is what the kernel does. The other
fields are set to 0 by GDB.
Core files generated by the kernel have a note section for
checkpointed GPRs with the same size for both 32-bit and 64-bit
threads, and the values for the registers of a 32-bit thread are
squeezed in the first half, with no useful data in the second half.
GDB generates a smaller note section for 32-bit threads, but can read
both sizes.
The checkpointed XER is required to be 32-bit in the target
description documentation, even though the more recent ISAs define it
as 64-bit wide, since the high-order 32-bits are reserved, and because
in Linux there is no way to get a 64-bit checkpointed XER for 32-bit
threads. If this changes in the future, the target description
feature requirement can be relaxed to allow for a 64-bit checkpointed
XER.
Access to the checkpointed CR (condition register) can be confusing.
The architecture only specifies that CR fields 1 to 7 (the 24 least
significant bits) are checkpointed, but the kernel provides all 8
fields (32 bits). The value of field 0 is not masked by ptrace, so it
will sometimes show the result of some kernel operation, probably
treclaim., which sets this field.
The checkpointed registers are marked not to be saved and restored.
Inferior function calls during an active transaction don't work well,
and it's unclear what should be done in this case. TEXASR and TFIAR
can be altered asynchronously, during transaction failure recording,
so they are also not saved and restored. For consistency neither is
TFHAR.
Record and replay also doesn't work well when transactions are
involved. This patch doesn't address this, so the values of the HTM
SPRs will sometimes be innacurate when the record/relay target is
enabled. For instance, executing a "tbegin." alters TFHAR and TEXASR,
but these changes are not currently recorded.
Because the checkpointed registers are only available when a
transaction is active (or suspended), ptrace can return ENODATA when
gdb tries to read these registers and the inferior is not in a
transactional state. The registers are set to the unavailable state
when this happens. When gbd tries to write to one of these registers,
and it is unavailable, an error is raised.
The "fill" functions for checkpointed register sets in the server stub
are not implemented for the same reason as for the EBB register set,
since ptrace can also return ENODATA for checkpointed regsets. The
same issues with 'G' packets apply here.
Just like for the EBB registers, tracepoints will not mark the
checkpointed registers as unavailable if the inferior was not in a
transaction, so their content will also show 0 instead of
<unavailable> when inspecting trace data.
The new tests record the values of the regular registers before
stepping the inferior through a "tbegin." instruction to start a
transaction, then the checkpointed registers are checked against the
recorded pre-transactional values. New values are written to the
checkpointed registers and recorded, the inferior continues until the
transaction aborts (which is usually immediately when it is resumed),
and the regular registers are checked against the recorded values,
because the abort should have reverted the registers to these values.
Like for the EBB registers, target_store_registers will ignore the
checkpointed registers when called with -1 as the regno
argument (store all registers in one go).
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-tdesc.h (tdesc_powerpc_isa207_htm_vsx32l)
(tdesc_powerpc_isa207_htm_vsx64l): Declare.
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_TM_SPRREGSET)
(PPC32_LINUX_SIZEOF_CGPRREGSET, PPC64_LINUX_SIZEOF_CGPRREGSET)
(PPC_LINUX_SIZEOF_CFPRREGSET, PPC_LINUX_SIZEOF_CVMXREGSET)
(PPC_LINUX_SIZEOF_CVSXREGSET, PPC_LINUX_SIZEOF_CPPRREGSET)
(PPC_LINUX_SIZEOF_CDSCRREGSET, PPC_LINUX_SIZEOF_CTARREGSET):
Define.
(struct ppc_linux_features) <htm>: New field.
(ppc_linux_no_features): Add initializer for htm field.
* arch/ppc-linux-common.c (ppc_linux_match_description): Return
new tdescs.
* nat/ppc-linux.h (PPC_FEATURE2_HTM, NT_PPC_TM_CGPR)
(NT_PPC_TM_CFPR, NT_PPC_TM_CVMX, NT_PPC_TM_CVSX)
(NT_PPC_TM_SPR, NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR):
Define if not already defined.
* features/Makefile (WHICH): Add rs6000/powerpc-isa207-htm-vsx32l
and rs6000/powerpc-isa207-htm-vsx64l.
(XMLTOC): Add rs6000/powerpc-isa207-htm-vsx32l.xml and
rs6000/powerpc-isa207-htm-vsx64l.xml.
* features/rs6000/power-htm-spr.xml: New file.
* features/rs6000/power-htm-core.xml: New file.
* features/rs6000/power64-htm-core.xml: New file.
* features/rs6000/power-htm-fpu.xml: New file.
* features/rs6000/power-htm-altivec.xml: New file.
* features/rs6000/power-htm-vsx.xml: New file.
* features/rs6000/power-htm-ppr.xml: New file.
* features/rs6000/power-htm-dscr.xml: New file.
* features/rs6000/power-htm-tar.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx32l.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx64l.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx32l.c: Generate.
* features/rs6000/powerpc-isa207-htm-vsx64l.c: Generate.
* regformats/rs6000/powerpc-isa207-htm-vsx32l.dat: Generate.
* regformats/rs6000/powerpc-isa207-htm-vsx64l.dat: Generate.
* ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call
fetch_regset with HTM regsets.
(store_register, store_ppc_registers): Call store_regset with HTM
regsets.
(ppc_linux_nat_target::read_description): Set htm field in the
features struct if needed.
* ppc-linux-tdep.c: Include
features/rs6000/powerpc-isa207-htm-vsx32l.c and
features/rs6000/powerpc-isa207-htm-vsx64l.c.
(ppc32_regmap_tm_spr, ppc32_regmap_cgpr, ppc64_le_regmap_cgpr)
(ppc64_be_regmap_cgpr, ppc32_regmap_cfpr, ppc32_le_regmap_cvmx)
(ppc32_be_regmap_cvmx, ppc32_regmap_cvsx, ppc32_regmap_cppr)
(ppc32_regmap_cdscr, ppc32_regmap_ctar): New globals.
(ppc32_linux_tm_sprregset, ppc32_linux_cgprregset)
(ppc64_be_linux_cgprregset, ppc64_le_linux_cgprregset)
(ppc32_linux_cfprregset, ppc32_le_linux_cvmxregset)
(ppc32_be_linux_cvmxregset, ppc32_linux_cvsxregset)
(ppc32_linux_cpprregset, ppc32_linux_cdscrregset)
(ppc32_linux_ctarregset): New globals.
(ppc_linux_cgprregset, ppc_linux_cvmxregset): New functions.
(ppc_linux_collect_core_cpgrregset): New function.
(ppc_linux_iterate_over_regset_sections): Call back with the htm
regsets.
(ppc_linux_core_read_description): Check if the tm spr section is
present and set htm in the features struct.
(_initialize_ppc_linux_tdep): Call
initialize_tdesc_powerpc_isa207_htm_vsx32l and
initialize_tdesc_powerpc_isa207_htm_vsx64l.
* ppc-linux-tdep.h (ppc_linux_cgprregset, ppc_linux_cvmxregset):
Declare.
(ppc32_linux_tm_sprregset, ppc32_linux_cfprregset)
(ppc32_linux_cvsxregset, ppc32_linux_cpprregset)
(ppc32_linux_cdscrregset, ppc32_linux_ctarregset): Declare.
* ppc-tdep.h (struct gdbarch_tdep) <have_htm_spr, have_htm_core>:
New fields.
<have_htm_fpu, have_htm_altivec, have_htm_vsx>:
Likewise.
<ppc_cppr_regnum, ppc_cdscr_regnum, ppc_ctar_regnum>: Likewise.
<ppc_cdl0_regnum, ppc_cvsr0_regnum, ppc_cefpr0_regnum>: Likewise.
(enum) <PPC_TFHAR_REGNUM, PPC_TEXASR_REGNUM, PPC_TFIAR_REGNUM>:
New enum fields.
<PPC_CR0_REGNUM, PPC_CCR_REGNUM, PPC_CXER_REGNUM>: Likewise.
<PPC_CLR_REGNUM, PPC_CCTR_REGNUM, PPC_CF0_REGNUM>: Likewise.
<PPC_CFPSCR_REGNUM, PPC_CVR0_REGNUM, PPC_CVSCR_REGNUM>: Likewise.
<PPC_CVRSAVE_REGNUM, PPC_CVSR0_UPPER_REGNUM>: Likewise.
<PPC_CPPR_REGNUM, PPC_CDSCR_REGNUM>: Likewise.
<PPC_CTAR_REGNUM>: Likewise.
(PPC_IS_TMSPR_REGNUM, PPC_IS_CKPTGP_REGNUM, PPC_IS_CKPTFP_REGNUM)
(PPC_IS_CKPTVMX_REGNUM, PPC_IS_CKPTVSX_REGNUM): Define.
* rs6000-tdep.c (IS_CDFP_PSEUDOREG, IS_CVSX_PSEUDOREG)
(IS_CEFP_PSEUDOREG): Define.
(rs6000_register_name): Hide the upper halves of checkpointed VSX
registers. Return names for the checkpointed DFP, VSX, and EFP
pseudo registers.
(rs6000_pseudo_register_type): Remove initial assert and raise an
internal error in the else clause instead. Return types for the
checkpointed DFP, VSX, and EFP pseudo registers.
(dfp_pseudo_register_read, dfp_pseudo_register_write): Handle
checkpointed DFP pseudo registers.
(vsx_pseudo_register_read, vsx_pseudo_register_write): Handle
checkpointed VSX pseudo registers.
(efp_pseudo_register_read, efp_pseudo_register_write): Rename
from efpr_pseudo_register_read and
efpr_pseudo_register_write. Handle checkpointed EFP pseudo
registers.
(rs6000_pseudo_register_read, rs6000_pseudo_register_write):
Handle checkpointed DFP, VSX, and EFP registers.
(dfp_ax_pseudo_register_collect, vsx_ax_pseudo_register_collect)
(efp_ax_pseudo_register_collect): New functions.
(rs6000_ax_pseudo_register_collect): Move DFP, VSX and EFP pseudo
register logic to new functions. Handle checkpointed DFP, VSX,
and EFP pseudo registers.
(rs6000_gdbarch_init): Look for and validate the htm features.
Include checkpointed DFP, VSX and EFP pseudo-registers.
* NEWS: Mention access to PPR, DSCR, TAR, EBB/PMU registers and
HTM registers.
gdb/gdbserver/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Add
powerpc-isa207-htm-vsx32l-ipa.o and
powerpc-isa207-htm-vsx64l-ipa.o.
(powerpc*-*-linux*): Add powerpc-isa207-htm-vsx32l.o and
powerpc-isa207-htm-vsx64l.o to srv_regobj. Add
rs6000/power-htm-spr.xml, rs6000/power-htm-core.xml,
rs6000/power64-htm-core.xml, rs6000/power-htm-fpu.xml,
rs6000/power-htm-altivec.xml, rs6000/power-htm-vsx.xml,
rs6000/power-htm-ppr.xml, rs6000/power-htm-dscr.xml,
rs6000/power-htm-tar.xml, rs6000/powerpc-isa207-htm-vsx32l.xml,
and rs6000/powerpc-isa207-htm-vsx64l.xml to srv_xmlfiles.
* linux-ppc-tdesc-init.h (enum ppc_linux_tdesc)
<PPC_TDESC_ISA207_HTM_VSX>: New enum value.
(init_registers_powerpc_isa207_htm_vsx32l)
(init_registers_powerpc_isa207_htm_vsx64l): Declare.
* linux-ppc-low.c (ppc_fill_tm_sprregset, ppc_store_tm_sprregset)
(ppc_store_tm_cgprregset, ppc_store_tm_cfprregset)
(ppc_store_tm_cvrregset, ppc_store_tm_cvsxregset)
(ppc_store_tm_cpprregset, ppc_store_tm_cdscrregset)
(ppc_store_tm_ctarregset): New functions.
(ppc_regsets): Add entries for HTM regsets.
(ppc_arch_setup): Set htm in features struct when needed. Set
sizes for the HTM regsets.
(ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA207_HTM_VSX.
(initialize_low_arch): Call
init_registers_powerpc_isa207_htm_vsx32l and
init_registers_powerpc_isa207_htm_vsx64l.
* linux-ppc-ipa.c (get_ipa_tdesc): Handle
PPC_TDESC_ISA207_HTM_VSX.
(initialize_low_tracepoint): Call
init_registers_powerpc_isa207_htm_vsx32l and
init_registers_powerpc_isa207_htm_vsx64l.
gdb/testsuite/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/powerpc-htm-regs.c: New file.
* gdb.arch/powerpc-htm-regs.exp: New file.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new features
"org.gnu.gdb.power.htm.spr", "org.gnu.gdb.power.htm.core",
"org.gnu.gdb.power.htm.fpu", "org.gnu.gdb.power.htm.altivec",
"org.gnu.gdb.power.htm.vsx", "org.gnu.gdb.power.htm.ppr",
"org.gnu.gdb.power.htm.dscr", "org.gnu.gdb.power.htm.tar".
2018-10-26 20:37:55 +08:00
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/* Defined in auto-generated file powerpc-isa207-htm-vsx32l.c. */
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void init_registers_powerpc_isa207_htm_vsx32l (void);
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2016-03-10 08:38:18 +08:00
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/* Defined in auto-generated file powerpc-e500l.c. */
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void init_registers_powerpc_e500l (void);
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#endif
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#if defined __powerpc64__
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/* Defined in auto-generated file powerpc-64l.c. */
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void init_registers_powerpc_64l (void);
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/* Defined in auto-generated file powerpc-altivec64l.c. */
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void init_registers_powerpc_altivec64l (void);
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/* Defined in auto-generated file powerpc-vsx64l.c. */
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void init_registers_powerpc_vsx64l (void);
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/* Defined in auto-generated file powerpc-isa205-64l.c. */
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void init_registers_powerpc_isa205_64l (void);
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/* Defined in auto-generated file powerpc-isa205-altivec64l.c. */
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void init_registers_powerpc_isa205_altivec64l (void);
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/* Defined in auto-generated file powerpc-isa205-vsx64l.c. */
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void init_registers_powerpc_isa205_vsx64l (void);
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[PowerPC] Add support for PPR and DSCR
This patch adds gdb support for the Program Priorty Register and the
Data Stream Control Register, for the powerpc linux native and core
file targets, and for the powerpc linux server stub.
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-tdesc.h (tdesc_powerpc_isa205_ppr_dscr_vsx32l)
(tdesc_powerpc_isa205_ppr_dscr_vsx64l): Declare.
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_PPRREGSET)
(PPC_LINUX_SIZEOF_DSCRREGSET): Define.
(struct ppc_linux_features) <ppr_dscr>: New field.
(ppc_linux_no_features): Add initializer for ppr_dscr field.
* arch/ppc-linux-common.c (ppc_linux_match_description): Return
new tdescs.
* nat/ppc-linux.h (PPC_FEATURE2_DSCR, NT_PPC_PPR, NT_PPC_DSCR):
Define if not already defined.
* features/Makefile (WHICH): Add
rs6000/powerpc-isa205-ppr-dscr-vsx32l and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.
(XMLTOC): Add rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml.
* features/rs6000/power-dscr.xml: New file.
* features/rs6000/power-ppr.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml: New file.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c: Generate.
* features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c: Generate.
* regformats/rs6000/powerpc-isa205-ppr-dscr-vsx32l.dat: Generate.
* regformats/rs6000/powerpc-isa205-ppr-dscr-vsx64l.dat: Generate.
* ppc-linux-nat.c: Include <sys/uio.h>.
(fetch_regset, store_regset, check_regset): New functions.
(fetch_register, fetch_ppc_registers): Call fetch_regset with
DSCR and PPR regsets.
(store_register, store_ppc_registers): Call store_regset with
DSCR and PPR regsets.
(ppc_linux_get_hwcap2): New function.
(ppc_linux_nat_target::read_description): Call
ppc_linux_get_hwcap2 and check_regset, set ppr_dscr field in the
features struct if needed.
* ppc-linux-tdep.c: Include
features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c and
features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c.
(ppc32_regmap_ppr, ppc32_regmap_dscr, ppc32_linux_pprregset)
(ppc32_linux_dscrregset): New globals.
(ppc_linux_iterate_over_regset_sections): Call back with the ppr
and dscr regsets.
(ppc_linux_core_read_description): Check if the ppr and dscr
sections are present and set ppr_dscr in the features struct.
(_initialize_ppc_linux_tdep): Call
initialize_tdesc_powerpc_isa205_ppr_dscr_vsx32l and
initialize_tdesc_powerpc_isa205_ppr_dscr_vsx64l.
* ppc-linux-tdep.h (ppc32_linux_pprregset)
(ppc32_linux_dscrregset): Declare.
* ppc-tdep.h (struct gdbarch_tdep) <ppc_ppr_regnum>: New field.
<ppc_dscr_regnum>: New field.
(enum) <PPC_PPR_REGNUM, PPC_DSCR_REGNUM>: New enum values.
* rs6000-tdep.c (rs6000_gdbarch_init): Look for and validate ppr
and dscr features.
(ppc_process_record_op31): Record changes to PPR and DSCR.
gdb/gdbserver/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Add
powerpc-isa205-ppr-dscr-vsx32l-ipa.o and
powerpc-isa205-ppr-dscr-vsx64l-ipa.o.
(powerpc*-*-linux*): Add powerpc-isa205-ppr-dscr-vsx32l.o and
powerpc-isa205-ppr-dscr-vsx64l.o to srv_regobj, add
rs6000/power-dscr.xml, rs6000/power-ppr.xml,
rs6000/powerpc-isa205-ppr-dscr-vsx32l.xml and
rs6000/powerpc-isa205-ppr-dscr-vsx64l.xml to srv_xmlfiles.
* linux-ppc-tdesc-init.h (enum ppc_linux_tdesc)
<PPC_TDESC_ISA205_PPR_DSCR_VSX>: New enum value.
(init_registers_powerpc_isa205_ppr_dscr_vsx32l)
(init_registers_powerpc_isa205_ppr_dscr_vsx64l): Declare.
* linux-ppc-low.c: Include "elf/common.h" and <sys/uio.h>.
(ppc_hwcap): Add comment.
(ppc_hwcap2): New global.
(ppc_check_regset, ppc_fill_pprregset, ppc_store_pprregset)
(ppc_fill_dscrregset, ppc_store_dscrregset): New functions.
(ppc_regsets): Add entries for the DSCR and PPR regsets.
(ppc_arch_setup): Get AT_HWCAP2. Set ppr_dscr in features struct
when needed. Set sizes for the the DSCR and PPR regsets.
(ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA205_PPR_DSCR_VSX.
(initialize_low_arch): Call
init_registers_powerpc_isa205_ppr_dscr_vsx32l and
init_registers_powerpc_isa205_ppr_dscr_vsx64l.
* linux-ppc-ipa.c (get_ipa_tdesc): Handle
PPC_TDESC_ISA205_PPR_DSCR_VSX.
(initialize_low_tracepoint): Call
init_registers_powerpc_isa205_ppr_dscr_vsx32l and
init_registers_powerpc_isa205_ppr_dscr_vsx64l.
gdb/testsuite/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/powerpc-ppr-dscr.c: New file.
* gdb.arch/powerpc-ppr-dscr.exp: New file.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new features
"org.gnu.gdb.power.ppr" and "org.gnu.gdb.power.dscr".
2018-10-26 20:37:54 +08:00
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/* Defined in auto-generated file powerpc-isa205-ppr-dscr-vsx64l.c. */
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void init_registers_powerpc_isa205_ppr_dscr_vsx64l (void);
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2018-10-26 20:37:54 +08:00
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/* Defined in auto-generated file powerpc-isa207-vsx64l.c. */
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void init_registers_powerpc_isa207_vsx64l (void);
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[PowerPC] Add support for HTM registers
This patch adds support for Hardware Transactional Memory registers
for the powerpc linux native and core file targets, and for the
pwoerpc linux server stub.
These registers include both the HTM special-purpose registers (TFHAR,
TEXASR and TFIAR) as well as the set of registers that are
checkpointed (saved) when a transaction is initiated, which the
processor restores in the event of a transaction failure.
The set of checkpointed general-purpose registers is returned by the
linux kernel in the same format as the regular general-purpose
registers, defined in struct pt_regs. However, the architecture
specifies that only some of the registers present in pt_regs are
checkpointed (GPRs 0-31, CR, XER, LR and CTR). The kernel fills the
slots for MSR and NIP with other info. The other fields usually don't
have meaningful values. GDB doesn't define registers that are not
checkpointed in the architecture, but when generating a core file, GDB
fills the slot for the checkpointed MSR with the regular MSR. These
are usually similar, although some bits might be different, and in
some cases the checkpointed MSR will have a value of 0 in a
kernel-generated core-file. The checkpointed NIP is filled with TFHAR
by GDB in the core-file, which is what the kernel does. The other
fields are set to 0 by GDB.
Core files generated by the kernel have a note section for
checkpointed GPRs with the same size for both 32-bit and 64-bit
threads, and the values for the registers of a 32-bit thread are
squeezed in the first half, with no useful data in the second half.
GDB generates a smaller note section for 32-bit threads, but can read
both sizes.
The checkpointed XER is required to be 32-bit in the target
description documentation, even though the more recent ISAs define it
as 64-bit wide, since the high-order 32-bits are reserved, and because
in Linux there is no way to get a 64-bit checkpointed XER for 32-bit
threads. If this changes in the future, the target description
feature requirement can be relaxed to allow for a 64-bit checkpointed
XER.
Access to the checkpointed CR (condition register) can be confusing.
The architecture only specifies that CR fields 1 to 7 (the 24 least
significant bits) are checkpointed, but the kernel provides all 8
fields (32 bits). The value of field 0 is not masked by ptrace, so it
will sometimes show the result of some kernel operation, probably
treclaim., which sets this field.
The checkpointed registers are marked not to be saved and restored.
Inferior function calls during an active transaction don't work well,
and it's unclear what should be done in this case. TEXASR and TFIAR
can be altered asynchronously, during transaction failure recording,
so they are also not saved and restored. For consistency neither is
TFHAR.
Record and replay also doesn't work well when transactions are
involved. This patch doesn't address this, so the values of the HTM
SPRs will sometimes be innacurate when the record/relay target is
enabled. For instance, executing a "tbegin." alters TFHAR and TEXASR,
but these changes are not currently recorded.
Because the checkpointed registers are only available when a
transaction is active (or suspended), ptrace can return ENODATA when
gdb tries to read these registers and the inferior is not in a
transactional state. The registers are set to the unavailable state
when this happens. When gbd tries to write to one of these registers,
and it is unavailable, an error is raised.
The "fill" functions for checkpointed register sets in the server stub
are not implemented for the same reason as for the EBB register set,
since ptrace can also return ENODATA for checkpointed regsets. The
same issues with 'G' packets apply here.
Just like for the EBB registers, tracepoints will not mark the
checkpointed registers as unavailable if the inferior was not in a
transaction, so their content will also show 0 instead of
<unavailable> when inspecting trace data.
The new tests record the values of the regular registers before
stepping the inferior through a "tbegin." instruction to start a
transaction, then the checkpointed registers are checked against the
recorded pre-transactional values. New values are written to the
checkpointed registers and recorded, the inferior continues until the
transaction aborts (which is usually immediately when it is resumed),
and the regular registers are checked against the recorded values,
because the abort should have reverted the registers to these values.
Like for the EBB registers, target_store_registers will ignore the
checkpointed registers when called with -1 as the regno
argument (store all registers in one go).
gdb/ChangeLog:
2018-10-26 Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com>
Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* arch/ppc-linux-tdesc.h (tdesc_powerpc_isa207_htm_vsx32l)
(tdesc_powerpc_isa207_htm_vsx64l): Declare.
* arch/ppc-linux-common.h (PPC_LINUX_SIZEOF_TM_SPRREGSET)
(PPC32_LINUX_SIZEOF_CGPRREGSET, PPC64_LINUX_SIZEOF_CGPRREGSET)
(PPC_LINUX_SIZEOF_CFPRREGSET, PPC_LINUX_SIZEOF_CVMXREGSET)
(PPC_LINUX_SIZEOF_CVSXREGSET, PPC_LINUX_SIZEOF_CPPRREGSET)
(PPC_LINUX_SIZEOF_CDSCRREGSET, PPC_LINUX_SIZEOF_CTARREGSET):
Define.
(struct ppc_linux_features) <htm>: New field.
(ppc_linux_no_features): Add initializer for htm field.
* arch/ppc-linux-common.c (ppc_linux_match_description): Return
new tdescs.
* nat/ppc-linux.h (PPC_FEATURE2_HTM, NT_PPC_TM_CGPR)
(NT_PPC_TM_CFPR, NT_PPC_TM_CVMX, NT_PPC_TM_CVSX)
(NT_PPC_TM_SPR, NT_PPC_TM_CTAR, NT_PPC_TM_CPPR, NT_PPC_TM_CDSCR):
Define if not already defined.
* features/Makefile (WHICH): Add rs6000/powerpc-isa207-htm-vsx32l
and rs6000/powerpc-isa207-htm-vsx64l.
(XMLTOC): Add rs6000/powerpc-isa207-htm-vsx32l.xml and
rs6000/powerpc-isa207-htm-vsx64l.xml.
* features/rs6000/power-htm-spr.xml: New file.
* features/rs6000/power-htm-core.xml: New file.
* features/rs6000/power64-htm-core.xml: New file.
* features/rs6000/power-htm-fpu.xml: New file.
* features/rs6000/power-htm-altivec.xml: New file.
* features/rs6000/power-htm-vsx.xml: New file.
* features/rs6000/power-htm-ppr.xml: New file.
* features/rs6000/power-htm-dscr.xml: New file.
* features/rs6000/power-htm-tar.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx32l.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx64l.xml: New file.
* features/rs6000/powerpc-isa207-htm-vsx32l.c: Generate.
* features/rs6000/powerpc-isa207-htm-vsx64l.c: Generate.
* regformats/rs6000/powerpc-isa207-htm-vsx32l.dat: Generate.
* regformats/rs6000/powerpc-isa207-htm-vsx64l.dat: Generate.
* ppc-linux-nat.c (fetch_register, fetch_ppc_registers): Call
fetch_regset with HTM regsets.
(store_register, store_ppc_registers): Call store_regset with HTM
regsets.
(ppc_linux_nat_target::read_description): Set htm field in the
features struct if needed.
* ppc-linux-tdep.c: Include
features/rs6000/powerpc-isa207-htm-vsx32l.c and
features/rs6000/powerpc-isa207-htm-vsx64l.c.
(ppc32_regmap_tm_spr, ppc32_regmap_cgpr, ppc64_le_regmap_cgpr)
(ppc64_be_regmap_cgpr, ppc32_regmap_cfpr, ppc32_le_regmap_cvmx)
(ppc32_be_regmap_cvmx, ppc32_regmap_cvsx, ppc32_regmap_cppr)
(ppc32_regmap_cdscr, ppc32_regmap_ctar): New globals.
(ppc32_linux_tm_sprregset, ppc32_linux_cgprregset)
(ppc64_be_linux_cgprregset, ppc64_le_linux_cgprregset)
(ppc32_linux_cfprregset, ppc32_le_linux_cvmxregset)
(ppc32_be_linux_cvmxregset, ppc32_linux_cvsxregset)
(ppc32_linux_cpprregset, ppc32_linux_cdscrregset)
(ppc32_linux_ctarregset): New globals.
(ppc_linux_cgprregset, ppc_linux_cvmxregset): New functions.
(ppc_linux_collect_core_cpgrregset): New function.
(ppc_linux_iterate_over_regset_sections): Call back with the htm
regsets.
(ppc_linux_core_read_description): Check if the tm spr section is
present and set htm in the features struct.
(_initialize_ppc_linux_tdep): Call
initialize_tdesc_powerpc_isa207_htm_vsx32l and
initialize_tdesc_powerpc_isa207_htm_vsx64l.
* ppc-linux-tdep.h (ppc_linux_cgprregset, ppc_linux_cvmxregset):
Declare.
(ppc32_linux_tm_sprregset, ppc32_linux_cfprregset)
(ppc32_linux_cvsxregset, ppc32_linux_cpprregset)
(ppc32_linux_cdscrregset, ppc32_linux_ctarregset): Declare.
* ppc-tdep.h (struct gdbarch_tdep) <have_htm_spr, have_htm_core>:
New fields.
<have_htm_fpu, have_htm_altivec, have_htm_vsx>:
Likewise.
<ppc_cppr_regnum, ppc_cdscr_regnum, ppc_ctar_regnum>: Likewise.
<ppc_cdl0_regnum, ppc_cvsr0_regnum, ppc_cefpr0_regnum>: Likewise.
(enum) <PPC_TFHAR_REGNUM, PPC_TEXASR_REGNUM, PPC_TFIAR_REGNUM>:
New enum fields.
<PPC_CR0_REGNUM, PPC_CCR_REGNUM, PPC_CXER_REGNUM>: Likewise.
<PPC_CLR_REGNUM, PPC_CCTR_REGNUM, PPC_CF0_REGNUM>: Likewise.
<PPC_CFPSCR_REGNUM, PPC_CVR0_REGNUM, PPC_CVSCR_REGNUM>: Likewise.
<PPC_CVRSAVE_REGNUM, PPC_CVSR0_UPPER_REGNUM>: Likewise.
<PPC_CPPR_REGNUM, PPC_CDSCR_REGNUM>: Likewise.
<PPC_CTAR_REGNUM>: Likewise.
(PPC_IS_TMSPR_REGNUM, PPC_IS_CKPTGP_REGNUM, PPC_IS_CKPTFP_REGNUM)
(PPC_IS_CKPTVMX_REGNUM, PPC_IS_CKPTVSX_REGNUM): Define.
* rs6000-tdep.c (IS_CDFP_PSEUDOREG, IS_CVSX_PSEUDOREG)
(IS_CEFP_PSEUDOREG): Define.
(rs6000_register_name): Hide the upper halves of checkpointed VSX
registers. Return names for the checkpointed DFP, VSX, and EFP
pseudo registers.
(rs6000_pseudo_register_type): Remove initial assert and raise an
internal error in the else clause instead. Return types for the
checkpointed DFP, VSX, and EFP pseudo registers.
(dfp_pseudo_register_read, dfp_pseudo_register_write): Handle
checkpointed DFP pseudo registers.
(vsx_pseudo_register_read, vsx_pseudo_register_write): Handle
checkpointed VSX pseudo registers.
(efp_pseudo_register_read, efp_pseudo_register_write): Rename
from efpr_pseudo_register_read and
efpr_pseudo_register_write. Handle checkpointed EFP pseudo
registers.
(rs6000_pseudo_register_read, rs6000_pseudo_register_write):
Handle checkpointed DFP, VSX, and EFP registers.
(dfp_ax_pseudo_register_collect, vsx_ax_pseudo_register_collect)
(efp_ax_pseudo_register_collect): New functions.
(rs6000_ax_pseudo_register_collect): Move DFP, VSX and EFP pseudo
register logic to new functions. Handle checkpointed DFP, VSX,
and EFP pseudo registers.
(rs6000_gdbarch_init): Look for and validate the htm features.
Include checkpointed DFP, VSX and EFP pseudo-registers.
* NEWS: Mention access to PPR, DSCR, TAR, EBB/PMU registers and
HTM registers.
gdb/gdbserver/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* configure.srv (ipa_ppc_linux_regobj): Add
powerpc-isa207-htm-vsx32l-ipa.o and
powerpc-isa207-htm-vsx64l-ipa.o.
(powerpc*-*-linux*): Add powerpc-isa207-htm-vsx32l.o and
powerpc-isa207-htm-vsx64l.o to srv_regobj. Add
rs6000/power-htm-spr.xml, rs6000/power-htm-core.xml,
rs6000/power64-htm-core.xml, rs6000/power-htm-fpu.xml,
rs6000/power-htm-altivec.xml, rs6000/power-htm-vsx.xml,
rs6000/power-htm-ppr.xml, rs6000/power-htm-dscr.xml,
rs6000/power-htm-tar.xml, rs6000/powerpc-isa207-htm-vsx32l.xml,
and rs6000/powerpc-isa207-htm-vsx64l.xml to srv_xmlfiles.
* linux-ppc-tdesc-init.h (enum ppc_linux_tdesc)
<PPC_TDESC_ISA207_HTM_VSX>: New enum value.
(init_registers_powerpc_isa207_htm_vsx32l)
(init_registers_powerpc_isa207_htm_vsx64l): Declare.
* linux-ppc-low.c (ppc_fill_tm_sprregset, ppc_store_tm_sprregset)
(ppc_store_tm_cgprregset, ppc_store_tm_cfprregset)
(ppc_store_tm_cvrregset, ppc_store_tm_cvsxregset)
(ppc_store_tm_cpprregset, ppc_store_tm_cdscrregset)
(ppc_store_tm_ctarregset): New functions.
(ppc_regsets): Add entries for HTM regsets.
(ppc_arch_setup): Set htm in features struct when needed. Set
sizes for the HTM regsets.
(ppc_get_ipa_tdesc_idx): Return PPC_TDESC_ISA207_HTM_VSX.
(initialize_low_arch): Call
init_registers_powerpc_isa207_htm_vsx32l and
init_registers_powerpc_isa207_htm_vsx64l.
* linux-ppc-ipa.c (get_ipa_tdesc): Handle
PPC_TDESC_ISA207_HTM_VSX.
(initialize_low_tracepoint): Call
init_registers_powerpc_isa207_htm_vsx32l and
init_registers_powerpc_isa207_htm_vsx64l.
gdb/testsuite/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/powerpc-htm-regs.c: New file.
* gdb.arch/powerpc-htm-regs.exp: New file.
gdb/doc/ChangeLog:
2018-10-26 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Describe new features
"org.gnu.gdb.power.htm.spr", "org.gnu.gdb.power.htm.core",
"org.gnu.gdb.power.htm.fpu", "org.gnu.gdb.power.htm.altivec",
"org.gnu.gdb.power.htm.vsx", "org.gnu.gdb.power.htm.ppr",
"org.gnu.gdb.power.htm.dscr", "org.gnu.gdb.power.htm.tar".
2018-10-26 20:37:55 +08:00
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/* Defined in auto-generated file powerpc-isa207-htm-vsx64l.c. */
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void init_registers_powerpc_isa207_htm_vsx64l (void);
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2016-03-10 08:38:18 +08:00
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#endif
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2019-01-28 03:51:36 +08:00
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#endif /* GDBSERVER_LINUX_PPC_TDESC_INIT_H */
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