binutils-gdb/gas/doc/c-msp430.texi

364 lines
9.8 KiB
Plaintext
Raw Normal View History

* archures.c: Add some more MSP430 machine numbers. * config.bfd (msp430): Define targ_selvecs. * configure.in: Add bfd_elf32_msp430_ti_vec. * cpu-msp430.c: Add some more MSP430 machine numbers. * elf32-msp430.c Add support for MSP430X relocations. Add support for TI compiler generated relocations. Add support for sym_diff relocations. Add support for relaxing out of range short branches into long branches. Add support for MSP430 attribute section. * reloc.c: Add MSP430X relocations. * targets.c: Add bfd_elf32_msp430_ti_vec. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * readelf.c: Add support for MSP430X architecture. * readelf.exp: Expect -wi test to fail for the MSP430. * config/tc-msp430.c: Add support for the MSP430X architecture. Add code to insert a NOP instruction after any instruction that might change the interrupt state. Add support for the LARGE memory model. Add code to initialise the .MSP430.attributes section. * config/tc-msp430.h: Add support for the MSP430X architecture. * doc/c-msp430.texi: Document the new -mL and -mN command line options. * NEWS: Mention support for the MSP430X architecture. * gas/all/gas.exp: Skip the DIFF1 test for the MSP430. Expect the FORWARD test to pass for the MSP430. Skip the REDEF tests for the MSP430. Expect the 930509A test to fail for the MSP430. * gas/all/sleb128-4.d: Skip for the MSP430. * gas/elf/elf.exp: Set target_machine to msp430 for the MSP430. Skip the EHOPT0 test for the MSP430. Skip the REDEF and EQU-RELOC tests for the MSP430. * gas/elf/section2.e-msp430: New file. * gas/lns/lns-big-delta.d: Remove expectation of 20-bit addresses. * gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430. * gas/msp430/msp430x.s: New test. * gas/msp430/msp430x.d: Expected disassembly. * gas/msp430/msp430.exp: Run new test. * gas/msp430/opcode.d: Update expected disassembly. * msp430.h: Add MSP430X relocs. Add some more MSP430 machine numbers. Add values used by .MSP430.attributes section. * msp430.h: Add patterns for MSP430X instructions. * Makefile.am: Add emsp430X.c * Makefine.in: Regenerate. * configure.tgt (msp430): Add msp430X emulation. * ldmain.c (multiple_definition): Only disable relaxation if it was enabled by the user. * ldmain.h (RELAXATION_ENABLED_BY_USER): New macro. * emulparams/msp430all.sh: Add support for MSP430X. * emultempl/generic.em: (before_parse): Enable relaxation for the MSP430. * scripttempl/msp430.sc: Reorganize sections. Add .rodata section. * scripttempl/msp430_3.sc: Likewise. * NEWS: Mention support for MSP430X. * ld-elf/flags1.d: Expect this test to pass on the MSP430. * ld-elf/init-fini-arrays.d: Expect this test to fail on the MSP430. * ld-elf/merge.d: Expect this test to pass on the MSP430. * ld-elf/sec64k.exp: Skip these tests for the MSP430. * ld-gc/pr13683.d: Expect this test to fail on the MSP430. * ld-srec/srec.exp: Expect these tests to fail on the MSP430. * ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to fail on the MSP430. * msp430-dis.c: Add support for MSP430X instructions.
2013-05-03 05:06:15 +08:00
@c Copyright 2002-2013 Free Software Foundation, Inc.
2002-12-31 03:25:13 +08:00
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@ifset GENERIC
@page
@node MSP430-Dependent
@chapter MSP 430 Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter MSP 430 Dependent Features
@end ifclear
@cindex MSP 430 support
@cindex 430 support
@menu
* MSP430 Options:: Options
* MSP430 Syntax:: Syntax
* MSP430 Floating Point:: Floating Point
* MSP430 Directives:: MSP 430 Machine Directives
* MSP430 Opcodes:: Opcodes
* MSP430 Profiling Capability:: Profiling Capability
2002-12-31 03:25:13 +08:00
@end menu
@node MSP430 Options
@section Options
@cindex MSP 430 options (none)
@cindex options for MSP430 (none)
@table @code
@item -mmcu
selects the mpu arch. If the architecture is 430Xv2 then this also
enables NOP generation unless the @option{-mN} is also specified.
@item -mcpu
selects the cpu architecture. If the architecture is 430Xv2 then this
also enables NOP generation unless the @option{-mN} is also
specified.
2013-01-11 03:51:55 +08:00
@item -mP
enables polymorph instructions handler.
2013-01-11 03:51:55 +08:00
@item -mQ
enables relaxation at assembly time. DANGEROUS!
* archures.c: Add some more MSP430 machine numbers. * config.bfd (msp430): Define targ_selvecs. * configure.in: Add bfd_elf32_msp430_ti_vec. * cpu-msp430.c: Add some more MSP430 machine numbers. * elf32-msp430.c Add support for MSP430X relocations. Add support for TI compiler generated relocations. Add support for sym_diff relocations. Add support for relaxing out of range short branches into long branches. Add support for MSP430 attribute section. * reloc.c: Add MSP430X relocations. * targets.c: Add bfd_elf32_msp430_ti_vec. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * readelf.c: Add support for MSP430X architecture. * readelf.exp: Expect -wi test to fail for the MSP430. * config/tc-msp430.c: Add support for the MSP430X architecture. Add code to insert a NOP instruction after any instruction that might change the interrupt state. Add support for the LARGE memory model. Add code to initialise the .MSP430.attributes section. * config/tc-msp430.h: Add support for the MSP430X architecture. * doc/c-msp430.texi: Document the new -mL and -mN command line options. * NEWS: Mention support for the MSP430X architecture. * gas/all/gas.exp: Skip the DIFF1 test for the MSP430. Expect the FORWARD test to pass for the MSP430. Skip the REDEF tests for the MSP430. Expect the 930509A test to fail for the MSP430. * gas/all/sleb128-4.d: Skip for the MSP430. * gas/elf/elf.exp: Set target_machine to msp430 for the MSP430. Skip the EHOPT0 test for the MSP430. Skip the REDEF and EQU-RELOC tests for the MSP430. * gas/elf/section2.e-msp430: New file. * gas/lns/lns-big-delta.d: Remove expectation of 20-bit addresses. * gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430. * gas/msp430/msp430x.s: New test. * gas/msp430/msp430x.d: Expected disassembly. * gas/msp430/msp430.exp: Run new test. * gas/msp430/opcode.d: Update expected disassembly. * msp430.h: Add MSP430X relocs. Add some more MSP430 machine numbers. Add values used by .MSP430.attributes section. * msp430.h: Add patterns for MSP430X instructions. * Makefile.am: Add emsp430X.c * Makefine.in: Regenerate. * configure.tgt (msp430): Add msp430X emulation. * ldmain.c (multiple_definition): Only disable relaxation if it was enabled by the user. * ldmain.h (RELAXATION_ENABLED_BY_USER): New macro. * emulparams/msp430all.sh: Add support for MSP430X. * emultempl/generic.em: (before_parse): Enable relaxation for the MSP430. * scripttempl/msp430.sc: Reorganize sections. Add .rodata section. * scripttempl/msp430_3.sc: Likewise. * NEWS: Mention support for MSP430X. * ld-elf/flags1.d: Expect this test to pass on the MSP430. * ld-elf/init-fini-arrays.d: Expect this test to fail on the MSP430. * ld-elf/merge.d: Expect this test to pass on the MSP430. * ld-elf/sec64k.exp: Skip these tests for the MSP430. * ld-gc/pr13683.d: Expect this test to fail on the MSP430. * ld-srec/srec.exp: Expect these tests to fail on the MSP430. * ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to fail on the MSP430. * msp430-dis.c: Add support for MSP430X instructions.
2013-05-03 05:06:15 +08:00
@item -ml
indicates that the input uses the large code model.
@item -mN
disables the generation of a NOP instruction following any instruction
that might change the interrupts enabled/disabled state. For the
430Xv2 architecture the instructions: @code{EINT}, @code{DINT},
@code{BIC #8, SR}, @code{BIS #8, SR} and @code{MOV.W <>, SR} must be
followed by a NOP instruction in order to ensure the correct
processing of interrupts. By default generation of the NOP
instruction happens automatically, but this command line option
disables this behaviour. It is then up to the programmer to ensure
that interrupts are enabled and disabled correctly.
* archures.c: Add some more MSP430 machine numbers. * config.bfd (msp430): Define targ_selvecs. * configure.in: Add bfd_elf32_msp430_ti_vec. * cpu-msp430.c: Add some more MSP430 machine numbers. * elf32-msp430.c Add support for MSP430X relocations. Add support for TI compiler generated relocations. Add support for sym_diff relocations. Add support for relaxing out of range short branches into long branches. Add support for MSP430 attribute section. * reloc.c: Add MSP430X relocations. * targets.c: Add bfd_elf32_msp430_ti_vec. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * readelf.c: Add support for MSP430X architecture. * readelf.exp: Expect -wi test to fail for the MSP430. * config/tc-msp430.c: Add support for the MSP430X architecture. Add code to insert a NOP instruction after any instruction that might change the interrupt state. Add support for the LARGE memory model. Add code to initialise the .MSP430.attributes section. * config/tc-msp430.h: Add support for the MSP430X architecture. * doc/c-msp430.texi: Document the new -mL and -mN command line options. * NEWS: Mention support for the MSP430X architecture. * gas/all/gas.exp: Skip the DIFF1 test for the MSP430. Expect the FORWARD test to pass for the MSP430. Skip the REDEF tests for the MSP430. Expect the 930509A test to fail for the MSP430. * gas/all/sleb128-4.d: Skip for the MSP430. * gas/elf/elf.exp: Set target_machine to msp430 for the MSP430. Skip the EHOPT0 test for the MSP430. Skip the REDEF and EQU-RELOC tests for the MSP430. * gas/elf/section2.e-msp430: New file. * gas/lns/lns-big-delta.d: Remove expectation of 20-bit addresses. * gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430. * gas/msp430/msp430x.s: New test. * gas/msp430/msp430x.d: Expected disassembly. * gas/msp430/msp430.exp: Run new test. * gas/msp430/opcode.d: Update expected disassembly. * msp430.h: Add MSP430X relocs. Add some more MSP430 machine numbers. Add values used by .MSP430.attributes section. * msp430.h: Add patterns for MSP430X instructions. * Makefile.am: Add emsp430X.c * Makefine.in: Regenerate. * configure.tgt (msp430): Add msp430X emulation. * ldmain.c (multiple_definition): Only disable relaxation if it was enabled by the user. * ldmain.h (RELAXATION_ENABLED_BY_USER): New macro. * emulparams/msp430all.sh: Add support for MSP430X. * emultempl/generic.em: (before_parse): Enable relaxation for the MSP430. * scripttempl/msp430.sc: Reorganize sections. Add .rodata section. * scripttempl/msp430_3.sc: Likewise. * NEWS: Mention support for MSP430X. * ld-elf/flags1.d: Expect this test to pass on the MSP430. * ld-elf/init-fini-arrays.d: Expect this test to fail on the MSP430. * ld-elf/merge.d: Expect this test to pass on the MSP430. * ld-elf/sec64k.exp: Skip these tests for the MSP430. * ld-gc/pr13683.d: Expect this test to fail on the MSP430. * ld-srec/srec.exp: Expect these tests to fail on the MSP430. * ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to fail on the MSP430. * msp430-dis.c: Add support for MSP430X instructions.
2013-05-03 05:06:15 +08:00
@item -md
mark the object file as one that requires data to copied from ROM to
RAM at execution startup. Disabled by default.
@end table
2002-12-31 03:25:13 +08:00
@node MSP430 Syntax
@section Syntax
@menu
* MSP430-Macros:: Macros
* MSP430-Chars:: Special Characters
* MSP430-Regs:: Register Names
* MSP430-Ext:: Assembler Extensions
@end menu
@node MSP430-Macros
@subsection Macros
@cindex Macros, MSP 430
@cindex MSP 430 macros
The macro syntax used on the MSP 430 is like that described in the MSP
430 Family Assembler Specification. Normal @code{@value{AS}}
macros should still work.
Additional built-in macros are:
@table @code
2013-01-11 03:51:55 +08:00
@item llo(exp)
2002-12-31 03:25:13 +08:00
Extracts least significant word from 32-bit expression 'exp'.
@item lhi(exp)
Extracts most significant word from 32-bit expression 'exp'.
@item hlo(exp)
Extracts 3rd word from 64-bit expression 'exp'.
2013-01-11 03:51:55 +08:00
@item hhi(exp)
2002-12-31 03:25:13 +08:00
Extracts 4rd word from 64-bit expression 'exp'.
@end table
They normally being used as an immediate source operand.
@smallexample
2013-01-11 03:51:55 +08:00
mov #llo(1), r10 ; == mov #1, r10
2002-12-31 03:25:13 +08:00
mov #lhi(1), r10 ; == mov #0, r10
@end smallexample
2013-01-11 03:51:55 +08:00
2002-12-31 03:25:13 +08:00
@node MSP430-Chars
@subsection Special Characters
@cindex line comment character, MSP 430
@cindex MSP 430 line comment character
PR gas/12390 * doc/all.texi: Add NS32K * doc/as.texinfo: Remove target specific details of which characters act as comment initiators and statement separators into individual target specific files. * doc/c-alpha.texi (Alpha-Chars): Document special behaviour of the hash character at the start of a line. * doc/c-arm.texi (ARM-Chars): Likewise. * doc/c-avr.texi (AVR-Chars): Likewise. * doc/c-d10v.texi (D10V-Chars): Likewise. * doc/c-d30v.texi (D30V-Chars): Likewise. * doc/c-mmix.texi (MMIX-Chars): Likewise. * doc/c-s390.texi (s390 characters): Likewise. * doc/c-sh.texi (SH-Chars): Likewise. * doc/c-sh64.texi (SH64-Chars): Likewise. * doc/c-sparc.texi (SPARC-Chars): Likewise. * doc/c-tic6x.texi (TIC6X Syntax): Likewise. * doc/c-xtensa.texi (Xtensa Syntax): Likewise. * doc/c-z80.texi (Z80-Chars): Likewise. * doc/c-z8k.texi (Z8000-Chars): Likewise. * doc/c-pdp11.texi (PDP11-Syntax): Document line separator character. * doc/c-arc.texi (ARC-Chars): Fill in this subsection. * doc/c-bfin.texi (Blackfin Syntax): Document line comment and line separator characters. * doc/c-cr16.texi (CR16 Syntax): Likewise. * doc/c-i386.texi (i386-Chars): Likewise. * doc/c-i860.texi (i860-Chars): Likewise. * doc/c-i960.texi (i960-Chars): Likewise. * doc/c-ip2k.texi (IP2K-Chars): Likewise. * doc/c-lm32.texi (LM32-Chars): likewise. * doc/c-m32c.texi (M32C-Chars): Likewise. * doc/c-m68hc11.texi (M68HC11-syntax): Likewise. * doc/c-m68k.texi (M68K-Chars): Likewise. * doc/c-microblaze.texi (MicroBlaze-Chars): Likewise. * doc/c-msp430.texi (MSP430-Chars): Likewise. * doc/c-mt.texi (MT-Chars): Likewise. * doc/c-ns32k.texi (NS32K-Chars): Likewise. * doc/c-pj.texi (PJ-Chars): Likewise. * doc/c-ppc.texi (PowerPC-Chars): Likewise. * doc/c-rx.texi (RX-Chars): Likewise. * doc/c-score.texi (SCORE-Chars): Likewise. * doc/c-tic54x.texi (TIC54X-Chars): Likewise. * doc/c-v850.texi (V850-Chars): Likewise. * doc/c-vax.texi (VAX-Chars): Likewise. * doc/c-xc16x.texi (xc16x-Chars): Likewise.
2011-01-18 21:37:39 +08:00
A semicolon (@samp{;}) appearing anywhere on a line starts a comment
that extends to the end of that line.
If a @samp{#} appears as the first character of a line then the whole
line is treated as a comment, but it can also be a logical line number
directive (@pxref{Comments}) or a preprocessor control command
(@pxref{Preprocessing}).
@cindex line separator, MSP 430
@cindex statement separator, MSP 430
@cindex MSP 430 line separator
Multiple statements can appear on the same line provided that they are
separated by the @samp{@{} character.
2002-12-31 03:25:13 +08:00
@cindex identifiers, MSP 430
@cindex MSP 430 identifiers
2013-01-11 03:51:55 +08:00
The character @samp{$} in jump instructions indicates current location and
2002-12-31 03:25:13 +08:00
implemented only for TI syntax compatibility.
@node MSP430-Regs
@subsection Register Names
@cindex MSP 430 register names
@cindex register names, MSP 430
General-purpose registers are represented by predefined symbols of the
form @samp{r@var{N}} (for global registers), where @var{N} represents
a number between @code{0} and @code{15}. The leading
letters may be in either upper or lower case; for example, @samp{r13}
and @samp{R7} are both valid register names.
@cindex special purpose registers, MSP 430
Register names @samp{PC}, @samp{SP} and @samp{SR} cannot be used as register names
and will be treated as variables. Use @samp{r0}, @samp{r1}, and @samp{r2} instead.
@node MSP430-Ext
@subsection Assembler Extensions
@cindex MSP430 Assembler Extensions
@table @code
@item @@rN
As destination operand being treated as @samp{0(rn)}
@item 0(rN)
As source operand being treated as @samp{@@rn}
@item jCOND +N
Skips next N bytes followed by jump instruction and equivalent to
@samp{jCOND $+N+2}
@end table
Also, there are some instructions, which cannot be found in other assemblers.
These are branch instructions, which has different opcodes upon jump distance.
They all got PC relative addressing mode.
@table @code
@item beq label
A polymorph instruction which is @samp{jeq label} in case if jump distance
within allowed range for cpu's jump instruction. If not, this unrolls into
a sequence of
@smallexample
jne $+6
br label
@end smallexample
@item bne label
A polymorph instruction which is @samp{jne label} or @samp{jeq +4; br label}
@item blt label
A polymorph instruction which is @samp{jl label} or @samp{jge +4; br label}
@item bltn label
A polymorph instruction which is @samp{jn label} or @samp{jn +2; jmp +4; br label}
@item bltu label
A polymorph instruction which is @samp{jlo label} or @samp{jhs +2; br label}
@item bge label
A polymorph instruction which is @samp{jge label} or @samp{jl +4; br label}
@item bgeu label
A polymorph instruction which is @samp{jhs label} or @samp{jlo +4; br label}
@item bgt label
A polymorph instruction which is @samp{jeq +2; jge label} or @samp{jeq +6; jl +4; br label}
@item bgtu label
A polymorph instruction which is @samp{jeq +2; jhs label} or @samp{jeq +6; jlo +4; br label}
@item bleu label
A polymorph instruction which is @samp{jeq label; jlo label} or @samp{jeq +2; jhs +4; br label}
@item ble label
A polymorph instruction which is @samp{jeq label; jl label} or @samp{jeq +2; jge +4; br label}
@item jump label
A polymorph instruction which is @samp{jmp label} or @samp{br label}
@end table
2002-12-31 03:25:13 +08:00
@node MSP430 Floating Point
@section Floating Point
@cindex floating point, MSP 430 (@sc{ieee})
@cindex MSP 430 floating point (@sc{ieee})
The MSP 430 family uses @sc{ieee} 32-bit floating-point numbers.
@node MSP430 Directives
@section MSP 430 Machine Directives
@cindex machine directives, MSP 430
@cindex MSP 430 machine directives
@table @code
@cindex @code{file} directive, MSP 430
@item .file
This directive is ignored; it is accepted for compatibility with other
MSP 430 assemblers.
@quotation
@emph{Warning:} in other versions of the @sc{gnu} assembler, @code{.file} is
used for the directive called @code{.app-file} in the MSP 430 support.
@end quotation
@cindex @code{line} directive, MSP 430
@item .line
This directive is ignored; it is accepted for compatibility with other
MSP 430 assemblers.
@cindex @code{arch} directive, MSP 430
2002-12-31 03:25:13 +08:00
@item .arch
Sets the target microcontroller in the same way as the @option{-mmcu}
command line option.
@cindex @code{cpu} directive, MSP 430
@item .cpu
Sets the target architecture in the same way as the @option{-mcpu}
command line option.
2002-12-31 03:25:13 +08:00
@cindex @code{profiler} directive, MSP 430
@item .profiler
This directive instructs assembler to add new profile entry to the object file.
2002-12-31 03:25:13 +08:00
@end table
@node MSP430 Opcodes
@section Opcodes
@cindex MSP 430 opcodes
@cindex opcodes for MSP 430
@code{@value{AS}} implements all the standard MSP 430 opcodes. No
additional pseudo-instructions are needed on this family.
For information on the 430 machine instruction set, see @cite{MSP430
User's Manual, document slau049d}, Texas Instrument, Inc.
@node MSP430 Profiling Capability
@section Profiling Capability
@cindex MSP 430 profiling capability
@cindex profiling capability for MSP 430
It is a performance hit to use gcc's profiling approach for this tiny target.
Even more -- jtag hardware facility does not perform any profiling functions.
However we've got gdb's built-in simulator where we can do anything.
We define new section @samp{.profiler} which holds all profiling information.
We define new pseudo operation @samp{.profiler} which will instruct assembler to
add new profile entry to the object file. Profile should take place at the
present address.
Pseudo operation format:
@samp{.profiler flags,function_to_profile [, cycle_corrector, extra]}
where:
@table @code
@table @code
@samp{flags} is a combination of the following characters:
2013-01-11 03:51:55 +08:00
@item s
function entry
2013-01-11 03:51:55 +08:00
@item x
function exit
2013-01-11 03:51:55 +08:00
@item i
function is in init section
2013-01-11 03:51:55 +08:00
@item f
function is in fini section
2013-01-11 03:51:55 +08:00
@item l
library call
2013-01-11 03:51:55 +08:00
@item c
libc standard call
2013-01-11 03:51:55 +08:00
@item d
stack value demand
2013-01-11 03:51:55 +08:00
@item I
interrupt service routine
2013-01-11 03:51:55 +08:00
@item P
prologue start
2013-01-11 03:51:55 +08:00
@item p
prologue end
2013-01-11 03:51:55 +08:00
@item E
epilogue start
2013-01-11 03:51:55 +08:00
@item e
epilogue end
2013-01-11 03:51:55 +08:00
@item j
long jump / sjlj unwind
2013-01-11 03:51:55 +08:00
@item a
an arbitrary code fragment
@item t
extra parameter saved (a constant value like frame size)
@end table
2013-01-11 03:51:55 +08:00
@item function_to_profile
a function address
2013-01-11 03:51:55 +08:00
@item cycle_corrector
a value which should be added to the cycle counter, zero if omitted.
2013-01-11 03:51:55 +08:00
@item extra
any extra parameter, zero if omitted.
@end table
For example:
@smallexample
.global fxx
.type fxx,@@function
fxx:
.LFrameOffset_fxx=0x08
.profiler "scdP", fxx ; function entry.
; we also demand stack value to be saved
push r11
push r10
push r9
push r8
.profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point
; (this is a prologue end)
2013-01-11 03:51:55 +08:00
; note, that spare var filled with
; the farme size
mov r15,r8
...
.profiler cdE,fxx ; check stack
pop r8
pop r9
pop r10
pop r11
.profiler xcde,fxx,3 ; exit adds 3 to the cycle counter
ret ; cause 'ret' insn takes 3 cycles
@end smallexample