binutils-gdb/gas/config/tc-fr30.c

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/* tc-fr30.c -- Assembler for the Fujitsu FR30.
Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2009
* symbols.c (S_FORCE_RELOC): Add "strict" param. * symbols.h (S_FORCE_RELOC): Likewise. * config/obj-aout.h (S_FORCE_RELOC): Likewise. * config/obj-bout.h (S_FORCE_RELOC): Likewise. * config/obj-coff.h (S_FORCE_RELOC): Likewise. * config/obj-ieee.h (S_FORCE_RELOC): Likewise. * config/obj-vms.h (S_FORCE_RELOC): Likewise. * write.c (generic_force_reloc): New function. (TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. (adjust_reloc_syms): Adjust S_FORCE_RELOC call. * as.h (generic_force_reloc): Declare. * doc/internals.texi (S_FORCE_RELOC): Update. (TC_FORCE_RELOCATION_SUB_SAME): Update. * config/tc-alpha.c (alpha_force_relocation): Adjust to use generic_force_reloc. (alpha_fix_adjustable): Likewise. * config/tc-arm.c (arm_force_relocation): Likewise. * config/tc-cris.c (md_cris_force_relocation): Likewise. * config/tc-frv.c (frv_force_relocation): Likewise. * config/tc-i386.c (md_apply_fix3): Likewise. * config/tc-ia64.c (ia64_force_relocation): Likewise. * config/tc-ip2k.c (ip2k_force_relocation): Likewise. * config/tc-m32r.c (m32r_force_relocation): Likewise. * config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise. * config/tc-mcore.c (mcore_force_relocation): Likewise. * config/tc-mips.c (mips_force_relocation): Likewise. * config/tc-mmix.c (mmix_force_relocation): Likewise. * config/tc-ppc.c (ppc_force_relocation): Likewise. * config/tc-s390.c (tc_s390_force_relocation): Likewise. * config/tc-sh.c (sh_force_relocation): Likewise. (md_pcrel_from_section): Likewise. * config/tc-sparc.c (tc_gen_reloc): Likewise. * config/tc-v850.c (v850_force_relocation): Likewise. * config/tc-xstormy16.c (xstormy16_force_relocation): Likewise. * config/tc-i386.h (TC_FORCE_RELOCATION): Likewise. * config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise. * config/tc-sparc.h (tc_fix_adjustable): Likewise. * config/tc-d10v.c (d10v_force_relocation): Delete. * config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define. * config/tc-dlx.c (md_dlx_force_relocation): Delete. * config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define. * config/tc-fr30.c (fr30_force_relocation): Delete. * config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define. * config/tc-mn10300.c (mn10300_force_relocation): Delete. * config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise. * config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call. * config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix. * config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define. * config/tc-openrisc.c (openrisc_force_relocation): Delete. * config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sparc.c (elf32_sparc_force_relocation): Delete. * config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF. * config/tc-i386.c (i386_force_relocation): Delete. * config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for BFD_ASSEMBLER. (EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting. * config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define. * config/tc-pj.h (TC_FORCE_RELOCATION): Don't define. * config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call S_FORCE_RELOC. (TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too. * config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
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Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 51 Franklin Street - Fifth Floor,
Boston, MA 02110-1301, USA. */
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#include "as.h"
#include "safe-ctype.h"
#include "subsegs.h"
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#include "symcat.h"
#include "opcodes/fr30-desc.h"
#include "opcodes/fr30-opc.h"
#include "cgen.h"
/* Structure to hold all of the different components describing
an individual instruction. */
typedef struct
{
const CGEN_INSN * insn;
const CGEN_INSN * orig_insn;
CGEN_FIELDS fields;
#if CGEN_INT_INSN_P
CGEN_INSN_INT buffer [1];
#define INSN_VALUE(buf) (*(buf))
#else
unsigned char buffer [CGEN_MAX_INSN_SIZE];
#define INSN_VALUE(buf) (buf)
#endif
char * addr;
fragS * frag;
int num_fixups;
fixS * fixups [GAS_CGEN_MAX_FIXUPS];
int indices [MAX_OPERAND_INSTANCES];
}
fr30_insn;
const char comment_chars[] = ";";
const char line_comment_chars[] = "#";
const char line_separator_chars[] = "|";
const char EXP_CHARS[] = "eE";
const char FLT_CHARS[] = "dD";
#define FR30_SHORTOPTS ""
const char * md_shortopts = FR30_SHORTOPTS;
struct option md_longopts[] =
{
{NULL, no_argument, NULL, 0}
};
size_t md_longopts_size = sizeof (md_longopts);
int
md_parse_option (int c ATTRIBUTE_UNUSED,
char *arg ATTRIBUTE_UNUSED)
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{
switch (c)
{
default:
return 0;
}
return 1;
}
void
md_show_usage (FILE * stream)
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{
fprintf (stream, _(" FR30 specific command line options:\n"));
}
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/* The target specific pseudo-ops which we support. */
const pseudo_typeS md_pseudo_table[] =
{
{ "word", cons, 4 },
{ NULL, NULL, 0 }
};
void
md_begin (void)
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{
/* Initialize the `cgen' interface. */
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/* Set the machine number and endian. */
gas_cgen_cpu_desc = fr30_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
CGEN_CPU_OPEN_ENDIAN,
CGEN_ENDIAN_BIG,
CGEN_CPU_OPEN_END);
fr30_cgen_init_asm (gas_cgen_cpu_desc);
/* This is a callback from cgen to gas to parse operands. */
cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
}
void
md_assemble (char *str)
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{
static int last_insn_had_delay_slot = 0;
fr30_insn insn;
char *errmsg;
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/* Initialize GAS's cgen interface for a new instruction. */
gas_cgen_init_parse ();
insn.insn = fr30_cgen_assemble_insn
(gas_cgen_cpu_desc, str, & insn.fields, insn.buffer, & errmsg);
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if (!insn.insn)
{
as_bad ("%s", errmsg);
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return;
}
/* Doesn't really matter what we pass for RELAX_P here. */
gas_cgen_finish_insn (insn.insn, insn.buffer,
CGEN_FIELDS_BITSIZE (& insn.fields), 1, NULL);
/* Warn about invalid insns in delay slots. */
if (last_insn_had_delay_slot
&& CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_NOT_IN_DELAY_SLOT))
as_warn (_("Instruction %s not allowed in a delay slot."),
CGEN_INSN_NAME (insn.insn));
last_insn_had_delay_slot
= CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
}
/* The syntax in the manual says constants begin with '#'.
We just ignore it. */
void
md_operand (expressionS * expressionP)
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{
if (* input_line_pointer == '#')
{
input_line_pointer ++;
expression (expressionP);
}
}
valueT
md_section_align (segT segment, valueT size)
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{
int align = bfd_get_section_alignment (stdoutput, segment);
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return ((size + (1 << align) - 1) & (-1 << align));
}
symbolS *
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
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{
return NULL;
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}
/* Interface to relax_segment. */
/* FIXME: Build table by hand, get it working, then machine generate. */
const relax_typeS md_relax_table[] =
{
/* The fields are:
1) most positive reach of this state,
2) most negative reach of this state,
3) how many bytes this mode will add to the size of the current frag
4) which index into the table to try if we can't fit into this one. */
/* The first entry must be unused because an `rlx_more' value of zero ends
each list. */
{1, 1, 0, 0},
/* The displacement used by GAS is from the end of the 2 byte insn,
so we subtract 2 from the following. */
/* 16 bit insn, 8 bit disp -> 10 bit range.
This doesn't handle a branch in the right slot at the border:
the "& -4" isn't taken into account. It's not important enough to
complicate things over it, so we subtract an extra 2 (or + 2 in -ve
case). */
{511 - 2 - 2, -512 - 2 + 2, 0, 2 },
/* 32 bit insn, 24 bit disp -> 26 bit range. */
{0x2000000 - 1 - 2, -0x2000000 - 2, 2, 0 },
/* Same thing, but with leading nop for alignment. */
{0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
};
/* Return an initial guess of the length by which a fragment must grow to
hold a branch to reach its destination.
Also updates fr_type/fr_subtype as necessary.
Called just before doing relaxation.
Any symbol that is now undefined will not become defined.
The guess for fr_var is ACTUALLY the growth beyond fr_fix.
Whatever we do to grow fr_fix or fr_var contributes to our returned value.
Although it may not be explicit in the frag, pretend fr_var starts with a
0 value. */
int
md_estimate_size_before_relax (fragS * fragP, segT segment)
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{
/* The only thing we have to handle here are symbols outside of the
current segment. They may be undefined or in a different segment in
which case linker scripts may place them anywhere.
However, we can't finish the fragment here and emit the reloc as insn
alignment requirements may move the insn about. */
if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
{
/* The symbol is undefined in this segment.
Change the relaxation subtype to the max allowable and leave
all further handling to md_convert_frag. */
fragP->fr_subtype = 2;
{
const CGEN_INSN * insn;
int i;
/* Update the recorded insn.
Fortunately we don't have to look very far.
FIXME: Change this to record in the instruction the next higher
relaxable insn to use. */
for (i = 0, insn = fragP->fr_cgen.insn; i < 4; i++, insn++)
{
if ((strcmp (CGEN_INSN_MNEMONIC (insn),
CGEN_INSN_MNEMONIC (fragP->fr_cgen.insn))
== 0)
&& CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED))
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break;
}
if (i == 4)
abort ();
fragP->fr_cgen.insn = insn;
return 2;
}
}
/* Return the size of the variable part of the frag. */
return md_relax_table[fragP->fr_subtype].rlx_length;
}
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/* *fragP has been relaxed to its final size, and now needs to have
the bytes inside it modified to conform to the new size.
Called after relaxation is finished.
fragP->fr_type == rs_machine_dependent.
fragP->fr_subtype is the subtype of what the address relaxed to. */
void
md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
segT sec ATTRIBUTE_UNUSED,
fragS *fragP ATTRIBUTE_UNUSED)
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{
}
/* Functions concerning relocs. */
/* The location from which a PC relative jump should be calculated,
given a PC relative reloc. */
long
md_pcrel_from_section (fixS * fixP, segT sec)
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{
if (fixP->fx_addsy != (symbolS *) NULL
&& (! S_IS_DEFINED (fixP->fx_addsy)
|| S_GET_SEGMENT (fixP->fx_addsy) != sec))
/* The symbol is undefined (or is defined but not in this section).
Let the linker figure it out. */
return 0;
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return (fixP->fx_frag->fr_address + fixP->fx_where) & ~1;
}
/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
Returns BFD_RELOC_NONE if no reloc type can be found.
*FIXP may be modified if desired. */
bfd_reloc_code_real_type
md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
const CGEN_OPERAND *operand,
fixS *fixP)
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{
switch (operand->type)
{
case FR30_OPERAND_LABEL9: fixP->fx_pcrel = 1; return BFD_RELOC_FR30_9_PCREL;
case FR30_OPERAND_LABEL12: fixP->fx_pcrel = 1; return BFD_RELOC_FR30_12_PCREL;
case FR30_OPERAND_DISP10: return BFD_RELOC_FR30_10_IN_8;
case FR30_OPERAND_DISP9: return BFD_RELOC_FR30_9_IN_8;
case FR30_OPERAND_DISP8: return BFD_RELOC_FR30_8_IN_8;
case FR30_OPERAND_UDISP6: return BFD_RELOC_FR30_6_IN_4;
case FR30_OPERAND_I8: return BFD_RELOC_8;
case FR30_OPERAND_I32: return BFD_RELOC_FR30_48;
case FR30_OPERAND_I20: return BFD_RELOC_FR30_20;
default : /* Avoid -Wall warning. */
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break;
}
return BFD_RELOC_NONE;
}
/* Write a value out to the object file, using the appropriate endianness. */
void
md_number_to_chars (char * buf, valueT val, int n)
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{
number_to_chars_bigendian (buf, val, n);
}
char *
md_atof (int type, char * litP, int * sizeP)
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{
return ieee_md_atof (type, litP, sizeP, TRUE);
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}
/* Worker function for fr30_is_colon_insn(). */
static char
restore_colon (int advance_i_l_p_by)
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{
char c;
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/* Restore the colon, and advance input_line_pointer to
the end of the new symbol. */
* input_line_pointer = ':';
input_line_pointer += advance_i_l_p_by;
c = * input_line_pointer;
* input_line_pointer = 0;
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return c;
}
/* Determines if the symbol starting at START and ending in
a colon that was at the location pointed to by INPUT_LINE_POINTER
(but which has now been replaced bu a NUL) is in fact an
LDI:8, LDI:20, LDI:32, CALL:D. JMP:D, RET:D or Bcc:D instruction.
If it is, then it restores the colon, advances INPUT_LINE_POINTER
to the real end of the instruction/symbol, and returns the character
that really terminated the symbol. Otherwise it returns 0. */
char
fr30_is_colon_insn (char * start)
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{
char * i_l_p = input_line_pointer;
/* Check to see if the symbol parsed so far is 'ldi'. */
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if ( (start[0] != 'l' && start[0] != 'L')
|| (start[1] != 'd' && start[1] != 'D')
|| (start[2] != 'i' && start[2] != 'I')
|| start[3] != 0)
{
/* Nope - check to see a 'd' follows the colon. */
if ( (i_l_p[1] == 'd' || i_l_p[1] == 'D')
&& (i_l_p[2] == ' ' || i_l_p[2] == '\t' || i_l_p[2] == '\n'))
{
/* Yup - it might be delay slot instruction. */
int i;
static char * delay_insns [] =
{
"call", "jmp", "ret", "bra", "bno",
"beq", "bne", "bc", "bnc", "bn",
"bp", "bv", "bnv", "blt", "bge",
"ble", "bgt", "bls", "bhi"
};
for (i = sizeof (delay_insns) / sizeof (delay_insns[0]); i--;)
{
char * insn = delay_insns[i];
int len = strlen (insn);
if (start [len] != 0)
continue;
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while (len --)
if (TOLOWER (start [len]) != insn [len])
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break;
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if (len == -1)
return restore_colon (1);
}
}
/* Nope - it is a normal label. */
return 0;
}
/* Check to see if the text following the colon is '8'. */
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if (i_l_p[1] == '8' && (i_l_p[2] == ' ' || i_l_p[2] == '\t'))
return restore_colon (2);
/* Check to see if the text following the colon is '20'. */
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else if (i_l_p[1] == '2' && i_l_p[2] =='0' && (i_l_p[3] == ' ' || i_l_p[3] == '\t'))
return restore_colon (3);
/* Check to see if the text following the colon is '32'. */
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else if (i_l_p[1] == '3' && i_l_p[2] =='2' && (i_l_p[3] == ' ' || i_l_p[3] == '\t'))
return restore_colon (3);
return 0;
}
bfd_boolean
fr30_fix_adjustable (fixS * fixP)
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{
/* We need the symbol name for the VTABLE entries. */
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if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
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|| fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
return 0;
return 1;
}