binutils-gdb/gas/doc/c-cris.texi

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2005-03-03 09:29:54 +08:00
@c Copyright 2002, 2004 Free Software Foundation, Inc.
@c This is part of the GAS manual.
@c For copying conditions, see the file as.texinfo.
@c CRIS description contributed by Axis Communications.
@ifset GENERIC
@page
@node CRIS-Dependent
@chapter CRIS Dependent Features
@end ifset
@ifclear GENERIC
@node Machine Dependencies
@chapter CRIS Dependent Features
@end ifclear
@cindex CRIS support
@menu
* CRIS-Opts:: Command-line Options
* CRIS-Expand:: Instruction expansion
* configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTED DEFAULT_CRIS_ARCH. Handle crisv32-*-linux-gnu* like cris-*-linux-gnu* and crisv32-*-* like cris-*-*. * configure: Regenerate. * config/tc-cris.c (enum cris_archs): New. (cris_mach, cris_arch_from_string, s_cris_arch, get_sup_reg) (cris_insn_ver_valid_for_arch): New functions. (DEFAULT_CRIS_ARCH): New macro, default to cris_any_v0_v10. (cris_arch): New variable. (md_pseudo_table): New pseudo .arch. (err_for_dangerous_mul_placement): Initialize according to DEFAULT_CRIS_ARCH. (STATE_COND_BRANCH): Renamed from STATE_CONDITIONAL_BRANCH. All users changed. (STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON) (STATE_ABS_BRANCH_V32, STATE_LAPC, BRANCH_BF_V32, BRANCH_BB_V32) (BRANCH_WF_V32, BRANCH_WB_V32): New. (BRANCH_BF, BRANCH_BB, BRANCH_WF, BRANCH_WB): Don't undef after use in md_cris_relax_table. (md_cris_relax_table): Add entries for STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Update and improve head comment. (OPTION_PIC): Define in terms of previous option, OPTION_US. (OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): Similar. (OPTION_ARCH): New. (md_longopts): New option --march=... (cris_any_v0_v10_long_jump_size, crisv32_long_jump_size): New macros. (md_long_jump_size): Initialize in terms of DEFAULT_CRIS_ARCH. (HANDLE_RELAXABLE): New macro. (md_estimate_size_before_relax): Use HANDLE_RELAXABLE for common cases. Check for weak symbols and assume not relaxable. Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Use new variable symbolP, not fragP->fr_symbol. (md_convert_frag): Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. (cris_create_short_jump): Adjust for CRISv32. (md_create_long_jump): Ditto. Emit error for common_v10_v32. (md_begin): Define symbols "..asm.arch.cris.v32", "..asm.arch.cris.v10", "..asm.arch.cris.common_v10_v32" and "..asm.arch.cris.any_v0_v10". Use cris_insn_ver_valid_for_arch when entering opcode table entry points. (md_assemble): Adjust branch handling for CRISv32. Handle LAPC relaxation. In fix_new_exp call for main insn, pass 1 for pcrel parameter for 8, 16 and 32-bit pc-relative insns and LAPC. (cris_process_instruction): Initialize out_insnp->insn_type to CRIS_INSN_NONE, not CRIS_INSN_NORMAL. <case ']', '[', 'A', 'd', 'Q', 'N', 'n', 'Y', 'U', 'u', 'T'>: New cases. <case 'm'>: Check that modified_char == '.'. <invalid operands>: Consume the rest of the line. When operands don't match, skip over subsequent insns with non-matching version specifier but same mnemonic. <immediate constant, case SIZE_SPEC_REG>: Immediate operands for special registers in CRISv32 are always 32 bit long. <immediate constant, case SIZE_FIELD_SIGNED, SIZE_FIELD_UNSIGNED>: New cases. (get_gen_reg): Only recognize "PC" when followed by "+]" for v32 and compatible. Recognize "ACR" for v32, unless followed by "+". (get_spec_reg): Consider cris_arch when looking up register. (get_autoinc_prefix_or_indir_op): Don't recognize assignment for v32 or compatible. (get_3op_or_dip_prefix_op): Check for ']' after seeing '[rN+'. (cris_get_expression): Restore input_line_pointer if failing "early". (get_flags): Consider cris_arch and recognize flags accordingly. (branch_disp): Adjust for CRISv32. (gen_cond_branch_32): Similar. Emit error for common_v10_v32. (cris_number_to_imm): Use as_bad_where, not as_bad. Remove related FIXME. Don't insist on BFD_RELOC_32_PCREL fixup to be resolved. Don't enter zeros in object file for BFD_RELOC_32_PCREL. <case BFD_RELOC_CRIS_LAPCQ_OFFSET, BFD_RELOC_CRIS_SIGNED_16> <case BFD_RELOC_CRIS_SIGNED_8>: New case. (md_parse_option): Break out "return 1". <OPTION_ARCH> New case. (tc_gen_reloc): <case BFD_RELOC_CRIS_LAPCQ_OFFSET> <case BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_SIGNED_8> <case BFD_RELOC_CRIS_UNSIGNED_8, BFD_RELOC_CRIS_UNSIGNED_16> <case BFD_RELOC_32_PCREL>: New cases. Addends for non-zero fx_pcrel are too in fx_offset. (md_show_usage): Show --march=<arch>. (md_apply_fix3): Adjust val for BFD_RELOC_CRIS_LAPCQ_OFFSET. (md_pcrel_from): BFD_RELOC_CRIS_LAPCQ_OFFSET is PC-relative too. (s_syntax) <struct syntaxes>: Properly constify member operand. * config/tc-cris.h (TARGET_MACH): Define. (cris_mach): Declare. * doc/as.texinfo (Overview) <CRIS>: Add --march=... * doc/c-cris.texi (CRIS-Symbols): New node for built-in symbols. (CRIS-Opts): Document --march=... (CRIS-Pseudos): Document .arch.
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* CRIS-Symbols:: Symbols
* CRIS-Syntax:: Syntax
@end menu
@node CRIS-Opts
@section Command-line Options
@cindex options, CRIS
@cindex CRIS options
The CRIS version of @code{@value{AS}} has these
machine-dependent command-line options.
@cindex @option{--emulation=criself} command line option, CRIS
@cindex @option{--emulation=crisaout} command line option, CRIS
@cindex CRIS @option{--emulation=criself} command line option
@cindex CRIS @option{--emulation=crisaout} command line option
The format of the generated object files can be either ELF or
a.out, specified by the command-line options
@option{--emulation=crisaout} and @option{--emulation=criself}.
The default is ELF (criself), unless @code{@value{AS}} has been
configured specifically for a.out by using the configuration
name @code{cris-axis-aout}.
@cindex @option{--underscore} command line option, CRIS
@cindex @option{--no-underscore} command line option, CRIS
@cindex CRIS @option{--underscore} command line option
@cindex CRIS @option{--no-underscore} command line option
There are two different link-incompatible ELF object file
variants for CRIS, for use in environments where symbols are
expected to be prefixed by a leading @samp{_} character and for
environments without such a symbol prefix. The variant used for
GNU/Linux port has no symbol prefix. Which variant to produce
is specified by either of the options @option{--underscore} and
@option{--no-underscore}. The default is @option{--underscore}.
Since symbols in CRIS a.out objects are expected to have a
@samp{_} prefix, specifying @option{--no-underscore} when
generating a.out objects is an error. Besides the object format
difference, the effect of this option is to parse register names
differently (@pxref{crisnous}). The @option{--no-underscore}
option makes a @samp{$} register prefix mandatory.
@cindex @option{--pic} command line option, CRIS
@cindex CRIS @option{--pic} command line option
@cindex Position-independent code, CRIS
@cindex CRIS position-independent code
The option @option{--pic} must be passed to @code{@value{AS}} in
order to recognize the symbol syntax used for ELF (SVR4 PIC)
position-independent-code (@pxref{crispic}). This will also
affect expansion of instructions. The expansion with
@option{--pic} will use PC-relative rather than (slightly
faster) absolute addresses in those expansions.
* configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTED DEFAULT_CRIS_ARCH. Handle crisv32-*-linux-gnu* like cris-*-linux-gnu* and crisv32-*-* like cris-*-*. * configure: Regenerate. * config/tc-cris.c (enum cris_archs): New. (cris_mach, cris_arch_from_string, s_cris_arch, get_sup_reg) (cris_insn_ver_valid_for_arch): New functions. (DEFAULT_CRIS_ARCH): New macro, default to cris_any_v0_v10. (cris_arch): New variable. (md_pseudo_table): New pseudo .arch. (err_for_dangerous_mul_placement): Initialize according to DEFAULT_CRIS_ARCH. (STATE_COND_BRANCH): Renamed from STATE_CONDITIONAL_BRANCH. All users changed. (STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON) (STATE_ABS_BRANCH_V32, STATE_LAPC, BRANCH_BF_V32, BRANCH_BB_V32) (BRANCH_WF_V32, BRANCH_WB_V32): New. (BRANCH_BF, BRANCH_BB, BRANCH_WF, BRANCH_WB): Don't undef after use in md_cris_relax_table. (md_cris_relax_table): Add entries for STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Update and improve head comment. (OPTION_PIC): Define in terms of previous option, OPTION_US. (OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): Similar. (OPTION_ARCH): New. (md_longopts): New option --march=... (cris_any_v0_v10_long_jump_size, crisv32_long_jump_size): New macros. (md_long_jump_size): Initialize in terms of DEFAULT_CRIS_ARCH. (HANDLE_RELAXABLE): New macro. (md_estimate_size_before_relax): Use HANDLE_RELAXABLE for common cases. Check for weak symbols and assume not relaxable. Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Use new variable symbolP, not fragP->fr_symbol. (md_convert_frag): Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. (cris_create_short_jump): Adjust for CRISv32. (md_create_long_jump): Ditto. Emit error for common_v10_v32. (md_begin): Define symbols "..asm.arch.cris.v32", "..asm.arch.cris.v10", "..asm.arch.cris.common_v10_v32" and "..asm.arch.cris.any_v0_v10". Use cris_insn_ver_valid_for_arch when entering opcode table entry points. (md_assemble): Adjust branch handling for CRISv32. Handle LAPC relaxation. In fix_new_exp call for main insn, pass 1 for pcrel parameter for 8, 16 and 32-bit pc-relative insns and LAPC. (cris_process_instruction): Initialize out_insnp->insn_type to CRIS_INSN_NONE, not CRIS_INSN_NORMAL. <case ']', '[', 'A', 'd', 'Q', 'N', 'n', 'Y', 'U', 'u', 'T'>: New cases. <case 'm'>: Check that modified_char == '.'. <invalid operands>: Consume the rest of the line. When operands don't match, skip over subsequent insns with non-matching version specifier but same mnemonic. <immediate constant, case SIZE_SPEC_REG>: Immediate operands for special registers in CRISv32 are always 32 bit long. <immediate constant, case SIZE_FIELD_SIGNED, SIZE_FIELD_UNSIGNED>: New cases. (get_gen_reg): Only recognize "PC" when followed by "+]" for v32 and compatible. Recognize "ACR" for v32, unless followed by "+". (get_spec_reg): Consider cris_arch when looking up register. (get_autoinc_prefix_or_indir_op): Don't recognize assignment for v32 or compatible. (get_3op_or_dip_prefix_op): Check for ']' after seeing '[rN+'. (cris_get_expression): Restore input_line_pointer if failing "early". (get_flags): Consider cris_arch and recognize flags accordingly. (branch_disp): Adjust for CRISv32. (gen_cond_branch_32): Similar. Emit error for common_v10_v32. (cris_number_to_imm): Use as_bad_where, not as_bad. Remove related FIXME. Don't insist on BFD_RELOC_32_PCREL fixup to be resolved. Don't enter zeros in object file for BFD_RELOC_32_PCREL. <case BFD_RELOC_CRIS_LAPCQ_OFFSET, BFD_RELOC_CRIS_SIGNED_16> <case BFD_RELOC_CRIS_SIGNED_8>: New case. (md_parse_option): Break out "return 1". <OPTION_ARCH> New case. (tc_gen_reloc): <case BFD_RELOC_CRIS_LAPCQ_OFFSET> <case BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_SIGNED_8> <case BFD_RELOC_CRIS_UNSIGNED_8, BFD_RELOC_CRIS_UNSIGNED_16> <case BFD_RELOC_32_PCREL>: New cases. Addends for non-zero fx_pcrel are too in fx_offset. (md_show_usage): Show --march=<arch>. (md_apply_fix3): Adjust val for BFD_RELOC_CRIS_LAPCQ_OFFSET. (md_pcrel_from): BFD_RELOC_CRIS_LAPCQ_OFFSET is PC-relative too. (s_syntax) <struct syntaxes>: Properly constify member operand. * config/tc-cris.h (TARGET_MACH): Define. (cris_mach): Declare. * doc/as.texinfo (Overview) <CRIS>: Add --march=... * doc/c-cris.texi (CRIS-Symbols): New node for built-in symbols. (CRIS-Opts): Document --march=... (CRIS-Pseudos): Document .arch.
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@cindex @option{--march=@var{architecture}} command line option, CRIS
@cindex CRIS @option{--march=@var{architecture}} command line option
@cindex Architecture variant option, CRIS
@cindex CRIS architecture variant option
The option @option{--march=@var{architecture}}
@anchor{march-option}specifies the recognized instruction set
and recognized register names. It also controls the
architecture type of the object file. Valid values for
@var{architecture} are:
@table @code
@item v0_v10
All instructions and register names for any architecture variant
in the set v0@dots{}v10 are recognized. This is the
default if the target is configured as cris-*.
@item v10
Only instructions and register names for CRIS v10 (as found in
ETRAX 100 LX) are recognized. This is the default if the target
is configured as crisv10-*.
@item v32
Only instructions and register names for CRIS v32 (code name
Guinness) are recognized. This is the default if the target is
configured as crisv32-*. This value implies
@option{--no-mul-bug-abort}. (A subsequent
@option{--mul-bug-abort} will turn it back on.)
@item common_v10_v32
Only instructions with register names and addressing modes with
opcodes common to the v10 and v32 are recognized.
@end table
@cindex @option{-N} command line option, CRIS
@cindex CRIS @option{-N} command line option
When @option{-N} is specified, @code{@value{AS}} will emit a
warning when a 16-bit branch instruction is expanded into a
32-bit multiple-instruction construct (@pxref{CRIS-Expand}).
@cindex @option{--no-mul-bug-abort} command line option, CRIS
@cindex @option{--mul-bug-abort} command line option, CRIS
@cindex CRIS @option{--no-mul-bug-abort} command line option
@cindex CRIS @option{--mul-bug-abort} command line option
Some versions of the CRIS v10, for example in the Etrax 100 LX,
contain a bug that causes destabilizing memory accesses when a
multiply instruction is executed with certain values in the
first operand just before a cache-miss. When the
@option{--mul-bug-abort} command line option is active (the
default value), @code{@value{AS}} will refuse to assemble a file
containing a multiply instruction at a dangerous offset, one
that could be the last on a cache-line, or is in a section with
insufficient alignment. This placement checking does not catch
any case where the multiply instruction is dangerously placed
because it is located in a delay-slot. The
@option{--mul-bug-abort} command line option turns off the
checking.
@node CRIS-Expand
@section Instruction expansion
@cindex instruction expansion, CRIS
@cindex CRIS instruction expansion
@code{@value{AS}} will silently choose an instruction that fits
the operand size for @samp{[register+constant]} operands. For
example, the offset @code{127} in @code{move.d [r3+127],r4} fits
in an instruction using a signed-byte offset. Similarly,
@code{move.d [r2+32767],r1} will generate an instruction using a
16-bit offset. For symbolic expressions and constants that do
not fit in 16 bits including the sign bit, a 32-bit offset is
generated.
For branches, @code{@value{AS}} will expand from a 16-bit branch
instruction into a sequence of instructions that can reach a
full 32-bit address. Since this does not correspond to a single
instruction, such expansions can optionally be warned about.
@xref{CRIS-Opts}.
* configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTED DEFAULT_CRIS_ARCH. Handle crisv32-*-linux-gnu* like cris-*-linux-gnu* and crisv32-*-* like cris-*-*. * configure: Regenerate. * config/tc-cris.c (enum cris_archs): New. (cris_mach, cris_arch_from_string, s_cris_arch, get_sup_reg) (cris_insn_ver_valid_for_arch): New functions. (DEFAULT_CRIS_ARCH): New macro, default to cris_any_v0_v10. (cris_arch): New variable. (md_pseudo_table): New pseudo .arch. (err_for_dangerous_mul_placement): Initialize according to DEFAULT_CRIS_ARCH. (STATE_COND_BRANCH): Renamed from STATE_CONDITIONAL_BRANCH. All users changed. (STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON) (STATE_ABS_BRANCH_V32, STATE_LAPC, BRANCH_BF_V32, BRANCH_BB_V32) (BRANCH_WF_V32, BRANCH_WB_V32): New. (BRANCH_BF, BRANCH_BB, BRANCH_WF, BRANCH_WB): Don't undef after use in md_cris_relax_table. (md_cris_relax_table): Add entries for STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Update and improve head comment. (OPTION_PIC): Define in terms of previous option, OPTION_US. (OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): Similar. (OPTION_ARCH): New. (md_longopts): New option --march=... (cris_any_v0_v10_long_jump_size, crisv32_long_jump_size): New macros. (md_long_jump_size): Initialize in terms of DEFAULT_CRIS_ARCH. (HANDLE_RELAXABLE): New macro. (md_estimate_size_before_relax): Use HANDLE_RELAXABLE for common cases. Check for weak symbols and assume not relaxable. Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Use new variable symbolP, not fragP->fr_symbol. (md_convert_frag): Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. (cris_create_short_jump): Adjust for CRISv32. (md_create_long_jump): Ditto. Emit error for common_v10_v32. (md_begin): Define symbols "..asm.arch.cris.v32", "..asm.arch.cris.v10", "..asm.arch.cris.common_v10_v32" and "..asm.arch.cris.any_v0_v10". Use cris_insn_ver_valid_for_arch when entering opcode table entry points. (md_assemble): Adjust branch handling for CRISv32. Handle LAPC relaxation. In fix_new_exp call for main insn, pass 1 for pcrel parameter for 8, 16 and 32-bit pc-relative insns and LAPC. (cris_process_instruction): Initialize out_insnp->insn_type to CRIS_INSN_NONE, not CRIS_INSN_NORMAL. <case ']', '[', 'A', 'd', 'Q', 'N', 'n', 'Y', 'U', 'u', 'T'>: New cases. <case 'm'>: Check that modified_char == '.'. <invalid operands>: Consume the rest of the line. When operands don't match, skip over subsequent insns with non-matching version specifier but same mnemonic. <immediate constant, case SIZE_SPEC_REG>: Immediate operands for special registers in CRISv32 are always 32 bit long. <immediate constant, case SIZE_FIELD_SIGNED, SIZE_FIELD_UNSIGNED>: New cases. (get_gen_reg): Only recognize "PC" when followed by "+]" for v32 and compatible. Recognize "ACR" for v32, unless followed by "+". (get_spec_reg): Consider cris_arch when looking up register. (get_autoinc_prefix_or_indir_op): Don't recognize assignment for v32 or compatible. (get_3op_or_dip_prefix_op): Check for ']' after seeing '[rN+'. (cris_get_expression): Restore input_line_pointer if failing "early". (get_flags): Consider cris_arch and recognize flags accordingly. (branch_disp): Adjust for CRISv32. (gen_cond_branch_32): Similar. Emit error for common_v10_v32. (cris_number_to_imm): Use as_bad_where, not as_bad. Remove related FIXME. Don't insist on BFD_RELOC_32_PCREL fixup to be resolved. Don't enter zeros in object file for BFD_RELOC_32_PCREL. <case BFD_RELOC_CRIS_LAPCQ_OFFSET, BFD_RELOC_CRIS_SIGNED_16> <case BFD_RELOC_CRIS_SIGNED_8>: New case. (md_parse_option): Break out "return 1". <OPTION_ARCH> New case. (tc_gen_reloc): <case BFD_RELOC_CRIS_LAPCQ_OFFSET> <case BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_SIGNED_8> <case BFD_RELOC_CRIS_UNSIGNED_8, BFD_RELOC_CRIS_UNSIGNED_16> <case BFD_RELOC_32_PCREL>: New cases. Addends for non-zero fx_pcrel are too in fx_offset. (md_show_usage): Show --march=<arch>. (md_apply_fix3): Adjust val for BFD_RELOC_CRIS_LAPCQ_OFFSET. (md_pcrel_from): BFD_RELOC_CRIS_LAPCQ_OFFSET is PC-relative too. (s_syntax) <struct syntaxes>: Properly constify member operand. * config/tc-cris.h (TARGET_MACH): Define. (cris_mach): Declare. * doc/as.texinfo (Overview) <CRIS>: Add --march=... * doc/c-cris.texi (CRIS-Symbols): New node for built-in symbols. (CRIS-Opts): Document --march=... (CRIS-Pseudos): Document .arch.
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If the operand is found to fit the range, a @code{lapc} mnemonic
will translate to a @code{lapcq} instruction. Use @code{lapc.d}
to force the 32-bit @code{lapc} instruction.
Similarly, the @code{addo} mnemonic will translate to the
shortest fitting instruction of @code{addoq}, @code{addo.w} and
@code{addo.d}, when used with a operand that is a constant known
at assembly time.
@node CRIS-Symbols
@section Symbols
@cindex Symbols, built-in, CRIS
@cindex Symbols, CRIS, built-in
@cindex CRIS built-in symbols
@cindex Built-in symbols, CRIS
Some symbols are defined by the assembler. They're intended to
be used in conditional assembly, for example:
@smallexample
.if ..asm.arch.cris.v32
@var{code for CRIS v32}
.elseif ..asm.arch.cris.common_v10_v32
@var{code common to CRIS v32 and CRIS v10}
.elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10
@var{code for v10}
.else
.error "Code needs to be added here."
.endif
@end smallexample
These symbols are defined in the assembler, reflecting
command-line options, either when specified or the default.
They are always defined, to 0 or 1.
@table @code
@item ..asm.arch.cris.any_v0_v10
This symbol is non-zero when @option{--march=v0_v10} is specified
or the default.
@item ..asm.arch.cris.common_v10_v32
Set according to the option @option{--march=common_v10_v32}.
@item ..asm.arch.cris.v10
Reflects the option @option{--march=v10}.
@item ..asm.arch.cris.v32
Corresponds to @option{--march=v10}.
@end table
Speaking of symbols, when a symbol is used in code, it can have
a suffix modifying its value for use in position-independent
code. @xref{CRIS-Pic}.
@node CRIS-Syntax
@section Syntax
There are different aspects of the CRIS assembly syntax.
@menu
* CRIS-Chars:: Special Characters
* CRIS-Pic:: Position-Independent Code Symbols
* CRIS-Regs:: Register Names
* CRIS-Pseudos:: Assembler Directives
@end menu
@node CRIS-Chars
@subsection Special Characters
@cindex line comment characters, CRIS
@cindex CRIS line comment characters
The character @samp{#} is a line comment character. It starts a
comment if and only if it is placed at the beginning of a line.
A @samp{;} character starts a comment anywhere on the line,
causing all characters up to the end of the line to be ignored.
A @samp{@@} character is handled as a line separator equivalent
to a logical new-line character (except in a comment), so
separate instructions can be specified on a single line.
@node CRIS-Pic
@subsection Symbols in position-independent code
@cindex Symbols in position-independent code, CRIS
@cindex CRIS symbols in position-independent code
@cindex Position-independent code, symbols in, CRIS
When generating @anchor{crispic}position-independent code (SVR4
* configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTED DEFAULT_CRIS_ARCH. Handle crisv32-*-linux-gnu* like cris-*-linux-gnu* and crisv32-*-* like cris-*-*. * configure: Regenerate. * config/tc-cris.c (enum cris_archs): New. (cris_mach, cris_arch_from_string, s_cris_arch, get_sup_reg) (cris_insn_ver_valid_for_arch): New functions. (DEFAULT_CRIS_ARCH): New macro, default to cris_any_v0_v10. (cris_arch): New variable. (md_pseudo_table): New pseudo .arch. (err_for_dangerous_mul_placement): Initialize according to DEFAULT_CRIS_ARCH. (STATE_COND_BRANCH): Renamed from STATE_CONDITIONAL_BRANCH. All users changed. (STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON) (STATE_ABS_BRANCH_V32, STATE_LAPC, BRANCH_BF_V32, BRANCH_BB_V32) (BRANCH_WF_V32, BRANCH_WB_V32): New. (BRANCH_BF, BRANCH_BB, BRANCH_WF, BRANCH_WB): Don't undef after use in md_cris_relax_table. (md_cris_relax_table): Add entries for STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Update and improve head comment. (OPTION_PIC): Define in terms of previous option, OPTION_US. (OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): Similar. (OPTION_ARCH): New. (md_longopts): New option --march=... (cris_any_v0_v10_long_jump_size, crisv32_long_jump_size): New macros. (md_long_jump_size): Initialize in terms of DEFAULT_CRIS_ARCH. (HANDLE_RELAXABLE): New macro. (md_estimate_size_before_relax): Use HANDLE_RELAXABLE for common cases. Check for weak symbols and assume not relaxable. Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Use new variable symbolP, not fragP->fr_symbol. (md_convert_frag): Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. (cris_create_short_jump): Adjust for CRISv32. (md_create_long_jump): Ditto. Emit error for common_v10_v32. (md_begin): Define symbols "..asm.arch.cris.v32", "..asm.arch.cris.v10", "..asm.arch.cris.common_v10_v32" and "..asm.arch.cris.any_v0_v10". Use cris_insn_ver_valid_for_arch when entering opcode table entry points. (md_assemble): Adjust branch handling for CRISv32. Handle LAPC relaxation. In fix_new_exp call for main insn, pass 1 for pcrel parameter for 8, 16 and 32-bit pc-relative insns and LAPC. (cris_process_instruction): Initialize out_insnp->insn_type to CRIS_INSN_NONE, not CRIS_INSN_NORMAL. <case ']', '[', 'A', 'd', 'Q', 'N', 'n', 'Y', 'U', 'u', 'T'>: New cases. <case 'm'>: Check that modified_char == '.'. <invalid operands>: Consume the rest of the line. When operands don't match, skip over subsequent insns with non-matching version specifier but same mnemonic. <immediate constant, case SIZE_SPEC_REG>: Immediate operands for special registers in CRISv32 are always 32 bit long. <immediate constant, case SIZE_FIELD_SIGNED, SIZE_FIELD_UNSIGNED>: New cases. (get_gen_reg): Only recognize "PC" when followed by "+]" for v32 and compatible. Recognize "ACR" for v32, unless followed by "+". (get_spec_reg): Consider cris_arch when looking up register. (get_autoinc_prefix_or_indir_op): Don't recognize assignment for v32 or compatible. (get_3op_or_dip_prefix_op): Check for ']' after seeing '[rN+'. (cris_get_expression): Restore input_line_pointer if failing "early". (get_flags): Consider cris_arch and recognize flags accordingly. (branch_disp): Adjust for CRISv32. (gen_cond_branch_32): Similar. Emit error for common_v10_v32. (cris_number_to_imm): Use as_bad_where, not as_bad. Remove related FIXME. Don't insist on BFD_RELOC_32_PCREL fixup to be resolved. Don't enter zeros in object file for BFD_RELOC_32_PCREL. <case BFD_RELOC_CRIS_LAPCQ_OFFSET, BFD_RELOC_CRIS_SIGNED_16> <case BFD_RELOC_CRIS_SIGNED_8>: New case. (md_parse_option): Break out "return 1". <OPTION_ARCH> New case. (tc_gen_reloc): <case BFD_RELOC_CRIS_LAPCQ_OFFSET> <case BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_SIGNED_8> <case BFD_RELOC_CRIS_UNSIGNED_8, BFD_RELOC_CRIS_UNSIGNED_16> <case BFD_RELOC_32_PCREL>: New cases. Addends for non-zero fx_pcrel are too in fx_offset. (md_show_usage): Show --march=<arch>. (md_apply_fix3): Adjust val for BFD_RELOC_CRIS_LAPCQ_OFFSET. (md_pcrel_from): BFD_RELOC_CRIS_LAPCQ_OFFSET is PC-relative too. (s_syntax) <struct syntaxes>: Properly constify member operand. * config/tc-cris.h (TARGET_MACH): Define. (cris_mach): Declare. * doc/as.texinfo (Overview) <CRIS>: Add --march=... * doc/c-cris.texi (CRIS-Symbols): New node for built-in symbols. (CRIS-Opts): Document --march=... (CRIS-Pseudos): Document .arch.
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PIC) for use in cris-axis-linux-gnu or crisv32-axis-linux-gnu
shared libraries, symbol
suffixes are used to specify what kind of run-time symbol lookup
will be used, expressed in the object as different
@emph{relocation types}. Usually, all absolute symbol values
must be located in a table, the @emph{global offset table},
leaving the code position-independent; independent of values of
global symbols and independent of the address of the code. The
suffix modifies the value of the symbol, into for example an
index into the global offset table where the real symbol value
is entered, or a PC-relative value, or a value relative to the
start of the global offset table. All symbol suffixes start
with the character @samp{:} (omitted in the list below). Every
symbol use in code or a read-only section must therefore have a
PIC suffix to enable a useful shared library to be created.
Usually, these constructs must not be used with an additive
constant offset as is usually allowed, i.e.@: no 4 as in
@code{symbol + 4} is allowed. This restriction is checked at
link-time, not at assembly-time.
@table @code
@item GOT
Attaching this suffix to a symbol in an instruction causes the
symbol to be entered into the global offset table. The value is
a 32-bit index for that symbol into the global offset table.
The name of the corresponding relocation is
@samp{R_CRIS_32_GOT}. Example: @code{move.d
[$r0+extsym:GOT],$r9}
@item GOT16
Same as for @samp{GOT}, but the value is a 16-bit index into the
global offset table. The corresponding relocation is
@samp{R_CRIS_16_GOT}. Example: @code{move.d
[$r0+asymbol:GOT16],$r10}
@item PLT
This suffix is used for function symbols. It causes a
@emph{procedure linkage table}, an array of code stubs, to be
created at the time the shared object is created or linked
against, together with a global offset table entry. The value
is a pc-relative offset to the corresponding stub code in the
procedure linkage table. This arrangement causes the run-time
symbol resolver to be called to look up and set the value of the
symbol the first time the function is called (at latest;
depending environment variables). It is only safe to leave the
symbol unresolved this way if all references are function calls.
The name of the relocation is @samp{R_CRIS_32_PLT_PCREL}.
Example: @code{add.d fnname:PLT,$pc}
@item PLTG
Like PLT, but the value is relative to the beginning of the
global offset table. The relocation is
@samp{R_CRIS_32_PLT_GOTREL}. Example: @code{move.d
fnname:PLTG,$r3}
@item GOTPLT
Similar to @samp{PLT}, but the value of the symbol is a 32-bit
index into the global offset table. This is somewhat of a mix
between the effect of the @samp{GOT} and the @samp{PLT} suffix;
the difference to @samp{GOT} is that there will be a procedure
linkage table entry created, and that the symbol is assumed to
be a function entry and will be resolved by the run-time
resolver as with @samp{PLT}. The relocation is
@samp{R_CRIS_32_GOTPLT}. Example: @code{jsr
[$r0+fnname:GOTPLT]}
@item GOTPLT16
A variant of @samp{GOTPLT} giving a 16-bit value. Its
relocation name is @samp{R_CRIS_16_GOTPLT}. Example: @code{jsr
[$r0+fnname:GOTPLT16]}
@item GOTOFF
This suffix must only be attached to a local symbol, but may be
used in an expression adding an offset. The value is the
address of the symbol relative to the start of the global offset
table. The relocation name is @samp{R_CRIS_32_GOTREL}.
Example: @code{move.d [$r0+localsym:GOTOFF],r3}
@end table
@node CRIS-Regs
@subsection Register names
@cindex register names, CRIS
@cindex CRIS register names
A @samp{$} character may always prefix a general or special
register name in an instruction operand but is mandatory when
the option @option{--no-underscore} is specified or when the
@code{.syntax register_prefix} directive is in effect
(@pxref{crisnous}). Register names are case-insensitive.
@node CRIS-Pseudos
@subsection Assembler Directives
@cindex assembler directives, CRIS
@cindex pseudo-ops, CRIS
@cindex CRIS assembler directives
@cindex CRIS pseudo-ops
There are a few CRIS-specific pseudo-directives in addition to
the generic ones. @xref{Pseudo Ops}. Constants emitted by
pseudo-directives are in little-endian order for CRIS. There is
no support for floating-point-specific directives for CRIS.
@table @code
@item .dword EXPRESSIONS
@cindex assembler directive .dword, CRIS
@cindex pseudo-op .dword, CRIS
@cindex CRIS assembler directive .dword
@cindex CRIS pseudo-op .dword
The @code{.dword} directive is a synonym for @code{.int},
expecting zero or more EXPRESSIONS, separated by commas. For
each expression, a 32-bit little-endian constant is emitted.
@item .syntax ARGUMENT
@cindex assembler directive .syntax, CRIS
@cindex pseudo-op .syntax, CRIS
@cindex CRIS assembler directive .syntax
@cindex CRIS pseudo-op .syntax
* configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTED DEFAULT_CRIS_ARCH. Handle crisv32-*-linux-gnu* like cris-*-linux-gnu* and crisv32-*-* like cris-*-*. * configure: Regenerate. * config/tc-cris.c (enum cris_archs): New. (cris_mach, cris_arch_from_string, s_cris_arch, get_sup_reg) (cris_insn_ver_valid_for_arch): New functions. (DEFAULT_CRIS_ARCH): New macro, default to cris_any_v0_v10. (cris_arch): New variable. (md_pseudo_table): New pseudo .arch. (err_for_dangerous_mul_placement): Initialize according to DEFAULT_CRIS_ARCH. (STATE_COND_BRANCH): Renamed from STATE_CONDITIONAL_BRANCH. All users changed. (STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON) (STATE_ABS_BRANCH_V32, STATE_LAPC, BRANCH_BF_V32, BRANCH_BB_V32) (BRANCH_WF_V32, BRANCH_WB_V32): New. (BRANCH_BF, BRANCH_BB, BRANCH_WF, BRANCH_WB): Don't undef after use in md_cris_relax_table. (md_cris_relax_table): Add entries for STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Update and improve head comment. (OPTION_PIC): Define in terms of previous option, OPTION_US. (OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): Similar. (OPTION_ARCH): New. (md_longopts): New option --march=... (cris_any_v0_v10_long_jump_size, crisv32_long_jump_size): New macros. (md_long_jump_size): Initialize in terms of DEFAULT_CRIS_ARCH. (HANDLE_RELAXABLE): New macro. (md_estimate_size_before_relax): Use HANDLE_RELAXABLE for common cases. Check for weak symbols and assume not relaxable. Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Use new variable symbolP, not fragP->fr_symbol. (md_convert_frag): Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. (cris_create_short_jump): Adjust for CRISv32. (md_create_long_jump): Ditto. Emit error for common_v10_v32. (md_begin): Define symbols "..asm.arch.cris.v32", "..asm.arch.cris.v10", "..asm.arch.cris.common_v10_v32" and "..asm.arch.cris.any_v0_v10". Use cris_insn_ver_valid_for_arch when entering opcode table entry points. (md_assemble): Adjust branch handling for CRISv32. Handle LAPC relaxation. In fix_new_exp call for main insn, pass 1 for pcrel parameter for 8, 16 and 32-bit pc-relative insns and LAPC. (cris_process_instruction): Initialize out_insnp->insn_type to CRIS_INSN_NONE, not CRIS_INSN_NORMAL. <case ']', '[', 'A', 'd', 'Q', 'N', 'n', 'Y', 'U', 'u', 'T'>: New cases. <case 'm'>: Check that modified_char == '.'. <invalid operands>: Consume the rest of the line. When operands don't match, skip over subsequent insns with non-matching version specifier but same mnemonic. <immediate constant, case SIZE_SPEC_REG>: Immediate operands for special registers in CRISv32 are always 32 bit long. <immediate constant, case SIZE_FIELD_SIGNED, SIZE_FIELD_UNSIGNED>: New cases. (get_gen_reg): Only recognize "PC" when followed by "+]" for v32 and compatible. Recognize "ACR" for v32, unless followed by "+". (get_spec_reg): Consider cris_arch when looking up register. (get_autoinc_prefix_or_indir_op): Don't recognize assignment for v32 or compatible. (get_3op_or_dip_prefix_op): Check for ']' after seeing '[rN+'. (cris_get_expression): Restore input_line_pointer if failing "early". (get_flags): Consider cris_arch and recognize flags accordingly. (branch_disp): Adjust for CRISv32. (gen_cond_branch_32): Similar. Emit error for common_v10_v32. (cris_number_to_imm): Use as_bad_where, not as_bad. Remove related FIXME. Don't insist on BFD_RELOC_32_PCREL fixup to be resolved. Don't enter zeros in object file for BFD_RELOC_32_PCREL. <case BFD_RELOC_CRIS_LAPCQ_OFFSET, BFD_RELOC_CRIS_SIGNED_16> <case BFD_RELOC_CRIS_SIGNED_8>: New case. (md_parse_option): Break out "return 1". <OPTION_ARCH> New case. (tc_gen_reloc): <case BFD_RELOC_CRIS_LAPCQ_OFFSET> <case BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_SIGNED_8> <case BFD_RELOC_CRIS_UNSIGNED_8, BFD_RELOC_CRIS_UNSIGNED_16> <case BFD_RELOC_32_PCREL>: New cases. Addends for non-zero fx_pcrel are too in fx_offset. (md_show_usage): Show --march=<arch>. (md_apply_fix3): Adjust val for BFD_RELOC_CRIS_LAPCQ_OFFSET. (md_pcrel_from): BFD_RELOC_CRIS_LAPCQ_OFFSET is PC-relative too. (s_syntax) <struct syntaxes>: Properly constify member operand. * config/tc-cris.h (TARGET_MACH): Define. (cris_mach): Declare. * doc/as.texinfo (Overview) <CRIS>: Add --march=... * doc/c-cris.texi (CRIS-Symbols): New node for built-in symbols. (CRIS-Opts): Document --march=... (CRIS-Pseudos): Document .arch.
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The @code{.syntax} directive takes as @var{ARGUMENT} one of the
following case-sensitive choices.
@table @code
@item no_register_prefix
The @code{.syntax no_register_prefix} @anchor{crisnous}directive
makes a @samp{$} character prefix on all registers optional. It
overrides a previous setting, including the corresponding effect
of the option @option{--no-underscore}. If this directive is
used when ordinary symbols do not have a @samp{_} character
prefix, care must be taken to avoid ambiguities whether an
operand is a register or a symbol; using symbols with names the
same as general or special registers then invoke undefined
behavior.
@item register_prefix
This directive makes a @samp{$} character prefix on all
registers mandatory. It overrides a previous setting, including
the corresponding effect of the option @option{--underscore}.
@item leading_underscore
This is an assertion directive, emitting an error if the
@option{--no-underscore} option is in effect.
@item no_leading_underscore
This is the opposite of the @code{.syntax leading_underscore}
directive and emits an error if the option @option{--underscore}
is in effect.
@end table
* configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTED DEFAULT_CRIS_ARCH. Handle crisv32-*-linux-gnu* like cris-*-linux-gnu* and crisv32-*-* like cris-*-*. * configure: Regenerate. * config/tc-cris.c (enum cris_archs): New. (cris_mach, cris_arch_from_string, s_cris_arch, get_sup_reg) (cris_insn_ver_valid_for_arch): New functions. (DEFAULT_CRIS_ARCH): New macro, default to cris_any_v0_v10. (cris_arch): New variable. (md_pseudo_table): New pseudo .arch. (err_for_dangerous_mul_placement): Initialize according to DEFAULT_CRIS_ARCH. (STATE_COND_BRANCH): Renamed from STATE_CONDITIONAL_BRANCH. All users changed. (STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON) (STATE_ABS_BRANCH_V32, STATE_LAPC, BRANCH_BF_V32, BRANCH_BB_V32) (BRANCH_WF_V32, BRANCH_WB_V32): New. (BRANCH_BF, BRANCH_BB, BRANCH_WF, BRANCH_WB): Don't undef after use in md_cris_relax_table. (md_cris_relax_table): Add entries for STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Update and improve head comment. (OPTION_PIC): Define in terms of previous option, OPTION_US. (OPTION_MULBUG_ABORT_ON, OPTION_MULBUG_ABORT_OFF): Similar. (OPTION_ARCH): New. (md_longopts): New option --march=... (cris_any_v0_v10_long_jump_size, crisv32_long_jump_size): New macros. (md_long_jump_size): Initialize in terms of DEFAULT_CRIS_ARCH. (HANDLE_RELAXABLE): New macro. (md_estimate_size_before_relax): Use HANDLE_RELAXABLE for common cases. Check for weak symbols and assume not relaxable. Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. Use new variable symbolP, not fragP->fr_symbol. (md_convert_frag): Handle STATE_COND_BRANCH_V32, STATE_COND_BRANCH_COMMON, STATE_ABS_BRANCH_V32, STATE_LAPC. (cris_create_short_jump): Adjust for CRISv32. (md_create_long_jump): Ditto. Emit error for common_v10_v32. (md_begin): Define symbols "..asm.arch.cris.v32", "..asm.arch.cris.v10", "..asm.arch.cris.common_v10_v32" and "..asm.arch.cris.any_v0_v10". Use cris_insn_ver_valid_for_arch when entering opcode table entry points. (md_assemble): Adjust branch handling for CRISv32. Handle LAPC relaxation. In fix_new_exp call for main insn, pass 1 for pcrel parameter for 8, 16 and 32-bit pc-relative insns and LAPC. (cris_process_instruction): Initialize out_insnp->insn_type to CRIS_INSN_NONE, not CRIS_INSN_NORMAL. <case ']', '[', 'A', 'd', 'Q', 'N', 'n', 'Y', 'U', 'u', 'T'>: New cases. <case 'm'>: Check that modified_char == '.'. <invalid operands>: Consume the rest of the line. When operands don't match, skip over subsequent insns with non-matching version specifier but same mnemonic. <immediate constant, case SIZE_SPEC_REG>: Immediate operands for special registers in CRISv32 are always 32 bit long. <immediate constant, case SIZE_FIELD_SIGNED, SIZE_FIELD_UNSIGNED>: New cases. (get_gen_reg): Only recognize "PC" when followed by "+]" for v32 and compatible. Recognize "ACR" for v32, unless followed by "+". (get_spec_reg): Consider cris_arch when looking up register. (get_autoinc_prefix_or_indir_op): Don't recognize assignment for v32 or compatible. (get_3op_or_dip_prefix_op): Check for ']' after seeing '[rN+'. (cris_get_expression): Restore input_line_pointer if failing "early". (get_flags): Consider cris_arch and recognize flags accordingly. (branch_disp): Adjust for CRISv32. (gen_cond_branch_32): Similar. Emit error for common_v10_v32. (cris_number_to_imm): Use as_bad_where, not as_bad. Remove related FIXME. Don't insist on BFD_RELOC_32_PCREL fixup to be resolved. Don't enter zeros in object file for BFD_RELOC_32_PCREL. <case BFD_RELOC_CRIS_LAPCQ_OFFSET, BFD_RELOC_CRIS_SIGNED_16> <case BFD_RELOC_CRIS_SIGNED_8>: New case. (md_parse_option): Break out "return 1". <OPTION_ARCH> New case. (tc_gen_reloc): <case BFD_RELOC_CRIS_LAPCQ_OFFSET> <case BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_SIGNED_8> <case BFD_RELOC_CRIS_UNSIGNED_8, BFD_RELOC_CRIS_UNSIGNED_16> <case BFD_RELOC_32_PCREL>: New cases. Addends for non-zero fx_pcrel are too in fx_offset. (md_show_usage): Show --march=<arch>. (md_apply_fix3): Adjust val for BFD_RELOC_CRIS_LAPCQ_OFFSET. (md_pcrel_from): BFD_RELOC_CRIS_LAPCQ_OFFSET is PC-relative too. (s_syntax) <struct syntaxes>: Properly constify member operand. * config/tc-cris.h (TARGET_MACH): Define. (cris_mach): Declare. * doc/as.texinfo (Overview) <CRIS>: Add --march=... * doc/c-cris.texi (CRIS-Symbols): New node for built-in symbols. (CRIS-Opts): Document --march=... (CRIS-Pseudos): Document .arch.
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@item .arch ARGUMENT
@cindex assembler directive .arch, CRIS
@cindex pseudo-op .arch, CRIS
@cindex CRIS assembler directive .arch
@cindex CRIS pseudo-op .arch
This is an assertion directive, giving an error if the specified
@var{ARGUMENT} is not the same as the specified or default value
for the @option{--march=@var{architecture}} option
(@pxref{march-option}).
@c If you compare with md_pseudo_table, you see that we don't
@c document ".file" and ".loc" here. This is because we're just
@c wrapping the corresponding ELF function and emitting an error for
@c a.out.
@end table