2015-04-02 22:07:27 +08:00
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ARCH=aarch64
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MACHINE=
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2018-03-02 18:47:25 +08:00
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NOP=0x1f2003d5
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2015-04-02 22:07:27 +08:00
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SCRIPT_NAME=elf
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ELFSIZE=64
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OUTPUT_FORMAT="elf64-littleaarch64"
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BIG_OUTPUT_FORMAT="elf64-bigaarch64"
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LITTLE_OUTPUT_FORMAT="elf64-littleaarch64"
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NO_REL_RELOCS=yes
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TEMPLATE_NAME=elf32
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EXTRA_EM_FILE=aarch64elf
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GENERATE_SHLIB_SCRIPT=yes
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GENERATE_PIE_SCRIPT=yes
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MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
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COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
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SEPARATE_GOTPLT=24
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IREL_IN_PLT=
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TEXT_START_ADDR=0x400000
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DATA_START_SYMBOLS='PROVIDE (__data_start = .);';
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# AArch64 does not support .s* sections.
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NO_SMALL_DATA=yes
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OTHER_BSS_SYMBOLS='__bss_start__ = .;'
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OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
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OTHER_END_SYMBOLS='__end__ = . ;'
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OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }'
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ATTRS_SECTIONS='.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }'
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# Ensure each PLT entry is aligned to a cache line.
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PLT=".plt ${RELOCATING-0} : ALIGN(16) { *(.plt)${IREL_IN_PLT+ *(.iplt)} }"
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