mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2025-01-12 12:16:04 +08:00
412 lines
9.3 KiB
ArmAsm
412 lines
9.3 KiB
ArmAsm
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//Original:/testcases/core/c_dsp32shift_pack/c_dsp32shift_pack.dsp
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// Spec Reference: dsp32shift pack
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# mach: bfin
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.include "testutils.inc"
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start
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imm32 r0, 0x01230000;
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imm32 r1, 0x02345678;
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imm32 r2, 0x03456789;
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imm32 r3, 0x0456789a;
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imm32 r4, 0x056789ab;
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imm32 r5, 0x06789abc;
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imm32 r6, 0x0789abcd;
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imm32 r7, 0x089abcde;
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R1 = PACK( R0.L , R0.L );
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R2 = PACK( R1.L , R0.H );
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R3 = PACK( R2.H , R0.L );
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R4 = PACK( R3.H , R0.H );
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R5 = PACK( R4.L , R0.L );
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R6 = PACK( R5.L , R0.H );
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R7 = PACK( R6.H , R0.L );
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R0 = PACK( R7.H , R0.H );
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CHECKREG r1, 0x00000000;
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CHECKREG r0, 0x00000123;
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CHECKREG r2, 0x00000123;
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CHECKREG r3, 0x00000000;
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CHECKREG r4, 0x00000123;
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CHECKREG r5, 0x01230000;
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CHECKREG r6, 0x00000123;
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CHECKREG r7, 0x00000000;
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imm32 r0, 0x11230001;
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imm32 r1, 0x12345678;
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imm32 r2, 0x1bcdef12;
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imm32 r3, 0x1456789a;
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imm32 r4, 0x1cdef012;
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imm32 r5, 0x1456789a;
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imm32 r6, 0x1789abcd;
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imm32 r7, 0x189abcde;
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R2 = PACK( R0.L , R1.L );
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R3 = PACK( R1.L , R1.H );
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R4 = PACK( R2.H , R1.L );
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R5 = PACK( R3.H , R1.H );
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R6 = PACK( R4.L , R1.L );
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R7 = PACK( R5.L , R1.H );
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R0 = PACK( R6.H , R1.L );
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R1 = PACK( R7.H , R1.H );
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CHECKREG r0, 0x56785678;
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CHECKREG r1, 0x12341234;
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CHECKREG r2, 0x00015678;
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CHECKREG r3, 0x56781234;
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CHECKREG r4, 0x00015678;
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CHECKREG r5, 0x56781234;
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CHECKREG r6, 0x56785678;
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CHECKREG r7, 0x12341234;
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imm32 r0, 0x20230002;
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imm32 r1, 0x21345678;
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imm32 r2, 0x22456789;
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imm32 r3, 0x2356789a;
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imm32 r4, 0x246789ab;
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imm32 r5, 0x25789abc;
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imm32 r6, 0x2689abcd;
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imm32 r7, 0x279abcde;
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R3 = PACK( R0.L , R2.L );
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R4 = PACK( R1.L , R2.H );
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R5 = PACK( R2.H , R2.L );
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R6 = PACK( R3.H , R2.H );
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R7 = PACK( R4.L , R2.L );
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R0 = PACK( R5.L , R2.H );
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R1 = PACK( R6.H , R2.L );
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R2 = PACK( R7.H , R2.H );
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CHECKREG r0, 0x67892245;
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CHECKREG r1, 0x00026789;
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CHECKREG r2, 0x22452245;
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CHECKREG r3, 0x00026789;
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CHECKREG r4, 0x56782245;
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CHECKREG r5, 0x22456789;
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CHECKREG r6, 0x00022245;
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CHECKREG r7, 0x22456789;
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imm32 r0, 0x31230003;
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imm32 r1, 0x31345678;
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imm32 r2, 0x31456789;
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imm32 r3, 0x3156789a;
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imm32 r4, 0x316789ab;
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imm32 r5, 0x31789abc;
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imm32 r6, 0x3189abcd;
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imm32 r7, 0x311abcde;
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R4 = PACK( R0.L , R3.L );
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R5 = PACK( R1.L , R3.H );
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R6 = PACK( R2.H , R3.L );
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R7 = PACK( R3.H , R3.H );
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R0 = PACK( R4.L , R3.L );
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R1 = PACK( R5.L , R3.H );
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R2 = PACK( R6.H , R3.L );
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R3 = PACK( R7.H , R3.H );
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CHECKREG r0, 0x789A789A;
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CHECKREG r1, 0x31563156;
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CHECKREG r2, 0x3145789A;
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CHECKREG r3, 0x31563156;
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CHECKREG r4, 0x0003789A;
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CHECKREG r5, 0x56783156;
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CHECKREG r6, 0x3145789A;
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CHECKREG r7, 0x31563156;
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imm32 r0, 0x41230004;
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imm32 r1, 0x42345678;
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imm32 r2, 0x43456789;
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imm32 r3, 0x4456789a;
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imm32 r4, 0x456789ab;
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imm32 r5, 0x46789abc;
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imm32 r6, 0x4789abcd;
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imm32 r7, 0x489abcde;
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R0 = PACK( R0.L , R4.L );
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R1 = PACK( R1.L , R4.H );
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R2 = PACK( R2.H , R4.L );
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R3 = PACK( R3.H , R4.H );
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R4 = PACK( R4.L , R4.L );
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R5 = PACK( R5.L , R4.H );
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R6 = PACK( R6.H , R4.L );
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R7 = PACK( R7.H , R4.H );
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CHECKREG r0, 0x000489AB;
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CHECKREG r1, 0x56784567;
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CHECKREG r2, 0x434589AB;
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CHECKREG r3, 0x44564567;
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CHECKREG r4, 0x89AB89AB;
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CHECKREG r5, 0x9ABC89AB;
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CHECKREG r6, 0x478989AB;
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CHECKREG r7, 0x489A89AB;
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imm32 r0, 0x51230005;
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imm32 r1, 0x52345678;
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imm32 r2, 0x53456789;
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imm32 r3, 0x5456789a;
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imm32 r4, 0x556789ab;
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imm32 r5, 0x56789abc;
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imm32 r6, 0x5789abcd;
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imm32 r7, 0x589abcde;
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R6 = PACK( R0.L , R5.L );
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R7 = PACK( R1.L , R5.H );
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R0 = PACK( R2.H , R5.L );
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R1 = PACK( R3.H , R5.H );
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R2 = PACK( R4.L , R5.L );
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R3 = PACK( R5.L , R5.H );
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R4 = PACK( R6.H , R5.L );
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R5 = PACK( R7.H , R5.H );
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CHECKREG r0, 0x53459ABC;
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CHECKREG r1, 0x54565678;
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CHECKREG r2, 0x89AB9ABC;
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CHECKREG r3, 0x9ABC5678;
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CHECKREG r4, 0x00059ABC;
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CHECKREG r5, 0x56785678;
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CHECKREG r6, 0x00059ABC;
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CHECKREG r7, 0x56785678;
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imm32 r0, 0x61230006;
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imm32 r1, 0x62345678;
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imm32 r2, 0x63456789;
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imm32 r3, 0x6456789a;
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imm32 r4, 0x656789ab;
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imm32 r5, 0x66789abc;
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imm32 r6, 0x6789abcd;
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imm32 r7, 0x689abcde;
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R7 = PACK( R0.L , R6.L );
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R0 = PACK( R1.L , R6.H );
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R1 = PACK( R2.H , R6.L );
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R2 = PACK( R3.H , R6.H );
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R3 = PACK( R4.L , R6.L );
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R4 = PACK( R5.L , R6.H );
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R5 = PACK( R6.H , R6.L );
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R6 = PACK( R7.H , R6.H );
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CHECKREG r0, 0x56786789;
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CHECKREG r1, 0x6345ABCD;
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CHECKREG r2, 0x64566789;
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CHECKREG r3, 0x89ABABCD;
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CHECKREG r4, 0x9ABC6789;
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CHECKREG r5, 0x6789ABCD;
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CHECKREG r6, 0x00066789;
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CHECKREG r7, 0x0006ABCD;
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imm32 r0, 0x71230007;
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imm32 r1, 0x72345678;
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imm32 r2, 0x73456789;
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imm32 r3, 0x7456789a;
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imm32 r4, 0x756789ab;
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imm32 r5, 0x76789abc;
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imm32 r6, 0x7789abcd;
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imm32 r7, 0x789abcde;
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R0 = PACK( R0.L , R7.L );
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R1 = PACK( R1.L , R7.H );
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R2 = PACK( R2.H , R7.L );
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R3 = PACK( R3.H , R7.H );
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R4 = PACK( R4.L , R7.L );
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R5 = PACK( R5.L , R7.H );
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R6 = PACK( R6.H , R7.L );
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R7 = PACK( R7.H , R7.H );
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CHECKREG r0, 0x0007BCDE;
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CHECKREG r1, 0x5678789A;
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CHECKREG r2, 0x7345BCDE;
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CHECKREG r3, 0x7456789A;
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CHECKREG r4, 0x89ABBCDE;
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CHECKREG r5, 0x9ABC789A;
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CHECKREG r6, 0x7789BCDE;
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CHECKREG r7, 0x789A789A;
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imm32 r0, 0x81230008;
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imm32 r1, 0x82345678;
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imm32 r2, 0x83456789;
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imm32 r3, 0x8456789a;
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imm32 r4, 0x856789ab;
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imm32 r5, 0x86789abc;
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imm32 r6, 0x8789abcd;
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imm32 r7, 0x889abcde;
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R0 = PACK( R0.L , R0.L );
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R1 = PACK( R1.L , R0.H );
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R2 = PACK( R2.H , R0.L );
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R3 = PACK( R3.H , R0.H );
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R4 = PACK( R4.L , R0.L );
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R5 = PACK( R5.L , R0.H );
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R6 = PACK( R6.H , R0.L );
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R7 = PACK( R7.H , R0.H );
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CHECKREG r0, 0x00080008;
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CHECKREG r1, 0x56780008;
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CHECKREG r2, 0x83450008;
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CHECKREG r3, 0x84560008;
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CHECKREG r4, 0x89AB0008;
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CHECKREG r5, 0x9ABC0008;
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CHECKREG r6, 0x87890008;
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CHECKREG r7, 0x889A0008;
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imm32 r0, 0x91230009;
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imm32 r1, 0x92345678;
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imm32 r2, 0x93456789;
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imm32 r3, 0x9456789a;
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imm32 r4, 0x956789ab;
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imm32 r5, 0x96789abc;
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imm32 r6, 0x9789abcd;
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imm32 r7, 0x989abcde;
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R0 = PACK( R0.L , R1.L );
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R1 = PACK( R1.L , R1.H );
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R2 = PACK( R2.H , R1.L );
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R3 = PACK( R3.H , R1.H );
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R4 = PACK( R4.L , R1.L );
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R5 = PACK( R5.L , R1.H );
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R6 = PACK( R6.H , R1.L );
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R7 = PACK( R7.H , R1.H );
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CHECKREG r0, 0x00095678;
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CHECKREG r1, 0x56789234;
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CHECKREG r2, 0x93459234;
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CHECKREG r3, 0x94565678;
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CHECKREG r4, 0x89AB9234;
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CHECKREG r5, 0x9ABC5678;
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CHECKREG r6, 0x97899234;
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CHECKREG r7, 0x989A5678;
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imm32 r0, 0xa123000a;
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imm32 r1, 0xa2345678;
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imm32 r2, 0xa3456789;
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imm32 r3, 0xa456789a;
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imm32 r4, 0xa56789ab;
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imm32 r5, 0xa6789abc;
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imm32 r6, 0xa789abcd;
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imm32 r7, 0xa89abcde;
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R0 = PACK( R0.L , R2.L );
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R1 = PACK( R1.L , R2.H );
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R2 = PACK( R2.H , R2.L );
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R3 = PACK( R3.H , R2.H );
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R4 = PACK( R4.L , R2.L );
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R5 = PACK( R5.L , R2.H );
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R6 = PACK( R6.H , R2.L );
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R7 = PACK( R7.H , R2.H );
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CHECKREG r0, 0x000A6789;
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CHECKREG r1, 0x5678A345;
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CHECKREG r2, 0xA3456789;
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CHECKREG r3, 0xA456A345;
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CHECKREG r4, 0x89AB6789;
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CHECKREG r5, 0x9ABCA345;
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CHECKREG r6, 0xA7896789;
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CHECKREG r7, 0xA89AA345;
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imm32 r0, 0xb123000b;
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imm32 r1, 0xb2345678;
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imm32 r2, 0xb3456789;
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imm32 r3, 0xb456789a;
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imm32 r4, 0xb56789ab;
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imm32 r5, 0xb6789abc;
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imm32 r6, 0xb789abcd;
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imm32 r7, 0xb89abcde;
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R0 = PACK( R0.L , R3.L );
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R1 = PACK( R1.L , R3.H );
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R2 = PACK( R2.H , R3.L );
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R3 = PACK( R3.H , R3.H );
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R4 = PACK( R4.L , R3.L );
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R5 = PACK( R5.L , R3.H );
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R6 = PACK( R6.H , R3.L );
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R7 = PACK( R7.H , R3.H );
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CHECKREG r0, 0x000B789A;
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CHECKREG r1, 0x5678B456;
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CHECKREG r2, 0xB345789A;
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CHECKREG r3, 0xB456B456;
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CHECKREG r4, 0x89ABB456;
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CHECKREG r5, 0x9ABCB456;
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CHECKREG r6, 0xB789B456;
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CHECKREG r7, 0xB89AB456;
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imm32 r0, 0xc123000c;
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imm32 r1, 0xc2345678;
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imm32 r2, 0xc3456789;
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|
|
imm32 r3, 0xc456789a;
|
||
|
|
imm32 r4, 0xc56789ab;
|
||
|
|
imm32 r5, 0xc6789abc;
|
||
|
|
imm32 r6, 0xc789abcd;
|
||
|
|
imm32 r7, 0xc89abcde;
|
||
|
|
R0 = PACK( R0.L , R4.L );
|
||
|
|
R1 = PACK( R1.L , R4.H );
|
||
|
|
R2 = PACK( R2.H , R4.L );
|
||
|
|
R3 = PACK( R3.H , R4.H );
|
||
|
|
R4 = PACK( R4.L , R4.L );
|
||
|
|
R5 = PACK( R5.L , R4.H );
|
||
|
|
R6 = PACK( R6.H , R4.L );
|
||
|
|
R7 = PACK( R7.H , R4.H );
|
||
|
|
CHECKREG r0, 0x000C89AB;
|
||
|
|
CHECKREG r1, 0x5678C567;
|
||
|
|
CHECKREG r2, 0xC34589AB;
|
||
|
|
CHECKREG r3, 0xC456C567;
|
||
|
|
CHECKREG r4, 0x89AB89AB;
|
||
|
|
CHECKREG r5, 0x9ABC89AB;
|
||
|
|
CHECKREG r6, 0xC78989AB;
|
||
|
|
CHECKREG r7, 0xC89A89AB;
|
||
|
|
|
||
|
|
imm32 r0, 0xd123000d;
|
||
|
|
imm32 r1, 0xd2345678;
|
||
|
|
imm32 r2, 0xd3456789;
|
||
|
|
imm32 r3, 0xd456789a;
|
||
|
|
imm32 r4, 0xd56789ab;
|
||
|
|
imm32 r5, 0xd6789abc;
|
||
|
|
imm32 r6, 0xd789abcd;
|
||
|
|
imm32 r7, 0xd89abcde;
|
||
|
|
R0 = PACK( R0.L , R5.L );
|
||
|
|
R1 = PACK( R1.L , R5.H );
|
||
|
|
R2 = PACK( R2.H , R5.L );
|
||
|
|
R3 = PACK( R3.H , R5.H );
|
||
|
|
R4 = PACK( R4.L , R5.L );
|
||
|
|
R5 = PACK( R5.L , R5.H );
|
||
|
|
R6 = PACK( R6.H , R5.L );
|
||
|
|
R7 = PACK( R7.H , R5.H );
|
||
|
|
CHECKREG r0, 0x000D9ABC;
|
||
|
|
CHECKREG r1, 0x5678D678;
|
||
|
|
CHECKREG r2, 0xD3459ABC;
|
||
|
|
CHECKREG r3, 0xD456D678;
|
||
|
|
CHECKREG r4, 0x89AB9ABC;
|
||
|
|
CHECKREG r5, 0x9ABCD678;
|
||
|
|
CHECKREG r6, 0xD789D678;
|
||
|
|
CHECKREG r7, 0xD89A9ABC;
|
||
|
|
|
||
|
|
|
||
|
|
imm32 r0, 0xe123000e;
|
||
|
|
imm32 r1, 0xe2345678;
|
||
|
|
imm32 r2, 0xe3456789;
|
||
|
|
imm32 r3, 0xe456789a;
|
||
|
|
imm32 r4, 0xe56789ab;
|
||
|
|
imm32 r5, 0xe6789abc;
|
||
|
|
imm32 r6, 0xe789abcd;
|
||
|
|
imm32 r7, 0xe89abcde;
|
||
|
|
R0 = PACK( R0.L , R6.L );
|
||
|
|
R1 = PACK( R1.L , R6.H );
|
||
|
|
R2 = PACK( R2.H , R6.L );
|
||
|
|
R3 = PACK( R3.H , R6.H );
|
||
|
|
R4 = PACK( R4.L , R6.L );
|
||
|
|
R5 = PACK( R5.L , R6.H );
|
||
|
|
R6 = PACK( R6.H , R6.L );
|
||
|
|
R7 = PACK( R7.H , R6.H );
|
||
|
|
CHECKREG r0, 0x000EABCD;
|
||
|
|
CHECKREG r1, 0x5678E789;
|
||
|
|
CHECKREG r2, 0xE345ABCD;
|
||
|
|
CHECKREG r3, 0xE456E789;
|
||
|
|
CHECKREG r4, 0x89ABABCD;
|
||
|
|
CHECKREG r5, 0x9ABCE789;
|
||
|
|
CHECKREG r6, 0xE789ABCD;
|
||
|
|
CHECKREG r7, 0xE89AE789;
|
||
|
|
|
||
|
|
imm32 r0, 0xf123000f;
|
||
|
|
imm32 r1, 0xf2345678;
|
||
|
|
imm32 r2, 0xf3456789;
|
||
|
|
imm32 r3, 0xf456789a;
|
||
|
|
imm32 r4, 0xf56789ab;
|
||
|
|
imm32 r5, 0xf6789abc;
|
||
|
|
imm32 r6, 0xf789abcd;
|
||
|
|
imm32 r7, 0xf89abcde;
|
||
|
|
R0 = PACK( R0.L , R7.L );
|
||
|
|
R1 = PACK( R1.L , R7.H );
|
||
|
|
R2 = PACK( R2.H , R7.L );
|
||
|
|
R3 = PACK( R3.H , R7.H );
|
||
|
|
R4 = PACK( R4.L , R7.L );
|
||
|
|
R5 = PACK( R5.L , R7.H );
|
||
|
|
R6 = PACK( R6.H , R7.L );
|
||
|
|
R7 = PACK( R7.H , R7.H );
|
||
|
|
CHECKREG r0, 0x000FBCDE;
|
||
|
|
CHECKREG r1, 0x5678F89A;
|
||
|
|
CHECKREG r2, 0xF345BCDE;
|
||
|
|
CHECKREG r3, 0xF456F89A;
|
||
|
|
CHECKREG r4, 0x89ABBCDE;
|
||
|
|
CHECKREG r5, 0x9ABCF89A;
|
||
|
|
CHECKREG r6, 0xF789BCDE;
|
||
|
|
CHECKREG r7, 0xF89AF89A;
|
||
|
|
pass
|