mirror of
https://sourceware.org/git/binutils-gdb.git
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293 lines
7.3 KiB
ArmAsm
293 lines
7.3 KiB
ArmAsm
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//Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1a0_i/c_dsp32mac_pair_a1a0_i.dsp
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// Spec Reference: dsp32mac pair a1a0 I
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# mach: bfin
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.include "testutils.inc"
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start
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A1 = A0 = 0;
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// The result accumulated in A , and stored to a reg half
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imm32 r0, 0x63545abd;
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imm32 r1, 0x86bcfec7;
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imm32 r2, 0xa8645679;
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imm32 r3, 0x00860007;
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imm32 r4, 0xefb86569;
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imm32 r5, 0x1235860b;
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imm32 r6, 0x000c086d;
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imm32 r7, 0x678e0086;
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R7 = ( A1 += R1.L * R0.L ), R6 = ( A0 = R1.L * R0.L ) (IS);
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P1 = A1.w;
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P2 = A0.w;
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R1 = ( A1 = R2.L * R3.L ), R0 = ( A0 = R2.H * R3.L ) (IS);
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P3 = A1.w;
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P4 = A0.w;
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R3 = ( A1 = R7.L * R4.L ), R2 = ( A0 += R7.H * R4.H ) (IS);
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P5 = A1.w;
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SP = A0.w;
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R5 = ( A1 += R6.L * R5.L ), R4 = ( A0 += R6.L * R5.H ) (IS);
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FP = A1.w;
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CHECKREG r0, 0xFFFD9ABC;
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CHECKREG r1, 0x00025D4F;
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CHECKREG r2, 0x0004A9F4;
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CHECKREG r3, 0x05E8D563;
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CHECKREG r4, 0x0114469B;
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CHECKREG r5, 0xFECD7B7C;
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CHECKREG r6, 0xFF910EEB;
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CHECKREG r7, 0xFF910EEB;
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CHECKREG p1, 0xFF910EEB;
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CHECKREG p2, 0xFF910EEB;
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CHECKREG p3, 0x00025D4F;
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CHECKREG p4, 0xFFFD9ABC;
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CHECKREG p5, 0x05E8D563;
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CHECKREG sp, 0x0004A9F4;
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CHECKREG fp, 0xFECD7B7C;
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imm32 r0, 0x98764abd;
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imm32 r1, 0xa1bcf4c7;
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imm32 r2, 0xa1145649;
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imm32 r3, 0x00010005;
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imm32 r4, 0xefbc1569;
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imm32 r5, 0x1235010b;
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imm32 r6, 0x000c001d;
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imm32 r7, 0x678e0001;
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R5 = ( A1 += R1.L * R0.H ), R4 = ( A0 = R1.L * R0.L ) (IS);
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P1 = A1.w;
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P2 = A0.w;
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R1 = ( A1 = R2.L * R3.H ), R0 = ( A0 -= R2.H * R3.L ) (IS);
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P2 = A0.w;
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P3 = A1.w;
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P4 = A0.w;
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R3 = ( A1 -= R4.L * R5.H ), R2 = ( A0 += R4.H * R5.H ) (IS);
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P5 = A1.w;
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SP = A0.w;
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R1 = ( A1 += R6.L * R7.H ), R0 = ( A0 += R6.L * R7.H ) (IS);
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FP = A0.w;
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CHECKREG r0, 0xFCBBE07C;
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CHECKREG r1, 0xFF409C82;
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CHECKREG r2, 0xFCB02566;
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CHECKREG r3, 0xFF34E16C;
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CHECKREG r4, 0xFCB93CEB;
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CHECKREG r5, 0x03577736;
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CHECKREG r6, 0x000C001D;
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CHECKREG r7, 0x678E0001;
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CHECKREG p1, 0x03577736;
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CHECKREG p2, 0xFCBB1787;
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CHECKREG p3, 0x00005649;
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CHECKREG p4, 0xFCBB1787;
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CHECKREG p5, 0xFF34E16C;
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CHECKREG sp, 0xFCB02566;
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CHECKREG fp, 0xFCBBE07C;
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imm32 r0, 0x7136459d;
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imm32 r1, 0xabd69ec7;
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imm32 r2, 0x71145679;
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imm32 r3, 0x08010007;
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imm32 r4, 0xef9c1569;
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imm32 r5, 0x1225010b;
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imm32 r6, 0x0003401d;
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imm32 r7, 0x678e0561;
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R5 = ( A1 += R1.H * R0.L ), R4 = ( A0 = R1.L * R0.L ) (IS);
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P1 = A1.w;
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P2 = A0.w;
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R7 = ( A1 = R2.H * R3.L ), R6 = ( A0 = R2.H * R3.L ) (IS);
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P3 = A1.w;
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P4 = A0.w;
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R1 = ( A1 -= R4.H * R5.L ), R0 = ( A0 += R4.H * R5.H ) (IS);
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P5 = A1.w;
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SP = A0.w;
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R5 = ( A1 += R6.H * R7.L ), R4 = ( A0 += R6.L * R7.H ) (IS);
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FP = A0.w;
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CHECKREG r0, 0x0273FCDC;
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CHECKREG r1, 0xF76A2B8C;
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CHECKREG r2, 0x71145679;
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CHECKREG r3, 0x08010007;
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CHECKREG r4, 0x02744380;
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CHECKREG r5, 0xF76A7230;
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CHECKREG r6, 0x0003178C;
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CHECKREG r7, 0x0003178C;
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CHECKREG p1, 0xE85DACC0;
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CHECKREG p2, 0xE590030B;
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CHECKREG p3, 0x0003178C;
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CHECKREG p5, 0xF76A2B8C;
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CHECKREG p4, 0x0003178C;
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CHECKREG sp, 0x0273FCDC;
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CHECKREG fp, 0x02744380;
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imm32 r0, 0x123489bd;
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imm32 r1, 0x91bcfec7;
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imm32 r2, 0xa9145679;
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imm32 r3, 0xd0910007;
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imm32 r4, 0xedb91569;
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imm32 r5, 0xd235910b;
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imm32 r6, 0x0d0c0999;
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imm32 r7, 0x67de0009;
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R1 = ( A1 += R5.H * R3.H ), R0 = ( A0 = R5.L * R3.L ) (IS);
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P1 = A1.w;
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P2 = A0.w;
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R3 = ( A1 = R2.H * R1.H ), R2 = ( A0 -= R2.H * R1.L ) (IS);
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P3 = A1.w;
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P4 = A0.w;
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R5 = ( A1 = R7.H * R0.H ), R4 = ( A0 += R7.H * R0.H ) (IS);
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P5 = A1.w;
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SP = A0.w;
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R7 = ( A1 += R4.H * R6.H ), R6 = ( A0 += R4.L * R6.H ) (IS);
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FP = A0.w;
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CHECKREG r0, 0xFFFCF74D;
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CHECKREG r1, 0xFFE69235;
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CHECKREG r2, 0xDAB58E29;
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CHECKREG r3, 0x0008D3F8;
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CHECKREG r4, 0xDAB3EEB1;
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CHECKREG r5, 0xFFFE6088;
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CHECKREG r6, 0xD9D21BFD;
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CHECKREG r7, 0xFE17B7EC;
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CHECKREG p1, 0xFFE69235;
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CHECKREG p2, 0xFFFCF74D;
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CHECKREG p3, 0x0008D3F8;
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CHECKREG p4, 0xDAB58E29;
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CHECKREG p5, 0xFFFE6088;
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CHECKREG sp, 0xDAB3EEB1;
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CHECKREG fp, 0xD9D21BFD;
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imm32 r0, 0x63545abd;
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imm32 r1, 0x86bcfec7;
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imm32 r2, 0xa8645679;
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imm32 r3, 0x00860007;
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imm32 r4, 0xefb86569;
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imm32 r5, 0x1235860b;
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imm32 r6, 0x000c086d;
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imm32 r7, 0x678e0086;
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R7 = ( A1 += R1.L * R0.L ) (M), R6 = ( A0 = R1.L * R0.L ) (IS);
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P1 = A1.w;
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P2 = A0.w;
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R1 = ( A1 = R2.L * R3.L ) (M), R0 = ( A0 = R2.H * R3.L ) (IS);
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P3 = A1.w;
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P4 = A0.w;
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R3 = ( A1 -= R7.L * R4.L ) (M), R2 = ( A0 -= R7.H * R4.H ) (IS);
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P5 = A1.w;
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SP = A0.w;
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R5 = ( A1 += R6.L * R5.L ) (M), R4 = ( A0 += R6.L * R5.H ) (IS);
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FP = A0.w;
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CHECKREG r0, 0xFFFD9ABC;
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CHECKREG r1, 0x00025D4F;
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CHECKREG r2, 0xFFD771FC;
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CHECKREG r3, 0x16A6FC20;
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CHECKREG r4, 0x00E70EA3;
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CHECKREG r5, 0x1E76A239;
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CHECKREG r6, 0xFF910EEB;
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CHECKREG r7, 0xFDA8C6D7;
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CHECKREG p1, 0xFDA8C6D7;
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CHECKREG p2, 0xFF910EEB;
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CHECKREG p3, 0x00025D4F;
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CHECKREG p4, 0xFFFD9ABC;
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CHECKREG p5, 0x16A6FC20;
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CHECKREG sp, 0xFFD771FC;
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CHECKREG fp, 0x00E70EA3;
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imm32 r0, 0x98764abd;
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imm32 r1, 0xa1bcf4c7;
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imm32 r2, 0xa1145649;
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imm32 r3, 0x00010005;
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imm32 r4, 0xefbc1569;
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imm32 r5, 0x1235010b;
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imm32 r6, 0x000c001d;
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imm32 r7, 0x678e0001;
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R5 = A1, R4 = ( A0 = R1.L * R0.L ) (IS);
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P1 = A1.w;
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P2 = A0.w;
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R1 = A1, R0 = ( A0 = R2.H * R3.L ) (IS);
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P3 = A1.w;
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P4 = A0.w;
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R3 = A1, R2 = ( A0 -= R4.H * R5.H ) (IS);
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P5 = A1.w;
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SP = A0.w;
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R1 = A1, R0 = ( A0 += R6.L * R7.H ) (IS);
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FP = A1.w;
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CHECKREG r0, 0x006DB534;
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CHECKREG r1, 0x1E76A239;
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CHECKREG r2, 0x0061FA1E;
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CHECKREG r3, 0x1E76A239;
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CHECKREG r4, 0xFCB93CEB;
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CHECKREG r5, 0x1E76A239;
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CHECKREG r6, 0x000C001D;
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CHECKREG r7, 0x678E0001;
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CHECKREG p1, 0x1E76A239;
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CHECKREG p2, 0xFCB93CEB;
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CHECKREG p3, 0x1E76A239;
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CHECKREG p4, 0xFFFE2564;
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CHECKREG p5, 0x1E76A239;
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CHECKREG sp, 0x0061FA1E;
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CHECKREG fp, 0x1E76A239;
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imm32 r0, 0x7136459d;
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imm32 r1, 0xabd69ec7;
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imm32 r2, 0x71145679;
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imm32 r3, 0x08010007;
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imm32 r4, 0xef9c1569;
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imm32 r5, 0x1225010b;
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imm32 r6, 0x0003401d;
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imm32 r7, 0x678e0561;
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R5 = ( A1 += R1.H * R0.L ) (M), R4 = ( A0 = R1.L * R0.L ) (IS);
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P1 = A1.w;
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P2 = A0.w;
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R7 = A1, R6 = ( A0 = R2.H * R3.L ) (IS);
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P3 = A1.w;
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P4 = A0.w;
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R1 = ( A1 = R4.H * R5.L ) (M), R0 = ( A0 += R4.H * R5.H ) (IS);
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P5 = A1.w;
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SP = A0.w;
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R5 = A1, R4 = ( A0 -= R6.L * R7.H ) (IS);
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FP = A1.w;
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CHECKREG r0, 0xFF3AD93C;
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CHECKREG r1, 0xED91D5F0;
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CHECKREG r2, 0x71145679;
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CHECKREG r3, 0x08010007;
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CHECKREG r4, 0xFE887FD8;
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CHECKREG r5, 0xED91D5F0;
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CHECKREG r6, 0x0003178C;
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CHECKREG r7, 0x0793B277;
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CHECKREG p1, 0x0793B277;
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CHECKREG p2, 0xE590030B;
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CHECKREG p3, 0x0793B277;
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CHECKREG p4, 0x0003178C;
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CHECKREG p5, 0xED91D5F0;
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CHECKREG sp, 0xFF3AD93C;
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CHECKREG fp, 0xED91D5F0;
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imm32 r0, 0x123489bd;
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imm32 r1, 0x91bcfec7;
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imm32 r2, 0xa9145679;
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imm32 r3, 0xd0910007;
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imm32 r4, 0xedb91569;
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imm32 r5, 0xd235910b;
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imm32 r6, 0x0d0c0999;
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imm32 r7, 0x67de0009;
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R1 = A1, R0 = ( A0 = R5.L * R3.L ) (IS);
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P1 = A1.w;
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P2 = A0.w;
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R3 = ( A1 = R2.H * R1.H ) (M), R2 = ( A0 = R2.H * R1.L ) (IS);
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P3 = A1.w;
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P4 = A0.w;
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R5 = ( A1 = R7.H * R0.H ) (M), R4 = ( A0 += R7.H * R0.H ) (IS);
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P5 = A0.w;
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SP = A1.w;
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R7 = A1, R6 = ( A0 += R4.L * R6.H ) (IS);
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FP = A0.w;
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CHECKREG r0, 0xFFFCF74D;
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CHECKREG r1, 0xED91D5F0;
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CHECKREG r2, 0x0E4826C0;
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CHECKREG r3, 0xAF564854;
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CHECKREG r4, 0x0E468748;
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CHECKREG r5, 0x67DC6088;
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CHECKREG r6, 0x081F86A8;
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CHECKREG r7, 0x67DC6088;
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CHECKREG p1, 0xED91D5F0;
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CHECKREG p2, 0xFFFCF74D;
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CHECKREG p3, 0xAF564854;
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CHECKREG p4, 0x0E4826C0;
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CHECKREG p5, 0x0E468748;
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CHECKREG sp, 0x67DC6088;
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CHECKREG fp, 0x081F86A8;
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pass
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