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binutils-gdb/ld/testsuite/ld-arm/bfcsel.d

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[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M Mainline s patch is part of a series of patches to add support for Armv8.1-M Mainline instructions to binutils. This patch adds the BFCSEL instruction. It also adds a local relocation with a new bfd_reloc_code_real enum. ChangeLog entries are as follows: 2019-04-15 Sudakshina Das <sudi.das@arm.com> * reloc.c (BFD_RELOC_THUMB_PCREL_BFCSEL): New relocation. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. *** gas/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (T16_32_TAB): New entriy for bfcsel. (do_t_v8_1_branch): New switch case for bfcsel. (toU): Define. (insns): New instruction for bfcsel. (md_pcrel_from_section): New switch case for BFD_RELOC_THUMB_PCREL_BFCSEL. (md_appdy_fix): Likewise (tc_gen_reloc): Likewise. * testsuite/gas/arm/armv8_1-m-bfcsel.d: New. * testsuite/gas/arm/armv8_1-m-bfcsel.s: New. *** ld/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * testsuite/ld-arm/bfcsel.s: New. * testsuite/ld-arm/bfcsel.d: New. * testsuite/ld-arm/arm-elf.exp: Add above test. *** opcodes/ChangeLog *** 2019-04-15 Sudakshina Das <sudi.das@arm.com> * arm-dis.c (thumb32_opcodes): New instruction bfcsel. (print_insn_thumb32): Edit the switch case for %Z.
2019-04-15 18:53:25 +08:00
.*: file format elf32-.*arm
Disassembly of section .text:
00001000 <_start>:
1000: f101 e7ff bfcsel 4, 1001000 <bar>, 6, eq
1000: R_ARM_THM_BF12 bar
1004: 4623 mov r3, r4
1006: 4611 mov r1, r2
1008: d0ff beq.n 100a <_start\+0xa>
100a: 4613 mov r3, r2
Disassembly of section .foo:
01001000 <bar>:
1001000: 4770 bx lr
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